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Advanced Mechatronics I

Digital Components and Design

Dr. Christopher Kitts

Associate Professor, Santa Clara University

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

Spectrum of Circuit Components

Passive Components Semiconductors

Operational Amplifiers

Digital Components

Microcontrollers

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

Digital Circuitry

Digitization

Noise immunity

Signals often digitized for computer processing

Naturally digitized beliefs: True or False

Sampled and quantized signals

Representation: Base N

x = (x

3

*n

3

)+(x

2

*n

2

)+(x

1

*n

1

)+(x

0

*n

0

)

Base 10: x

10

= 275

10

= (2*10

2

)+(7*10

1

)+(5*10

0

)=200+70+5

Base 2: x

2

= 101

2

= (1*2

2

)+(0*2

1

)+(1*2

0

) = 4

10

+1

10

=5

10

BCD: x

BCD

=123

BCD

=0001 0010 0011

bcd

Binary arithmetic

MSB vs LSB

Representation: Binary Gray code (refectedbinary code)

Alternate process used to increment bits when counting

Characteristic: only one bit changes value at a time as you count

Translates into less errors when digitizing real-world values

Used widely for multi-transducer sensors, commsystems, etc.

n

0

n

1

n

2

n

3

n

4

X

0

X

1

X

2

X

3

X

4

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

Digital Circuitry

Combinatorial Logic: outputs an instantaneous function of inputs

Boolean logic gates, decoders/encoders, (de)multiplexers, etc.

Sequential Logic: outputs a function of inputs and state (memory)

Latches, flip-flops, memory elements, etc.

Clock signals: often used to trigger and/or synchronize processing

Characteristics of interest include rate, duty cycle, rising edge, falling edge, etc.

Logic Families: series of circuits with similar technology and characteristics

Logic levels, fanout, power consumption, supply voltage, etc.

TTL family: based on transistors, easy to interface, 5V supplies

CMOS family: based on MOSFETS, very low power, sensitive to static buildup

Versions within families: L (low-power), H (high-speed), S (Schottky), etc.

Fanout Limitations: a gate can only drive a limited number of other gates

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

Combinatorial Gates

NOT AND OR

NAND NOR XOR

A X = B A X = B A X + =

B A X =

B A X + =

B A X =

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

Simple Transistor Implementations

NAND Gate NOR Gate

NOT Gate AND Gate OR Gate

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

Typical IC pinout

QUAD NAND Gate

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

NAND-Gate Logic Equivalents

AND

OR

NOT

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

Timing Diagrams

Timing diagrams: Helps to visualize instantaneous behavior of

combinatorial logic circuits. Even more valuable when tracking state-

based behavior of sequential logic circuits.

Example: XOR

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

Boolean Identities

DeMorgans Theory

OR NAND of the inverted inputs

ANDNOR of the inverted inputs

If you only have NAND, NOR and

NOT gates, you can take any

Boolean expression and use

DeMorgans Theory to transform it

to an equivalent expression that you

can implement with the gates that

you have

IMPORTANT TO NOTE:

B A AB

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

Converting Truth Tables to Boolean Expressions

Sum of Products (minterms):

Identify lines for which the output is 1

Write an expression for each line by

taking the product of each input

Sum the individual expressions

Product of Sums (maxterms)

Identify lines for which the output is 0

Write an expression for each line by

taking the sum of the inverse of each

input

Multiply the individual expressions

These expressions are equivalent, and you

could use Boolean algebra to show this.

My personal approach is to use SOP unless

nearly all entries are 1, and therefore the

POS expression would be very compact

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

Converting Truth Tables to Boolean Expressions

Karnaugh Maps

Convert truth table to a matrix for which input bit sequences denote each column

and line (with gray code ordering) and for which the entries arethe output values

Identify sub-matrices with all-1 values

Write the sum of products for each expression and simplify

This can save a lot of Boolean simplification compared to SOP or POS techniques

(in this example, we would have 7 or 9 sub-expressions)

A D B C D A B DC OUT

R P S OUT

+ + =

+ + =

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

Simplifying Boolean Expressions

Examples using Boolean Identities

An alternative, implicit approach is to match truth tables

C A X

C A X

A A C A X

A A A C CA AA X

A A A C CA A X

A A A C A C X

A A A C A X

A C A X

+ =

+ =

+ + =

+ + + =

+ + + =

+ + + =

+ + =

+ =

) 1 )( (

) )( (

) 1 (

) 1 (

A X

A X

B A X

A AB X

A AB X

=

=

+ =

+ =

+ =

) 1 (

) 1 (

1

C B A X

C B A X

C B A X

C B A X

C B A X

=

=

+ =

+ + =

+ + =

) (

) (

) (

1

1

) (

=

+ =

+ + =

+ + =

+ =

X

B X

B A A X

A B A X

BA A X

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

Combinatorial Logic Circuit Design

Define and understand the problem (phrase in words)

Write quasi-logic statements or truth table

Write Boolean expression

Sum or products method

Product of sums method

Determine preferred realization

Most compact

Gate availability

Minimum chip

Circuit Diagram

Verify

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

Digital Design

General ability (and design process) to implement

Boolean expressions and logical functions

Example: Safe Logic

If V

BAT

is low and we arent generating power or

we have lost Earth lock, then turn off payloads

Approach: directly write Boolean expression

( ) EarthLock en GoodPowerG Vlow OUT + = ) (

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

Digital Design Combinatorial Circuits

Example: multiplexer

If the control signal is high, pass the first input,

but if the control signal is low then pass the second

Approach: construct truth table then write Boolean

1 1 1 1

1 0 1 1

0 1 0 1

0 0 0 1

1 1 1 0

0 0 1 0

1 1 0 0

0 0 0 0

Out B A Cntrl

AC C B OUT

B B AC C B A A OUT

ABC C B A C AB C B A OUT

+ =

+ + + =

+ + + =

) ( ) (

sum of products (minterms)

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

Digital Circuitry Combinatorial Circuits

Adder

Binary addition

Multiplexer / demultiplexer

Mux: select which input to output

Demux: put input on specific output

Encoder / decoder

Encoder: produces binary number based

on input line values for given function

(example: priority encoder)

Decoder: takes n-bit input and drives

appropriate output lines for the given

function (example: BCD 7-seg LED

display line drivers)

3-bit

Decoder

3-bit

Encoder

2-bit

Multiplexer

2-bit

Demultiplexer

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

Digital Circuitry Sequential Logic

Uses feedback to create internal states that are saved memory

Several types: SR, T, D, JK

Example: SR Flip-flop

Courtesy cybermike.net

Previous values

kept on output lines

Illegal input

combination

Assume we start with Q=1 and Qnot=0, with R and S both 0. You can verify that this maintains the

values of Q=1 and Qnot=0. Now, let R=1 to reset the latch. The output of the top NOR gate, which is

Q, goes to 0; then a split second later, this is fed into the bottom NOR gate and that output, which is

Qnot, goes to 0. The flip-flop remains in this state given constant inputs. You can verify the other

settings in a similar way.

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

555 Timer

Very versatile chip that performs a variety of timing functions,

typically through the customization of external circuits

Example application: One-shot: generates a single pulse of

desired duration upon receipt of a trigger signal

Sequence of operation:

1.Upon start or reset, Q=0, Qnot=1, C

discharged, trigger HIGH, comparator

outputs LOW

2.Trigger drops, trigger comparator goes

HIGH, Q=1, Qnot=0, C starts to charge

based on the RC circuit withtau=RaC

3.At tau, threshold comparator goes

HIGH, Q=0, Qnot=1, capacitor discharges

4.Amount of time output is HIGH is

1.1RaC (since 67% voltage divider

threshold is 1.1 x the 63.2% rise time of

the RC circuit)

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

Flip Flops

Remain in a particular state until external signal causes change

Constructed from combinatorial logic gates

Uses internal feedback to create stateful characteristic

Presets & Clears Triggers

Preset

Q

Qnot

Clear

Preset initializes Q=1

Clear initializes Q=0

Both shouldnt be

active at once

CLK

CLK

CLK

Output transitions occur

under certain policies.

Value based (top)

Clk triggered, pos edge

(middle)

Clk triggers, negative

edge (bottom)

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

Flip Flops

SR Flip Flop

T Flip Flop

S=1 implies set

R=1 implies reset

T=1 implies toggle

at the next clock strobe

Advanced Mechatronics I Digital Design: C. Kitts, Santa Clara University

Flip Flops

J K Flip Flop

D Flip Flop

Most common

flip flop in use

Universal Flip Flop

Acts naturally as

both an SR and a T

flip flop. Then, if

you wire K as J not,

then it acts like a D

flip flop.

J =1 implies set

K=1 implies reset

Both=1 implies toggle

Latch. Q=D at

a clock rising edge

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