Amplifiers

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Amplifiers

© All Rights Reserved

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Lecture 25

Common-Drain Amplifier

I

Similar conguration to common collector.

Analysis: much the same as for CC amplier -- if

V

SB

isnt zero, then the voltage

gain is degraded from about 1 to 0.8-0.9

V

BIAS

+

V

+

R

L

i

SUP

R

S

v

s

v

OUT

+

V

BIAS

V

+

I

SUP

+

V

OUT

EE 105 Spring 1997

Lecture 25

Common-Drain Two-Port Model

I

Two-Port model:

If

V

SB

= 0, then the input resistance is

A

v

= 1 and

R

out

= 1 /

g

m

(for hand analysis)

The CD amplier is a reasonable voltage buffer, especially for large (

W

/

L

) -->

large

g

m

.

v

in

+

v

in

+

v

out

+

(g

m

+ g

mb

)

1

(g

m

+ g

mb

)

g

m

EE 105 Spring 1997

Lecture 25

Single-Stage Amplier Congurations

I

Two complemetary versions exist for each amplier type.

I

CS/CE, CG/CB, and CD/CC have similar topologies (and properties)

Amplier

Type

Transistor Type

Common

Source/

Common

Emitter

(CS/CE)

Common

Gate/

Common

Base

(CG/CB)

Common

Drain/

Common

Collector

(CD/CC)

NMOS

npn pnp

i

SUP

V

+

V

OUT

IN

PMOS

i

SUP

V

+

V

+

V

OUT

OUT OUT

IN

IN

IN

V

i

SUP

i

SUP

V

V

+

IN

i

SUP

V

V

+

IN

i

SUP

V

V

+

V

+

OUT

OUT

IN

V

i

SUP

V

+

OUT

OUT

IN

V

i

SUP

i

SUP

V

+

V

OUT

IN

i

SUP

V

+

V

OUT

IN

i

SUP

V

+

V

OUT

IN

i

SUP

V

+

V

OUT

IN

EE 105 Spring 1997

Lecture 25

Two-Port Parameters for

Single-Stage Ampliers

Note: appropriate two-port model is used, depending on controlled source

Amplier Type Controlled Source

Input Resistance

R

in

Output Resistance

R

out

Common

Emitter

G

m

=

g

m

r

r

o

||

r

oc

Common

Emitter +

R

E

G

m

=

g

m

/ (1+

g

m

R

E

)

r

( 1 +

g

m

R

E

)

r

oc

||

[(1 +

g

m

R

E

)

r

o

]

for

r

>>

R

E

,

R

S

Common

Source

G

m

=

g

m

innity

r

o

||

r

oc

Common

Base

A

i

= -1 1 /

g

m

r

oc

|| [(1 +

g

m

(

r

||

R

S

))

r

o

],

for

g

m

R

S

>> 1

Common

Gate

A

i

= -1

1 /

g

m

, (

v

sb

= 0)

-otherwise-

1 / (

g

m

+

g

mb

)

r

oc

||[(1 +

g

m

R

S

)

r

o

], (

v

sb

=0)

-otherwise-

r

oc

|| [(1+

(g

m

+ g

mb

)

R

S

)

r

o

]

both for

g

m

R

S

>> 1

Common

Collector

A

v

= 1 r

(r

o

|| r

oc

|| R

L

) (1 / g

m

) + R

S

/

Common

Drain

A

v

= 1 if v

sb

= 0,

-otherwise-

g

m

/ (g

m

+ g

mb

)

innity 1 / g

m

if v

sb

= 0,

-otherwise-

1 / (g

m

+ g

mb

)

EE 105 Spring 1997

Lecture 25

Ultra-Simplied Two-Port Parameters

I g

mb

= 0, common base has reasonable source resistance --> R

S

>> r

Amplier Type Controlled Source Input Resistance R

i

Output Resistance R

o

Common

Emitter

G

m

= g

m

r

r

o

|| r

oc

Common

Source

G

m

= g

m

innity r

o

|| r

oc

Common

Base

A

i

= -1 1 / g

m

r

oc

|| (

r

o

)

Common

Gate

A

i

= -1 1 / g

m

r

oc

||[(1+g

m

R

S

) r

o

]

Common

Collector

A

v

= 1 r

+ (r

o

|| r

oc

|| R

L

) (1 / g

m

) + R

S

/

Common

Drain

A

v

= 1 innity 1 / g

m

EE 105 Spring 1997

Lecture 25

Multistage Ampliers

I Single-stage transistor ampliers are inadequate for meeting most design

requirements for any of the four amplier types (voltage, current,

transconductance, and transresistance.)

I Therefore, we use more than one amplifying stage. The challenge is to gain

insight into when to use which of the 12 single stages that are available in a

modern BiCMOS process:

Bipolar Junction Transistor: CE, CB, CC -- in npn and pnp

*

versions

MOSFET: CS, CG, CD -- in n-channel and p-channel versions

*

in many BiCMOS technologies, only the npn BJT is available

I How to design multi-stage ampliers that satisfy the required performance

goals?

* Two fundamental requirements:

1. Impedance matching:

output resistance of stage n, R

out, n

and input resistance of stage n + 1, R

in, (n+1)

,

must be in the proper ratio

R

in, (n+1)

/ R

out, n

--> or

R

in, (n+1)

/ R

out, n

--> 0

to avoid degrading the overall gain parameter for the amplier

2. DC coupling:

direct connection between stages --> interaction between biasing sources must

be considered (later)

Lecture 25

Cascaded Voltage Amplier

I Want R

in

--> infinity, R

out

--> 0, with high voltage gain.

Try CS as rst stage, followed by CS to get more gain ... use 2-port models

I solve for overall voltage gain ... higher, but R

out

= R

out2

which is too large

r

o1

r

oc1

r

o2

r

oc2 v

in1

v

s

g

m1

v

in1

g

m2

v

in2

R

L

R

S

CS CS

+

+

v

in2

+

v

out

+

EE 105 Spring 1997

Lecture 25

Three-Stage Voltage Amplier

I Fix output resistance problem by adding a common drain stage (voltage buffer)

I Output resistance is not that low ... few k for a typical MOSFET and bias -->

could pay an area penalty by making (W/L) very large to fix.

(r

o2

r

oc2

)

v

in

v

s

A

v

v

in

(g

m3

+ g

mb3

)

R

L

R

S

CS CS CD

+

+

v

in3

v

in3

+

v

out

+

+

1

EE 105 Spring 1997

Lecture 25

Transconductance Amplier

I input resistance should be high; output resistance should also be high

I initial idea: use CS stages (they are natural transconductance amps)

I Overall G

m

= - g

m1

(r

o1

|| r

oc1

) g

m2

= A

v1

g

m2

... can be very large

I Output resistance is only moderately large

r

o2

r

oc2 v

in1

v

s

g

m1

(r

o1

r

oc1

)g

m2

v

in1

R

L

R

S

i

out

+

+

Lecture 25

Improved Transconductance Amplier

I Output resistance: boost using CB or CG stage

I high-resistance current sources are needed to avoid having r

oc3

limit the

resistance

(r

o2

r

oc2

)

v

in

v

s

A

v1

g

m2

v

in

R

L

R

S

i

out

+

+

i

in3

g

m3

1

i

in3

CS CS CG

g

m3

r

o3

(r

o2

r

oc2

)

r

oc3

EE 105 Spring 1997

Lecture 25

Two-Stage Current Buffers

I since one CB stage boosted the output resistance substantially, why not add

another one ...

I The base-emitter resistance of the 2

nd

stage BJT is r

2

which is much less than

the 2

nd

stage source resistance = 1

st

stage output resistance

I Therefore, the output resistance expression reduces to

... no improvement over a single CB stage

i

s

R

L

R

S

i

out

i

in1

i

in2

i

in2

i

in1

[ g

m2

r

o2

(r

2

o1

r

o1

r

oc1

)]

r

oc2

CB CB

o1

r

o1

r

oc1

g

m1

1

g

m2

1

R

S2

R

out1

o1

r

o1

r

oc1

= =

R

out

g

m2

r

o2

r

2

r

oc2

o2

r

o2

r

oc2

=

EE 105 Spring 1997

Lecture 25

Improved Current Buffer: CB/CG

I The addition of a common-gate stage results in further increases in the output

resistance, making the current buffer closer to an ideal current source at the

output port

I The product of transconductance and output resistance g

m2

r

o2

can be on the

order of 500 - 900 for a MOSFET --> R

out

is increased by over two orders of

magnitude

Of course, the current supply for the CG stage has to have at least the same order

of output resistance in order for it not to limit the overall R

out

.

Practical limit ... on the order of 100 M

i

s

R

L

R

S

i

out

i

in1

i

in2

i

in2

i

in1

[g

m2

r

o2

(

o1

r

o1

r

oc1

)]

r

oc2

CB CG

o1

r

o1

r

oc1

g

m1

1

g

m2

1

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