17 views

Uploaded by hub23

bcb

save

- 4
- 74150-Multiplexor 16 Entr
- Lab3
- Switching L3 Slides
- switching fabric
- COMPUTER ARCHITECTURE
- Multiplex Ers de Multiplex Ers
- Lecture05.pdf
- Digital Logic Part I _ Computer Science Cafe
- 49509 Fsc
- multiplexer
- asdasdasd
- Dual 3-Channel Analog Multiplexer
- Free Video Lectures for Mca
- Experiment 5
- Course Project
- Digital 16 Marks.
- Comb Circuits
- REGISTER TRANSFER LANGUAGE.pdf
- 10.1.1.159
- NET PAPER 1
- Virtex-6 FPGA Configurable Logic Block
- DCS Objective Question
- Atoll 3.2.1 Administrator Manual
- Data Sheet
- unit08 (1)
- Refresher-Elex 6(April, 2007)
- Variable entered maps
- Binary Morphology With Spatially Variant
- Verilog Code for Simple Computer
- 11601802
- Life Skill Education
- Ieee
- EC207 Logic Circuit Desin
- net
- questions.pdf
- Compare
- EC 203 Solid State Jan_17
- 1788-3259-Embedded Tdp Customer Presentation
- EC 207 Logic Circuite Jan_17
- Transformers
- Arm Tutorial
- GATE-2017-ECE_Morning Session_Feb 5 Paper
- fpgacgc
- EC GATE 2017 Set I Key Solution
- list
- ashenhurst.pdf
- 1Matz.pdf
- Appendix a (1)
- debug
- 40
- A_ML402 page_9-16.v
- tdgfg
- VLSI Introduction
- 363-1407-1-PB.pdf
- Embedded Tdp Customer Presentation
- Miscellaneous_VHDL_Issues.ppt
- Innovative Bio-medical Engineering Final Projects List 2013 Sooxma
- Analog Cmos Amplifiers

You are on page 1of 7

)

Volume 62– No.6, January 2013

18

Implementation of Boolean Functions through

Multiplexers with the Help of Shannon

Expansion Theorem

Saurabh Rawat

Graphic Era University.

Dehradun

Anushree Sah

The University of Greenwich,

London, UK,

Sumit Pundir

Graphic Era University.

Dehradun

ABSTRACT

Implementation of Boolean function through multiplexer can

be done by various multiplexers depending upon the select

lines. Implementation of Boolean functions can be done by

various methods, but in this particular paper stress is more on

multiplexers. Through Shannon expansion theorem,it is easy

for us to implement the Boolean functions in a simpler way.

Upto three variables, can be handled by multiplexers, and

above that we have taken aid of look out table, and how it

uses multiplexers in their operations.

Keywords

Multiplexers, 2 x 1, 4 x 1, 8 x 1, multiplexers, Shannon

Theorem..

1. Multiplexer

A multiplexer circuit has a number of data inputs, one or more

select inputs and one output . It passes the signal value on one

of the data inputs to the output. Data input is selected by the

values of the select inputs .Select input S, chooses as the

output of the multiplexer either input x

0

or x

1

. Multiplexer’s

functionality can be described in the form of a truth table.

S s f

0 f 0

1 1

1.1 Graphic symbol 1.2 truth table

S f

1.3 Sum of products circuit

A 2 to 1 Multiplexer ( f= )

and 4 to 1 multiplexer have four data inputs x

0

,x

1

,x

2

, & x

3

and

two select inputs S1 and S0 . The two bit number represented

by S1S0 select one of the data input as output of the

multiplexer.

1.4 Graphic symbol

1.5 Truth table

00

01

10

11

S

1

S

2

f

0 0 x

0

0 1 x

1

1 0 x

2

1 1 x

3

S

0

S

1

x

0

x

1

x

3

x

2

f

International Journal of Computer Applications (0975 – 8887)

Volume 62– No.6, January 2013

19

f

1.6 Sum of product circuit

A 4 to 1 multiplexer

3 0 1 2 0 1 1 0 1 0 0 1

x S S x S S x S S x S S f

A multiplexer that has n data inputs, requires log

2

n select

inputs. Larger multiplexer can be constructed from small

multiplexers.

1.7 Using 2 to 1 multiplexer to build a 4 to 1 multiplexer

2. Boolean function implementation of

multiplexer

n=2

m

n – number of input variables

m- number of select inputs

2.1 I- Using 8x1 multiplexer for implementation

f(A

1

, A

2

, A

3

) = (3,5,6,7)

f

8 x 1

MUX

2.1.1 8x1 multiplexer implementation

2.2 II- Using 4x1 Multiplexer for implementation

Connecting two variables with selection lines of multiplexer

and remaining single variable of the function is used for the

inputs of the multiplexer. If A is a single variable the inputs

of multiplexer are chosen to be either A or A or 1 to 0

(a) f(A

1

, A

2

, A

3

) = (3,5,6,7)

if MSB i.e. A

1

is used as single variable, and A

2

, A

3

as

select inputs.

x

0

x

1

x

2

x

3

S

0

S

1

f

0

1

0

1

0

1

x

0

x

0

x

1

x

1

S

1

S

0

1

0

International Journal of Computer Applications (0975 – 8887)

Volume 62– No.6, January 2013

20

Minterms

f

0 0 0 0 0

1 0 0 1 0

2 0 1 0 0

3 0 1 1 1

4 1 0 0 0

5 1 0 1 1

6 1 1 0 1

7 1 1 1 1

2.2.1 Truth table

0 1 2 3

4 5 6 7

0 1

2.2.2 Multiplexer Implementation

1

4 x 1

MUX f(3,5,6,7 )

2.2.3 4x1 Multiplexer implementation

(b) f(A

1

, A

2

, A

3

) = (3,5,6,7)

If LSB i.e. A

3

is used as single variable and A

1

, A

2

as select

inputs

Minterm

f

0

1

0

0

0

0

0

1

0

0 f= 0

2

3

0

0

1

1

0

1

0

1 f=

4

5

1

1

0

0

0

1

0

1 f=

6

7

1

1

1

1

0

1

1

1 f= 1

2.2.4 Truth table

1

4 x 1

MUX

2.2.5 4x1 Multiplexer Implementation

Besides using such inputs, it is possible to connect more

complex circuit as inputs to a multiplexer allowing function to

be synthesized using a combination of multiplexers & other

logic gates.

I

0

f

International Journal of Computer Applications (0975 – 8887)

Volume 62– No.6, January 2013

21

f

f

3. Shannon’s Expansion theorem

Shannon’s expansion or the Shannon decomposition is a

method by which a Boolean function can be represented by

the sum of two sub function of the original. Shannon

expansion develops the idea that boolean function can be

reduced by means of the identity.

x

x

f x xf f

where

f

is any function and

x

f

and

x

f

are positive &

negative shannon cofactors of

f

respectively . A positive

shannon cofactor of function

f

with respect to variable x is

defend as that function with all instances of x replaced by 1 A

negative shannon co factor is the same, but replaces all

instances of x by 0.

Any Boolean function f (A

1

, A

2

, A

3

, ---An) can be

written in the form

f (A

1

, A

2

---An) =Ā

1

.f (0, A

2

, A

3

---An) + A

1.

f (1, A

2

, A

3

---

An)

This expansion can be done in terms of any of the n variables.

as f (A

1

, A

2

, A

3

)= (3,5,6,7)

Function can be expressed as sum of products form

f = Ā

1

A

2

A

3

+

A

1

Ā

2

A

3

+

A

1

A

2

Ā

3

+

A

1

A

2

A

3

It can be manipulated into

f = Ā

1

(A

2

A

3

) + A

1

(Ā

2

A

3

+A

2

Ā

3

+ A

2

A

3

)

= Ā

1

(A

2

A

3

) + A

1

(A

2

+A

3

)

0

1

+

3.1 Truth table

2 x 1

MUX

3.2 Truth table Circuit

Three input majority function implemented using a

2 to 1 multiplexer

For three input XOR function

f= A

1

+ A

2

+ A

3

= Ā (A

2

+A

3

) + A

1

(A

2

+A

3

)

3.3 Truth table

2x1 2x1

MUX MUX

3.4 Three input XOR implemented with

2 to 1 Multiplexer

In Shannon’s

expansion the term f (0, A

2,

----An) is called the

co-factor of f with respect to Ā

1

, denoted as

1

A

f . Similarly

the term f (1, A

2

-------------An)

is called the co-factor of f with respect to A

1

, written as

1

A

f

, hence

1

1

1 1 A

A

f A f A f

f

0 0 0 0

0 0 1 0

0 1 0 0

0 1 1 1

1 0 0 0

1 0 1 1

1 1 0 1

1 1 1 1

f

0 0 0 0

0 0 1 1

0 1 0 1

0 1 1 0

1 0 0 1

1 0 1 0

1 1 0 0

1 1 1 1

A

2

A

3

A

1

f

A

3

A

2

A

1

International Journal of Computer Applications (0975 – 8887)

Volume 62– No.6, January 2013

22

A

2

In general if the expansion is done with respect to variable

i

A , then

i

A

f denotes

) , , , 1 , , , (

1 1 1 n i i

A A A A f

and

i

i

A i

A

i n

f A f A A A f ) , , (

1

Complexity of the logic expression may vary, depending on

which variable

i

A

, is used.

Taking another example, to implement the function

f = Ā

1

Ā

3

+ A

1

A

2

+ A

1

A

3

a) Using 2 to 1 multiplexer, Shannon’s expansion using A

1

gives

1

1

1 1 A

A

f A f A f

= Ā1 (Ā

3

) + A

1

(A

2

+ A

3

)

2 x 1

MUX

3.5 Using 2 to 1 multiplexer

b) Using 4 to 1 multiplexer, further .........................using A

2

gives

f= Ā

1

Ā

2

f

Ā1Ā2

+ Ā

1

A

2

f

Ā1A2

+ A

1

Ā

2

f

A1 Ā2

+A

1

A

2

f

A1 A2

=

Ā

1

Ā

2

(Ā

3

)+Ā

1

A

2

(Ā

3

)+A

1

Ā

2

(Ā

3

)+A

1

A

2

(1)

4 x 1

MUX

f( )

1

3.6 Using 4 to 1 multiplexer

The most commonly used logic block is a lookout table

(LUT), which contains storage cells that are used to

implement a small logic function. Each cell is capable of

holding a single logic value either 0 or 1. LUTs of various

sizes may be created, where the size is defined by number of

inputs.

inputs .

3.7 Circuit for a two input LUT

)

0/1

0/1

0/1

0/1

A

3

A

1

f

2x

1

2x

1

2x1

A

1

f

A

2

I

0

I

1

International Journal of Computer Applications (0975 – 8887)

Volume 62– No.6, January 2013

23

3.8 A three input LUT

Using shannon’s expansion any four variable function can be

realized with at most three 3- LUTs (look up tables).

Considering the function

f = Ā

2

A

3

+Ā

1

A

2

Ā

3

+A

2

Ā

3

A

4

+A

1

Ā

2

A

4

Expansion in terms of A

1

produces

f = Ā

1

f

Ā1

+A

1

f

A1

= Ā

1

(Ā

2

A

3

+A

2

Ā

3

+A

2

Ā

3

A

4

)+A

1

(Ā

2

A

3

+A

2

Ā

3

A

4

+Ā

2

Ā

4

)

= Ā

1

(Ā

2

A

3

+A

2

Ā

3

)+A

1

(Ā

2

A

3

+A

2

Ā

3

A

4

+Ā

2

Ā

4

)

A circuit with there 3 LUTs that implements this expression

3.9 Using there 3 LUTs

0/1

0/1

0/1

0/1

0/1

0/1

0/1

0/1

2x1

2x1

2x1

2x1

2x1

2x1

2x1

2x1

A

1

A

2

A

3

f

A

1

0

A

2

A

3

A

4

f

f

A1

f

A1

A

1

International Journal of Computer Applications (0975 – 8887)

Volume 62– No.6, January 2013

24

Decomposition of the function using A

2

, instead of A

1

, gives

f= Ā

2

f

A2

+A

2

f

A2

= Ā

2

(A

3

+A

1

Ā

4

)+A

2

(Ā

1

Ā

3

+Ā

3

A

4

)

as f

Ā2

= f

A2

, hence only two 3 LUTs are needed .

3.10 Using two 3 LUTs.

4. CONCLUSION

In this paper we have seen that Boolean functions can be

implemented using different multiplexers, 2x1, 4x1 or 8x1 .

With the help of Shannon expansion theorem ,complicated

Boolean functions can be made easy ,in implementing through

multiplexers and LUTs (look up table ),again formed with

different combination of multiplexers. This study will be very

helpful for researchers and intellectuals to easy understanding

and practicing of implementation of Boolean functions

through multiplexers in the field of computer science and

technology.

5. REFERENCES

[1] en.wikipedia.org/wiki/Multiplexer

[2] en.wikipedia.org/wiki/Shannon's_expansion

[3] Arturo Hern´andez Aguirre, Bill P. Buckles, and Carlos

Coello Coello. Evolutionary synthesis of logic functions

using multiplexers. In C. Dagli, A.L. Buczak, and et al.,

editors, Proceedings of the 10

th

Conference Smart

Engineering System Design, pages 311–315, New York,

2000. ASME Press.

[4] R. L. Ashenhurst, “The decomposition of switching

functions,” in Proc.Int. Symp. Theory of Switching

Functions, Apr. 1957, pp. 74–116.

[5] Astola, J.T., Stankovi´c, R.S., Fundamentals of

Switching Theory and Logic Design, Springer, 2006.

[6] M. MORRIS MANO “Digital Logic and Computer

Design” 2nd edition

[7] D. Nasib S. Gill, J.B. Dixit “Digital Design and Computer

Organisation”

A

2

A

1

A

3

A

4

0

f

A2

f

- 4Uploaded byjeren1228
- 74150-Multiplexor 16 EntrUploaded bymirchi14
- Lab3Uploaded bydrfaizal
- Switching L3 SlidesUploaded byMuhammad Jahanzaib
- switching fabricUploaded byRajuraji
- COMPUTER ARCHITECTUREUploaded byAkshat Singh
- Multiplex Ers de Multiplex ErsUploaded byPiyooshTripathi
- Lecture05.pdfUploaded byTimothy Eng
- Digital Logic Part I _ Computer Science CafeUploaded bymicro0203
- 49509 FscUploaded byDian Setiawan
- multiplexerUploaded byrajaec30
- asdasdasdUploaded byDownload Use
- Dual 3-Channel Analog MultiplexerUploaded byLuis Alberto
- Free Video Lectures for McaUploaded byedholecom
- Experiment 5Uploaded byMani Vannan Soundarapandiyan
- Course ProjectUploaded byglebhp
- Digital 16 Marks.Uploaded bySaranya Prabhu
- Comb CircuitsUploaded byShekhil Hassan
- REGISTER TRANSFER LANGUAGE.pdfUploaded byShiva Idok
- 10.1.1.159Uploaded bybalos.tza
- NET PAPER 1Uploaded byDeepak Poojari
- Virtex-6 FPGA Configurable Logic BlockUploaded byHorrlod
- DCS Objective QuestionUploaded byravigwl
- Atoll 3.2.1 Administrator ManualUploaded byandr2008
- Data SheetUploaded byAnil kumar reddy
- unit08 (1)Uploaded byjohnsamvlb
- Refresher-Elex 6(April, 2007)Uploaded byvon kervy onrade
- Variable entered mapsUploaded bysolai12sunny
- Binary Morphology With Spatially VariantUploaded bysathish2103
- Verilog Code for Simple ComputerUploaded byEng'r Safeer Ansar

- 11601802Uploaded byhub23
- Life Skill EducationUploaded byhub23
- IeeeUploaded byhub23
- EC207 Logic Circuit DesinUploaded byhub23
- netUploaded byhub23
- questions.pdfUploaded byhub23
- CompareUploaded byhub23
- EC 203 Solid State Jan_17Uploaded byhub23
- 1788-3259-Embedded Tdp Customer PresentationUploaded byhub23
- EC 207 Logic Circuite Jan_17Uploaded byhub23
- TransformersUploaded byhub23
- Arm TutorialUploaded byhub23
- GATE-2017-ECE_Morning Session_Feb 5 PaperUploaded byhub23
- fpgacgcUploaded byhub23
- EC GATE 2017 Set I Key SolutionUploaded byhub23
- listUploaded byhub23
- ashenhurst.pdfUploaded byhub23
- 1Matz.pdfUploaded byhub23
- Appendix a (1)Uploaded byhub23
- debugUploaded byhub23
- 40Uploaded byhub23
- A_ML402 page_9-16.vUploaded byhub23
- tdgfgUploaded byhub23
- VLSI IntroductionUploaded byhub23
- 363-1407-1-PB.pdfUploaded byhub23
- Embedded Tdp Customer PresentationUploaded byhub23
- Miscellaneous_VHDL_Issues.pptUploaded byhub23
- Innovative Bio-medical Engineering Final Projects List 2013 SooxmaUploaded byhub23
- Analog Cmos AmplifiersUploaded byhub23