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You are on page 1of 16

3, MARCH 2014

A Uniﬁed Control Strategy for Three-Phase Inverter

in Distributed Generation

Zeng Liu, Student Member, IEEE, Jinjun Liu, Senior Member, IEEE, and Yalin Zhao

Abstract—This paper presents a uniﬁed control strategy that en-

ables bothislandedandgrid-tiedoperations of three-phase inverter

in distributed generation, with no need for switching between two

corresponding controllers or critical islanding detection. The pro-

posed control strategy composes of an inner inductor current loop,

and a novel voltage loop in the synchronous reference frame. The

inverter is regulated as a current source just by the inner induc-

tor current loop in grid-tied operation, and the voltage controller

is automatically activated to regulate the load voltage upon the

occurrence of islanding. Furthermore, the waveforms of the grid

current in the grid-tied mode and the load voltage in the islanding

mode are distorted under nonlinear local load with the conven-

tional strategy. And this issue is addressed by proposing a uniﬁed

load current feedforward in this paper. Additionally, this paper

presents the detailed analysis and the parameter design of the

control strategy. Finally, the effectiveness of the proposed control

strategy is validated by the simulation and experimental results.

Index Terms—Distributed generation (DG), islanding, load cur-

rent, seamless transfer, three-phase inverter, uniﬁed control.

I. INTRODUCTION

D

ISTRIBUTED generation (DG) is emerging as a viable

alternative when renewable or nonconventional energy

resources are available, such as wind turbines, photovoltaic ar-

rays, fuel cells, microturbines [1], [3]. Most of these resources

are connected to the utility through power electronic interfacing

converters, i.e., three-phase inverter. Moreover, DG is a suitable

formto offer high reliable electrical power supply, as it is able to

operate either in the grid-tied mode or in the islanded mode [2].

In the grid-tied operation, DG deliveries power to the utility

and the local critical load. Upon the occurrence of utility outage,

the islanding is formed. Under this circumstance, the DG must

be tripped and cease to energize the portion of utility as soon as

possible according to IEEE Standard 929-2000 [4]. However,

in order to improve the power reliability of some local critical

Manuscript received December 15, 2012; revised March 4, 2013; accepted

April 21, 2013. Date of current version September 18, 2013. This work was

supported in part by the National Basic Research Program (973 Program) of

China under Project 2009CB219705, and by the State Key Laboratory of Elec-

trical Insulation and Power Equipment under Project EIPE09109. This paper

was presented in part at the 26th IEEE Applied Power Electronics Conference

and Exposition, Fort Worth, TX, USA, March 6–11, 2011. Recommended for

publication by Associate Editor D. Xu.

The authors are with the State Key Lab of Electrical Insulation and

Power Equipment, School of Electrical Engineering, Xi’an Jiaotong Univer-

sity, Xi’an 710049, China (e-mail: zeng.liu@ieee.org; jjliu@mail.xjtu.edu.cn;

yobdc54@gmail.com).

Color versions of one or more of the ﬁgures in this paper are available online

at http://ieeexplore.ieee.org.

Digital Object Identiﬁer 10.1109/TPEL.2013.2262078

load, the DG should disconnect to the utility and continue to

feed the local critical load [5]. The load voltage is key issue of

these two operation modes, because it is ﬁxed by the utility in

the grid-tied operation, and formed by the DG in the islanded

mode, respectively. Therefore, upon the happening of islanding,

DG must take over the load voltage as soon as possible, in order

to reduce the transient in the load voltage. And this issue brings

a challenge for the operation of DG.

Droop-based control is used widely for the power sharing of

parallel inverters [11], [12], which is called as voltage mode

control in this paper, and it can also be applied to DG to real-

ize the power sharing between DG and utility in the grid-tied

mode [13]–[16], [53]. In this situation, the inverter is always

regulated as a voltage source by the voltage loop, and the qual-

ity of the load voltage can be guaranteed during the transition

of operation modes. However, the limitation of this approach is

that the dynamic performance is poor, because the bandwidth

of the external power loop, realizing droop control, is much

lower than the voltage loop. Moreover, the grid current is not

controlled directly, and the issue of the inrush grid current dur-

ing the transition from the islanded mode to the grid-tied mode

always exists, even though phase-locked loop (PLL) and the

virtual inductance are adopted [15].

The hybrid voltage and current mode control is a popular

alternative for DG, in which two distinct sets of controllers

are employed [17]–[40]. The inverter is controlled as a current

source by one sets of a controller in the grid-tied mode, while

as a voltage source by the other sets of controller in the islanded

mode. As the voltage loop or current loop is just utilized in

this approach, a nice dynamic performance can be achieved.

Besides, the output current is directly controlled in the grid-tied

mode, and the inrush grid current is almost eliminated.

In the hybrid voltage and current mode control, there is a

need to switch the controller when the operation mode of DG

is changed. During the interval from the occurrence of utility

outage and switching the controller to voltage mode, the load

voltage is neither ﬁxed by the utility, nor regulated by the DG,

and the length of the time interval is determined by the islanding

detection process. Therefore, the main issue in this approach is

that it makes the quality of the load voltage heavily reliant on the

speed and accuracy of the islanding detection method [6]–[10].

Another issue associated with the aforementioned approaches

is the waveform quality of the grid current and the load voltage

under nonlinear local load. In the grid-tied mode, the output

current of DG is generally desired to be pure sinusoidal [18].

When the nonlinear local load is fed, the harmonic component

of the load current will fully ﬂow into the utility. A single-phase

DG, which injects harmonic current into the utility for mitigating

0885-8993 © 2013 IEEE

LIU et al.: UNIFIED CONTROL STRATEGY FOR THREE-PHASE INVERTER IN DISTRIBUTED GENERATION 1177

Fig. 1. Schematic diagram of the DG based on the proposed control strategy.

the harmonic component of the grid current, is presented in [41].

The voltage mode control is enhanced by controlling the DG to

emulate a resistance at the harmonic frequency, and then the

harmonic current ﬂowing into utility can be mitigated [42].

In the islanded mode, the nonlinear load may distort the load

voltage [43], and many control schemes have been proposed to

improve the quality of the load voltage, including a multiloop

control method [43]–[46], resonant controllers [48], [49], sliding

mode control [47]. However, existing control strategies, dealing

with the nonlinear local load in DG, mainly focus on either the

quality of the grid current in the grid-tied mode or the one of the

load voltage in the islanded mode, and improving both of them

by a uniﬁed control strategy is seldom.

This paper proposes a uniﬁed control strategy that avoids

the aforementioned shortcomings. First, the traditional induc-

tor current loop is employed to control the three-phase inverter

in DG to act as a current source with a given reference in the

synchronous reference frame (SRF). Second, a novel voltage

controller is presented to supply reference for the inner induc-

tor current loop, where a proportional-plus-integral (PI) com-

pensator and a proportional (P) compensator are employed in

D-axis and Q-axis, respectively. In the grid-tied operation, the

load voltage is dominated by the utility, and the voltage com-

pensator in D-axis is saturated, while the output of the voltage

compensator in Q-axis is forced to be zero by the PLL. There-

fore, the reference of the inner current loop cannot regulated by

the voltage loop, and the DG is controlled as a current source

just by the inner current loop. Upon the occurrence of the grid

outage, the load voltage is no more determined by the utility,

and the voltage controller is automatically activated to regulate

the load voltage. These happen naturally, and, thus the proposed

control strategy does not need a forced switching between two

distinct sets of controllers. Further, there is no need to detect

the islanding quickly and accurately, and the islanding detec-

tion method is no more critical in this approach. Moreover,

the proposed control strategy, beneﬁting from just utilizing the

current and voltage feedback control, endows a better dynamic

performance, compared to the voltage mode control.

Third, the proposed control strategy is enhanced by introduc-

ing a uniﬁed load current feedforward, in order to deal with

the issue caused by the nonlinear local load, and this scheme

is implemented by adding the load current into the reference

of the inner current loop. In the grid-tied mode, the DG injects

harmonic current into the grid for compensating the harmonic

component of the grid current, and thus, the harmonic compo-

nent of the grid current will be mitigated. Moreover, the beneﬁt

of the proposed load current feedforward can be extended into

the islanded operation mode, due to the improved quality of the

load voltage.

The rest of this paper is arranged as follows. Section II de-

scribes the proposed uniﬁed control strategy for three-phase

inverter in DG, including the power stage of DG, the basic idea,

and the control diagram. The detailed operation principle of DG

with the proposed control strategy is illustrated in Section III.

The parameter design and small signal analysis of the proposed

control system are given in Section IV. Section V investigates

the proposed control strategy by simulation and experimental

results. Finally, the concluding remarks are given in Section VI.

II. PROPOSED CONTROL STRATEGY

A. Power Stage

This paper presents a uniﬁed control strategy for a three-

phase inverter in DG to operate in both islanded and grid-tied

modes. The schematic diagramof the DGbased on the proposed

control strategy is shown by Fig. 1. The DG is equipped with

a three-phase interface inverter terminated with a LC ﬁlter. The

primary energy is converted to the electrical energy, which is

then converted to dc by the front-end power converter, and the

output dc voltage is regulated by it. Therefore, they can be

represented by the dc voltage source V

dc

in Fig. 1. In the ac side

of inverter, the local critical load is connected directly.

It should be noted that there are two switches, denoted by S

u

and S

i

, respectively, in Fig. 1, and their functions are different.

The inverter transfer switch S

i

is controlled by the DG, and the

utility protection switch S

u

is governed by the utility. When the

utility is normal, both switches S

i

and S

u

are ON, and the DG in

the grid-tied mode injects power to the utility. When the utility is

in fault, the switch S

u

is tripped by the utility instantly, and then

the islanding is formed. After the islanding has been conﬁrmed

by the DG with the islanding detection scheme [6]–[10], the

switch S

i

is disconnected, and the DG is transferred from the

grid-tied mode to the islanded mode. When the utility is restored,

the DG should be resynchronized with the utility ﬁrst, and then

the switch S

i

is turned ON to connect the DG with the grid.

1178 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 3, MARCH 2014

Fig. 2. Overall block diagram of the proposed uniﬁed control strategy.

B. Basic Idea

With the hybrid voltage and current mode control [17]–[40],

the inverter is controlled as a current source to generate the

reference power P

DG

+ jQ

DG

in the grid-tied mode. And its

output power P

DG

+ jQ

DG

should be the sum of the power

injected to the grid P

g

+ jQ

g

and the load demand P

load

+

jQ

load

, which can be expressed as follows by assuming that the

load is represented as a parallel RLC circuit:

P

load

=

3

2

·

V

2

m

R

(1)

Q

load

=

3

2

· V

2

m

·

_

1

ωL

− ωC

_

. (2)

In (1) and (2), V

m

and ω represent the amplitude and fre-

quency of the load voltage, respectively. When the nonlinear

local load is fed, it can still be equivalent to the parallel RLC

circuit by just taking account of the fundamental component.

During the time interval fromthe instant of islanding happen-

ing to the moment of switching the control system to voltage

mode control, the load voltage is neither ﬁxed by the utility nor

regulated by the inverter, so the load voltage may drift from

the normal range [6]. And this phenomenon can be explained

as below by the power relationship. During this time interval,

the inverter is still controlled as a current source, and its output

power is kept almost unchanged. However, the power injected to

utility decreases to zero rapidly, and then the power consumed

by the load will be imposed to the output power of DG. If both

active power P

g

and reactive power Q

g

injected into the grid are

positive in the grid-tied mode, then P

load

and Q

load

will increase

after the islanding happens, and the amplitude and frequency of

the load voltage will rise and drop, respectively, according to

(1) and (2).

With the previous analysis, if the output power of inverter

P

DG

+ jQ

DG

could be regulated to match the load demand by

changing the current reference before the islanding is conﬁrmed,

the load voltage excursion will be mitigated. And this basic idea

is utilized in this paper. In the proposed control strategy, the

output power of the inverter is always controlled by regulating

the three-phase inductor current i

Labc

, while the magnitude and

frequency of the load voltage v

Cabc

are monitored. When the

islanding happens, the magnitude and frequency of the load volt-

age may drift fromthe normal range, and then they are controlled

to recover to the normal range automatically by regulating the

output power of the inverter.

C. Control Scheme

Fig. 2 describes the overall block diagram for the proposed

uniﬁed control strategy, where the inductor current i

Labc

, the

utility voltage v

gabc

, the load voltage v

Cabc

, and the load current

i

LLabc

are sensed. And the three-phase inverter is controlled in

the SRF, in which, three phase variable will be represented

by dc quantity. The control diagram is mainly composed by

the inductor current loop, the PLL, and the current reference

generation module.

In the inductor current loop, the PI compensator is employed

in both D- and Q-axes, and a decoupling of the cross coupling

denoted by ω

0

L

f

/k

PWM

is implemented in order to mitigate the

couplings due to the inductor. The output of the inner current

loop d

dq

**, together with the decoupling of the capacitor voltage
**

denoted by 1/k

PWM

, sets the reference for the standard space

vector modulation that controls the switches of the three-phase

inverter. It should be noted that k

PWM

denotes the voltage gain

of the inverter, which equals to half of the dc voltage in this

paper.

LIU et al.: UNIFIED CONTROL STRATEGY FOR THREE-PHASE INVERTER IN DISTRIBUTED GENERATION 1179

Fig. 3. Block diagram of the current reference generation module.

The PLL in the proposed control strategy is based on the

SRF PLL [50], [51], which is widely used in the three-phase

power converter to estimate the utility frequency and phase.

Furthermore, a limiter is inserted between the PI compensator

G

PLL

and the integrator, in order to hold the frequency of the

load voltage within the normal range in the islanded operation.

In Fig. 2, it can be found that the inductor current is regulated

to follow the current reference i

Lref dq

, and the phase of the

current is synchronized to the grid voltage v

gabc

. If the current

reference is constant, the inverter is just controlled to be a current

source, which is the same with the traditional grid-tied inverter.

The new part in this paper is the current reference generation

module shown in Fig. 2, which regulates the current reference to

guarantee the power match between the DG and the local load

and enables the DG to operate in the islanded mode. Moreover,

the uniﬁed load current feedforward, to deal with the nonlinear

local load, is also implemented in this module.

The block diagram of the proposed current reference gen-

eration module is shown in Fig. 3, which provides the current

reference for the inner current loop in both grid-tied and islanded

modes. In this module, it can be found that an unsymmetrical

structure is used in D- and Q-axes. The PI compensator is

adopted in D-axes, while the P compensator is employed in

Q-axis. Besides, an extra limiter is added in the D-axis. More-

over, the load current feedforward is implemented by adding the

load current i

LLdq

to the ﬁnal inductor current reference i

Lref dq

.

The beneﬁt brought by the unique structure in Fig. 3 can be rep-

resented by two parts: 1) seamless transfer capability without

critical islanding detection; and 2) power quality improvement

in both grid-tied and islanded operations. The current reference

i

Lredq

composes of four parts in D- and Q-axes respectively:

1) the output of voltage controller i

ref dq

; 2) the grid current

reference I

gref dq

; 3) the load current i

LLdq

; and 4) the current

ﬂowing through the ﬁlter capacitor C

f

.

In the grid-tied mode, the load voltage v

Cdq

is clamped by the

utility. The current reference is irrelevant to the load voltage, due

to the saturation of the PI compensator in D-axis, and the output

of the P compensator being zero in Q-axis, and thus, the inverter

operates as a current source. Upon occurrence of islanding, the

voltage controller takes over automatically to control the load

voltage by regulating the current reference, and the inverter acts

as a voltage source to supply stable voltage to the local load;

this relieves the need for switching between different control

architectures.

Another distinguished function of the current reference gen-

eration module is the load current feedforward. The sensed

load current is added as a part of the inductor current refer-

ence i

Lref dq

to compensate the harmonic component in the grid

current under nonlinear local load. In the islanded mode, the load

current feedforward operates still, and the disturbance from the

load current, caused by the nonlinear load, can be suppressed

by the fast inner inductor current loop, and thus, the quality of

the load voltage is improved.

The inductor current control in Fig. 2 was proposed in pre-

vious publications for grid-tied operation of DG [18], and the

motivation of this paper is to propose a uniﬁed control strategy

for DG in both grid-tied and islanded modes, which is repre-

sented by the current reference generation module in Fig. 3.

The contribution of this module can be summarized in two as-

pects. First, by introducing PI compensator and P compensator

in D-axis and Q-axis respectively, the voltage controller is inac-

tivated in the grid-tied mode and can be automatically activated

upon occurrence of islanding. Therefore, there is no need for

switching different controllers or critical islanding detection,

and the quality of the load voltage during the transition from

the grid-tied mode to the islanded mode can be improved. The

second contribution of this module is to present the load current

feedforward to deal with the issue caused by the nonlinear local

load, with which, not only the waveform of the grid current in

grid-tied is improved, but also the quality of the load voltage in

the islanded mode is enhanced.

Besides, it should be noted that a three-phase unbalanced

local load cannot be fed by the DG with the proposed control

strategy, because there is no ﬂow path for the zero sequence

current of the unbalanced load, and the regulation of the zero

sequence current is beyond the scope of the proposed control

strategy.

III. OPERATION PRINCIPLE OF DG

The operation principle of DG with the proposed uniﬁed

control strategy will be illustrated in detail in this section, and

there are in total four states for the DG, including the grid-tied

mode, transition from the grid-tied mode to the islanded mode,

the islanded mode, and transition from the islanded mode to the

grid-tied mode.

A. Grid-Tied Mode

When the utility is normal, the DG is controlled as a current

source to supply given active and reactive power by the inductor

current loop, and the active and reactive power can be given

by the current reference of D- and Q-axis independently. First,

the phase angle of the utility voltage is obtained by the PLL,

which consists of a Park transformation expressed by (3), a PI

1180 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 3, MARCH 2014

compensator, a limiter, and an integrator

_

x

d

x

q

_

=

2

3

_

_

_

_

_

cos θ cos

_

θ −

2

3

π

_

cos

_

θ +

2

3

π

_

−sin θ −sin

_

θ −

2

3

π

_

−sin

_

θ +

2

3

π

_

_

_

_

_

_

×

_

_

x

a

x

b

x

c

_

_

. (3)

Second, the ﬁlter inductor current, which has been trans-

formed into SRF by the Park transformation, is fed back and

compared with the inductor current reference i

Lref dq

, and the

inductor current is regulated to track the reference i

Lref dq

by

the PI compensator G

I

.

The reference of the inductor current loop i

Lref dq

seems

complex and it is explained as below. It is assumed that the utility

is stiff, and the three-phase utility voltage can be expressed as

_

¸

¸

¸

¸

¸

¸

_

¸

¸

¸

¸

¸

¸

_

v

ga

= V

g

cos θ

∗

v

gb

= V

g

cos

_

θ

∗

−

2π

3

_

v

gc

= V

g

cos

_

θ

∗

+

2π

3

_

(4)

where V

g

is the magnitude of the grid voltage, and θ

∗

is the actual

phase angle. By the Park transformation, the utility voltage is

transformed into the SRF, which is shown as

_

v

gd

= V

g

cos(θ

∗

− θ)

v

gq

= V

g

sin(θ

∗

− θ).

(5)

v

gq

is regulated to zero by the PLL, so v

gd

equals the mag-

nitude of the utility voltage V

g

. As the ﬁlter capacitor voltage

equals the utility voltage in the gird-tied mode, v

Cd

equals the

magnitude of the utility voltage V

g

, and v

Cq

equals zero, too.

In the D-axis, the inductor current reference i

Lref d

can be

expressed by (6) according to Fig. 3

i

Lref d

= I

gref d

+ i

LLd

− ω

0

C

f

· v

Cq

. (6)

The ﬁrst part is the output of the limiter. It is assumed that

the given voltage reference V

max

is larger than the magnitude

of the utility voltage v

Cd

in steady state, so the PI compensator,

denoted by G

V D

in the following part, will saturate, and the

limiter outputs its upper value I

gref d

. The second part is the

load current of D-axis i

LLd

, which is determined by the charac-

teristic of the local load. The third part is the proportional part

−ω

0

C

f

· v

Cq

, where ω

0

is the rated angle frequency, and C

f

is the capacitance of the ﬁlter capacitor. It is ﬁxed as v

Cq

de-

pends on the utility voltage. Consequently, the current reference

i

Lref d

is imposed by the given reference I

gref d

and the load

current i

LLd

, and is independent of the load voltage.

In the Q-axis, the inductor current reference i

Lref q

consists

of four parts as

i

Lref q

= v

Cq

· k

Gvq

+ I

gref q

+ i

LLq

+ ω

0

C

f

· v

Cd

(7)

where k

Gvq

is the parameter of the P compensator, denoted by

G

V Q

in the following part. The ﬁrst part is the output of G

V Q

,

Fig. 4. Simpliﬁed block diagram of the uniﬁed control strategy when DG

operates in the grid-tied mode.

which is zero as the v

Cq

has been regulated to zero by the PLL.

The second part is the given current reference I

gref q

, and the

third part represents the load current in Q-axis. The ﬁnal part

is the proportional part −ω

0

C

f

· v

Cd

, which is ﬁxed since v

Cd

depends on the utility voltage. Therefore, the current reference

i

Lref q

cannot be inﬂuenced by the external voltage loop and is

determined by the given reference I

gref q

and the load current

i

LLq

.

With the previous analysis, the control diagramof the inverter

can be simpliﬁed as Fig. 4 in the grid-tied mode, and the inverter

is controlled as a current source by the inductor current loop

with the inductor current reference being determined by the

current reference I

gref dq

and the load current i

LLdq

. In other

words, the inductor current tracks the current reference and the

load current. If the steady state error is zero, I

gref dq

represents

the grid current actually, and this will be analyzed in the next

section.

B. Transition From the Grid-Tied Mode to the Islanded Mode

When the utility switch S

u

opens, the islanding happens, and

the amplitude and frequency of the load voltage will drift due

to the active and reactive power mismatch between the DG and

the load demand. The transition, shown in Fig. 5, can be divided

into two time interval. The ﬁrst time intervals is from the instant

of turning off S

u

to the instant of turning off S

i

when islanding

is conﬁrmed. The second time interval begins from the instant

of turning off inverter switch S

i

.

During the ﬁrst time interval, the utility voltage v

gabc

is still

the same with the load voltage v

Cabc

as the switch S

i

is in ON

state. As the dynamic of the inductor current loop and the voltage

loop is much faster than the PLL [52], while the load voltage

and current are varying dramatically, the angle frequency of the

LIU et al.: UNIFIED CONTROL STRATEGY FOR THREE-PHASE INVERTER IN DISTRIBUTED GENERATION 1181

Fig. 5. Operation sequence during the transition from the grid-tied mode to

the islanded mode.

Fig. 6. Transient process of the voltage and current when the islanding

happens.

load voltage can be considered to be not varied. The dynamic

process in this time interval can be described by Fig. 6, and it is

illustrated later.

In the grid-tied mode, it is assumed that the DG injects ac-

tive and reactive power into the utility, which can be expressed

by (8) and (9), and that the local critical load, shown in (10),

represented by a series connected RLC circuit with the lagging

power factor

P

g

=

3

2

· (v

Cd

i

gd

+ v

Cq

i

gq

) =

3

2

v

Cd

i

gd

(8)

Q

g

=

3

2

· (v

Cq

i

gd

− v

Cd

i

gq

) = −

3

2

v

Cd

i

gq

(9)

Z

sload

= R

s

+ jωL

s

+

1

jωC

s

= R

s

+ j

_

ωL

s

−

1

ωC

s

_

= R

s

+ jX

s

. (10)

When islanding happens, i

gd

will decrease from positive to

zero, and i

gq

will increase from negative to zero. At the same

time, the load current will vary in the opposite direction. The

load voltage in D- and Q-axes is shown by (11) and (12), and

each of them consists of two terms. It can be found that the

load voltage in D-axis v

Cd

will increase as both terms increase.

However, the trend of the load voltage in Q-axis v

Cq

is uncertain

because the ﬁrst term decreases and the second term increases,

and it is not concerned for a while

v

Cd

= i

LLd

· R

s

− i

LLq

· X

s

(11)

v

Cq

= i

LLq

· R

s

+ i

LLd

· X

s

. (12)

With the increase of the load voltage in D-axis v

Cd

, when

it reaches and exceeds V

max

, the input of the PI compensator

G

V D

will become negative, so its output will decrease. Then,

the output of limiter will not imposed to I

gref d

any longer, and

the current reference i

Lref d

will drop. With the regulation of

the inductor current loop, the load current in D-axis i

LLd

will

decrease. As a result, the load voltage in D-axis v

Cd

will drop

and recover to V

max

. After i

LLd

has almost fallen to the normal

value, the load voltage in Q-axis v

Cq

will drop according to

(12). As v

Cq

is decreased from zero to negative, then the input

of the PI compensator G

PLL

will be negative, and its output will

drop. In other words, the angle frequency ω will be reduced.

If it falls to the lower value of the limiter ω

min

, then the angle

frequency will be ﬁxed at ω

min

.

Consequently, at the end of the ﬁrst time interval, the load

voltage in D-axis v

Cd

will be increased to and ﬁxed at V

max

,

and the angle frequency of the load voltage ω will drop. If it is

higher than the lower value of the limiter ω

min

, the PLL can still

operate normally, and the load voltage in Q-axis v

Cq

will be

zero. Otherwise, if it is ﬁxed at ω

min

, the load voltage in Q-axis

v

Cq

will be negative. As the absolute values of v

Cd

and v

Cq

,

at least the one of v

Cd

, are raised, the magnitude of the load

voltage will increase ﬁnally.

The variation of the amplitude and frequency in the load volt-

age can also be explained by the power relationship mentioned

before. When the islanding happens, the local load must ab-

sorb the extra power injected to the grid, as the output power

of inverter is not changed instantaneously. According to (1), the

magnitude of the load voltage V

m

will rise with the increase of

P

load

. At the same time, the angle frequency ω should drop, in

order to consume more reactive power with (2). Therefore, the

result through the power relationship coincides with the previ-

ous analysis.

The second time interval of the transition begins from the

instant when the switch S

i

is open after the islanding has been

conﬁrmed by the islanding detection method. If the switch S

i

opens, the load voltage v

Cabc

is independent with the grid volt-

age v

gabc

. At the same time, v

gabc

will reduce to zero theo-

retically as the switch S

u

has opened. Then, the input of the

compensator G

PLL

becomes zero and the angle frequency is

invariable and ﬁxed to the value at the end of the ﬁrst interval.

Under this circumstance, v

Cdq

is regulated by the voltage loop,

and the inverter is controlled to be a voltage source.

With the previous analysis, it can be concluded that the drift

of the amplitude and frequency in the load voltage is restricted

in the given range when islanding happens. And the inverter

is transferred from the current source operation mode to the

voltage source operation mode autonomously. In the hybrid

voltage and current mode control [17]–[40], the time delay of

islanding detection is critical to the drift of the frequency and

magnitude in the load voltage, because the drift is worse with

the increase of the delay time. However, this phenomenon is

avoided in the proposed control strategy.

C. Islanded Mode

In the islanded mode, switching S

i

and S

u

are both in OFF

state. The PLL cannot track the utility voltage normally, and the

angle frequency is ﬁxed. In this situation, the DGis controlled as

a voltage source, because voltage compensator G

V D

and G

V Q

can regulate the load voltage v

Cdq

. The voltage references in D-

and Q-axis are V

max

and zero, respectively. And the magnitude

of the load voltage equals to V

max

approximately, which will

1182 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 3, MARCH 2014

Fig. 7. Simpliﬁed block diagram of the uniﬁed control strategy when DG

operates in the islanded mode.

be analyzed in Section IV. Consequently, the control diagram of

the three-phase inverter in the islanded mode can be simpliﬁed

as shown in Fig. 7.

In Fig. 7, the load current i

LLdq

is partial reference of the

inductor current loop. So, if there is disturbance in the load

current, it will be suppressed quickly by the inductor current

loop, and a stiff load voltage can be achieved.

D. Transition From the Islanded Mode to the Grid-Tied Mode

If the utility is restored and the utility switch S

u

is ON, the

DG should be connected with utility by turning on switch S

i

.

However, several preparation steps should be performed before

turning on switch S

i

.

First, as soon as utility voltage is restored, the PLL will track

the phase of the utility voltage. As a result, the phase angle of

the load voltage v

Cabc

will follow the grid voltage v

gabc

. If the

load voltage v

Cabc

is in phase with the utility voltage, v

gd

will

equal the magnitude of the utility voltage according to (5).

Second, as the magnitude of the load voltage V

max

is larger

than the utility voltage magnitude V

g

, the voltage reference V

ref

will be changed to V

g

by toggling the selector S fromterminals 1

to 2. As a result, the load voltage will equal to the utility voltage

in both phase and magnitude.

Third, the switch S

i

is turned on, and the selector S is reset

to terminal 1. In this situation, the load voltage will be held by

the utility. As the voltage reference V

ref

equals V

max

, which

is larger than the magnitude of the utility voltage V

g

, so the

PI compensator G

V D

will saturate, and the limiter outputs its

upper value I

gref d

. At the same time, v

Cq

is regulated to zero

by the PLL according to (5), so the output of G

V Q

will be

zero. Consequently, the voltage regulators G

V D

and G

V Q

are

inactivated, and the DG is controlled as a current source just by

the inductor current loop.

IV. ANALYSIS AND DESIGN

In this section, the three-phase inverter with the proposed

control strategy is analyzed and designed in both steady state

and transient state. In the steady state, the operation points of

DG in both grid-tied and islanded modes are analyzed, and

the limiters and references are selected. In the transient state,

compensators in both inductor current loop and the external

voltage loop are designed based on the small-signal model, and

the impact of the load current feedforward is analyzed as well.

A. Steady State

1) Analysis of Operation Points: As analyzed previously, in

the grid-tied mode, the inverter is controlled as a current source,

and the current reference for the inductor current loop i

Lref dq

is

expressed by (6) and (7). The steady-state error will be zero with

the PI compensator in the inductor current loop, so the inductor

current in steady state can be expressed as follows:

_

i

Ld

= I

gref d

− ω

0

C

f

· v

Cq

+ i

LLd

i

Lq

= v

Cq

· k

Gvq

+ ω

0

C

f

· v

Cd

+ I

gref q

+ i

LLq

.

(13)

In the SRF, the relationship between the voltage and the cur-

rent of the ﬁlter capacitor in steady state can be expressed by

_

i

Cd

= −v

Cq

· ωC

f

i

Cq

= v

Cd

· ωC

f

(14)

where ω represents the angle frequency of the DG and C

f

denotes capacitance of the ﬁlter capacitor. As a result, the output

current of the inverter i

odq

can be gained

_

¸

_

¸

_

i

od

= i

Ld

− i

Cd

= I

gref d

− (ω

0

− ω) · C

f

· v

Cq

+ i

LLd

i

oq

= i

Lq

− i

Cq

= v

Cq

· k

Gvq

+ I

gref q

+(ω

0

− ω) · C

f

· v

Cq

+ i

LLq

.

(15)

As angle frequency ω is very close to the rated angle fre-

quency ω

0

, the output current i

odq

can be simpliﬁed as

_

i

od

= I

gref d

+ i

LLd

i

oq

= v

Cq

· k

Gvq

+ I

gref q

+ i

LLq

.

(16)

It can be found that the output current follows I

gref dq

and the

load current i

LLdq

, as v

Cq

equals zero in the grid-tied mode. The

active and reactive power injected into utility can be obtained

as follows. Consequently, the active power and reactive power

ﬂowing from the inverter to utility can be given by I

gref d

and

I

gref q

, respectively

_

¸

¸

¸

¸

¸

¸

¸

¸

¸

¸

¸

_

¸

¸

¸

¸

¸

¸

¸

¸

¸

¸

¸

_

P

g

=

3

2

· [v

Cd

(i

od

− i

LLd

) + v

Cq

(i

oq

− i

LLq

)]

=

3

2

· v

Cd

I

gref d

Q

g

=

3

2

· [v

Cq

(i

od

− i

LLd

) − v

cCd

(i

oq

− i

LLq

)]

= −

3

2

· v

Cd

I

gref q

.

(17)

In the islanded mode, the inverter is controlled as a volt-

age source by the external voltage loop. In the D-axis, v

Cd

is

LIU et al.: UNIFIED CONTROL STRATEGY FOR THREE-PHASE INVERTER IN DISTRIBUTED GENERATION 1183

regulated by the PI compensator G

V D

, so the steady state error

will be zero and v

Cd

can be expressed as follows:

v

Cd

= V

ref

(18)

where V

ref

is the voltage reference in D-axis.

In the Q-axis, the regulator G

V Q

is P compensator, so the

steady state error may not be zero. As the load current is added

to the inductor reference, the condition shown as below can be

achieved

v

Cq

· k

Gvq

+ I

gref q

= 0. (19)

And then, the load voltage in Q-axis can be expressed by

(20). It should be noted that the absolute value of v

Cq

rises with

the increase of the current reference I

gref q

which is related to

the reactive power injected into the utility

v

Cq

= −

I

gref q

k

Gvq

. (20)

The magnitude of the load voltage V

m

can be represented as

follows. It equals to V

ref

approximately, because v

Cq

should be

much lower than V

ref

with proper current reference I

gref q

V

m

=

¸

V

2

ref

+

_

−

I

gref q

k

Gvq

_

2

≈ V

ref

. (21)

When the islanding happens, the angle frequency is restricted

in the given range by the limiter. As analyzed previously, the an-

gle frequency in the islanded mode is determined in the ﬁrst time

interval of the transition from the grid-tied made to the islanded

mode. According to (20), if the current reference I

gref q

is set

to zero, v

Cq

is zero. Then, it means that the angle frequency

ω does not vary in the ﬁrst time interval of the transition, and

it should equal ω

g 0

, which denotes the angle frequency of the

utility before islanding happens. Consequently, the angle fre-

quency of the load voltage ω in the islanded mode is determined

by the current reference I

gref q

, and it can be expressed by (22),

where ω

min

and ω

max

represent the upper and lower values of

the limiter shown in Fig. 2, respectively

ω =

_

¸

_

¸

_

ω

min

, I

gref q

> 0

ω

g0

, I

gref q

= 0

ω

max

, I

gref q

< 0.

(22)

2) Selection of References and Limiters: In the grid-tied

mode, the active power injected into the grid P

g

is given by

the current reference I

gref d

, and it is the upper value of the

limiter in D-axis. Therefore, the selection of I

gref d

depends on

the power rating of the inverter. For the current reference I

gref q

,

ﬁrstly it determines the reactive power injected into utility Q

g

in

the grid-tied mode according to (17), and then it also affects the

magnitude of the load voltage in the islanded mode according

to (21). As a result, the reactive power Q

g

cannot be very large,

in order to make the magnitude of the load voltage within the

normal range in the islanded mode.

In the grid-tied mode, V

max

should be larger than the magni-

tude of the utility voltage V

g

. At the same time, the load voltage

is determined by V

max

in the islanded mode by (21), so V

max

should not be much larger than V

g

. Therefore, it is selected as

the maximum magnitude of the utility voltage in this paper.

According to IEEE standard 1547-2003 [5], the range of the

normal grid voltage is 0.88–1.1 p.u., so V

max

can be selected as

V

max

= 1.1 ·

√

2 · V

n

(23)

where V

n

represents the RMS value of the rated phase voltage.

In order to guarantee that the PLL operates normally in the

grid-tied mode, the utility angle frequency ω should not touch

the upper value ω

max

or lower value ω

min

of the limier in the

PLL. Besides, the angle frequency ω is restricted between ω

max

and ω

min

in the islanded mode, and it should not drift from

the normal value too far. So, ω

max

and ω

min

are selected as

the maximum and minimum angle frequencies allowed by the

utility standard.

B. Transient State

1) Small-Signal Model of the Power Stage: Before the com-

pensators in the voltage and current loops are designed and the

transient performance is analyzed, the three-phase inverter in the

DG needs to be modeled. According to the power stage shown

in Fig. 1, the dc-link voltage V

dc

is regulated by the front-end

converter in DG. Then, it is assumed that the dc voltage V

dc

is

very stiff, and its dynamic is not concerned in this paper. There-

fore, the average model of the power stage can be described

by

V

dc

2

·

_

_

_

d

a

d

b

d

c

_

_

_ = L

f

·

d

dt

_

_

_

i

La

i

Lb

i

Lc

_

_

_+ R

l

·

_

_

_

i

La

i

Lb

i

Lc

_

_

_+

_

_

_

v

Ca

v

Cb

v

Cc

_

_

_

(24)

_

_

_

i

La

i

Lb

i

Lc

_

_

_ = C

f

·

d

dt

_

_

_

v

Ca

v

Cb

v

Cc

_

_

_+

_

_

_

i

LLa

i

LLb

i

LLc

_

_

_+

_

_

_

i

ga

i

gb

i

gc

_

_

_. (25)

In (24), d

a

, d

b

, and d

c

are the average duty cycle of each leg

varying from −1 to 1, and R

l

represents the equivalent series

resistance of the ﬁlter inductor. Then, the average model in the

SRF can obtained with the Park transformation shown in (3),

which is represented by

V

dc

2

·

_

d

d

d

q

_

= L

f

·

d

dt

_

i

Ld

i

Lq

_

+

_

0 −ωL

f

ωL

f

0

_

·

_

i

Ld

i

Lq

_

+ R

l

·

_

i

Ld

i

Lq

_

+

_

v

Cd

v

Cq

_

(26)

_

i

Ld

i

Lq

_

= C

f

·

d

dt

_

v

Cd

v

Cq

_

+

_

0 −ωC

f

ωC

f

0

_

·

_

v

Cd

v

Cq

_

+

_

i

LLd

i

LLq

_

+

_

i

gd

i

gq

_

. (27)

With the stiff dc voltage V

dc

, the small-signal model will be

the same as the average model. Then, it can be found that there

are couplings introduced by the inductor L

f

and capacitors C

f

between D and Q-axes in the SRF, and these couplings can

be mitigated by the decoupling components ω

0

L

f

/k

PWM

and

1184 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 3, MARCH 2014

TABLE I

PARAMETERS OF THE POWER STAGE

Fig. 8. Bode plot of the control-to-current transfer function in grid-tied and

islanded modes.

ω

0

C

f

in Fig. 3 [12]. Therefore, the small-signal model can be

simpliﬁed into two identical SISOsystems, which is represented

by (28) and the subscript d and q are ignored

_

¸

¸

_

¸

¸

_

V

dc

2

·

ˆ

d = L

f

·

d

dt

ˆ

i

L

+ R

l

·

ˆ

i

L

+ ˆ v

C

ˆ

i

L

= C

f

·

d

dt

ˆ v

C

+

ˆ

i

LL

+

ˆ

i

g

.

(28)

2) Design and Analysis of the Current Loop: The inductor

current loop should operate normally to regulate the inductor

current loop in both islanded and grid-tied modes. In the islanded

mode, the small-signal model of the control-to-current can be

obtained according to (28), which is shown as

G

id1

(s) =

ˆ

i

L

(s)

ˆ

d(s)

=

V

dc

2

·

sC

f

s

2

L

f

C

f

+ sR

l

C

f

+ 1

. (29)

However, in the grid-tied mode, the dynamic of the capacitor

C

f

is ignored due to the stiff utility [34], and the small-signal

model of the control-to-current is described by

G

id2

(s) =

ˆ

i

L

(s)

ˆ

d(s)

=

V

dc

2

·

1

sL

f

+ R

l

. (30)

The parameters of the power stage in this paper are shown

in Table I, and the Bode plot of the control-to-current transfer

function in both of operation modes is shown in Fig. 8. It can

be found that huge difference appears in the low and medium

Fig. 9. Bode plot of the loop gain of the inner current loop.

Fig. 10. Block diagram of the simpliﬁed voltage loop.

frequency range, and it is difﬁcult to design the compensator G

I

to achieve good performance in both of operation modes.

The reason for this difference between the islanded mode

and the grid-tied mode is that the inductor current is coupled

with the capacitor voltage in the islanded mode. To mitigate

this difference, the capacitor voltage is fed forward with the

coefﬁcient 1/k

PWM

in Fig. 2, and then the inductor current

can be decoupled with the capacitor voltage. Consequently, the

transfer function of control to current in the islanded mode

is changed to be close to the one in the grid-tied mode, and

the current compensator G

I

can be designed based on uniﬁed

transfer function shown by (30).

The PI compensator G

I

in (31) is designed, and the digital

delay caused by the pulse width modulation (PWM) and sample

is considered as well. The loop gain of the current loop is shown

in Fig. 9, with the crossover frequency of 1100 Hz, and the phase

margin of 65

◦

G

i

(s) = k

Gi

·

1 +

s

ω

G i

s

. (31)

3) Design and Analysis of the Voltage Loop: The voltage

loop just operates in the islanded mode to regulate the load

voltage, and the simpliﬁed block diagram is shown in Fig. 10,

where G

ic

(s) and G

vi

(s) denote the closed-loop transfer function

of an inductor loop and the impedance of the ﬁlter capacitor C

f

,

respectively.

In the D-axis, G

V D

is a PI compensator shown in (32), while

a P compensator G

V Q

expressed by (33) is used in Q-axis.

These two compensators are designed, and the loop gain of the

current loop is shown in Fig. 11. It can be found that there is a

little difference in the low frequency range. The phase margin

is set to 55

◦

, and the crossover frequency is around 600 Hz in

LIU et al.: UNIFIED CONTROL STRATEGY FOR THREE-PHASE INVERTER IN DISTRIBUTED GENERATION 1185

Fig. 11. Bode plot of the loop gain of the voltage loop in D- and Q-axes.

both D- and Q-axes

G

vd

(s) = k

Gvd

·

1 +

s

ω

G v d

s

(32)

G

vq

(s) = k

Gvq

. (33)

4) Impact of Load Current Feedforward: In Fig. 10, the load

current

ˆ

i

LL

is a part of the inductor current reference, and the

disturbance from the load current can be suppressed by the

inductor current loop directly. To evaluate the effect of the load

current feedforward in the islanded mode, the transfer function

of the output impedance is derived. The output impedances with

and without load current feedforward are expressed by

Z

o1

(s) =

ˆ v

C

(s)

ˆ

i

LL

(s)

= −

G

vi

(s) · [1 − G

ic

(s)]

1 + G

v

(s) · G

ic

(s) · G

vi

(s)

(34)

Z

o2

(s) =

ˆ v

C

(s)

ˆ

i

LL

(s)

= −

G

vi

(s)

1 + G

v

(s) · G

ic

(s) · G

vi

(s)

. (35)

Comparing (34) and (35), it can be found that an extra factor

[1 − G

ic

(s)] appears in the output impedance with load current

feedforward, and the magnitude of the output impedance will

be reduced in the low frequency range because the gain of

the closed-loop transfer function G

ic

(s) closes to unity in the

bandwidth of the current loop. The Bode plot of the output

impedance of these two conditions is shown in Fig. 12, and

it can be seen that the magnitude of the output impedance is

reduced from dc to 600 Hz with the load current feedforward.

Consequently, the quality of the load voltage v

Cabc

will be

improved with the load current feedforward.

In the grid-tied mode, the inductor current is regulated by the

inductor current loop directly, and the inductor current reference

is mainly composed by the current reference I

gref dq

, and the

load current i

LLdq

. If the load current is not fed forward, the

output current i

odq

of the inverter will be ﬁxed by I

gref dq

. As a

result, the disturbance of the load current will be fully injected

into the utility, and this can be represented by

ˆ

i

g

(s)

ˆ

i

LL

(s)

= −1. (36)

Fig. 12. Bode plot of the output impedance with and without the load current

feedforward, when DG operates in the islanded mode.

Fig. 13. Bode plot of the transfer function from load current to grid current

with and without the load current feedforward, when DGoperates in the grid-tied

mode.

With the load current feedforward, the disturbance of the

load current can be compensated by the inverter, and the trans-

fer function from the load current to the grid current can be

described by (37). The Bode plots of transfer function [see (36)

and (37)] are shown in Fig. 13, and the gain is mitigated up to

1050 Hz with the load current feedforward and therefore, the

quality of the grid current can be improved

ˆ

i

g

(s)

ˆ

i

LL

(s)

= G

ic

(s) − 1. (37)

V. SIMULATION AND EXPERIMENTAL RESULTS

A. Simulation Results

To investigate the feasible of the proposed control strategy,

the simulation has been done in PSIM. The power rating of a

three-phase inverter is 3 kWin the simulation. The parameters in

the simulation are shown in Tables I and II. The RMS of the rated

phase voltage is 115 V, and the voltage reference V

max

is set

as 10% higher than the rated value. The rated utility frequency

1186 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 3, MARCH 2014

TABLE II

PARAMETERS IN THE CONTROL SYSTEM

Fig. 14. Simulation waveforms of load voltage v

C a

, grid current i

g a

, and

inductor current i

La

when DG is in the grid-tied mode under condition of the

step down of the grid current reference from 9 A to 5 A with: (a) conventional

voltage mode control, and (b) proposed uniﬁed control strategy.

is 50 Hz, and the upper and the lower values of the limiter in

the PLL are given as 0.2 Hz higher and lower than the rated

frequency, respectively.

In the grid-tied mode, the dynamic performance of the con-

ventional voltage mode control and the proposed uniﬁed control

strategy is compared by stepping down the grid current refer-

ence from 9 A to 5 A. The simulation result of the voltage

mode control is shown in Fig. 14(a), and the current reference is

changed at the moment of 14 s. It is found that dynamic process

lasts until around 15.2 s. In the proposed uniﬁed control strategy,

the simulation result is represented in Fig. 14(b) and the time

interval of the dynamic process is less than 5 ms. Comparing

Fig. 15. Simulation waveforms of load voltage v

C a

, grid current i

g a

, and

inductor current i

La

when DG is transferred from the grid-tied mode to the

islanded mode with: (a) conventional hybrid voltage and current mode control,

and (b) proposed uniﬁed control strategy.

the simulation results above, it can be seen that the dynamic

performance of the proposed uniﬁed control strategy is better

than the conventional voltage mode control.

During the transition from the grid-tied mode to the islanded

mode, the proposed uniﬁed control strategy is compared with

the hybrid voltage and current mode control, and the simulation

scenario is shown as follows: 1) Initially, the utility is normal,

and the DG is connected with the utility; 2) at 0.5 s, islanding

happens; and 3) at 0.52 s, the islanding is conﬁrmed.

Simulate results with the hybrid voltage and current mode

control is shown in Fig. 15(a). It can be seen that the grid cur-

rent drop to zero at 0.5 s, and that the load voltage is seriously

distorted from 0.5 to 0.52 s. Then, the load voltage is recovered

to the normal value after 0.52 s. Fig. 15(b) presents the simu-

late results with the proposed uniﬁed control strategy. Initially,

the magnitude of grid current is 9 A and follows the current

reference I

gref dq

. The magnitude and frequency of the load

voltage are held by the utility. After the islanding happens, the

amplitude of the load voltage increases a little to follow the

voltage reference V

max

, and the output current of DG decreases

autonomously to match the load power demand.

LIU et al.: UNIFIED CONTROL STRATEGY FOR THREE-PHASE INVERTER IN DISTRIBUTED GENERATION 1187

Fig. 16. Diagram of the experimental prototype of DG.

Fig. 17. Experimental waveforms when DG is in the islanded mode: CH1,

load current i

LLa

, 5 A/div; CH3, load voltage v

C a

, 100 V/div; CH4, inductor

current i

La

, 5 A/div.

Fig. 18. Experimental waveforms when DG is in the grid-tied mode: CH1,

load current i

LLa

, 5 A/div; CH2, grid voltage v

g a

, 100 V/div; CH4, grid current

i

g a

, 10 A/div.

Comparing the simulation results above, it can be found that

the voltage quality is improved deeply by the proposed con-

trol strategy in the transition from the grid-tied mode to the

islanded mode, and the speed of the islanding detection is no

more critical.

Fig. 19. Experimental waveforms when DG is transferred from the grid-tied

mode to the islanded mode with (a) conventional hybrid voltage and current

mode control, and (b) proposed uniﬁed control strategy: CH2, load voltage

v

C a

, 100 V/div; CH3, grid current i

g a

, 10 A/div; CH4, inductor current i

La

,

10 A/div.

B. Experimental Results

To verify the proposed control strategy, an experimental pro-

totype of DG has been established, which is shown in Fig. 16.

The utility for the DG is emulated by a three-phase transformer

and a voltage regulator connected with the actual utility. The

rated line voltage of the actual utility is 380 V. The emulated

utility is called as utility in the below. Moreover, the inverter

in the DG is fed by a three-phase diode rectiﬁer, and the

dc-bus voltage is set to 400 V approximately by the voltage

1188 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 3, MARCH 2014

Fig. 20. Experimental waveforms when DG is transferred from the islanded mode to the grid-tied mode: CH1, grid voltage v

g a

, 100 V/div; CH2, load voltage

v

C a

, 100 V/div; CH3, grid current i

g a

, 10 A/div; CH4, inductor current i

La

, 10 A/div.

regulator. Besides, the control system is implemented fully dig-

itally by digital signal processor TMS320F28335 from Texas

Instruments. The parameters in the experimental DG, shown in

Tables I and II, are identical to the ones used in the simulation.

Fig. 17 shows the experimental waveforms when DG is in

the islanded mode, and it can be seen that the magnitude of the

load voltage equals 180 Vapproximately, and the total harmonic

distortion (THD) of the load voltage is 0.9%.

Fig. 18 shows the experimental waveforms when DG is in the

grid-tied mode. The magnitude of the grid current is closed to

9 A, and the THD of the grid current is 3.6% approximately.

When the DG is transferred from the grid-tied mode to the

islanded mode, the experimental results with the traditional hy-

brid voltage and current mode control and the proposed uniﬁed

control strategy are given in Fig. 19. Before the islanding hap-

pens, the magnitude of the load voltage is around 163 V. The

current injected into the utility i

ga

is in phase with the utility

voltage, and the magnitude of i

ga

is approximately 9 A. When

the switch S

u

opens, the islanding happens, and the grid current

i

ga

drops to zero. In the traditional hybrid voltage and current

mode control, it can be found that the load voltage is seriously

distorted upon the occurrence of islanding. And this condition

lasts until the islanding is conﬁrmed by DG and the control

structure is changed to regulate the load voltage. However, with

the proposed uniﬁed control strategy, the distortion of the load

voltage is obviously improved, and the magnitude of the load

voltage increases slightly and is close to 180 V.

Fig. 20 shows the process when DGis transferred fromthe is-

landed mode to the grid-tied mode. From0 ms to around 300 ms,

the phase of the load voltage is regulated to resynchronize with

the utility voltage, and the phase difference is reduced gradually.

Then, the magnitude of the load voltage is regulated to equal

the utility voltage. At the moment of 350 ms, the switch S

i

is

turned on, and the current injected into the grid i

ga

increases

smoothly without huge inrush current, and the load voltage is

stable during the transition.

Fig. 21 shows the experimental waveforms when DG feeds

nonlinear load in the islanded mode. It can be seen that the

distortion of the load voltage is improved by the load current

feedforward, and the THD of the load voltage is reduced from

4.7% to 3.2%.

Fig. 21. Experimental waveform when DG feeds nonlinear load in islanded

mode (a) with load current feedforward and (b) without load current feedfor-

ward: CH1, load current i

LLa

, 5 A/div; CH3, load voltage v

C a

, 100 V/div;

CH4, inductor current i

La

, 5 A/div.

When the power of the nonlinear load is varied, the THD of

the load voltage is also changed, and the experimental results are

shown in Fig. 22. It can be seen that with the load current feed-

forward, the THD of the load voltage can always be mitigated

under different power of the nonlinear load.

Fig. 23 shows the experimental waveforms when DG feeds

nonlinear load in the grid-tied mode. It can be seen that with the

load current feedforward, there is harmonic component in the

LIU et al.: UNIFIED CONTROL STRATEGY FOR THREE-PHASE INVERTER IN DISTRIBUTED GENERATION 1189

Fig. 22. Variation of the THD of the load voltage with the power of the

nonlinear load when DG is in the islanded mode.

Fig. 23. Experimental waveforms when DG feeds nonlinear load in the grid-

tied mode (a) with load current feedforward and (b) without load current feed-

forward: CH1, inductor current i

La

, 10 A/div; CH2, load current i

LLa

, 5 A/div;

CH3, grid voltage v

g a

, 100 V/div; CH4, grid current i

g a

, 10 A/div.

inductor current i

La

, and the harmonics component in the grid

current is reduced.

The THD of the grid current under different power of the

nonlinear load and different amplitude of the grid fundamental

Fig. 24. Variation of the THD of the grid current when DG is in the grid-tied

mode with (a) the power of the nonlinear load, and (b) the amplitude of the grid

current.

current is investigated, and the experimental results are shown

in Fig. 24. In Fig. 24(a), the amplitude of the grid fundamental

current is set at 7 A, and the power of nonlinear load is varied. It

can be found that with the increase of the load power, the THDof

the grid current rises, and the THD of the grid current is reduced

with the load current feedforward. In Fig. 24(b), the power of

the nonlinear load is set at around 600 W, and the amplitude of

the grid fundamental current is changed. It can be seen that the

THD of the grid current can be mitigated at different magnitude

of the grid fundamental current.

VI. CONCLUSION

A uniﬁed control strategy was proposed for three-phase in-

verter in DG to operate in both islanded and grid-tied modes,

with no need for switching between two different control ar-

chitectures or critical islanding detection. A novel voltage con-

troller was presented. It is inactivated in the grid-tied mode,

and the DG operates as a current source with fast dynamic

1190 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 3, MARCH 2014

performance. Upon the utility outage, the voltage controller can

automatically be activated to regulate the load voltage. More-

over, a novel load current feedforward was proposed, and it can

improve the waveform quality of both the grid current in the

grid-tied mode and the load voltage in the islanded mode. The

proposed uniﬁed control strategy was veriﬁed by the simulation

and experimental results.

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Zeng Liu (S’09) received the B.S. degree in electri-

cal engineering from Hunan University, Changsha,

China, in 2006, and the M.S. degree in electrical

engineering from Xi’an Jiaotong University, Xi’an,

China, in 2009, where he is currently working toward

the Ph.D. degree.

His research interests include control of single-

phase and multiphase power converters for uninter-

rupted power supply and utility application, model-

ing, and analysis and control of distributed power

system based on three-phase ac bus.

Jinjun Liu (M’97–SM’10) received the B.S. and

Ph.D. degrees in electrical engineering from Xi’an

Jiaotong University (XJTU), Xi’an, China, in 1992

and 1997, respectively.

He then joined the XJTU Electrical Engineering

School as a teaching faculty. In 1998, he led the

founding of XJTU/Rockwell Automation Laboratory

and served as the Lab Director. From 1999 until early

2002, he was with the Center for Power Electron-

ics Systems, Virginia Polytechnic Institute and State

University, USA, as a Visiting Scholar. He then came

back to XJTU and in late 2002 was promoted to a Full Professor and the Head

of the Power Electronics and Renewable Energy Center, XJTU. During 2005

to early 2010, he served as the Associate Dean with the School of Electrical

Engineering, XJTU. He currently also serves as the Dean for Undergraduate Ed-

ucation, XJTU. He coauthored three books, published more than 100 technical

papers, holds 13 patents. His research interests include power quality control,

renewable energy generation and utility applications of power electronics, and

modeling and control of power electronic systems.

Dr. Liu is an AdCom member of the IEEE Power Electronics Society and

serves as Region 10 Liaison. He received several national, provincial, or minis-

terial awards for scientiﬁc or career achievements, and the 2006 Delta Scholar

Award. He also serves as an Associate Editor for the IEEE TRANSACTIONS ON

POWER ELECTRONICS. He is an AdCom member and the Chair of Student Ac-

tivities Committee for IEEE Xi’an Section. He is on the Executive Board and

serving as a Deputy Secretary-General for the China Power Electronics Society,

and also on the Executive Board and serving as a Deputy Secretary-General for

the China Power Supply Society.

Yalin Zhao received the B.S. degree in electrical

engineering from Xi’an Jiaotong University, Xi’an,

China, in 2011, where he is currently working toward

the M.S. degree.

His research interests include dead-time compen-

sation, stability analysis, and control of inverters.

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