You are on page 1of 28

Phm Thnh Cng http://www.ebook.edu.

vn
1
Vi iu khin mm microblaze

Cc b vi x l c sn dng cho dng FPGA (Field Programmable Gate
Arrays) ca Xillinx s dng vi cc cng c phn mm c trong phn mm EDK
(Embedded Development kit) c phn thnh 2 loi:
+ B vi x l mm MicrroBlaze.
+ B vi x l cng c nhng sn PowerPC.
Trong bo co ny Em xin trnh by v vi iu khin mm MicroBlaze. y l b
vi x l c dng hu ht trong FPGA cc dng nh Spartan-II, Spartan-III,
Virtex ca hng Xillinx. MicroBlaze l mt vi iu khin o, n tn ti di dng
phn mm c pht trin ca hng Xillinx, chng ta c th thit lp cc
thng s s dng i vi vi iu khin ny (UART, cc cng vo ra ngoi vi,
..) thng qua phn mm EDK, c th trong bo co ny l EDK8.2i. Hin nay,
MicroBlaze c phin bn 9.0 i vi EDK10.1, i vi EDK8.2i l
MicroBlaze6.0 nhng v cu trc c bn nht th khng c g thay i.
Bng 1: Cc phin bn MicroBlaze

Ngy Phin bn
01/10/2002 1.0 EDK 3.1
11/03/2003 2.0 EDK 3.2
24/09/2003 3.0 EDK 6.1
20/02/2004 3.1 EDK 6.2
24/08/2004 4.0 EDK 6.3
21/09/2004 4.1 EDK 6.3 SP1
18/11/2004 4.2 EDK 6.3 SP2
20/01/2005 5.0 EDK 7.1
02/04/2005 5.1 EDK 7.1 SP1
09/05/2005 5.2 EDK 7.1 SP2
05/10/2005 5.3 EDK 8.1
21/02/2006 5.4 EDK 8.1 SP2
01/06/2006 6.0 EDK 8.2
24/07/2006 6.1 EDK 8.2 SP1
21/08/2006 6.2 EDK 8.2 SP2
29/08/2006 6.3 EDK 8.2 SP3
15/09/2006 7.0 EDK 9.1
22/02/2007 7.1 EDK 9.1 SP1
Phm Thnh Cng http://www.ebook.edu.vn
2
27/03/2007 7.2 EDK 9.1 SP2
25/06/2007 8.0 EDK 9.2
12/10/2007 8.1 EDK 9.2 SP2
17/01/2008 9.0 EDK 10.1
MicroBlaze l b x l mm nhng 32-bit ca Xillinx. Li c cu trc
Harvard, tp lnh thu gn RISC (Reduced Instruction Set Computer), vi cc bus
ring bit truy xut d liu v lnh t b nh on-chip v b nh ngoi ti cng
mt thi im.

Kin trc c bn ca MicroBlaze

+ 3 tng x l ng ng vi 32 thanh ghi mc ch 32 bit.
+ T lnh 32 bit vi 3 ton hng v 2 ch nh a ch.
+ ng bus 32 bit a ch.
+ 1 khi ghi dch.
+ 2 cp ngt.
+ Khi ALU(Arithmetic Logic Unit): gm cc b cng/tr, ghi dch/logic, nhn.
+ Khi FPU(Floating Point Unit): p dng cc chun du phy ng n, chnh
xc IEEE754.


















Phm Thnh Cng http://www.ebook.edu.vn
3
Hnh 1: Kin trc c bn ca vi iu khin MicroBlaze




Trong :
Bus IF: (Bus interface) ng bus giao tip.
Instruction Buffer: b m lnh.
Instruction Decode: b gii m lnh.
Program Counter: b m chng trnh.
Add/Sub: khi cng/tr; Shift/Logical: khi ghi dch/lgic; Multiply: khi nhn.
Register File: thanh ghi d liu 32thanh x 32bit.






























Li Microblaze








Bus
IF

Program
Counter







Instruction
Decode








Bus
IF

Register File
32 x 32b
Add/Sub
Shift/Logical
Multiply
Phm Thnh Cng http://www.ebook.edu.vn
4
Hnh 2: H thng s dng vi iu khin MicroBlaze in hnh



Kin trc ng ng ca vi iu khin MicroBlaze

* Vi iu khin MicroBlaze x l lnh theo kin trc ng ng song song,
hu ht cc lnh ca n, mi giai on mt 1 chu k ng h thc hin xong.
Qu trnh x l lnh c chia lm 3 giai on: nhn lnh (Fetch), gii m lnh
(Decode), thi hnh lnh (Execute):







Phm Thnh Cng http://www.ebook.edu.vn
5
Hnh 3: Kin trc ng ng ca MicroBlaze



* Thng thng, nu b qua thi gian tr ngh stall th mi giai on trn
ch mt 1 chu k ng h, khi 3 lnh c th c x l cng mt lc, mi lnh
c thi hnh trong 1 ng ng gm 3 giai on. MicroBlaze c 1 b m tin
nhn lnh (Instruction Prefetch Buffer) lm gim xung t tim n trong b
nh khi thc hin cc lnh a chu k. Khi ng ng c to tr ngh stall do
thc hin lnh a chu k trong giai on thi hnh, b m tin nhn lnh s tip
tc nhn cc lnh ngay sau . V khi ng ng thi hnh tr li, giai on nhn
lnh c th ly lnh trc tip t b m tin nhn lnh, thay v i cho b nh
lnh truy cp thi hnh.

Khi du phy ng FPU (Floating Point Unit)

* Khi du phy ng ca MicroBlaze da trn chun IEEE 754:
+ nh dng du phy ng n, chnh xc, bao gm cc nh ngha v cng-
infinity, khng l mt s NaN (Not a Number) v 0-zero.
+ Cung cp cc lnh cng, tr, nhn, chia, so snh, chuyn i v bnh phng.
+ Thc hin ch lm trn gn nht.
+ Bo trng thi bit khi: under flow, over flow, sai php tnh (invalid operation).
* nh dng: mt s c nh dng theo chun du phy ng n, chnh
xc IEEE 754 gm 3 trng: 1 bit du (sign), 8 bit s m (exponent), 23 bit phn
s (fraction).
Fetch Decode Execute
Fetch Decode Execute Execute Execute
Fetch Decode Stall Stall Execute
Cycle 1 Cycle 2 Cycle 3 Cycle 4
Lnh 1
Lnh 2
Lnh 3
Cycle 5 Cycle 6 Cycle 7
Phm Thnh Cng http://www.ebook.edu.vn
6


0 1 8 9 31
Du (sign) S m (exponent) Phn s (fraction)

Gi tr ca mt s du phy ng v trong MicroBlaze c gii thch nh sau:
1. Nu exponent = 255 v fraction 0 th v = NaN bt k ti du (sign).
2. Nu exponent = 255 v fraction = 0 th v = (-1)
sign
*
3. Nu 0<exponent <255 th v = (-1)
sign
* 2
(exponent 127)
* 1.fraction
4. Nu exponent = 0 v fraction 0 th v = (-1)
sign
* 2
126
* 0.fraction
5. Nu exponent = 0 v fraction =0 th v = (-1)
sign
* 0
Khi thc hin cc mc ch, ch c trng hp 3 v 5 c dng.
* Phng thc lm trn: khi FPU ca MicroBlaze ch thc hin ch lm
trn t ng, lm trn n mc gn nht theo chun IEEE 754. Kt qu ca mi
php tnh du phy ng s c tr v mt gi tr n, chnh xc v gn nht vi
gi tr c tnh chnh xc v cng. Nu c 2 gi tr gn nht c th hin m gn
bng nhau, th tr v gi tr no c t bit 0 c nha nht.
* Cc php ton:
+ S hc:
. Cng, cng s thc (fadd).
. Tr, tr s thc (fsub).
. Nhn, nhn s thc (fmul).
. Chia, chia s thc (fdiv).
. Bnh phng, khai cn (c sn nu C_use_FPU = 2)
+ So snh: nh hn, bng, nh hn hoc bng, ln hn, khc, ln hn hoc bng,
khng nh ngha (c s dng vi s kiu NaN).
+ Chuyn i kiu (c sn nu C_use_FPU = 2): signed integer sang kiu
floating point, floating point sang kiu signed integer.

Kh nng thi hnh ca microblaze

* Tt c cc lnh ca MicroBlaze ch mt 1 chu k ng h thi hnh, tr
mt s lnh sau:
Phm Thnh Cng http://www.ebook.edu.vn
7
+ Np v ct gi: 2 chu k ng h.
+ Nhn: 2 chu k ng h.
+ Cc lnh r nhnh: 3 chu k ng h, cng c th l 1 chu k ng h tu lnh.
* Tn s hot ng:
+ 180 MHz i vi dng Virtex-4 (-12).
+ 150 MHz i vi dng Virtex
TM
-II (-7).
+ 100 MHz i vi dng SPARTAN 3 (-5).
* Chun chng trnh tng hp Dhrystone-MIPS 2.1 s dng khi RAM LMB
(Dhrystone: chng trnh tng hp trn my tnh theo chun BenchMark, MIPS:
Million Instructions Per Second-hng triu lnh trong mt giy):
+ 166 MHz i vi dng Virtex-4 (-12).
+ 138 MHz i vi dng Virtex
TM
-II (-7).
+ 92 MHz i vi dng SPARTAN 3 (-5).
* 1296 LUTs i vi dng Virtex-4, 1225 LUTs i vi dng Virtex-II Pro,
1318 LUTs i vi dng Spartan 3. (LUTs: Look Up Tables-cc bng tm kim
s cho php to ra cc hm Logic t hp)

Kin trc b nh

* B nh ca vi iu khin MicroBlaze c kin trc Havard, s truy xut lnh
v d liu c thc hin cc khong a ch ring bit. Mi mt khong a
ch u l di 32 bit, MicroBlaze cung cp ti 4GByte khong a ch tuyn tnh,
giao tip lnh v d liu MicroBlaze u c rng 32 bit, MicroBlaze cn
cung cp cc kiu truy xut d liu:
+ Kiu d liu Word: Bng 2:

a ch Byte n n+1 n+2 n+3
Nhn Byte 0 1 2 3
Byte trng s MSByte LSByte
Nhn Bit 0 31
Bit trng s MSBit LSBit




Phm Thnh Cng http://www.ebook.edu.vn
8
+ Kiu d liu Half Word: Bng 3:

a ch Byte n n+1
Nhn Byte 0 1
Byte trng s MSByte LSByte
Nhn Bit 0 15
Bit trng s MSBit LSBit

+ Kiu d liu Byte: Bng 4:

a ch Byte n
Nhn Bit 0 7
Bit trng s MSBit LSBit

* Tt c cc lnh truy xut u phi c ging thng hng theo kiu d liu
word khi thc hin, b vi x l ny c 3 cch giao tip truy xut b nh:
+ Bus nh ni: LMB (Local Memory Bus).
+ Bus li x l ni PLB (Processor Local Bus) v bus ngoi vi on-chip OPB (On-
chip Peripheral Bus).
+ Xillinx Cache Link (XCL).





















Phm Thnh Cng http://www.ebook.edu.vn
9
Hnh 4: Cc vng nh ca MicroBlaze


* Trong vng nh ginh cho ngi dng lp trnh nm khong
0x0000_0000 n 0x0000_004F. Mt cch tng qut hn, cc vng nh c a
ch nh sau:













Cc ngoi vi
Vng nh OPB
Vng nh LMB
a ch ngoi l
a ch Reset
a ch ngt
0x0000_0000
0x0000_0004
0x0000_000C
0x0000_0008
Vng nh ginh ring
Phn cng ngoi l
Break
0x0000_004F
0x0000_0028
0x0000_0010
0xFF00_FFFF
0xFEFF_FFF
0x0000_0014
0x0000_001C
0x0000_0018
0x0000_0024
0x0000_0020
0xFFFF_FFFF
Phm Thnh Cng http://www.ebook.edu.vn
10
Hnh 5: a ch tng qut ca b nh:


MOUSE
SPI
I2C
VGA
IO
EMAC
VIDEO
NANOBOARD_RAM
RAM bay hi
Video_ram
RAM bay hi
ROM
Emac_ram
RAM bay hi




















External_Memory
Space
Processor I/O
Space
IO Port of the
Processor

Internal_Memory
Vng boot code
0x0000_0000
0x00FF_FFFF
0xFF00_0000
0xFF00_0000
0x0100_0000
0xFEFF_FFFF
0xFF00_0000
0xFF10_0000
0xFF10_0007
0xFF20_0000
0xFF20_0FFF
0xFF30_0000
0xFF30_001F
0xFF40_0000
0xFF40_0007
0xFF50_0000
0xFF50_0003
0xFF60_0000
0xFF60_0001
0x0000_0000
0x0000_3FFF
0x0100_0000
0x011F_FFFF
0x0200_0000
0x0200_7FFF
0x0400_0000
0x041F_FFFF
0xFFFF_FFFF
Phm Thnh Cng http://www.ebook.edu.vn
11
giao tip tn hiu trong microblaze

* Nh trnh by, MicroBlaze cung cp 3 giao tip b nh:
+ LMB: Local Memory Bus..
+ PLB: Processor Local Bus.
+ OPB (On-Chip Peripheral Bus) v XCL (Xillinx Cache Link).
Hnh 6: V d mt h thng Bus in hnh



* Trong :
+ IXCL: Instruction side Xillinx Cache Link Interface (cp lin kt n nhanh
FSL ch/t).
Ixcl
Ilmb
iopb

Microblaze
Tm


Dlmb dopb
dxcl
External mem
External mem
External
mem



bram
Opb
arb
intc
I2c
gpio
uart
ethernet
lcd
bram
Cache Link
Cache Link
Tt c cc ng Bus u l 32 bit
Phm Thnh Cng http://www.ebook.edu.vn
12
+ DXCL: Data side Xillinx Cache Link Interface (cp lin kt n nhanh FSL
ch/t).
+ ILMB: Instruction interface, Local Memory Bus: giao tip lnh theo chun bus
LMB, ch dng cho giao tip BRAM.
+ DLMB: Data interface, Local Memory Bus: giao tip d liu theo chun bus
LMB, ch dng cho giao tip BRAM.
+ IOPB: Instruction interface, On-chip Peripheral Bus: giao tip lnh theo chun
bus OPB.
+ DOPB: Data interface, On-chip Peripheral Bus: giao tip d liu theo chun bus
OPB.
* MicroBlaze c kin trc kt ni li theo chun IBM, chun ny cung cp 3
loi bus ginh cho kt ni lin tc a li, cc th vin macro v logic ngi dng:
+ Bus li x l ni PLB (Processor Local Bus).
+ Bus ngoi vi on-chip OPB (On-chip Peripheral Bus).
+ Bus thanh ghi iu khin thit b DCR (Device Control Register).

Bus ngo i vi on-chip OPB (On-chip Per ipher al Bus)

+ Bus OPB tch ring cc thit b c rng bng thp hn vi bus PLB.
+ Giao thc ca bus OPB t phc tp hn bus PLB, khng thc hin tng phn
hay kh nng ng ng ho a ch.
+ Bus OPB c chc nng phn x v kim sot bus. (b phn x bus OPB)
+ Kt ni c s h tng cho cc thit b ngoi vi ch v t.
+ Bus OPB c thit k lm gim bt hin tng tht c chai khi h thng thi
hnh, bng cch lm gim ti in dung ri trn bus PLB.
. ng b mt cch y trong mt chu k.
. c chia s bus a ch 32 bit, bus d liu 32 bit.
. Cung cp s truyn d liu n chu k gia master v cc slave.
. Cung cp nhiu master, mi master c xc nh r nh s phn x.
. Chc nng cu c th l bus PLB hoc OPB.
+ Cung cp 16 master v mt s lng khng gii hn slave. (ch gii hn khi c
s thi hnh c mc ch).
Phm Thnh Cng http://www.ebook.edu.vn
13
+ B phn x OPB (OPB Arbiter) tip nhn cc yu cu bus t cc master ca
OPB v cho php mt trong cc master s dng bus. (Cc u tin tnh v ng)
+ Logic bus c thi hnh vi logic and-or.
+ c v ghi cc bus d liu c th thc hin ring r gim ti trn bus tn
hiu OPB_Dbus.
Hnh 7: Kin trc bus OPB
















Phm Thnh Cng http://www.ebook.edu.vn
14
Bus l i x l ni PLB (Pr ocessor Local Bus).

Hnh 8: S khi bus PLB

+ Khi ng dn a ch: Address Path Unit khi ny chn a ch master
c kt ni ti a ch cc thit b slave.
+ Write Data Path: khi ghi ng dn d liu, cha b phn li logic
master v slave ghi cc bus d liu.
+ Read Data Path: khi c ng dn d liu, cha b phn li logic master
v slave c cc bus d liu.
+ Bus Control Unit: khi iu khin bus. Khi ny cha b iu khin phn x
bus, qun l lung a ch v d liu thng qua PLB v DCR. Khi iu khin
phn x c kh nng phn x 16 master. Cc thanh ghi iu khin thit b c
s dng iu khin v thng bo trng thi t khi iu khin phn x bus v
s qun l logic lung a ch. Cc thanh ghi c truy xut bng cch s dng
cc lnh thanh ghi iu khin move from device (mfdcr), move to device
(mtdcr), cc lnh ny di chuyn d liu gia cc thanh ghi iu khin thit b v
cc thanh ghi mc ch ca b vi x l.
+ Watchdog Timer: b nh thi ny cung cp s bt tay cn thit truyn s
kin m yu cu ca master ngoi thi gian ch trn bus PLB.
Address Path Write Data
Path
Read Data
Path

Bus Control
Unit
Power-on
Reset
Watchdog
Timer
SYS_Rst
PLB_Clk
PLB_Rst
Master Ports Slave Ports Master Ports Slave Ports Master Ports Slave Ports
Slave
Ports
Master
Ports
DCR Bus Interface
Phm Thnh Cng http://www.ebook.edu.vn
15
+ Power-on Reset: mch in power-on reset bn trong PLB c s dng
m bo thit lp li PLB khi bt ngun nu khng c s thit lp bn ngoi
no.Nu c reset bn ngoi, n c ng b vi PLB clock thng qua mch in
ng b ho l flip-flop 2 trng thi, u ra ca n coi nh l PLB reset.
Hnh 9: S kt ni PLB


Bus nh ni LMB (Local Memor y Bus)

+ LMB l ng bus ng b c s dng ch yu truy xut khi RAM on-
chip.
+ N s dng mt s lng tn hiu iu khin ti thiu v giao thc n gin
m bo rng khi RAM c truy xut trong mt n chu k clock.
+ Tn s hot ng: 125MHz.



Arbitration

Address &
Transfer
Qualifiers

Write Data Bus



Control






Bus control & gating
logic
Address &
Transfer
Qualifiers

Write Data Bus

Control



Read Data Bus



Status & Control

S
h
a
r
e
d

B
u
s


















Read Data Bus



Status & Control

PLB Master PLB Core PLB Slave
B phn x Bus
trung tm
Phm Thnh Cng http://www.ebook.edu.vn
16
cc thanh ghi

c c t hanh ghi mc ch chung

C 32 thanh ghi mc ch chung 32 bit, chng c nh s t R0 n R31
Bng 5: Cc thanh ghi mc ch chung

Cc Bit Tn M t Gi tr Reset
0:31 R0 Lun c gi tr 0. Mi th c ghi ln
R0 u b loi b.
0x00000000
0:31 R1 n R13 Cc thanh ghi mc ch chung 32 bit. -
0:31 R14 Thanh ghi 32 bit, c s dng lu gi
cc gi tr tr v cho cc ngt.
-
0:31 R15 Thanh ghi mc ch chung 32 bit, c
ngh lu gi cc gi tr tr v ca cc
vecto ngi dng.
-
0:31 R16 Thanh ghi 32 bit c s dng lu gi
cc gi tr tr v ca cc lnh break.
-
0:31 R17 Nu MicroBlaze c cu hnh cung
cp ngoi l phn cng th thanh ghi ny
c ti cng vi a ch lnh gy ra ngoi
l phn cng , nu khng, n l mt
thanh ghi mc ch chung.
-
0:31 R18 n R31 Cc thanh ghi mc ch chung 32 bit. -


C c t hanh ghi mc ch c bit

+ Thanh ghi b m chng trnh PC (Program Conter)
y l thanh ghi 32 bit, n c th c c bi mt lnh MFS nhng khng th
ghi vi lnh MTS. Gi tr reset: 0x00000000. Ch nh thanh ghi ny bng cch
thit lp Sa = 0x0000. (Sa: special purpose register, source operand lnh ny
dng thit lp cc thanh ghi mc ch c bit hoc ton hng ngun.)
+ Thanh ghi trng thi my MSR (Machine Status Register)
Thanh ghi ny cha cc bit iu khin v trng thi ca b vi x l. N c th
c c vi mt lnh MFS, c ghi bng lnh MTS hoc MSRSET v
MSRCLR. Ch nh thanh ghi ny bng cch thit lp Sx = 0x0001.

Phm Thnh Cng http://www.ebook.edu.vn
17
Hnh 10: Thanh ghi trng thi my MSR

Bng 6: Cc Bit ca thanh ghi MSR

Cc Bit Tn M t Gi tr
Reset
0
CC
Carry Copy s hc, lun ging nh bit C 0
1:16 D tr 0
17
Vms
Virtual Protected Mode Save, ch c sn khi cu hnh
vi mt MMU. c/ghi
0
18
Vm
Virtual Protected Mode, ch c bo v o.
c/ghi.
0
19
Ums
User Mode Save, bo lu ch ngi dng. c/ghi 0
20
Um
User Mode, ch ngi dng. c/ghi 0
21
Pvr
S tn ti ca Procession Version Register.
0 khng tn ti, 1 tn ti. Ch c
Da trn
tham s
C_PVR
22
Eip
Exception In Progress. 0 = khng c ngoi l phn
cng, 1 = c ngoi l phn cng. c/ghi
0
23
Ee
Exception Enable, 0 = khng cho php ngoi l phn
cng, 1 = cho php ngoi l phn cng. c/ghi
0
24
Dce
Data Cache Enable, 0 = disabled, 1 = enabled.
c/ghi
0
25
Dz
Division By Zero, 0 = khng xy ra chia cho 0, 1 =
xy ra chia cho 0. c/ghi
0
26
Ice
Instruction Cache Enable, 0 = disabled, 1 = enabled.
c/ghi
0
27
Fsl
FSL error. 0 = FSL get/getd/put/putd khng c li, 1 =
c li. c/ghi.
0
28
Bip
Break in Progress, 0 = no break, 1 = break. c/ghi. 0
29
C
Carry s hc. 0 = no carry(no borrow), 1 = cary
(borrow). c/ghi.
0
30
Ie
Interupt Enable, cho php ngt. 0 = disabled, 1 =
enabled. c/ghi.
0
31
be
Buslock Enable, ch dng vi OPB pha d liu, khng
nh hng ti s hot ng ca IXCL, DXCL, ILMB,
DLMB, IPLB, DPLB, IOPB. 0 = disabled, 1 = enabled
data-side OPB. c/ghi.
0

0 | 17| 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30| 31
CC Ginh ring
Phm Thnh Cng http://www.ebook.edu.vn
18
+ Thanh ghi a ch ngoi l: EAR (Exception Address Register): l thanh ghi
32 bit, gi tr reset: 0x00000000. Ch nh thanh ghi ny bng cch thit lp Sa =
0x0003, c th c bng lnh MFS.
+ Thanh ghi trng thi ngoi l ESR (Exception Status Register):
Hnh 11: Thanh ghi ESR

Bng 7: cc bit ca thanh ghi ESR

Cc bit Tn M t Gi tr reset
0:18 Ginh ring
19 DS Delay Slot Exception
0 = khng gy ra bi delay slot instruction
1 = gy ra bi delay slot instruction
Ch c
0
20:26 ESS Exception Specific Status
Ch c
0
27:31 EC Exception Cause
0000 = Fast Simplex Link exception
0001 = Unaligned data access exception
0010 = Illegal op-code exception
0011 = Instruction bus exception
0100 = Data bus error exception
0101 = Divide by zero exception
0110 = Floating point unit exception
0111 = Privileged instruction exception
1000 = Data storage exception
1001 = Instruction storage excpetion
1010 = Data TLB miss exception
1011 = Instruction TLB miss exception
Ch c.
0

Ch nh thanh ghi ny bng cch thit lp Sa = 0x0005, c th c bng lnh
MFS.
+ Thanh ghi mc tiu nhnh BTR (Branch Target Register)
L thanh ghi 32 bit, ch c, gi tr reset: 0x00000000. Ch nh thanh ghi ny
bng cch thit lp Sa = 0x000B, c th c bng lnh MFS.
+ Thanh ghi trng thi du phy ng FSR (Floating point Status Register)
19 20 26 27 31
Ginh ring DS ESS EC
Phm Thnh Cng http://www.ebook.edu.vn
19
C th c bng lnh MFS, ghi bng lnh MTS, ch nh thanh ghi ny bng cch
thit lp Sa = 0x0007.
Hnh 12: Thanh ghi FSR

Bng 8: cc bit ca thanh ghi FSR

Cc bit Tn M t Gi tr reset
0:26 Ginh ring undefined
27
io
Invalid operation php tnh khng hp l 0
28
dz
Divide-by-zero - chia cho 0 0
29
of
Overflow 0
30
uf
Underflow 0
31
do
Denormalized operand error li ton hng 0

+ Thanh ghi d liu ngoi l EDR (Exception Data Register)
L thanh ghi 32 bit, gi tr reset = 0x00000000, khi c thanh ghi ny bng lnh
MFS, ch nh n bng cch thit lp Sa = 0x000D.
+ Thanh ghi nhn dng qu trnh PID (Process Indentifier Register)
Bng 9: cc bit ca thanh ghi PID

Cc bit Tn M t Gi tr reset
0:23 Ginh ring
24:31 PID c s dng nhn dng duy nht 1 fn
mm x l trong sut qu trnh dch a ch
ca MMU.
0x00

Khi dng cc lnh MFS v MTS truy xut, ch nh thanh ghi PID bng cch
thit lp Sa = 0x1000.
+ Thanh ghi vng bo v ZPR (Zone Protection Register)
Khi dng cc lnh MFS v MTS truy xut, ch nh thanh ghi ZPR bng cch
thit lp Sa = 0x1001.
+ Thanh ghi TLBLO (Translation Look-Aside Buffer Low Register)
27 28 29 30 31
IO Ginh ring DZ OF UF DO
Phm Thnh Cng http://www.ebook.edu.vn
20
Khi dng cc lnh MFS v MTS truy xut, ch nh thanh ghi TLBLO bng
cch thit lp Sa = 0x1003.
+ Thanh ghi TLBHI (Translation Look-Aside Buffer High Register)
Khi dng cc lnh MFS v MTS truy xut, ch nh thanh ghi TLBHI bng
cch thit lp Sa = 0x1004.
+ Thanh ghi TLBX (Translation Look-Aside Buffer Index Register)
Khi dng cc lnh MFS v MTS truy xut, ch nh thanh ghi TLBX bng
cch thit lp Sa = 0x1002.
+ Thanh ghi TLBSX (Translation Look-Aside Buffer Search Index Register)
Khi dng cc lnh MFS v MTS truy xut, ch nh thanh ghi TLBSX bng
cch thit lp Sa = 0x1005.
+ Thanh ghi phin bn b x l PVR (Processor Version Register)
Khi dng lnh MFS truy xut, ch nh thanh ghi PVR bng cch thit lp Sa
= 0x200x, vi x l s thanh ghi thuc on [0x0, 0xB].

Ngt

MicroBlaze ch cung cp mt ngun ngt ngoi 32bit, v vy nu cn dng
nhiu ngt ngoi, phi s dng mt b iu khin ngt qun l cc ngt yu
cu ti MicroBlaze. B x l ch p ng li cc ngt khi bit IE trong thanh ghi
trng thi my MSR c set ln 1. a ch tr v ca ngt s t ng c ti
vo trong thanh ghi mc ch chung R14.
Bng 10: Vct ngt

Kiu ngoi
l
a ch
vct
Thanh ghi
tr v
Lnh tr
v
nh tnh kiu hm
Reset 0x00000000 - - __interrupt(0x00000000)
User vector
(exception)
0x00000008 r15
rtsd
__interrupt(0x00000008)
Interrupt 0x00000010 r14
rtid
__interrupt(0x00000010)
Break 0x00000018 r16
rtbd
__interrupt(0x00000018)
Hardware
exception
0x00000020 r17
rted
__interrupt(0x00000020)


Phm Thnh Cng http://www.ebook.edu.vn
21
Tp lnh c

Cc t kho, cc lnh tin x l, cc chc nng, cc chc nng I/O, cc chc
nng ton hc, cc chc nng b nh, cc chc nng chui v k t v bng m
ASCII trong MicroBlaze tun theo ngn ng C chun.
Bng 11: Cc ton t

Th
t
Ton
t
M t V d Kt
hp
1 :: Ton t phm vi Class::age=2 -
2 ( )
[ ]
->
.
++
--
Nhm
Truy xut mng
Truy xut b nh t 1 con tr
Truy xut b nh t mt i tng
S tng sau
S gim sau
(a+b)/4
Array[4]=2;
ptr->age=34;
obj.age=34;
for(i=0;i<10;i++)
For(i=10;i>0;i--)
Tri
sang
phi
3 !
~
++
--
-
+
*
&
(type)
sizeof
Ph nh logic
Phn b o bit
S tng trc
S gim trc
m mt ton hng
Dng mt ton hng
Dng vi con tr
a ch ca
Dng vi kiu cho
Kch thc tr v kiu cc byte
if(!done)
flags=~flag;
for(i=0;i<10;++i)
for(i=10;i>0;--i)
int i=-1;
int i=+1;
data = *ptr;
address = &obj;
int i = (int) floatNum;
int size=sizeof(floatNum);
Phi
sang
tri
4 ->*
.*
B chn lc b nh con tr
B chn lc b nh i tng
ptr->*var=24;
obj.*var=24;
Tri
sang
phi
5 *
/
%
Nhn
Chia
Ly mun
int i=2*4;
float =10/3;
int rem=4%3;
Tri
sang
phi
6
6
+
-
Cng
Tr
int i = 2+3;
int i = 5-1;
Tri
sang
phi
7 <<
>>
o bit dch tri
o bit dch phi
int flags = 33 << 1
int flags = 33 >> 1
Tri
sang
phi
8 <
<=
>
>=
So snh nh hn
So snh nh hn hoc bng
So snh ln hn
So snh ln hn hoc bng
if(i<42)..
if(i<=42)..
if(i>42)..
if(i>=42)..
Tri
sang
phi
9 ==
!=
So snh bng
So snh khng bng
If(i==42)..
If(i!=42)..
Tri
sang
phi
Phm Thnh Cng http://www.ebook.edu.vn
22
10 & o bit AND flags = flags & 42; Tri
sang
phi
11 ^ o bit loi tr OR flags = flags ^ 42; Tri
sang
phi
12 | o bit OR bao hm flags = flags | 42; Tri
sang
phi
13 && AND s hc If (dkA&&dkB).. Tri
sang
phi
14 || OR logic If (dkA||dkB).. Tri
sang
phi
15 ?: Tam phn c iu kin int i=(a>b)?a:b; Tri
sang
phi
16 =
+=
-=
*=
/=
%=
&=
^=
|=
<<=
>>=
Php ton gn
Tng v gn
Gim v gn
Nhn v gn
Chia v gn
Modulo v gn
o bit AND v gn
o bit loi tr OR v gn
o bit bao hm OR v gn
o bit dch tri v gn
o bit dch phi v gn
int a = b;
a += 3;
b -= 4;
a *= 5;
a /= 2;
a %= 3;
flags &= new_flags;
flags ^= new_flags;
flags |= new_flags;
flags <<= 2;
flags >>= 2;
Tri
sang
phi
17 , Php ton c lng tun t for( i = 0, j = 0; i < 10;
i++, j++ ) ...
Tri
sang
phi

Bng 12: Cc kiu d liu

Kiu Kiu C Kch
thc
(bit)
Cn
thng
hng (bit)
Gii hn
Boolean _Bool 8 8 0 hoc 1
Character Char
signed char
8 8 -2
7
.2
7
-1
unsigned char 8 8 0.2
8
-1
Integral short
signed short
16 16 -2
15
.2
15
-1
unsigned short 16 16 0.2
16
-1
enum 8
16
32
8
16
32
-2
7
.2
7
-1
-2
15
.2
15
-1
-2
31
.2
31
-1
Phm Thnh Cng http://www.ebook.edu.vn
23
int
signed int
long
signed long
32 32 -2
31
.2
31
-1
unsigned int
unsigned long
32 32 0..2
32
-1
long long
signed long long
64 32 -2
63
.2
63
-1
unsigned long long 64 32 0..2
64
-1
Pointer pointer to function
or data
32 32 0..2
32
-1
Floating-
Point
float 32 32 -3.402E+38 .. -1.175E-38
1.175E-38 .. 3.402E+38
double
long double
64 32 -1.798E+308 .. -2.225E-308
2.225E-308 .. 1.798E+308

Bng 13: Cc kiu b nh

nh tnh M t
__no_sdata nh a ch RAM trc tip
__sdata nh a ch RAM trc tip, ngn (gn). Small data 64k
__sfr (Tng thch vi cc thanh ghi chc nng c bit)
__rom D liu c nh ngha vi nh tnh ny c t trong ROM.
__rom lun bao hm kiu nh tnh const.

V d:
__rom char text[] = "No smoking";
long long l = 1234; // long long ginh ring cho data (mc nh)
__sdata long long k = 1234; // long long ginh ring cho sdata

T kho __sfr cho php ta nh ngha mt bin nh l mt thanh ghi chc nng
c bit, cc bin c khai bo vi __sfr c vi c tnh c bit. Lnh ny
khng cho php khi to gi tr bin:
__sfr int j=10; // not allowed to initialize global __sfr variable

Bng 14: Hng s chui m rng

Chui m rng M t
\ Trch dn n
\ Trch dn kp
\\ Du vch cho ngc
\nnn S bt phn
Phm Thnh Cng http://www.ebook.edu.vn
24
\0 K t Null
\a Ting chung cnh bo
\b Phm li BackSpace
\f Formfeed
\n Dng mi
\r Tr v u dng
\t Trnh by ngang
\v Trnh by dc
\xnnn S thp lc phn

C c t kho c x l r ing bit

__asm() : s dng cc lnh assembler trong ngun C
__at() : t i tng d liu vo 1 a ch tuy i
__frame : cc thanh ghi an ton cho mt chc nng ngt
__interrupt : chc nng nh tnh nh mt dch v ngt thng thng.
__noinline : ngn chn trnh bin dch t chc nng trc tip.
__packed__ : ngn chn cc l trng lin kt trong cc cu trc.
__system : chc nng nh tnh nh mt non-interruptable.

C c hm bn t r ong

__alloc : ch nh b nh
__dotdotdot : ton t bin i s
__free : gii phng b nh
__get_return_address : chc nng tr v a ch
__cgetfsl : c cc word iu khin t FSL
__cputfsl : ghi cc word iu khin ti FSL
__getfsl : c cc word d liu t FSL
__putfsl : ghi cc word d liu t FSL
__getfsr : ly ni dung thanh ghi FSR
__putfsr : thit lp ni dung thanh ghi FSR
__getmsr : ly ni dung thanh ghi MSR
__putmsr : thit lp ni dung thanh ghi MSR
__msrclr : xo cc bit trong thanh ghi MSR
Phm Thnh Cng http://www.ebook.edu.vn
25
__msrset : thit lp cc bit trong thanh ghi MSR
__getpc : ly gi tr b m chng trnh

c c t kho C

auto : biu th 1 bin cc b
break : thot khi 1 vng lp
case : 1 khi code trong 1 cu lnh switch
char : khai bo 1 bin kiu character
const : khai bo d liu khng i hoc cc hm khng thay i d liu
continue : b qua s ln lp ca 1 vng lp
default : mc nh ch huy trong 1 cu lnh case
do : cu trc vng lp
double : khai bo 1 bin du phy ng chnh xc kiu double
else : lun phin case cho mt cu lnh if
enum : to cc kiu enumeration
extern : bo cho trnh bin dch v cc bin c nh ngha elsewhere
float : khai bo 1 bin kiu du phy ng
for : kin trc vng lp
goto : nhy ti 1 phn khc ca chng trnh
if : cu lnh iu kin if
inline : gi ti u ti cc chc nng ngn
int : khai bo 1 bin kiu integer
long : khai bo 1 bin kiu long
register : yu cu rng 1 bin c ti u tc
return : tr v t mt hm
short : khai bo 1 bin kiu short
signed : cc khai bo thay i kiu bin
sizeof : tr v kch thc kiu bin hoc kiu
static : to ra s ct gi c nh cho 1 bin
struct : nh ngha 1 cu trc mi
switch : cu lnh switch
Phm Thnh Cng http://www.ebook.edu.vn
26
typedef : to ra 1 tn kiu mi t 1 kiu c
union : 1 cu trc phn cc bin phc tp vo cng vng nh
unsigned : khai bo 1 bin kiu integer khng du
void : khai bo cc hm hoc d liu m khng c kt hp kiu d liu
volatile : cnh bo trnh bin dch v cc bin c th b iu chnh t xut
while : cu trc vng lp

c c l nh t in x l

#,## : cc thao tc chui
#define : nh ngha cc bin
#error : hin th 1 thng bo li
#if, #ifdef, #ifndef, #else, #elif, #endif: cc ton t iu kin
#include : chn cc ni dung ca file khc
#line : thit lp dng thng tin v file thng tin
#pragma : lnh b xung c bit
#undef : c ng khng nh ngha cc bin

c c hm c chun

abort : dng chng trnh
abs : gi tr tuyt i
acos : arc cosin
asin : arc sine
assert : dng chng trnh nu 1 biu thc khng phi l true
atan : arc tangent
atexit : thit lp 1 hm c gi khi 1 chng trnh thot ra
atof : chuyn i 1 chui thnh kiu double, vd: 123 -> 123
atoi : chuyn i 1 chui thnh kiu integer
atol : chuyn i 1 chui thnh kiu long
bsearch : biu din 1 s nh phn tm kim
clearerr : xo cc li
Phm Thnh Cng http://www.ebook.edu.vn
27
cos : cosine
cosh : cosine hypecbol
difftime : s khc nhau gia 2 ln
div : tr v thng s v s d ca php chia
exit : dng chng trnh
fabs : gi tr tuyt i cho cc s du phy ng
fclose : ng 1 file
feof : l true ti the-endof-file
fopen : m mt file
fprintf : in u ra c nh dng thnh 1 file
fputc : ghi 1 k t thnh 1 file
fputs : ghi 1 chui thnh 1 file
fread : c t 1 file
fwrite : ghi thnh 1 file
getc : c 1 k t t 1 file
getchar : c 1 k t t STDIN
gets : c 1 chui t STDIN
isalnum : l true nu k t theo th t ch ci con s
isalpha : l true nu k t theo th t ch ci
iscntrl : l true nu k t l 1 k t iu khin
isdigit : l true nu k t l 1 s
labs : gi tr tuyt i cho kiu long integer
log : logarit t nhin
log10 : logarit t nhin c s 10
printf : ghi u ra c nh dng ti STDOUT
putc : xut 1 k t
putchar : xut 1 k t ti STDOUT
puts : ghi 1 chui ti STDOUT
remove : xo 1 file
rename : i tn 1 file
scanf : c u vo c nh dng t STDIN
sin : sine
sinh : sine hyperbolic
Phm Thnh Cng http://www.ebook.edu.vn
28
sqrt : khai cn bc 2
strcpy : sao chp 1 chui ti chui khc
tan : tangent
tanh : hyperbolic tangent


Ti liu tham kho

[1] - MicroBlaze Processor Reference Guide ngun:
http://ohm.bu.edu/~hazen/DataSheets/Xilinx/mb_ref_guide.pdf
[2] - MicroBlaze Tutorial ngun: http://ecasp.ece.iit.edu/mbtutorial.pdf
[3] - MicroBlaze Overview ngun:
http://www.cc.ntut.edu.tw/~tylee/Courses/92_2_HWC/MicroBlaze%20Overvie
w.pdf
[4] - Cc ti liu lin quan MicroBlaze ti:
https://wiki.altium.com/display/ADOH/Xilinx+MicroBlaze