ACSS for Paralleled Multi-Inverter Systems with DSP-Based Robust Controls

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ACSS for Paralleled Multi-Inverter Systems with DSP-Based Robust Controls

ACSS for Paralleled Multi-Inverter Systems with DSP-Based Robust Controls

© All Rights Reserved

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DSP-Based Robust Controls

YU-KAI CHEN, Member, IEEE

National Huwei Institute of Technology

Taiwan

YU-EN WU

TSAI-FU WU, Senior Member, IEEE

CHUNG-PING KU

National Chung Cheng University

Taiwan

An averaged current-sharing strategy (ACSS) for paralleled

multi-inverter systems with digital signal processor (DSP)-based

robust controls is presented. With an ACSS, the inverters are

in parallel operation and each inverter has a voltage robust

controller to achieve system stability and robustness, and a

current robust controller to track the averaged inductor current

of the inverters to achieve equal current distribution. In the

proposed system, the current-sharing control loop is independent

of the voltage control loop. Therefore, equal current distribution

among the inverters, fast response, and tight regulation can be

achieved. Additionally, the ACSS in each inverter can be readily

implemented with two operational amplifiers. Simulation results

and hardware measurements of a single-inverter system and a

two-inverter system, and simulation results of a three-inverter

system with linear and nonlinear loads have demonstrated the

feasibility of the proposed control scheme in equal current

distribution and fast regulation.

Manuscript received August 6, 2002; revised February 10, 2003;

released for publication March 31, 2003.

IEEE Log No. T-AES/39/3/818506.

Refereeing of this contribution was handled by W. M. Polivka.

This work was supported by the National Science Council, Taiwan,

under Project NSC 89-2213-E-270-027.

Authors current addresses: Y-K. Chen, Dept. of Aeronautical

Engineering, National Huwei Institute of Technology, 64 Wenhwa

Road, Huwei Jen, Yunlin, Taiwan, 632 ROC; Y-E. Wu, Dept.

of Electrical Engineering, Wu-Feng Institute of Technology,

Ming-Hsiung, Chia-Yi, Taiwan, ROC; T-F. Wu, Power Electronics

Applied Research Laboratory (PEARL), Dept. of Electrical

Engineering, National Chung Cheng University, Ming-Hsiung,

Chia-Yi, Taiwan, ROC, E-mail: (tfwu@ee.ccu.edu.tw); C-P. Ku,

Industrial Technology Research Institute, Taiwan, ROC.

0018-9251/03/$17.00 c _ 2003 IEEE

I. INTRODUCTION

In recent years, sinusoidal pulsewidth modulated

(SPWM) inverters have found their wide applications

in various types of ac power conditioning systems,

such as automatic voltage regulators (AVR),

uninterruptible power supplies (UPS), active power

filters (APF), etc. Parallel operation of inverters to

obtain a larger power capacity and to improve system

reliability becomes the trend of power system design.

Two or more inverters operating in parallel must

achieve the following features:

1) same amplitude, frequency and phase among

the output voltages of inverters,

2) proper current distribution among inverters

according to their capacities,

3) flexibility in paralleling any number of

inverters, and

4) hot-swap feature at any operating time.

To achieve the above features, there were several

types of control strategies proposed in literature

[111]. In [1], phase-locked loop (PLL) control

technique was used to synchronize the output voltage

of inverters. One of the most common methods

for load current-sharing control is instantaneous

modulation control, such as the master-slave control

(MSC) and the highest current control (HCC) [6, 11].

In a system with the MSC [6], the master module is

responsible for output voltage regulation, while the

slave ones track the current command provided by

the master to achieve an equal current distribution.

In such a system, if the master module fails, the

system will shut down. This is a major drawback. In

[11], the proposed instantaneous voltage and current

controller for the paralleled inverters with an HCC

can quickly eliminate the current deviation and can

achieve power balance among inverters. However,

since the sensed highest output current would be

noisy, the performance of current distribution and

output voltage regulation will be deteriorated. In

addition, the paralleled inverters with nonidentical

component characteristics and input voltage variation

will affect the models of the inverters and might also

deteriorate in system performance. Therefore, robust

controllers are adopted to achieve the robustness of

the proposed paralleled multi-inverter system.

In this paper, a voltage H

robust controller is

adopted to reduce the prementioned effects and to

achieve the system stability and robustness; thus, the

output voltage can be well regulated. In addition, an

averaged current-sharing strategy (ACSS) is used

to replace the HCC proposed in [11] to achieve an

equal current distribution and to reduce noise effect

occurring at inverter switching transition.

Section II presents the system configuration

of a paralleled multi-inverter system. In Section

III, analysis and design of robust controllers are

described and discussed in detail. A single-inverter

1002 IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS VOL. 39, NO. 3 JULY 2003

system, a two-inverter system, and a three-inverter

system are presented in Section IV to verify the

theoretical discussion. Brief conclusions are presented

in Section V.

II. CONFIGURATION OF PARALLELED

MULTI-INVERTER SYSTEM

A paralleled multi-inverter system with the

proposed ACSS can be conceptually illustrated by

Fig. 1(a), in which a schematic diagram of each

inverter associated with a digital signal processor

(DSP) controller and the current-sharing center are

depicted in Fig. 1(b) and (c), respectively. With the

ACSS, the inductor current of each inverter is sensed

as the input of the current-sharing center and then

the averaged current i

ave

of the paralleled n-inverter

system can be obtained. In the system, all the inverters

are with the same configuration, and each inverter,

as shown in Fig. 1(b), consists of a half-bridge

switch configuration and an L-C output filter. The

current-sharing center consists of scaling circuits and

inverted circuits which are realized with operational

amplifiers, as shown in Fig. 1(c). The averaged

current i

ave

is selected as the current command for

each inverter to achieve an equal current distribution.

The DSP controller performs digital control and

generates SPWM driving signals for switching

devices, in which a clock rate of 20 MHz and 10 bit

analog-to-digital (A/D) converters (for feeding back

inductor current and output voltage) are adopted. In

the proposed system, the voltage H

robust controller

is responsible for output voltage regulation, while the

current ones will track the current command i

ave

to

achieve an equal current distribution. The proposed

control scheme is realized with a TMS320F240 DSP

chip.

III. ANALYSIS AND DESIGN OF ROBUST

CONTROLLERS

Each inverter with the ACSS includes two

controllers: one is for output voltage loop; the other

is for current-sharing loop. The H

robust control

technique is adopted to design these controllers

for achieving equal current distribution, low output

voltage distortion, and low steady-state error. Before

performing these designs, the dynamics of the

inverters needs to be analyzed.

A. Modeling of Single-Inverter System

To design a proper controller for an SPWM

controlled inverter, the dynamics of a single-inverter

system is modeled and illustrated by a control block

diagram shown in Fig. 2, where

v

ref

is the perturbation

of a sinusoidal reference voltage,

v

o

is the perturbation

of the output voltage,

v

fb

is the perturbation of the

Fig. 1. (a) Block diagram of paralleled multi-inverter system.

(b) Circuit diagram of single-inverter system. (c) Circuit diagram

of current-sharing center for proposed ACSS.

Fig. 2. Control block diagram of single-inverter system.

feedback voltage,

i

o

is the perturbation of the output

current,

d is the perturbation of the duty cycle,

v

c

is the perturbation of control voltage, and K

v

(s) is

an output voltage-loop controller. H

v

represents the

CHEN ET AL.: ACSS FOR PARALLELED MULTI-INVERTER SYSTEMS WITH DSP-BASED ROBUST CONTROLS 1003

Fig. 3. Bode plot of control-to-output voltage transfer function under three different load conditions.

feedback gain and K

PWM

is the pulsewidth modulated

(PWM) gain of the inverter. Effective series resistance

of the capacitor and inductor are neglected. The

small-signal control-to-output voltage transfer function

(

v

o

= v

c

) of a single-inverter system then can be derived

with the Masons rule and expressed as follows:

G

V

(s) =

v

o

v

c

=

K

PWM

(L

l

s +R

l

)

[LL

l

Cs

3

+R

l

LCs

2

+(L+L

l

)s +R

l

]

(1)

where R

l

and L

l

are load resistance and inductance.

A detailed derivation of (1) is given in Appendix A.

Fig. 3 shows the plots of control-to-output voltage

transfer function versus frequency under three

different load conditions (no load, a 0.7 lagging

load, and full load). Note that as shown in Fig. 3,

the voltage loop small-signal transfer functions of

the single-inverter system are different under different

load conditions. Thus, variation of loads is treated as

an uncertainty of the proposed system. In addition,

variations of input voltage and component values

are also treated as uncertainties of the single-inverter

system in the design.

B. Design of Voltage Robust Controller

It can be observed from Fig. 3 that output

voltage-loop transfer characteristics vary with

loads, input voltages, and component values in a

single-inverter system. To reduce the effects due to

the variations, the H

adopted to design an output voltage controller. A

block diagram used to illustrate the proposed H

multiplicative uncertainty-plant G(s) is with three

uncertainties, including variations of component

Fig. 4. Illustration of augmented plant with robust controller

K(s).

values, load, and input voltage. The design procedure

of a robust controller is outlined as follows.

1) Augment the plant G

v

(s) (=

v

o

= v

c

) with

weighting functions W

1

(s) and W

2

(s) based on the

desired performance indices. The augmented plant

P(s) can be conceptually illustrated by Fig. 4.

Generally, weighting function W

1

(s) is a typical

low-pass filter, shaping the sensitivity function S at

low frequency to reject disturbance and to reduce

tracking errors, and Z

1

is a control variable used

to adjust the tracking errors. Weighting function

W

2

(s) is chosen to be a high-pass filter, shaping

the complementary sensitivity function T at high

frequency to minimize instability effects.

2) First consider sinusoidal inputs and suppose that

input r can be any sinusoidal signal with amplitude _1

and we want tracking error e to have amplitude <".

Then the performance specification can be expressed

succinctly as

|S|

<": (2)

That is, the maximum amplitude of error e equals

the -norm of the transfer function S. In several

applications, for example aircraft flight-control design,

designers have acquired through experience the

desired shapes for the Bode magnitude plot of S. In

particular, suppose that good performance is known

1004 IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS VOL. 39, NO. 3 JULY 2003

to be achieved if the plot of [S(j!)[ lies under some

curve. We can rewrite this as

[S(j!)[ <[W

1

(j!)[

1

, \ !: (3)

Or,

|W

1

S|

<1: (4)

Additionally, for the multiplicative uncertainty model

(1 +W

2

)GK, if

|W

2

T|

<1 (5)

this implies

|W

2

T|

<|W

2

T|

<1: (6)

Then, we have

1 +(1 +W

2

)GK = (1 +GK)

_

1 +W

2

GK

1 +GK

_

= (1 +GK)(1 +W

2

T) _1 +GK

(7)

that is, the perturbation W

2

does not change the

stability condition, achieving robustness. Rigorous

proof of the prementioned inequalities can be found

from [12, 13]. Next, we have to find an H

robust

controller K(s) to satisfy the following inequality:

_

_

_

_

_

W

1

S

W

2

T

__

_

_

_

_1 (8)

where S(s) = (I +G(s)K(s))

1

is the sensitivity

function and T(s) =G(s)K(s)(I +G(s)K(s))

1

is

the closed-loop transfer function of the reference

command

v

ref

to the measured output

v

o

. T(s) is also

called a complementary sensitivity function.

3) Verify if the design is close to the desired

performance indexes based on the evaluation of the

singular-value Bode plot. If it is not, we need to

go back to step 1 to select another set of weighting

functions and go through all steps again.

C. Modeling of Paralleled Current-Sharing

Multi-Inverter System

To investigate the current distribution among

inverters, a multi-inverter system is designed with the

inverters in parallel connection and each inverter has a

current robust controller to track the averaged inductor

current i

ave

to achieve an equal current distribution.

A control block diagram of the proposed system with

the ACSS is shown in Fig. 5. The control-to-inductor

current transfer function (

i

L

= v

ci

) of the inverter system

for inductive load is derived with the Masons rule

and represented as follows:

G

i

(s) =

i

L

v

ci

=

K

PWM

(s

2

L

l

C +sCR

l

)

s

3

LL

l

C +s

2

LCR

l

+sL

l

+sL+R

l

: (9)

Fig. 5. System configuration of proposed paralleled multi-inverter

system with ACSS.

From (9), it can be observed that the control-to-

inductor current transfer function of an inverter varies

with component values.

D. Design of Current Robust Controller

Design of a current robust controller for a

current-sharing loop is the same as that of a voltage

robust controller, which has been shown in Subsection

B of this section.

IV. ILLUSTRATION EXAMPLES AND DISCUSSION

Three examples, single-inverter, two-inverter, and

three-inverter systems, with current and voltage H

discussion. The design specifications of the above

examples are given as follows.

A. Output Voltage Loop

1) phase margin (PM) _60

(GM) _40 dB,

2) bandwidth _3 kHz,

3) steady-state error = 0,

4) minimizing the sensitivity to the variations of

input voltage, component value, and load condition.

CHEN ET AL.: ACSS FOR PARALLELED MULTI-INVERTER SYSTEMS WITH DSP-BASED ROBUST CONTROLS 1005

Fig. 6. Magnitude plot of weighting function W

2

(s) and multiplicative uncertainty-plant.

Fig. 7. Bode plot of sixth-order and second-order robust controllers.

B. Current-Sharing Loop

1) PM _60

2) bandwidth _3 kHz,

3) steady-state error = 0,

4) minimizing the sensitivity to the variations of

input voltage and component value.

EXAMPLE 1 Single-Inverter System: The electrical

specifications and component values of a single

inverter are collected in Table I. For the output

voltage loop, weighting functions W

1

(s) and W

2

(s) are

determined to satisfy all aforementioned specifications

simultaneously and to ensure robust stability.

Typically, the weighting functions W

1

(s) and W

2

(s) are

chosen as follows:

W

1

(s) =K

1

_

_

_

s

!

/

C

+1

s +10

6

_

_

_

n

1

(10)

TABLE I

Specifications and Component Values of Single-Inverter System

and

W

2

(s) =

_

_

_

s

!

C

+1

_

(10

6

s +1)

_

_

n

2

(11)

where K

1

is used to adjust the tracking error, both

n

1

and n

2

are either 1 or 2, and w

C

and w

/

C

are the

1006 IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS VOL. 39, NO. 3 JULY 2003

Fig. 8. Bode plot of loop gain in voltage-regulation loop with designed robust controller.

Fig. 9. Output voltage and current waveforms of single-inverter system operating with pure resistant load. (a) Simulation.

(b) Measurement.

CHEN ET AL.: ACSS FOR PARALLELED MULTI-INVERTER SYSTEMS WITH DSP-BASED ROBUST CONTROLS 1007

Fig. 10. Output voltage and current waveforms of single-inverter system operating with high CF load. (a) Simulation. (b) Measurement.

two parameters used to adjust the bandwidth of the

closed-loop system. For good tracking performance,

sensitivity function S(s) should generally exhibit

low-gain property over low frequency range. Since

|W

1

S|

<1, W

1

(s) must behave as a low-pass filter.

The multiplicative uncertainty-plant G(s) of the

single-inverter system includes the variations of

input voltage, component value, and load condition.

As to the choice of W

2

(s) for system robustness,

the magnitude of W

2

(s) should be large enough to

accommodate the multiplicative uncertainty-plant,

as illustrated in Fig. 6. Similarly, high-pass property

of W

2

(s) is required to achieve enough bandwidth

for the closed-loop transfer function T(s) because

|W

2

T|

<1.

The weighting functions W

v1

(s) and W

v2

(s) of the

output-voltage loop are selected as

W

v1

(s) =

300

_

s

3000

+1

_

s +10

6

(12)

and

W

v2

(s) =

1:5

_

s

3000

+1

_

2

(s +10

6

)

2

: (13)

The 6th order H

robust controller K

V6

(s) can be

derived with MATLAB Robust Control Toolbox.

Through a minimal realization, which is the realization

of a model with the redundant or unnecessary states

eliminated, a second-order robust controller can be

obtained as follows:

K

V

(s) =

10

4

(1:81 10

7

s

2

+7:89 10

4

s +7:64)

10

7

s

2

+5:95s +1:98 10

3

:

(14)

The Bode plots of K

V6

(s) and K

V

(s) are plotted in

Fig. 7. From the figure, we can observe that the

characteristic of K

V6

(s) is nearly the same as that of

K

V

(s) from dc to 3 kHz of the desired bandwidth.

Fig. 8 shows the Bode plot of the loop gain in

the voltage-regulation loop; we can see that the

specifications of the system are achieved with the

1008 IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS VOL. 39, NO. 3 JULY 2003

Fig. 11. Transient responses of output voltage and current to step load change from 33% to 100% of full load. (a) Simulation.

(b) Measurement.

designed controller. In simulation, the controller

is realized with analog circuits, while in hardware

implementation, they are first converted to discrete

forms with the bilinear transformation, which maps

the s-plane into the z-plane. The designed controller is

represented in difference equations as shown in (15),

and it is programmed on a TMS 320F240 DSP chip

[14].

Y

(K) = 10

7

[2:967U

(K) +5:934U

(K 1)

+2:967U

(K 2)]

1:5379Y

(K 1) 0:5379Y

(K 2)

(15)

where Y

U

and measured results of such a system loaded with a

resistor are shown in Fig. 9, where the voltage and

current waveforms are sinusoidal and in phase.

These results appear closely consistent with each

other.

Fig. 10 and Fig. 11 show the simulated and

measured output current and voltage responses of

such a system with a high crest factor load (CF = 3)

and with a step load change from 33% to 100%,

respectively. It can be observed from the waveforms

that fast regulation can be achieved. Total harmonic

distortion (THD) and odd harmonics of the output

voltage of the system operated with a full linear load

and a high CF load are listed in Tables II and III,

respectively.

EXAMPLE 2 Two-Inverter System: To investigate the

current distribution between inverters, a two-inverter

system with the circuit parameters collected

in Table IV is simulated and implemented. As

described previously, the robust current-sharing

control technique has been adopted to deal with the

uncertainty between the paralleled inverters. Thus, the

voltage controller of example 1 can also be used in

this inverter.

With the design specifications of current-sharing

loop, the weighting functions W

i1

(s) and W

i2

(s) of the

CHEN ET AL.: ACSS FOR PARALLELED MULTI-INVERTER SYSTEMS WITH DSP-BASED ROBUST CONTROLS 1009

TABLE II

THD and Odd Harmonics of Output Voltage of Single-Inverter

System Operating with Full Linear Load

TABLE III

THD and Odd Harmonics of Output Voltage of Single-Inverter

System Operating with High CF Load

current-sharing loop are selected as

W

i1

(s) =

20

_

s

3000

+1

_

s +10

6

(16)

and

W

i2

(s) =

0:4

_

s

3000

+1

_

2

(s +10

6

)

2

: (17)

Thus, the robust current-sharing continuous and

discrete controllers are expressed in (18) and (19),

Fig. 12. Bode plot of loop gain in current-sharing loop with designed robust controller.

TABLE IV

Circuit Parameters of Two-Inverter System

respectively

K

i

(s) =

10

7

(6:90 10

7

s

2

+6:83 10

1

s 1:18 10

1

)

s

2

+5:18 10

1

s +1:7210

1

(18)

Y

i

(K) =10

6

[0:0666U

i

(K) +0:1332U

i

(K 1)

+0:0666U

i

(K 2)]

+1:9415Y

i

(K 1) +0:9415Y

i

(K 2) (19)

where Y

i

(K) is the output of the current-sharing

controller and U

i

(K) is the input of the current-sharing

controller. The Bode plot of the loop gain in the

current-sharing loop is shown in Fig. 12. Thus, the

specifications of the current-sharing loop with the

designed controller are met in this paper. Simulated

and measured voltage and current waveforms for

pure resistant load are illustrated in Fig. 13, where

v

o

denotes the output voltage, and i

o1

and i

o2

are the

output currents of inverters 1 and 2, respectively.

Fig. 14 shows the simulation of the output voltage

and output currents of the two-inverter system with a

high CF load. It can be observed from these plots that

1010 IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS VOL. 39, NO. 3 JULY 2003

Fig. 13. Output voltage and current waveforms of two-inverter system with pure resistant load. (a) Simulation. (b) Measurement.

Fig. 14. Simulated output voltage and current waveforms of two-inverter system with high CF load.

equal current distribution can be achieved regardless

of the types of loads and component discrepancy

between inverters.

EXAMPLE 3 Three-Inverter System: For further

verifying the feasibility of the proposed ACSS,

a three-inverter system with a pure resistant load

CHEN ET AL.: ACSS FOR PARALLELED MULTI-INVERTER SYSTEMS WITH DSP-BASED ROBUST CONTROLS 1011

Fig. 15. Simulated output voltage and current waveforms of three-inverter system with (a) inverter 3 in failure, and (b) inverter 3

connected to load.

is simulated, whose results are plotted in Fig. 15.

The three output currents are tracking each other

precisely and the output voltage waveform sustains

sinusoidal. Moreover, in order to investigate the

system reliability, the system with ACSS under

the case of one inverter in open-circuit failure or

short-circuit failure is presented. Fig. 15(a) shows

the waveforms of a system with inverter 3 in these

failures. It can be seen that the output voltage and

current waveforms are sinusoidal and in phase without

noticeable variation under such a sudden failure, and

the other two inverters can continuously supply power

to the load. Fig. 15(b) shows a plot in which the load

is first supplied by inverter 1 and inverter 2, and then

inverter 3 is synchronized and connected to the load.

Again, it can be observed that the three inverters can

share output current equally and output voltage is

sinusoidal.

The advantages of the paralleled multi-inverter

system with the robust ACSS are outlined as

follows.

1) It can reduce the system uncertainties and

achieve system stability and robustness.

2) Each inverter module can be kept in the same

configuration in a paralleled inverter system with any

number of inverters.

3) Even a single inverter can work with a

current-sharing center because the gain of the

current-sharing center in a single-inverter system is

unity.

4) A hot-swap feature of the paralleled system can

be achieved at any operating time.

5) Under any inverter failure, the system still

works successfully.

6) Equal output current distribution among the

inverters and fast output regulation can be achieved

while component values, input voltages, and loads

may vary over a wide range.

V. CONCLUSIONS

An ACSS for inverters in parallel operation to

achieve equal current distribution has been studied.

Each inverter in the proposed system consists of a

voltage robust controller to achieve a fast dynamic

response, and a current robust controller to reach

system robustness and to reduce uncertainty among

1012 IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS VOL. 39, NO. 3 JULY 2003

Fig. 16. (a) Circuit diagram and (b) control block diagram of

output L-C filter and load.

inverters. It has been verified that a system with

ACSS can accommodate various types of loads and

variations of input voltage and component value.

In other words, the proposed ACSS is with a tight

current tracking characteristic regardless of the types

of loads and discrepancy among inverters. In addition,

flexibility and hot-swap feature can be achieved for a

system with various numbers of inverters.

Simulation results have shown that fast dynamic

response, tight output regulation, and equal current

distribution can be achieved in the proposed paralleled

multi-inverter systems. Hardware measurements

obtained from a laboratorious prototype have shown

similar performance to those of the simulation results

and have also verified the theoretical discussion.

APPENDIX A

The half-bridge inverter consists of a half-bridge

switch configuration and an output L-C filter. The

half-bridge switch can be modeled as an amplifier

with gain K

PWM

, in which nonlinearity of PWM

switches is neglected. Additionally, a circuit diagram

of an output L-C filter is shown in Fig. 16(a).

Choosing capacitor voltage

v

c

and inductor current

i

L

as state variables, and PWM input

d and load current

I

o

as inputs, the system dynamic equations can be

derived as follows:

v

i

=L

i

L

+r

C

i

C

+

v

C

(20)

v

c

=

1

C

i

C

(21)

and

i

C

=

i

L

I

o

: (22)

Or,

i

L

=

_

r

L

+r

C

L

_

1

L

v

C

+

1

L

d +

r

C

L

I

o

(23)

and

v

C

=

1

C

i

L

1

C

I

o

: (24)

From the above equations, a block diagram of the

output L-C filter can be represented in Fig. 16(b)

and the closed-loop block diagram of the inverter

system can be represented in Fig. 2. Therefore, the

control-to-output voltage and control-to-inductor

current transfer functions, respectively represented in

(1) and (9), can be derived with the Masons rule.

REFERENCES

[1] Dobrorolny, P., Woods, J., and Ziogas, P. D. (1989)

A phase-locked-loop synchronization scheme for parallel

operation of modular power supplies.

In Proceedings of the IEEE Power Electronics Specialists

Conference, 1989, 861869.

[2] Chen, J-F., Chu, C-L., and Huang, O-L. (1992)

The parallel operation of two UPS by the

coupled-inductor method.

In Proceedings of the IEEE Industrial Electronics, Control

and Instrumentation, 1992, 733736.

[3] Fraser, M. E., and Manning, C. D. (1994)

Performance of average current mode controlled PWM

UPS factor load.

In Proceedings of the IEEE Power Electronics and

Variable-Speed Drives, 1994, 661667.

[4] Tzou, Y-Y. (1995)

DSP-based fully digital control of a PWM dc-ac converter

for ac voltage regulation.

In Proceedings of the IEEE Power Electronics Specialists

Conference, 1995, 138144.

[5] Ryan, M. J., and Lorenz, R. D. (1995)

A high performance sine wave inverter controller with

decoupling.

In Proceedings of the IEEE Power Electronics Specialists

Conference, 1995, 507513.

[6] Chen, J-F., and Chu, C-L. (1995)

Combination voltage-controlled and current-controlled

PWM inverters for UPS parallel operation.

IEEE Transactions on Power Electronics, 10, 5 (Sept.

1995), 547558.

[7] Tuladhar, A., Jin, H., Unger, T., and Mauch, K. (1997)

Parallel operation of single phase inverter.

In Proceedings of the IEEE Applied Power Electronics

Conference, 1997, 94100.

[8] Kawabata, K., Sashida, N., Yamamoto, Y., Ogasawara, K.,

and Yamasaki, Y. (1991)

Parallel Processing Inverter System.

IEEE Transactions on Power Electronics, 6, 3 (July 1991),

442450.

[9] Kawabata, T., and Higashino, S. (1988)

Parallel operation of voltage source inverters.

IEEE Transactions on Industry Applications, 24, 2

(Mar./Apr. 1988), 281287.

[10] Martins, A. P., Carvalho, A. S., and Araujo, A. S. (1995)

Design and implementation of a current controller.

In Proceedings of the IEEE Industrial Electronics, Control

and Instrumentation, 1995, 584589.

[11] Lee, C. S., et al. (1998)

Parallel UPS with an instantaneous current sharing

control.

In Proceedings of the IEEE Industrial Electronics, Control

and Instrumentation, 1998, 568573.

[12] Doyle, C., Francis, B. A., and Tannenbaum, A. R. (1992)

Feedback Control Theory.

New York: Maxwell Macmillan, 1992.

CHEN ET AL.: ACSS FOR PARALLELED MULTI-INVERTER SYSTEMS WITH DSP-BASED ROBUST CONTROLS 1013

[13] Grimble, M. J. (1994)

Robust Industrial Control: Optimal Design Approach for

Polynominal Systems.

New York: Prentice Hall, 1994.

Yu-Kai Chen (S98M99) was born in Chia-Yi, Taiwan, in 1967. He received

the B.S. degree in electronic engineering from Feng Chia University Tai-Chung,

Taiwan and the M.S. degree in information and electronics engineering from

National Central University, Chung-Li, Taiwan, and the Ph.D. degree in electrical

engineering from National Chung Cheng University, Chia-Yi, Taiwan, in 1990,

1994, and 1999, respectively.

From 1994 to 1999, he was a Lecturer in the Department of Electronic

Engineering, Wu Feng Institute of Technology, Chia-Yi, Taiwan. He was

an associate professor in the Department of Electrical Engineering at Chien

Kuo Institute of Technology from 2000 to 2001. Since 2002, he has been

with the Aeronautical Engineering, National Hu-wei Institute of Technology,

Yun-lin, Taiwan, where he is currently an associate professor. His research

interests include modeling and control of dc/dc converters, design of converters

and inverters, and design of solar-panel supplied systems, and DSP- and

microprocessor-based application systems with fuzzy and robust control.

Yu-En Wu was born in Chia-Yi, Taiwan, in 1964. He received the B.S. degree

in electrical engineering from Taiwan Institute of Technology, Taipei, Taiwan, in

1989, and the M.S. degree in electrical engineering from Sun Yat-Sen University,

Kaohsiung, Taiwan, in 1992.

He is currently a Ph.D. candidate in the Department of Electrical Engineering,

National Chung Cheng University, Chia-Yi, Taiwan, and is also an instructor of

electronic engineering at Wu-Feng Institute of Technology. His research interests

include modeling and control of converters, design of inverters, multi-inverter

system, and paralleling UPS system.

[14] Chen, C-T. (1993)

Analog & Digital Control System Design:

Transfer-function, State-space, & Algebraic Methods.

New York: Oxford University, 1993.

1014 IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS VOL. 39, NO. 3 JULY 2003

Tsai-Fu Wu (S89M91SM98) received the B.S. degree in electronics

engineering from National Chiao-Tung University, Taiwan, in 1983, the M.S.

degree in electrical and computer engineering from Ohio University, Athens, in

1988, and the Ph.D. degree in electrical engineering and computer science from

University of Illinois at Chicago, in 1992.

From 1985 to 1986 he was a system engineer at SAMPO, Inc., Taiwan,

developing and designing graphic terminals. He was a teaching and research

assistant in the Department of Electrical Engineering and Computer Science,

University of Illinois, Chicago, from 1988 to 1992. Since 1993, he has been

with the Electrical Engineering Department, National Chung Cheng University,

Taiwan, where he is currently a professor, department head and the Director

of the Power Electronics Applied Research Laboratory (PEARL). His research

interests include developing and modeling of power converters, design of

electronic dimming ballasts for fluorescent lamps, metal halide lamps and plasma

display, and design of solar-panel-supplied inverters for grid connection.

Dr. Wu is a Senior Member of the CIE.

Chung-Ping Ku was born in Kaohsiung, Taiwan, in 1977. He received the B.S.

degree in electrical engineering from National Huwei Institute of Technology,

Yulin, Taiwan, in 2000, and the M.S. degree from National Chung-Cheng

University, Chia-Yi, Taiwan, in 2002.

He currently joins Industrial Technology Research Institute, Taiwan, designing

power converter for the sulfur lamp system. His research interests include power

converters, ballasts and microprocessor-based application systems.

CHEN ET AL.: ACSS FOR PARALLELED MULTI-INVERTER SYSTEMS WITH DSP-BASED ROBUST CONTROLS 1015

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