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144

IEEE ELECTRON DEVICE LETTERS, VOL. 25, NO. 3, MARCH 2004

Variable Inductance Multilayer Inductor With
MOSFET Switch Control
Piljae Park, Cheon Soo Kim, Member, IEEE, Mun Yang Park, Sung Do Kim, and Hyun Kyu Yu, Senior Member, IEEE

Abstract—A variable monolithic inductor having a stacked
spiral inductor connected with MOSFET switches is proposed
and fabricated in a 0.18 m, one-poly–six-metal (1P6M) standard
CMOS process. By controlling a voltage of the MOSFET switch,
the proposed three-stacked inductor demonstrates a continuously
variable inductance of from 8 to 23 nH at 2.4 GHz, and due to its
stacked structure, it takes less than 50% of the chip area compared
with conventional single layer inductors. With its compact size
and variable inductance feature, the proposed variable inductor
is a prospective key component for the multiband RF circuits
such as electrically controllable matching circuits and wide tuning
range voltage controlled oscillators (VCOs).
Index Terms—Inductors, multilayer spiral inductors, quality
factor, variable inductance.
Fig. 1. Configuration of (a) the proposed inductor, (b) its equivalent circuit,
and (c) its microphotograph.

I. INTRODUCTION

T

O accommodate several wireless services within a single
chip transceiver, the implementation of radio frequency
(RF) circuits with the multiband feature would be a more attractive way to reduce chip area and cost than the simple integration of each RF band circuit. Until recently, variable capacitors using the voltage dependant junction or MOS capacitance have been widely used to implement voltage controlled
oscillators (VCOs). A monolithic variable inductor, however, is
hard to implement because the inductor metal line length must
be changed electrically to alter the inductance. Two series-connected inductors with a MOSFET switch were employed by a
low noise amplifier (LNA) [1] to control gain, and a VCO [2]
to widen the tuning range by short-circuiting one inductor using
a switch. In these cases, however, chip area occupied by the inductors was relatively very large because both series-connected
inductors were placed separately.
Fortunately, the recent progress of multilayer metallization
technologies makes multilayer stacked inductors (MSIs) feasible with a comparable quality factor [3], [4]. In this letter, by
combining MSI and MOSFET switch, we proposed an area efficient monolithic inductor, which achieves a continuously variable inductance according to the control voltage of the MOSFET
switch.

II. VARIABLE MULTILAYER INDUCTOR DESIGN
A voltage controlled monolithic variable inductor which consists of a stacked spiral inductor and MOSFET switches is proposed and fabricated in a 1P6M, 0.18 m standard CMOS technology. As shown in Fig. 1(a), three spiral inductors are stacked
vertically using metal 6, metal 4, and metal 2 with two parallel-connected MOSFET switches (SW53, SW31). The underpass using metal 1 layer is located 0.85 m below the metal 2
layer. Each square spiral inductor has a 2.5 turn with an inner
side length of 120 m, and a metal line width and space of 15
and 1.5 m, respectively. Two MOSFET switches, which have a
channel length of 0.18 m and channel width of 10 m, are used
for the inductance variable operation. When SW53 and SW31
are in the off state, the inductance is approximately a summation of each inductors inductance, and when those two switches
are in the on state, the inductance is that of one inductor.
The area of a proposed three-stacked inductor
m is decreased 65% compared with that of seven-turn
m with the same inductance.
conventional SLI
For a proposed two-stacked one
m having the
m , the area
same inductance of a five-turn SLI
is decreased 50%.
III. EXPERIMENTAL RESULTS AND DISCUSSION

Manuscript received October 3, 2003; revised November 18, 2003. The review of this letter was arranged by Editor K. De Meyer.
The authors are with the Electronics and Telecommunications Research
Institute (ETRI) Basic Research Laboratory, RF/Analog IC Design Team,
Daejeon 305–350, Korea (e-mail: pjpark@etri.re.kr; cskim@etri.re.kr; mypark@etri.re.kr; sdkim@etri.re.kr; hkyu@etri.re.kr).
Digital Object Identifier 10.1109/LED.2003.822670

Two-port s-parameters of the proposed inductors were measured using an HP8510C network analyzer and de-embedded
to eliminate the pad parasitics. The inductance (L) and quality
factor (Q) are defined as (1) and (2) [3]:

0741-3106/04$20.00 © 2004 IEEE

(1)

2 shows the frequency response of the proposed threestacked inductor with switch control and the response of the same structure inductor without a switch. for the two-stacked inductor case.9 to 3. which is located 2. 1(b) the impedance of the proposed inductor can be expressed as (3). the relatively high impedance inductor path. Fig. To analyze the effects of the parallel-connected MOSFET switches on the proposed inductor. increases. The parasitic capacitance determines characteristics of the inductor including resonance frequency. Among them the intermetal layer capacitance is four times larger than that of the metal to substrate [5]. The resonance frequency of the proposed inductor decreased from 3. When the bias voltages are controlled between the on and off states.: VARIABLE INDUCTANCE MULTILAYER INDUCTOR WITH MOSFET SWITCH CONTROL 145 Fig. 2. the parallel-conon state nected switch provides a short path for the RF signal instead of where. Frequency response of the proposed two-stacked inductor according to switch control voltage and the response of the two-stacked inductor without switch. 3. (2) Fig. Inductance versus MOSFET switch control voltage for the proposed inductor at 2. Therefore. When the switch is in the off state with high impedance. 1(b). . The two-stacked inductor uses metal 6 and metal 3 for the inductor layer and metal 1 for the underpass. 3. However. V is the impedance of the MOSFET switch as a function of control voltage V . the metal to substrate capacitance and the metal to underpass capacitance. the inductance can be changed continuously from 23 to 8 nH at 2. From the Fig.PARK et al. The inductance of the proposed two-stacked inductor changes continuously with the control voltage. the equivalent circuit of the proposed inductor is shown in Fig. while both of them is in the on state. As the MOSFET switch ductance reaches its minimum. 4 shows the frequency response of the proposed two-stacked inductor and the response of the two-stacked inductor without a switch. When the switch is in the V with low impedance. Fig. as a function of control of the MOSFET switch. we compared the proposed inductor with the same geometry inductor but without switches. L is the inductance of each spiral inductor. .23 m below metal 3. compared with the proposed three-stacked inductor. the imaginary part of the into ductor impedance increases approximately from as in (3).6 GHz for the three-stacked inductor and from 6. impedance. The continuous inductance change according to the control voltage of the MOSFET switches is depicted in Fig. the three serially stacked spiral inductors achieve maximum value of inductance.8 to 6. V .4 GHz for the two-stacked inductor. With a impedance . When two switches are in the off state. only the top spiral inductor plays a role of inductor that results in its minimum inductance. the in. voltage. the resonance frequency will further increase due to the decreased intermetal layer capacitance. As a result. Frequency response of the proposed three-stacked inductor according to switch control voltage and the response of the three-stacked inductor without switches. The decreased resonance frequency is due to the increased parasitic capacitance. the main RF signal path is formed through each inductor layer.4 GHz. 4. which results in the maximum inductance (3) Fig. There are three major parasitic capacitances in the multilayer stacked inductor: the intermetal layer capacitance. it is expected that if metal 1 is used as the inductor layer instead of metal 3.4 GHz. the proposed two-stacked inductor shows less variation range of inductance and a higher resonance frequency due to the less inductor layer and the decreased intermetal layer capacitance respectively.

Therefore. 620–628. Yi.146 IEEE ELECTRON DEVICE LETTERS. Zolfaghari. pp. Razavi. vol. Chan. the quality factor was degraded severely due to the on resistance of the switch. “A merged gain-variable RF front-end design for a 2 GHz WCDMA DCR application. The decreased quality factor can be explained by substrate losses in the source/drain to the substrate path. Liu. The switches also affect the quality factor of the inductor. Tang. Because of its stacked structure. Lihui. H. Aug. “Demonstration of a switched resonator concept in a dual-band monolithic CMOS LC-tuned VCO. which is parallel to the inductor layer. vol. Yim and K. 2002. (The single layer inductor uses metal 6 for the inductor layer and metal 5 for the underpass located 1 m below). [4] C. NO. 36. and H.  . IV. 23. [2] S. 2002. Kenneth. Yu. 25. 2002.” IEEE J. vol. wide tuning range VCOs.” IEEE Electron Device Lett. Apr. Apr. Aug. Koh. May 2001.5 GHz compared with that of a conventional single-layer inductor. Solid-State Circuits. Solid-State Circuits. 470–472. Park. 37. CONCLUSION Fig. and less than a 10% decrease of the self resonance frequency due to increased parasitic capacitance. SW31) were in the on state. it shows a quality factor of 30% degradation due to the losses in the switch. Furthermore. 5 also shows that the stacked inductor has a comparable In this letter. and B. 5 shows the quality factor of the proposed three-stacked inductor according to the control voltage and that of the three-stacked inductor without switches. Fig. the proposed variable inductor is a promising key component for electrically controllable multiband RF circuits. Zhen. pp. it takes less than 50% of a chip area compared to the conventional SLI with the same inductance. and for the two-stacked one from 3. “Miniature 3-D inductors in standard CMOS process. O. we proposed a voltage controlled monolithic variable inductor using stacked spiral inductors and MOSFET switches. When switches were in the off state. Quality factor comparison of the proposed inductor.7 to 15 nH by controlling the MOSFET switch voltage.-J. A. the proposed inductor shows a compact size and comparable quality factor at a high frequency.” IEEE J. 471–480. vol. 5..-Y. originated from the MOSFET switches in the proposed inductor. [3] G. the proposed inductor achieved its maximum inductance. [5] A. if more metal layers are used. C. and the quality factor decreased about 30% compared with that of the three-stacked inductor without switches. and Z. However. which was serially connected to the inductor layer.-I. The inductance of the three-stacked proposed inductor can be changed from 8 to 23 nH at 2. Wu. C. the quality factor of proposed inductor will be much improved. 2001. and S. “Stacked inductors and transformers in CMOS technology. 3. Fig.-H.” in Proc.-M. When the two switches (SW53. REFERENCES [1] K. and matching circuits. “High Q multilayer spiral inductor on silicon chip for 5 6 GHz. pp.” Circuits Syst. Han.-K. MARCH 2004 quality factor at a frequency above 1. VOL. 4–7. The inductance of the proposed one was 1–nH high because of the additional metal line used for the switch connection.-C.4 GHz. 205–208. CICC. Mingbin. Because of the switches in the proposed inductor.. Y. 2. M. pp.