Walchand College of Engineering, Sangli

(An Autonomous Institute)
Second Year B.Tech. Program
In
Electronics Engineering
S.Y.B.Tech Curriculum Electronics 2013-14 Page 1
Second Year .!. Program in Electronics Engineering Semester"I
Su#$ect
Code
Su#$ect
E%aluation Scheme
& T P Credits Scheme
Theor' (ar)s Practical (ar)s
(a* (in for (a* (in for
1MA 203 Applied
Mathematics III
3 1 - 4 ISE 10
40
-- --
SE-I 20
SE-II 20
ESE 50
1EN 201 Circuits Theory
3 1 - 4
ISE 10
40
-- --
SE- I 20
SE-II 20
ESE 50
1EN 202 ata Structures
a!d Al"orithms
3 - - 3
ISE 10
40
-- --
SE- I 20
SE-II 20
ESE 50
1EN 203 i"ital System
a!d
Microco!troller
4 - - 4
ISE 10
40
-- --
SE- I 20
SE-II 20
ESE 50
1EN 204 Electro!ic Circuit
A!alysis a!d
esi"! I
3 - - 3
ISE 10
40
-- --
SE- I 20
SE-II 20
ESE 50
1EN 252 ata Structure
a!d Al"orithm
#a$
- - 2 1
ISE
%&E
50 20
ESE 50 20
1EN 253 i"ital System
a!d
Microco!troller
- - 4 2 ISE
%&E
50 20
ESE 50 20
1EN 254 ECA I #a$ - - 2 1 ISE
%&E
50 20
ESE 50 20
Total 1' 2 ( 22 - - - - -
Total Credits) 22
Total Co!tact *ours+,ee-) 2' *rs
S.Y.B.Tech Curriculum Electronics 2013-14 Page 2
+ote,
. Tutorials a!d practical shall $e co!ducted i! $atches /ith $atch stre!"th !ot e0ceedi!" 1(
stude!ts1
. ESE) E!d Semester E0am2 SEI-II) Semester E3aluatio! 1 a!d 22 ISE) I! Semester E3aluatio!1
S.Y.B.Tech Curriculum Electronics 2013-14 Page 3
Second Year .!. Program in Electronics Engineering
Semester II
Su$4ect
Code
Su$4ect
Teachi!" Scheme E3aluatio! Scheme
# T % Credits Scheme
Theory Mar-s %ractical Mar-s
Ma0 Mi! 5or Ma0 Mi!
1EN
211
Microco!troller
I!ter5aci!" a!d
%eripherals
3 - - 3
ISE 10
40
- -
SE-I 20 - -
SE-II 20
ESE 50 - -
1EN
212
A!alo"
Commu!icatio!
E!""1
3 - - 3
ISE 10
40
- -
SE-I 20 - -
SE-II 20
ESE 50 - -
1EN
213
Si"!als a!d
Systems
3 1 - 4
ISE 10
40
- -
SE-I 20 - -
SE-II 20
ESE 50 - -
1EN
214
Co!trol Systems
3 1 - 4
ISE 10
40
- -
SE-I 20 - -
SE-II 20
ESE 50 - -
1EN
215
Electro!ics
Circuit a!alysis
a!d esi"! II
3 - - 3
ISE 10
40
- -
SE-I 20 - -
SE-II 20
ESE 50 - -
1EN
261
Microco!trollers
a!d %eripherals
#a$
- - 4 2
ISE %&E 50 20
ESE 50
20
1EN
262
A!alo"
Commu!icatio!
#a$
- - 2 1
ISE %&E 50 20
ESE 50 20
1EN
265
Electro!ics
Circuit a!alysis
a!d esi"! II
#a$
- - 2 1
ISE %&E 50 20
ESE 50
20
1EN
266
7*# #a$
1 - 2 2
ISE %&E 50 20
ESE 50 20
Total 16 2 10 23 - - - - -
Total Credits) 23
Total Co!tact *ours+,ee-) 2( *rs1
+ote,
. Tutorials a!d practical shall $e co!ducted i! $atches /ith $atch stre!"th !ot e0ceedi!" 1(
stude!ts1
. ESE) E!d Semester E0am2 SEI-II) Semester E3aluatio! 1 a!d 22 ISE) I! Semester E3aluatio!1
S.Y.B.Tech Curriculum Electronics 2013-14 Page 4
Title of the Course,A--lied (athematics III .(A /01 &"1 T". P" Cr"2
Scheme of E%aluation ISE SE"I SE"II ESE (inimum for Passing
.0 /0 /0 30 20
Pre"4e5uisite Courses, Basic 6no7ledge of Integral and 8ifferential Calculas
Te*t#oo),
11 A text book of Applied Mathematics”2 %1N1 a!d 81N1 ,arti-ar2 7idyarthi 9riha %ra-asha!1
21 “Higher Engineering Mathematics”, :1S 19re/al2 ;ha!!a %u$1
31 “Fundamentals of Mathematical Statistics”, 9upta a!d ;apur2 ;ha!!a %u$
41 “Advanced Engineering Mathematics”, ;rey<i!"2 ,iley I!t1
4eferences,
E!"i!eeri!" Mathematics $y S1 S1 Shastri
Course 9#$ecti%es ,
To promote stude!ts to $e 5amiliar /ith rece!t tre!ds i! Applied mathematics throu"h -!o/led"e o5
i!te"ral tra!s5orms2 statistical tech!i=ues a!d $uild more i!di3idual thi!-i!" capacity1
Course &earning 9utcomes,
To practice ho/ to sol3e di55icult pro$lems o5 i!te"ral tra!s5orm $y ma-i!" small "rips o5 stude!ts a!d
"et practice o5 5ast computatio! /or- o5 sol3i!" pro$lems o5 statistics
Assessments,
Teacher>s Assessme!t $ased o! - ?ui<+*ome assi"!me!ts+Mi!i %ro4ects+a!y other @10AB
T/o Semester e0ami!atio!s SE I C SE II @20A eachB1 Each e0ami!atio! is o5 o!e hour duratio! a!d /ill $e
assessed 5or 20 Mar-s o! 33A o5 the sylla$us co3ered @$et/ee! start o5 the term a!d Dirst Sem E0am i1e1
9e!erally Module 1 a!d 2 5or SE I a!d $et/ee! SE I C SE II i1e1 9e!erally Module 3 a!d 4 5or SE IIB1 ESE @50AB
E T/o hours duratio! a!d /ill $e assessed 5or 50 Mar-s a!d /ould $e o! e!tire sylla$us /ith /ei"hta"e 20A each
5or the sylla$us o5 SE I "e!erally @module 1 a!d 2Ba!d SE II "e!erally @Module 3 a!d 4B a!d 60A o! the sylla$us
co3ered a5ter SE II "e!erally @Module 5 a!d 6B1
Course Contents,
. &a-lace Transform
e5i!itio!2 tra!s5orm o5 sta!dard 5u!ctio!s2 properties2 Tra!s5orm o5 deri3ati3e a!d i!te"ral2
i!3erse laplace tra!s5orm2 co!3olutio! theorem2 applicatio!s to sol3e li!ear di55ere!tial
e=uatio!s2 F!it step 5u!ctio!s2 #aplace tra!s5orm o5 periodic 5u!ctio!s
/ :ourier Series and :ourier Transform
e5i!itio!2 Eulers 5ormulae2 e0pa!sio! o5 5u!ctio!s2 cha!"e o5 i!ter3al2 e3e! a!d odd 5u!ctio!s2
hal5 ra!"e 5ourier series1
:ourier Transform, e5i!itio!2 Dourier si!e a!d cosi!e i!te"ral2 Dourier si!e a!d cosi!e
tra!s5orm2 properties2 co!3olutio! theorem2 parsa3al ide!tity2 relatio! $et/ee! 5ourier a!d
#aplace tra!s5orm1
1 Partial 8ifferential E5uations
%artial di55ere!tial e=uatio!s2 5our sta!dard 5orms2 a!d applicatio!s to e!"i!eeri!" pro$lems1
2 Eigen ;alues and Eigen ;ectors
Ei"e! 3alues a!d ei"e! 3ectors2 characteristic e=uatio!s2 li!ear tra!s5ormatio!s2 di"o!il<atio!s2
S.Y.B.Tech Curriculum Electronics 2013-14 Page 5
comple0 ei"e! 3alues2 orth"o!ality2 least s=uare pro$lems1
3 Com-le* anal'sis
Comple0 i!te"ratio!2 i!te"ral theorem a!d 5ormula2 Cauchy Gesidue theorem2 Co!tour
i!te"ratio!2 co!5ormal mappi!"s2 $ili!ear tra!s5ormatio!1
< Pro#a#ilit' and Statistics
Ga!dom 3aria$le2 de!sity a!d distri$utio! o5 5u!ctio! o5 si!"le 3aria$le2 :i!omial2 %oisso! a!d
!ormal distri$utio!1
Coe55icie!t o5 correlatio!2 li!es o5 re"ressio!2 re"ressio! o5 3icariate data2 5itti!" o5 cur3es2 least
s=uare pri!ciple1
(odule 7ise (easura#le Students &earning 9utcomes
I! all Modules a! &3er3ie/ o5 I!te"ral a!d i55ere!tial Calculas alo!"/ith Statistics is ta-e! he!ce $y
lear!i!" all modules the stude!t /e a$le to sol3e di55ere!t mathematical pro$lems
9utcomes as regards to im-ro%ement in Communication S)ills, NA
Com-uter sage = &a# Tool,
&a#orator' E*-eriences, Tutorials as per the :atch
Inde-endent &earning E*-eriences,
S.Y.B.Tech Curriculum Electronics 2013-14 Page 6
Title of the Course, Circuits Theor' .E+ /0. &"1 T". P"0 Cr"2
Scheme of E%aluation ISE SE"I SE"II ESE (inimum for Passing
.0 /0 /0 30 20
Pre"4e5uisite Courses,
Te*t#oo),
117a! 7al-e!$ur"2 Het!ork Anal"sisI2 %*I pu$licatio!2 3rd Editio!2 1J(31
4eferences,
11 #1%1 *uelsma!2 “#asic $ircuit %heor"”2 %*I %u$licatio!2 3rd Editio!2 200J1
21 7a! 7al-e!$ur"2 Hli!ear circuitsI2 %*I pu$licatio!2 3rd Editio!2 1J((1
31 C1 ;1 Ale0a!der2 M1 N1 &1 Sadi-u2 HElectrical $ircuitsI2 Tata Mc9ra/-*ill2 200(1
41 Mittal 91;12 “et!ork Anal"sis”, ;ha!!a %u$licatio!s2 4th Editio!2 1J('1
51 So!i2 9upta2I Electrical $ircuit Anal"sisI2 1Gai %u$12 1J(41
Course 9#$ecti%es ,
11 To study $asic 5u!dame!tals2 theorems used i! circuits a!alysis1
21 To study steady state a!alysis o5 di55ere!t AC circuits2 atte!uators2 5ilters a!d coupled circuits
31 To study %S%ICE+ MAT#A: to sol3e pro$lems i! Electric circuit a!alysis1
Course &earning 9utcomes,
11 Stude!t /ill a$le to /or- /ith $asic 5u!dame!tals2 theorems used i! circuits a!alysis1
21 Stude!t /ill a$le to /or- /ith steady state a!alysis o5 di55ere!t AC circuits2 atte!uators2 5ilters a!d
coupled circuits
31 Stude!t /ill a$le to /or- /ith %S%ICE+ MAT#A: to sol3e pro$lems i! Electric circuit a!alysis1
Assessments,
Teacher>s Assessme!t $ased o! - ?ui<+*ome assi"!me!ts+Mi!i %ro4ects+a!y other @10AB
T/o Semester e0ami!atio!s SE I C SE II @20A eachB1 Each e0ami!atio! is o5 o!e hour duratio! a!d /ill $e
assessed 5or 20 Mar-s o! 33A o5 the sylla$us co3ered @$et/ee! start o5 the term a!d Dirst Sem E0am i1e1
9e!erally Module 1 a!d 2 5or SE I a!d $et/ee! SE I C SE II i1e1 9e!erally Module 3 a!d 4 5or SE IIB1 ESE @50AB
E T/o hours duratio! a!d /ill $e assessed 5or 50 Mar-s a!d /ould $e o! e!tire sylla$us /ith /ei"hta"e 20A each
5or the sylla$us o5 SE I "e!erally @module 1 a!d 2Ba!d SE II "e!erally @Module 3 a!d 4B a!d 60A o! the sylla$us
co3ered a5ter SE II "e!erally @Module 5 a!d 6B1
Course Contents,
.. +et7or) Anal'sis"
Ge3ie/ o5 5u!dame!tals o5 circuit compo!e!ts 2comple0 !um$ers a!d phasors i! circuits2
applicatio!s to !et/or-s2 "raphs a!d trees2 !ode a!d mesh a!alysis2 matri0 represe!tatio!s dual
a!d i!3erse !et/or-s2 admitta!ce a!d impeda!ce2 state 3aria$le a!alysis2 T-II tra!s5ormatio!s2
$rid"ed-T a!d lattice !et/or-s 2Net/or- Theorems) Superpositio! 2Mailma!2 Norto!2
The3e!i!2 Ma0imum po/er tra!s5er 2AC a!d C a!alysis2 Fse o5 %S%ICE+ MAT#A: 5or
a!alysis1
>
/. Transient 4es-onse of Circuits"
G# a!d GC circuits2 s/itchi!" co!ditio!s2 G#C circuits2 Ge3ie/ o5 #aplace tra!s5orm
.
S.Y.B.Tech Curriculum Electronics 2013-14 Page
importa!t theorems a!d properties2 applicatio! a!alysis o5 circuits i! time domai!2 tra!s5er
5u!ctio!2 I!itial Co!ditio!s a!d Solutio!s to !et/or-s1
0
1. T7o Port +et7or)s"
&pe! a!d short circuit parameters2 tra!smissio! parameters2 hy$rid parameters2 matri0 5orm o5
i!put output relatio!s2 i!teractio! o5 t/o 5our termi!al !et/or-s2 u!symmetrical !et/or-s2
propa"atio! 5u!ctio!s2 lattice !et/or-s2 $ala!ced a!d u!$ala!ced !et/or-s2 $isectio! theorem2
<
2. 4esonance and Inducti%el' tuned circuits"
Series reso!a!ce2 impeda!ce a!d phase a!"le o5 series reso!a!t circuit2 3olta"e a!d curre!t i!
series reso!a!t circuit2 e55ect o5 resista!ce o! 5re=ue!cy respo!se cur3e2 $a!d/idth2 selecti3ity
a!d =uality 5actor1 %arallel reso!a!ce2 reso!a!t 5re=ue!cy 5or ta!- circuit2 a!d 3ariatio! o5
impeda!ce /ith 5re=ue!cy 5actor o5 parallel reso!a!t circuit2 reacta!ce cur3es1
Ma"!etic coupled circuits)
Mutual i!ducta!ce2 coe55icie!t o5 coupli!"2 si!"le tu!ed
a!d dou$le tu!ed circuits
?
3. +et7or) :unctions
Co!cept o5 comple0 5re=ue!cy !et/or- 5u!ctio!s 5or o!e port a!d t/o port !et/or-2 poles a!d
<eros o5 !et/or- 5u!ctio!s2 restrictio!s o! poles a!d <eros locatio! 5or dri3i!" poi!t 5u!ctio!
a!d tra!s5er 5u!ctio!1 Time domai! $eha3ior 5rom poles a!d <ero plot2 sta$ility o5 acti3e
!et/or-
<
<. :ilters and Attenuators
Characteristics o5 hi"h pass2 lo/ pass2 $a!d pass a!d $a!d stop 5ilter1 Co!sta!t ; type 5ilters2
m-deri3ed 5ilters2 sectio! m deri3ed #%D2 *%D2 :%D C :SD
Attenuators, # type2 T type2 K type2 #attice atte!uators
<
(odule 7ise (easura#le Students &earning 9utcomes @@@@@
9utcomes as regards to im-ro%ement in Communication S)ills
Com-uter sage = &a# Tool
&a#orator' E*-eriences,
Inde-endent &earning E*-eriences,
Title of the Course, 8ata Structures and Algorithms &" 1 T" " P" " Cr" 1
S.Y.B.Tech Curriculum Electronics 2013-14 Page !
.E+ /0/
Scheme of E%aluation ISE SE"I SE"II ESE (inimum for Passing
.0 /0 /0 30 20
Pre"4e5uisite Courses,
Te*t#oo),
11 “&b'ect( &riented )rogramming !ith $**”, E1 :al"urusamy2 Tata Mc9ra/-*ill
21 “$ %he )rogramming language”, ;er!i"ham C Gitchie
31 “&b'ect &riented )rogramming”, #a5ore2 Tata Mc9ra/-*ill
41 “Fundamentals of +ata structures in $**”, S1Sah!i a!d 1Mehta2 9al"otia :oo- Source
4eferences,
11 “+ata structures via $**”2 A1 Michael :erma!2 &05ord F!i3ersity %ress2 2002
21 “+ata Structures and Algorithm Anal"sis in $**” M1,eiss2 %earso! Educatio!2 20021
Course 9#$ecti%es ,
• A! a$ility to apply -!o/led"e o5 e!"i!eeri!"2 i!5ormatio! tech!olo"y2 mathematics2 a!d scie!ce
• A! a$ility to desi"! a system or compo!e!t2 or process to meet stated speci5icatio!s
• A! a$ility to ide!ti5y2 5ormulate a!d sol3e e!"i!eeri!" pro$lems
Course &earning 9utcomes,
• To u!dersta!d the $asic co!cept o5 data structure
• To de3elop pro"rammi!" s-ills
• To apply the -!o/led"e i! applicatio!s li-e G:MS2 Net/or- data models2 *ierarchical data
model
Assessments,
Teacher>s Assessme!t $ased o! - ?ui<+*ome assi"!me!ts+Mi!i %ro4ects+a!y other @10AB
T/o Semester e0ami!atio!s SE I C SE II @20A eachB1 Each e0ami!atio! is o5 o!e hour duratio! a!d /ill $e
assessed 5or 20 Mar-s o! 33A o5 the sylla$us co3ered @$et/ee! start o5 the term a!d Dirst Sem E0am i1e1
9e!erally Module 1 a!d 2 5or SE I a!d $et/ee! SE I C SE II i1e1 9e!erally Module 3 a!d 4 5or SE IIB1 ESE @50AB
E T/o hours duratio! a!d /ill $e assessed 5or 50 Mar-s a!d /ould $e o! e!tire sylla$us /ith /ei"hta"e 20A each
5or the sylla$us o5 SE I "e!erally @module 1 a!d 2Ba!d SE II "e!erally @Module 3 a!d 4B a!d 60A o! the sylla$us
co3ered a5ter SE II "e!erally @Module 5 a!d 6B1
Course Contents,
(odule ., &in)ed &ists,
Co!cept o5 li!-ed or"a!i<atio!2 Si!"ly #i!- list2 ou$ly #i!-ed list a!d circular #i!-ed list1
Geprese!tatio!2 Tra3ersi!"2 Searchi!"2 Memory Allocatio!2 I!sertio! eletio! operatio!s
(odule /, Stac)s and Aueues,
Stac- a!d =ueue Du!dame!tals Geprese!tatio! a!d Impleme!tatio! usi!" se=ue!tial a!d li!-ed
or"a!i<atio!
Aueue, Simple =ueue2 Circular =ueue2 %riority =ueue2 ou$le e!ded =ueue
(odule 1,
S.Y.B.Tech Curriculum Electronics 2013-14 Page "
a) Tree, :asic termi!olo"y2 $i!ary trees a!d its represe!tatio!2 $i!ary tree tra3ersals
#) !ra-h, :asic termi!olo"y2 multi "raphs a!d /ei"hted "raphs
(odule 2, Searching and Sorting Algorithms,
Searching, Importa!ce o5 searchi!"2 search al"orithms2
Sorting, ?uic- sort2 Mer"e sort2 *eap sort2 Multi-/ay sorti!"1
Bashing, *ashi!" 5u!ctio!s
(odule 3, Introduction to 99P CCC ,
Structure o5 CLL2 Source 5ile creatio!2 Compili!" a!d li!-i!"2 ata types2 &perators2 co!trol structure2
5u!ctio!s2 Classes a!d &$4ects2 Co!structors2 estructors
(odule <, CCC 7ith Inheritance and Pol'mor-hism,
Du!ctio! o3erloadi!"2 &perator o3erloadi!"2 I!herita!ce2 7irtual Du!ctio!s2 %olymorphism2
I!troductio! to 9raphics 5u!ctio!s
(odule 7ise (easura#le Students &earning 9utcomes
• ,hat is data structureM
• #ist out the areas i! /hich data structures are applied e0te!si3ely
• ,hat are the ma4or data structures used i! the 5ollo/i!" areas) G:MS2 Net/or- data model
a!d *ierarchical data model
• ,hat are the !otatio!s used i! E3aluatio! o5 Arithmetic E0pressio!s usi!" pre5i0 a!d post5i0
5orms
• #ist out 5e/ o5 the applicatio!s that ma-e use o5 Multili!-ed Structures
9utcomes as regards to im-ro%ement in Communication S)ills
Tech!ical paper /riti!" %rese!tatio!2 semi!ar
Com-uter sage = &a# Tool
&a#orator' E*-eriences,
Inde-endent &earning E*-eriences,
Title of the Course, 8igital S'stem D (icrocontroller (8S()
.E+ /01
&"2 T" P" Cr"2
S.Y.B.Tech Curriculum Electronics 2013-14 Page 10
Scheme of E%aluation ISE SE"I SE"II ESE (inimum for Passing
.0 /0 /0 30 20
Pre"4e5uisite Courses, Basic Electronics
Te*t#oo),
11 “+igital +esign”, 8oh! D1 ,a-erly2 %earso! Educatio! %u$licatio!2 Morris Ma!!o2 “+igital ,ogic
and $omputer +esign”, %re!tice-*all I!dia
21 H%he -./0 MicrocontrollerI2 ;e!!eth Ayala2Thomso!2 3rd Editio!2 2004
4eferences,
11 HModern +igital +esign”, G11%18ai!2 Tata Mc-9ra/-*ill
21 H-./0 Microcontroller and Embedded S"stemsI2 Muhammad Ali Ma<idi2 2!d Editio!2 2005
Course 9#$ecti%es ,
11 To de3elop the 5u!dame!tal co!cepts i! di"ital desi"!
21 To ma-e stude!ts u!dersta!d the 5u!dame!tals o5 microco!troller1
31 To ma-e stude!ts u!dersta!d the assem$ly la!"ua"e %ro"rammi!" 5or (051 microco!troller
Course &earning 9utcomes,
11 The stude!ts /ill $e a$le to desi"! the $asic di"ital circuits a!d test them1
21 They /ill ha3e u!derstood the co!cepts o5 microco!troller
31 A$le to /rite a!d de$u" the assem$ly pro"ram 5or (051
Assessments,
Teacher>s Assessme!t $ased o! - ?ui<+*ome assi"!me!ts+Mi!i %ro4ects+a!y other @10AB
T/o Semester e0ami!atio!s SE I C SE II @20A eachB1 Each e0ami!atio! is o5 o!e hour duratio! a!d /ill $e
assessed 5or 20 Mar-s o! 33A o5 the sylla$us co3ered @$et/ee! start o5 the term a!d Dirst Sem E0am i1e1
9e!erally Module 1 a!d 2 5or SE I a!d $et/ee! SE I C SE II i1e1 9e!erally Module 3 a!d 4 5or SE IIB1 ESE @50AB
E T/o hours duratio! a!d /ill $e assessed 5or 50 Mar-s a!d /ould $e o! e!tire sylla$us /ith /ei"hta"e 20A each
5or the sylla$us o5 SE I "e!erally @module 1 a!d 2Ba!d SE II "e!erally @Module 3 a!d 4B a!d 60A o! the sylla$us
co3ered a5ter SE II "e!erally @Module 5 a!d 6B1
Course Contents,
(odule ., Com#inational &ogic esi"! Ge3ie/ o5 ;-map mi!imi<atio! tech!i=ue 5or multiple
outputs2 %rime Implica!t ta$les 5or mi!imi<atio!2 ?ui!e) Mc-clus-ey method2 esi"! usi!" MFN a!d
emu02 %riority E!coder2 %riority e!coder2 A#F2 Carry loo- ahead adder2 tristate $u55ers2 :arrel Shi5ter2
static a!d dy!amic timi!" *a<ards21 *a<ard remo3al2 %ro"ramma$le #o"ic e3ices2 esi"! Fsi!" %#A
C %A#1
(odule /, Se5uential &ogic 8esign
aB #atches C Dlip Dlop @ S-G #atch2 #atch2 DD2 8-; DD2 T DD2 Master Sla3e 8-; DD2 Co!3ersio! o5
a!y DD to a!y other DD2 setup time2 hold time2 timi!" parameters o5 5lip 5lop2 Cloc-ed Sy!chro!ous State
Machi!es A!alysis2 a!d esi"! usi!" 8-;2 2 T DD2 2 S/itch e$ou!ci!"2 Gipple cou!ters2 dra/$ac-s
/ith ripple cou!ters Sy!chro!ous Cou!ters2t/isted ri!" cou!ters2 8oh!so! cou!ter2Mod-N Cou!ter2
$B Shi5t re"ister2 SIS&2 SI%&2 %IS&2 %I%&2 :idirectio!al shi5t resistor2 u!i3ersal shi5t resistor2 Gi!"
Cou!ter1 Cloc- S-e/2 Cloc- 4itter2 Meta sta$ility 2 Se=ue!ce etector
(odule 1,
a):inite state machines, Mealy a!d Moore machi!es2 State dia"ram2 State assi"!me!t a!d reductio!2
state machi!e sy!thesis usi!" tra!sitio! #ist2 ecompositio! o5 state machi!es2 5eed$ac- se=ue!tial
S.Y.B.Tech Curriculum Electronics 2013-14 Page 11
circuit desi"!s
$B &ogic :amilies TT#2CM&S2 a!d their characteristics2 CM&S Impleme!tatio! o5 lo"ic "ates a!d lo"ic
circuits1
(odule 2, Introduction to (icro-rocessor and (icrocontroller. %rocessor 5u!dame!tals a!d
operatio!2 i!structio! cycle2 timi!" dia"rams2 memory2 re"isters2 i!structio! 5ormats2 stac- a!d
su$routi!es
(odule 3, Architecture of the (icrocontroller, Memory architecture2 addressi!" modes2 I!structio!
set2
(odule <, Assem#l' &anguage Programming, I!terrupt structure Fsi!" i!structio!s 5or /riti!"
simple assem$ly pro"rams
(odule 7ise (easura#le Students &earning 9utcomes
11 To u!dersta!d the i"ital esi"! Tech!i=ues 5or com$i!atio!al circuits
21 To u!dersta!d the i"ital esi"! Tech!i=ues 5or se=ue!tial circuits
31 To u!dersta!d the State dia"ram a!d lo"ic 5amily
41 To u!dersta!d the %rocessor 5u!dame!tals
51 To u!dersta!d the Microco!troller architecture
61 To /rite a!d de$u" the assem$ly la!"ua"e pro"ram
9utcomes as regards to im-ro%ement in Communication S)ills
Com-uter sage = &a# Tool
%erso!al Computer /ith %roteous2 ;eil so5t/are a!d *ard/are chassis+setups
&a#orator' E*-eriences,
E0perime!t $ased o! module 12226 a!d Assi"!me!ts+Tutorials $ased o! module 3242a!d 5
Inde-endent &earning E*-eriences,
S.Y.B.Tech Curriculum Electronics 2013-14 Page 12
Title of the Course, Electronics Circuit Anal'sis and 8esign" I
.E+ /02
&" 1 T" P" Cr" 1
Scheme of E%aluation ISE SE"I SE"II ESE (inimum for Passing
.0 /0 /0 30 20
Pre"4e5uisite Courses, Basic Electronics Engineering
Te*t#oo),
11 “Electronic $ircuit +esign and Anal"sis”, 1 A1 Neama!2 Tata Mc9ra/ *ill2 Ne/ elhi2 2
!d
Editio!2 20021
21 “Microelectronic $ircuits”, A1 S1 Sedra a!d ;1 C1 Smith2 &05ord F!i3ersity %ress2 5
th
Editio!2
20041
31 “Electronic +evices and $ircuits”, Alle! Mottershed 2 %*I
4eferences,
11 “Electronic +evices and $ircuits”, G1 :oylestad C #1 Nashels-y2 %*I1
21 “Electronic devices and $ircuits”, Millma! a!d *al-ias2 Tata Mc9ra/ *ill1
31 “)ractical %ransistor $ircuit +esign and Anal"sis”, 9erald E1 ,illiams2 Tata Mc9ra/ *ill2 Ne/
elhi1
Course 9#$ecti%es ,
11 To u!dersta!d the electro!ic circuits li-e ampli5iers2 po/er ampli5iers usi!" :8T a!d M&SDETs1
21 A!aly<e the per5orma!ce o5 electro!ic circuits /ith re5ere!ce to lo/ a!d hi"h 5re=ue!cy
respo!se1
31 esi"! o5 discrete electro!ic circuits 5or "i3e! speci5icatio!s1
Course &earning 9utcomes,
11 A$le to a!aly<e the electro!ic circuits usi!" hy$rid model2 Ore1 model2 π - model a!d e=ui3ale!t
circuits1
21 A$le to simulate the desi"!ed electro!ic circuits a!d study their per5orma!ce1
31 :read-$oard testi!" o5 the desi"!ed Electro!ic circuits1
Assessments,
Teacher>s Assessme!t $ased o! - ?ui<+*ome assi"!me!ts+Mi!i %ro4ects+a!y other @10AB
T/o Semester e0ami!atio!s SE I C SE II @20A eachB1 Each e0ami!atio! is o5 o!e hour duratio! a!d /ill $e
assessed 5or 20 Mar-s o! 33A o5 the sylla$us co3ered @$et/ee! start o5 the term a!d Dirst Sem E0am i1e1
9e!erally Module 1 a!d 2 5or SE I a!d $et/ee! SE I C SE II i1e1 9e!erally Module 3 a!d 4 5or SE IIB1 ESE @50AB
E T/o hours duratio! a!d /ill $e assessed 5or 50 Mar-s a!d /ould $e o! e!tire sylla$us /ith /ei"hta"e 20A each
5or the sylla$us o5 SE I "e!erally @module 1 a!d 2Ba!d SE II "e!erally @Module 3 a!d 4B a!d 60A o! the sylla$us
co3ered a5ter SE II "e!erally @Module 5 a!d 6B1
Course Contents,
.. BET Am-lifiers,
Ge3ie/ o5 :8Ts a!d its $iasi!" methods co!sideri!" sta$ility 5actorP :asic :8T ampli5ier) C a!d
AC load li!e a!alysis2 Small si"!al hy$rid- QQmodel2 h-parameter model) a!alysis o5 CE2 CC @emitter 
5ollo/erB ampli5ier1
S.Y.B.Tech Curriculum Electronics 2013-14 Page 13
/. :ield Effect Transistor,
8DET) operatio!2 characteristics2 C a!alysis2 DET ampli5ierP M&SDET) C circuit a!alysis2
M&SDET as a s/itch a!d ampli5ier2 co!sta!t curre!t source $iasi!"1
1. (9S:ET Am-lifiers,
:iasi!" i! M&SDET ampli5iers2 small-si"!al e=ui3ale!t model2 commo! source @CSB ampli5ier2
Commo! rai! @source 5ollo/erB ampli5ier1
2. :re5uenc' 4es-onse of Am-lifiers,
#o/ 5re=ue!cy a!d hi"h 5re=ue!cy respo!se o5 commo! emitter @CEB a!d commo! source @CSB
ampli5iers1

3. :eed#ac) Am-lifiers,
Multista"e ampli5iers2 arli!"to! pair2 "e!eral 5eed$ac- structure2 properties o5 !e"ati3e 5eed$ac-2
5our $asic 5eed$ac- topolo"ies1
<. Po7er Am-lifiers,
Classes o5 po/er ampli5iers2 class-A2 class-A: a!d class-A: push-pull po/er ampli5iers1
(odule 7ise (easura#le Students &earning 9utcomes
11 Com-rehend the pri!ciples $ehi!d a!alysis o5 discrete electro!ic circuits1 @#1B
21 A--l' the tools to anal'Fe the electro!ic circuits $uilt usi!" semico!ductor de3ices1 @#1 a!d #3B
31 Com-are and contrast the circuits impleme!ted usi!" $ipolar 4u!ctio! tech!olo"y a!d
M&SDET tech!olo"y1 @#4B
41 8esign the circuits usi!" discrete semico!ductor de3ices1 @#12 #3 a!d #6B
51 Test, de#ug and e%aluate the per5orma!ce o5 ampli5ier circuits usi!" :8T a!d M&SDETs1 @#12
#4 a!d #5B
61 Wor) in team a!d de3elop the ha!ds o! s-ills 5or $uildi!" the simple electro!ic circuits1
9utcomes as regards to im-ro%ement in Communication S)ills
A$le to e0plai! the /or-i!" o5 electro!ic circuits1
Com-uter sage = &a# Tool, A practice o5 simulati!" the desi"!s 5or i!-depth study o5 theoretical
aspects usi!" simulatio! so5t/are li-e %G&TEFS1
&a#orator' E*-eriences, Testi!" a!d per5orma!ce a!alysis o5 desi"!ed electro!ic circuits1
Inde-endent &earning E*-eriences, A$le to select a! electro!ic circuit 5or a particular applicatio!1
S.Y.B.Tech Curriculum Electronics 2013-14 Page 14
Title of the Course, 8ata Structure and Algorithm &a# .E+ /3/ &" T" P" / Cr" .
Scheme of E%aluation
ISE ESE (inimum for Passing
30 30 /0 (ISE) C /0 (ESE)
Pre"4e5uisite Courses, Programming #asics, C -rogramming,
Te*t#oo),
11 “&b'ect( &riented )rogramming !ith $**”, E1 :al"urusamy2 Tata Mc9ra/-*ill
21 “$ %he )rogramming language”, ;er!i"ham C Gitchie
31 “&b'ect &riented )rogramming”, #a5ore2 Tata Mc9ra/-*ill
41 “Fundamentals of +ata structures in $**”, S1Sah!i a!d 1Mehta2 9al"otia :oo- Source
4eferences,
11 “+ata structures via $**”2 A1 Michael :erma!2 &05ord F!i3ersity %ress2 2002
21 “+ata Structures and Algorithm Anal"sis in $**” M1,eiss2 %earso! Educatio!2 20021
Course 9#$ecti%es ,
• A! a$ility to apply -!o/led"e o5 e!"i!eeri!"2 i!5ormatio! tech!olo"y2 mathematics2 a!d scie!ce
• A! a$ility to desi"! a system or compo!e!t2 or process to meet stated speci5icatio!s
• A! a$ility to ide!ti5y2 5ormulate a!d sol3e e!"i!eeri!" pro$lems
Course &earning 9utcomes,
• To u!dersta!d the $asic co!cept o5 data structure
• To de3elop pro"rammi!" s-ills
• To apply the -!o/led"e i! applicatio!s li-e G:MS2 Net/or- data models2 *ierarchical data
model
Assessments
Course Contents,
Mi!imum 12 e0perime!ts $ased o! sylla$us
• C %ro"rammi!" o! Dile2 Structure2 array
• Impleme!tatio! o5 #i!- list
• Impleme!tatio! o5 Stac-
• Impleme!tatio! o5 ?ueue
• Applicatio!s Tree2 9raph
• Al"orithms
• Searchi!"1 Sorti!" /ith comple0ity measure
• Simple &&% pro"rams 5or co!cept u!dersta!di!"
• %roperties o5 &&%
(odule 7ise (easura#le Students &earning 9utcomes
• ,hat is data structureM
• #ist out the areas i! /hich data structures are applied e0te!si3ely
• ,hat are the ma4or data structures used i! the 5ollo/i!" areas) G:MS2 Net/or- data model a!d
*ierarchical data model
• ,hat are the !otatio!s used i! E3aluatio! o5 Arithmetic E0pressio!s usi!" pre5i0 a!d post5i0 5orms
• #ist out 5e/ o5 the applicatio!s that ma-e use o5 Multili!-ed Structures
S.Y.B.Tech Curriculum Electronics 2013-14 Page 15
9utcomes as regards to im-ro%ement in Communication S)ills
Com-uter sage = &a# Tool
&a#orator' E*-eriences,
%ro"rammi!" s-ills a!d data structure co!cepts a!d impleme!tatio! a!d applicatio!s1 :asics o5 &&%
simple pro"rams properties o5 &&%1
Inde-endent &earning E*-eriences,
Tutorials $ased o! stac-2 =ueue2 li!--list2 tree2 "raph a!d al"orithms a!d its comple0ity
S.Y.B.Tech Curriculum Electronics 2013-14 Page 16
Title of the Course, 8igital S'stem and (icrocontroller &a# .E+ /31 &" T" P"2 Cr" /
Scheme of E%aluation
ISE ESE (inimum for Passing
30 30 /0 (ISE) C /0 (ESE)
Pre"4e5uisite Courses, :asic Electro!ics
Te*t#oo),
Authors2 %itle of the book in italics, %u$lisher2 Editio!2 Rear o5 pu$licatio!
8oh! D1 ,a-erly2 “+igital +esign”, %earso! Educatio! %u$licatio!2 3rd Editio!
Morris Ma!!o2 “+igital ,ogic and $omputer +esign”, %re!tice-*all I!dia
;e!!eth Ayala2 H%he -./0 MicrocontrollerI2 Thomso!2 3rd Editio!2 2004
4eferences,
G11%18ai! HModern +igital +esign”, Tata Mc-9ra/-*ill 3
rd
Editio!
Muhammad Ali Ma<idi2 H-./0 Microcontroller and Embedded S"stemsI2 2!d Editio!2 2005
Course 9#$ecti%es ,
11 eal /ith pro$lems a!d solutio!s associated /ith ma!y aspects o5 a lo"ic di"ital desi"! circuits
21 E0plai! the /or-i!" o5 hard/are
Course &earning 9utcomes,
• A$le to impleme!t the circuit
• Compare the result o5 simulatio! /ith hard/are
• Ide!ti5y the pro$lem
Assessments
Course Contents,
(odule .,
4 setup $ased o! com$i!atio!al lo"ic @hard/are+simulatio!B
• *al5 Adder-5ull adder+Su$tractor usi!" com$i!atio!al circuits
• *al5 Adder-5ull adder+Su$tractor usi!" MFN+EMFN
• Code Co!3erters
(odule /,
4 setup $ased o! se=ue!tial lo"ic @hard/are+simulatio!B
• Dlip-5lops
• Shi5t Ge"isters
• Cou!ters
• Se=ue!ce detector
(odule 1,
4 setup $ased o! Microco!troller
• Study o5 Microco!troller -it
• I!troductio! to ;eil IE
• Assem$ly o5 $asic (051 circuit 5or #E 5lashi!" a!d ru!!i!" #E1
• Small Assem$ly #a!"ua"e %ro"ram
(odule 7ise (easura#le Students &earning 9utcomes
• A$le to impleme!t the lo"ic circuit
• A$le to ide!ti5y the pro$lem
S.Y.B.Tech Curriculum Electronics 2013-14 Page 1
• A$le to use the i!structio! to ru! the pro"ram
9utcomes as regards to im-ro%ement in Communication S)ills
• %repare the prese!tatio! $ased o! o!e desi"!
Com-uter sage = &a# Tool
;eil so5t/are2 %roteous so5t/are2 *ard/are setup
&a#orator' E*-eriences,
%er5orm the e0perime!ts
Inde-endent &earning E*-eriences,
Study the data sheets
S.Y.B.Tech Curriculum Electronics 2013-14 Page 1!
Title of the Course, ECA8" I &AB .E+ /32 &" T" P" / Cr" .
Scheme of E%aluation
ISE ESE (inimum for Passing
30 30 /0 (ISE) C /0 (ESE)
Pre"4e5uisite Courses, Basic Electronics Engineering
Te*t#oo),
11 “Electronic $ircuit +esign and Anal"sis”, 1 A1 Neama!2 Tata Mc9ra/ *ill2 Ne/ elhi2 2
!d
Editio!2 20021
21 “Microelectronic $ircuits”, A1 S1 Sedra a!d ;1 C1 Smith2 &05ord F!i3ersity %ress2 5
th
Editio!2
20041
31 “Electronic +evices and $ircuits”, Alle! Mottershed 2 %*I
4eferences,
11 “Electronic +evices and $ircuits”, G1 :oylestad C #1 Nashels-y2 %*I1
21 “Electronic devices and $ircuits”, Millma! a!d *al-ias2 Tata Mc9ra/ *ill1
31 “)ractical %ransistor $ircuit +esign and Anal"sis”, 9erald E1 ,illiams2 Tata Mc9ra/ *ill2 Ne/
elhi1
Course 9#$ecti%es ,
11 :read-$oard testi!" o5 the desi"!ed Electro!ic circuits li-e ampli5ier usi!" :8T a!d M&SDETs1
21 Compare the 5re=ue!cy respo!se o5 :8T a!d M&SDET ampli5iers1
31 Compare si!"le sta"e a!d multista"e ampli5iers1
41 Study the per5orma!ce o5 po/er ampli5iers1
Course &earning 9utcomes,
11 A$le to a!aly<e the per5orma!ce o5 ampli5iers i! terms o5 3olta"e "ai!2 curre!t "ai!2 i!put
impeda!ce2 output impeda!ce1
21 A$le to comme!t o! "ai! $a!d/idth product o5 ampli5iers1
31 A$le to simulate the desi"!ed electro!ic circuits a!d study their per5orma!ce1
Assessments
Course Contents,
&ist of E*-eriments,
11 esi"! a!d a!alysis o5 si!"le sta"e commo! emitter :8T ampli5ier1 %lot the 5re=ue!cy respo!se
o5 ampli5ier1
21 esi"! a!d a!alysis o5 si!"le sta"e commo! collector @emitter 5ollo/erB ampli5ier1
31 Study o5 commo! source DET ampli5ier1
41 :iasi!" methods 5or M&SDET a!d M&SDET as a s/itch1
51 esi"! a!d a!alysis o5 commo! source M&SDET ampli5ier1
61 esi"! a!d a!alysis o5 commo! drai! @source 5ollo/erB M&SDET ampli5ier1
'1 Study the per5orma!ce o5 arli!"to! pair1
(1 Study o5 t/o sta"e :8T ampli5ier /ith !e"ati3e 5eed$ac-1
J1 esi"! a!d a!alysis o5 class-A po/er ampli5ier1
101 esi"! a!d a!alysis o5 class-A: @push-pullB po/er ampli5ier1
(odule 7ise (easura#le Students &earning 9utcomes
11 Com-are and contrast the circuits impleme!ted usi!" $ipolar 4u!ctio! tech!olo"y a!d
S.Y.B.Tech Curriculum Electronics 2013-14 Page 1"
M&SDET tech!olo"y1
21 Anal'Fe the per5orma!ce o5 Deed$ac- a!d %o/er ampli5iers1
9utcomes as regards to im-ro%ement in Communication S)ills
%articipatio! i! Electro!ic Circuit esi"! competitio!s+e3e!ts1
Com-uter sage = &a# Tool
%roteus Simulatio! So5t/are a!d %Spice1
&a#orator' E*-eriences,
The stude!ts are e0pected to $uild the circuits usi!" discrete compo!e!ts as per the desi"!s a!d test the
per5orma!ce usi!" electro!ic test a!d measuri!" e=uipme!ts1
Inde-endent &earning E*-eriences,
A$le to select a! electro!ic circuit 5or a particular applicatio!1
S.Y.B.Tech Curriculum Electronics 2013-14 Page 20
Title of the Course, (icrocontroller Interface and Peri-herals
.E+ /..
&" 1 T" P" Cr" 1
Scheme of E%aluation ISE SE"I SE"II ESE (inimum for Passing
.0 /0 /0 30 20
Pre"4e5uisite Courses,
Te*t#oo),
02 “-./0 architecture, programming and Applications”, ;e!!eth Ayala1
32 “-./0 and Embedded s"stems”, Ma<idi
4eferences,
11 4eil A/0, #,/0 and $/0 ma!uals1
32 !!!2keil2com, !!!2-./32com
Course 9#$ecti%es ,
11 F!dersta!d the architecture o5 (051 microco!troller
21 F!dersta!d the i!structio! set o5 (051 microco!troller
31 F!dersta!d the peripherals a!d its pro"rammi!"
41 F!dersta!d the em$edded C la!"ua"e
51 F!dersta!d usi!" peripherals to $uild a use5ul system
Course &earning 9utcomes,
11 A$ility to /rite assem$ly pro"ram 5or (051
21 A$ility to /rite C pro"ram 5or (051
31 A$ility to desi"! simple (051 $ased hard/are a!d use peripherals to $uild a! (051 $ased system
usi!" C la!"ua"e
Assessments,
Teacher>s Assessme!t $ased o! - ?ui<+*ome assi"!me!ts+Mi!i %ro4ects+a!y other @10AB
T/o Semester e0ami!atio!s SE I C SE II @20A eachB1 Each e0ami!atio! is o5 o!e hour duratio! a!d /ill $e
assessed 5or 20 Mar-s o! 33A o5 the sylla$us co3ered @$et/ee! start o5 the term a!d Dirst Sem E0am i1e1
9e!erally Module 1 a!d 2 5or SE I a!d $et/ee! SE I C SE II i1e1 9e!erally Module 3 a!d 4 5or SE IIB1 ESE @50AB
E T/o hours duratio! a!d /ill $e assessed 5or 50 Mar-s a!d /ould $e o! e!tire sylla$us /ith /ei"hta"e 20A each
5or the sylla$us o5 SE I "e!erally @module 1 a!d 2Ba!d SE II "e!erally @Module 3 a!d 4B a!d 60A o! the sylla$us
co3ered a5ter SE II "e!erally @Module 5 a!d 6B1
Course Contents,
(odule .,
Ge3isio! o5 (051 architecture a!d i!structio! set2 %ort structure1 Assem$ler directi3es2 I!troductio! to C
pro"rammi!" 5or (0512 data types2 usi!" poi!ters2 e3elopme!t tools 5or (051 pro"rams1
(odule /,
Timers i! (0512 Timer $loc- dia"ram a!d 5u!ctio!2 Timer modes 02 12 2 a!d their uses2 Simple
applicatio! 5or timer i! each mode1 Timer as cou!ter2 %ro"ram 5or $atch cou!ter1 Dre=ue!cy2 time2 pulse
/idth measureme!t1 %,M "e!eratio! usi!" timer1 I!terrupt structure o5 (0512 /riti!" a! ISG2 i!terrupt
$loc-i!" co!ditio!s2 i!terrupt priorities2 %ro"rammi!" 5or e0ter!al i!terrupt2 %ro"rammi!" timer
i!terrupts1
S.Y.B.Tech Curriculum Electronics 2013-14 Page 21
(odule 1,
Serial commu!icatio! i! (0512 GS232 si"!als o5 %C2 Serial comm1 modes a!d their pro"rammi!"2 %ort
e0pa!sio! usi!" serial commu!icatio!2 Multiprocessor commu!icatio! mode a!d its pro"rammi!"1
(odule 2,
I!ter5aci!" e0ter!al memory @GAM+G&MB to (0512 I!ter5aci!" (2552 ;ey$oard i!ter5aci!"2 ' se"me!t
isplay i!ter5aci!" @Static+Multiple0edB1 #C i!ter5aci!"2
(odule 3,
Thum$/heel i!ter5aci!"2 AC $asics2 ual slope2 successi3e appro0imatio!2 5lash ACs2 I!ter5aci!"
AC to (0512 AC Tech!i=ues2 G-2G AC
(odule <,
Stepper motor2 Thum$/heel Gelay i!ter5aci!"2 I2C a!d S%I :us 5or E2%G&M a!d GTC i!ter5aci!"2
(051 $ased system desi"!2 Case studies o5 temperature co!troller2 Mai!s 5re=ue!cy meter2 :atch cou!ter2
%ro"ramma$le po/er supply.
(odule 7ise (easura#le Students &earning 9utcomes
11 A$ility to /rite assem$ly pro"ram 5or (051
21 A$ility to /rite C pro"ram 5or (051
31 A$ility to desi"! simple (051 $ased hard/are a!d use peripherals to $uild a! (051
$ased system usi!" C la!"ua"e
9utcomes as regards to im-ro%ement in Communication S)ills
Com-uter sage = &a# Tool
&a#orator' E*-eriences,
Inde-endent &earning E*-eriences,
Title of the Course, Analog Communication Engineering .E+ /./ &" 1 T" P" Cr" 1
S.Y.B.Tech Curriculum Electronics 2013-14 Page 22
Scheme of E%aluation ISE SE"I SE"II ESE (inimum for Passing
.0 /0 /0 30 20
Pre"4e5uisite Courses, :asic electro!ics e!"i!eeri!"
Te*t#oo),
11 H%ri!ciple o5 commu!icatio! systemI Tau$ Schilli!"2 TM* pu$licatio!2 seco!d Editio!
21 H%ri!ciple o5 commu!icatio! e!"i!eeri!"I2 A!o-h si!"h2 S1Cha!d %u$licatio!
31 HTelecommu!icatio! s/itchi!" system a!d !et/or-sI Thia"ara4a! 7is/a!atha!22 %*I pu$licatio!
4eferences,
11 HElectro!ic commu!icatio! systemsI :la-e2 Thomso! a!d elmar1 seco!d editio!
21 HElectro!ic commu!icatio! systemsI2,ay!e Tomasi2 %earso! educatio!2 5
th
editio!
31 HA!alo" a!d di"ital commu!icatio! 2 :1%1#athi2 &05ord pu$licatio!
HEleme!ts o5 Electro!ic Na3i"atio!I2N1 S1 Na"ara4a2 TM* %u$licatio!
Course 9#$ecti%es ,
11 A$le to u!dersta!d a!d a!aly<e the pri!ciple a!d /or-i!" o5 amplitude modulatio!2
demodulatio!2 AM Tra!smitter+recei3er
21 A$le to u!dersta!d a!d a!aly<e pri!ciple a!d /or-i!" o5 5re=ue!cy modulatio!2 demodulatio!
AM Tra!smitter+recei3er
31 A$le to u!dersta!d a!d a!aly<e pri!ciple a!d /or-i!" o5 modulatio! a!d demodulatio! o5
%AM2 %,M2%%M2 %CM system
41 F!dersta!d the /or-i!" o5 s/itchi!" types i! telepho!e system
51 F!dersta!d the di55ere!t types o5 A!te!!a
61 F!dersta!d the 5u!dame!tals o5 ,a3e %ropa"atio!
'1 F!dersta!d the operatio! o5 radar system2 radar per5orma!ce 5actors
Course &earning 9utcomes,
11 The stude!ts /ill $e a$le to desi"! the $asic commu!icatio! circuits a!d test them1
21 They /ill ha3e u!derstood the $asic co!cepts o5 commu!icatio! system
31 A$le to simulated outputs compare /ith desired outputs
41 They /ill ha3e to use so5t/are pac-a"e@MAT#A:B
Assessments,
Teacher>s Assessme!t $ased o! - ?ui<+*ome assi"!me!ts+Mi!i %ro4ects+a!y other @10AB
T/o Semester e0ami!atio!s SE I C SE II @20A eachB1 Each e0ami!atio! is o5 o!e hour duratio! a!d /ill $e
assessed 5or 20 Mar-s o! 33A o5 the sylla$us co3ered @$et/ee! start o5 the term a!d Dirst Sem E0am i1e1
9e!erally Module 1 a!d 2 5or SE I a!d $et/ee! SE I C SE II i1e1 9e!erally Module 3 a!d 4 5or SE IIB1 ESE
@50AB E T/o hours duratio! a!d /ill $e assessed 5or 50 Mar-s a!d /ould $e o! e!tire sylla$us /ith /ei"hta"e
20A each 5or the sylla$us o5 SE I "e!erally @module 1 a!d 2Ba!d SE II "e!erally @Module 3 a!d 4B a!d 60A o!
the sylla$us co3ered a5ter SE II "e!erally @Module 5 a!d 6B1
Course Contents,
(odule ., Am-litude modulation
Amplitude modulatio!) Modulatio! i!de0 a!d perce!ta"e modulatio! 5or si!usoidal AM2 Dre=ue!cy
spectrum o5 AM /a3e2 represe!tatio! o5 AM /a3e @5re=ue!cy a!d timeB1 #o/ a!d hi"h le3el
modulatio! scheme1 AM tra!smitters2 SS: modulatio!1 :ala!ced modulators AM Gecei3er)
Characteristics o5 recei3er2 AM demodulatio! C A9C circuits
(odule /, :re5uenc' (odulation
S.Y.B.Tech Curriculum Electronics 2013-14 Page 23
Modulatio! i!de02 de3iatio! ratio2 5re=ue!cy spectrum 2:, re=uireme!t2 DM tra!smitters@direct C
i!directB 5re=ue!cy modulatio!2 pre emphasis
:( 4ecei%er, :asics2 DM demodulators $ala!ced slope-5oster- seeley2 ratio detector2 E55ect o5 !oise i!
DM2 %re emphasis C de emphasis2 DM stereo system
(odule 1, Pulse modulation
I!troductio!2 sampli!" theorem2 pulse tra!smissio!2 I!ter sym$ol i!ter5ere!ces %AM-sampli!" methods2
modulatio!-demodulatio! o5 %AM2 %,M2%%M2 modulatio!-demodulatio! system a!d its merits C
demerits2 I!troductio! o5 %CM system@e!coder-decoderB
(odule 2, Introduction of tele-hone S'stems
Cross$ar s/itchi!"2 Electro!ic spaceC time di3isio! s/itchi!"2 space-time-space s/itchi!"2 Cellular
co!cepts2 Mo$ile telepho!e ser3ice2 Dre=ue!cy Geuse co!cept2 I!ter5ere!ce cell2 Splitti!"1 sectori!"2
se"me!tatio! C uali<atio!2 Goami!" a!d *a!do55s2 cellular telepho!e Net/or- a!d call processi!"
(odule 3, Wa%e Pro-agation D Antenna
I!troductio!- *al5-/a3e ipole a!te!!a2 Dolded ipole2 Co!ical A!te!!a
,a3e propa"atio!) I!troductio!2 9rou!d /a3es2 S-y ,a3es2 Space /a3es1
(odule <, 4adar and +a%igation
I!troductio!) :asic radar system2 Gadar per5orma!ce 5actors2 Gadar systems2 MTI2 :eco!s2 %ulsed radar
system2 oppler radar2 DM+C, radar2 phased array C pla!er array radars
#&GAN) ista!ce measuri!" i!strume!ts @MEB2 I!strume!t la!di!" system @I#SB2 9rou!d co!trolled
approach system @9CAB
(odule 7ise (easura#le Students &earning 9utcomes
11 ?ui<+Test+&ral+Assi"!me!ts to test the u!dersta!di!" o5 /or-i!" o5 amplitude modulatio!2
demodulatio!2 AM Tra!smitter+recei3er
21 ?ui<+Test+&ral+Assi"!me!ts to test the u!dersta!di!" o5 /or-i!" o5 5re=ue!cy modulatio!2
demodulatio! AM Tra!smitter+recei3er
31 ?ui<+Test+&ral+Assi"!me!ts to test o5 modulatio! a!d demodulatio! o5 %AM2 %,M2%%M2 %CM
system
41 ?ui<+Test+&ral+Assi"!me!ts to 5i!d out the u!dersta!di!" o5 s/itchi!" types i! telepho!e
system
51 ?ui<+Test+&ral+Assi"!me!ts to test the /or-i!" o5 di55ere!t types o5 A!te!!a a!d ,a3e
%ropa"atio!
61 ?ui<+Test+&ral+Assi"!me!ts to 5i!d out u!dersta!di!" o5 operatio! o5 radar system2 Gadar
per5orma!ce 5actors
9utcomes as regards to im-ro%ement in Communication S)ills
Tech!ical paper /riti!" %rese!tatio!2 semi!ar
Com-uter sage = &a# Tool
%erso!al Computer /ith %roteus2 MAT#A: so5t/are a!d *ard/are chassis+setups
&a#orator' E*-eriences,
E0perime!t $ased o! module 12223 a!d Assi"!me!ts+Tutorials $ased o! module 425a!d 6
Inde-endent &earning E*-eriences,
S.Y.B.Tech Curriculum Electronics 2013-14 Page 24
Title of the Course, Signals and S'stems .E+ /.1
&" 1 T" . P" Cr"
2
Scheme of E%aluation ISE SE"I SE"II ESE (inimum for Passing
.0 /0 /0 30 20
Pre"4e5uisite Courses, Maths III 2 :asic Electrical E!"i!eeri!" @EE 101B
Te*t#oo),
Ge=uired)
A171 &ppe!heim2 A1S1 ,ills-y, S1*1 Na/a$2 Signals a!d S"stems2 %re!tice *all2 1JJ'1
Suppleme!tal) Asho- Am$ardar2 Analog and +igital Signal )rocessing, C# E!"i!eeri!"2 1JJJ
4eferences,
11:1 %1 #athi2 ,inear s"stems and signals 2&05ord F!i3ersity press2 2005
21 M1 81 Go$erts 2 Signals and s"stems2 Tata Mac"ra/ *ill22005
31 Simo! *ay-i!2 :arry 7a! 7ee!2 Signals and s"stems 2,iley2 2003
41 */ei % *su2 Schaum1s &utline Signals and S"stems2 Tata Mac"ra/ *ill2 1JJ5
9%erall Educational 9#$ecti%e,
&! completio! o5 the course2 stude!ts should $e su55icie!tly 5amiliar /ith the theoretical structure2 5ormal
represe!tatio!2 computatio!al methods2 !otatio!2 a!d 3oca$ulary o5 li!ear models to $e a$le to apply them
to the a!alysis a!d desi"! o5 di"ital a!d a!alo" commu!icatio!s a!d co!trol systems1 The stude!ts /ill $e
a$le to per5orm si"!al a!alysis /ith re5ere!ce to spectrum a!alysis o5 determi!istic si"!als1
Course &earning 9utcomes,
11 :e a$le to 5i!d the respo!se o5 li!ear systems i! the time domai!1
21 :e a$le to represe!t a!d a!aly<e systems i! the 5re=ue!cy domai!1
31 :e a$le to a!aly<e co!ti!uous time system respo!ses usi!" the co!cepts o5 tra!s5er 5u!ctio!
represe!tatio!
41 :e a$le to apply time a!d 5re=ue!cy domai! methods to "ai! a! u!dersta!di!" o5 commu!icatio!
systems a!d 5eed$ac- co!trol systems1
51 :e a$le to F!dersta!d the $asics o5 discrete-time systems a!d si"!al processi!"1
61 :e a$le to a!aly<e discrete time si"!als a!d systems i! the time domai! usi!" the impulse respo!se a!d
co!3olutio! co!cepts1 Fse computers a!d MAT#A: to simulate a!d a!aly<e si"!als a!d systems
'1 :e a$le to e55ecti3ely commu!icate a!d u!dersta!d pro$lems related to the course
Assessments,
Teacher>s Assessme!t $ased o! - ?ui<+*ome assi"!me!ts+Mi!i %ro4ects+a!y other @10AB
T/o Semester e0ami!atio!s SE I C SE II @20A eachB1 Each e0ami!atio! is o5 o!e hour duratio! a!d /ill $e assessed
5or 20 Mar-s o! 33A o5 the sylla$us co3ered @$et/ee! start o5 the term a!d Dirst Sem E0am i1e1 9e!erally Module 1
a!d 2 5or SE I a!d $et/ee! SE I C SE II i1e1 9e!erally Module 3 a!d 4 5or SE IIB1 ESE @50AB E T/o hours duratio!
a!d /ill $e assessed 5or 50 Mar-s a!d /ould $e o! e!tire sylla$us /ith /ei"hta"e 20A each 5or the sylla$us o5 SE I
"e!erally @module 1 a!d 2Ba!d SE II "e!erally @Module 3 a!d 4B a!d 60A o! the sylla$us co3ered a5ter SE II
"e!erally @Module 5 a!d 6B1
S.Y.B.Tech Curriculum Electronics 2013-14 Page 25
Course Content,
(odule ., Introduction to Signals and S'stems G Continuous and 8iscrete " > hrs
I!troductio!2 sta!dard si"!als2 si"!al represe!tatio!2 classi5icatio! o5 si"!als2 systems E represe!tatio!2
classi5icatio!2 #i!ear2 Time i!3aria!t2 causal2 :I:& sta$le2 Static2 dy!amic1
(odule /, Time 8omain Anal'sis of Continuous and 8iscrete Time S'stems" > hrs
Sero state a!d Sero i!put respo!se2 Impulse respo!se2 Co!3olutio! i!te"ral a!d co!3olutio! sum2 "raphical
represe!tatio! o5 co!3olutio!1
(odule 1, :ourier 8omain Anal'sis of Continuous Time Signal G .0 hrs.
Tri"o!ometric Dourier series2 Compact Tri"o!ometric Dourier series2 E0po!e!tial 5orm2 irichlet
Co!ditio!s2 Dre=ue!cy domai! represe!tatio! o5 periodic si"!als2 Dourier Tra!s5orm represe!tatio! o5
aperiodic si"!als2 %roperties o5 CDT duality2 time re3ersal2 Co!3olutio! E time a!d 5re=ue!cy domai!2 etc1
(odule 2, &a-lace Transform Anal'sis of Signals and S'stem" <hrs.
e5i!itio!2 %roperties2 Solutio! o5 di55ere!tial e=uatio!1 Tra!s5er 5u!ctio!2 %oles a!d Seroes2 System
a!alysis usi!" #aplace Tra!s5orm2 mi!-ma0 phase systems
(odule 3, :ourier 8omain Anal'sis of 8iscrete Time Signal. G >hrs.
Geprese!tatio! o5 CT si"!als usi!" Samples2 Ny=uest Sampli!" Theorem iscrete time Dourier Tra!s5orm2
Geprese!tatio! o5 aperiodic se=ue!ce2 %roperties o5 TDT) time re3ersal2 #i!ear Co!3olutio! E time a!d
5re=ue!cy domai!2 co!4u"ate symmetry1 iscrete Dourier Tra!s5orm) e5i!itio! a!d %roperties1
(odule <, H Transform Anal'sis of 8iscrete Time Signals and S'stems" < hrs.
e5i!itio!2 %roperties2 Solutio! o5 di55ere!ce e=uatio!1 Tra!s5er 5u!ctio!2 %oles a!d Seroes2 System
a!alysis usi!" S-Tra!s5orm2 Mi!imum phase Ema0imum phase system2 DIG2 IIG systems2 All pass
systems2 Sero phase systems
(odule 7ise (easura#le Students &earning 9utcomes
11 F!dersta!d 5u!dame!tal characteristics o5 Si"!als a!d Systems1
21 A!aly<e respo!se o5 li!ear co!ti!uous-time a!d discrete-time si"!als a!d systems1 Fse MAT#A:
to simulate a!d to a!aly<e si"!als a!d systems o5 these cases1
31 Apply time-domai! a!d 5re=ue!cy-domai! a!alysis tools to li!ear co!ti!uous systems1
41 A!aly<e co!ti!uous-time si"!als a!d system respo!ses usi!" the co!cepts o5 tra!s5er 5u!ctio!
represe!tatio! $y use o5 #aplace a!d i!3erse #aplace tra!s5orms1 Fse MAT#A: to simulate a!d
a!aly<e si"!als a!d systems usi!" these tra!s5orms1
51 Apply time-domai! a!d 5re=ue!cy-domai! a!alysis tools to li!ear discrete systems1 E0plore
sampli!" co!cepts that li!- co!ti!uous-time a!d discrete-time si"!als a!d systems1 Fse MAT#A:
to simulate a!d to a!aly<e si"!als a!d systems 5or this situatio!1
61 A!aly<e discrete-time si"!als a!d system respo!ses usi!" the co!cepts o5 tra!s5er 5u!ctio!
represe!tatio! $y use o5 S a!d i!3erse-S tra!s5orms1 Fse MAT#A: to simulate a!d a!aly<e si"!als
a!d systems usi!" these tra!s5orms1
9utcomes as regards to im-ro%ement in Communication S)illsNil
Com-uter sage = &a# Tool
The MAT#A: a!alysis a!d desi"! so5t/are is used throu"hout the course1
&a#orator' E*-eriences, Nil
S.Y.B.Tech Curriculum Electronics 2013-14 Page 26
Inde-endent &earning E*-eriences,
&!li!e N%TE# 7ideo lectures
• %ro51 T ; :asu2 IIT ;hara"pur
• %ro51 S1 C1 utta Goy2 IIT elhi
• %ro51 71 M1 9adre2 IIT Mum$ai
S.Y.B.Tech Curriculum Electronics 2013-14 Page 2
Title of the Course, Control S'stem .E+ /.2 &" 1 T" . P" Cr" 2
Scheme of E%aluation ISE SE"I SE"II ESE (inimum for Passing
.0 /0 /0 30 20
Pre"4e5uisite Courses,
Te*t#oo),
11 “Co!trol System E!"i!eeri!"”, I181 Na"rath2 M1 9opal2 Ne/ A"e I!ter!atio!al
%u$licatio!s2 1JJJ2 3rd Editio!1
21 “Moder! Co!trol E!"i!eeri!"”, ;atsuhi-o &"ata1
31 “Moder! Co!trol System”, or52 :ishop2 Addiso! E ,esley %u$licatio!1
4eferences,
11 “Feedback $ontrol S"stems”, Schaum>s Series $oo-1
21 “Automatic $ontrol Engineering”, ;uo2 2!d Editio!1
Course 9#$ecti%es ,
This course is desi"!ed as 5irst course i! co!trol systems1 The importa!t o$4ecti3es are)
11 To study ope! loop a!d closed loop systems1
21 To u!dersta!d 5u!dame!tals o5 time a!d 5re=ue!cy domai! a!alysis1
31 To de3elop co!cept o5 sta$ility i! time a!d 5re=ue!cy domai!1
41 To study 5u!dame!tals o5 state space a!alysis1
Course &earning 9utcomes,
11Stude!ts /ill $e 5amiliar /ith Co!trol system 5u!dame!tals such as ope! loop2 closed loop systems
21 Stude!ts should ha3e -!o/led"e o5 mathematical modeli!"2 si"!al 5lo/ "raphs etc1
31 To "et -!o/led"e o5 Gouth-*ur/it<2 Ny=uist criteria
41 To "et -!o/led"e o5 Goot #ocus2 :ode %lots etc1
Assessments,
Teacher>s Assessme!t $ased o! - ?ui<+*ome assi"!me!ts+Mi!i %ro4ects+a!y other @10AB
T/o Semester e0ami!atio!s SE I C SE II @20A eachB1 Each e0ami!atio! is o5 o!e hour duratio! a!d /ill $e
assessed 5or 20 Mar-s o! 33A o5 the sylla$us co3ered @$et/ee! start o5 the term a!d Dirst Sem E0am i1e1
9e!erally Module 1 a!d 2 5or SE I a!d $et/ee! SE I C SE II i1e1 9e!erally Module 3 a!d 4 5or SE IIB1 ESE @50AB
E T/o hours duratio! a!d /ill $e assessed 5or 50 Mar-s a!d /ould $e o! e!tire sylla$us /ith /ei"hta"e 20A each
5or the sylla$us o5 SE I "e!erally @module 1 a!d 2Ba!d SE II "e!erally @Module 3 a!d 4B a!d 60A o! the sylla$us
co3ered a5ter SE II "e!erally @Module 5 a!d 6B1
Course Contents,
. Introduction
Mathematical models o5 physical system2 &pe! loop a!d closed loop
systems2 re"e!erati3e 5eed$ac-2 Tra!s5er 5u!ctio!2 :loc- dia"rams a!d
reductio! tech!i=ues i!cludi!" si"!al 5lo/ "raphics2 deri3i!" tra!s5er
5u!ctio! o5 physical system o!e mecha!ical system a!d 5ield co!trolled a!d armature co!trolled C
ser3o motors2 co!trol system compo!e!ts
/ Time 4es-onse Anal'sis
Sta!dard test si"!als2 time respo!se o5 seco!d order system2 steady state
errors a!d error co!sta!ts2 desi"! speci5icatio!s o5 seco!d order system1
S.Y.B.Tech Curriculum Electronics 2013-14 Page 2!
%relimi!ary desi"! co!sideratio!s o5 Compe!sators !eed o5 compe!satio!2 lead compe!satio!s2 la"
compe!satio!2 la"-lead compe!satio!1
1 Sta#ilit' Anal'sis
Co!cept o5 sta$ility2 co!ditio! o5 sta$ility2 characteristic e=uatio!2 relati3e
sta$ility2 Gouth-*ur/it< criterio!2 special cases 5or determi!i!" relati3e
sta$ility2 Ny=uist sta$ility criterio!1
2 4oot &ocus Techni5ues.
:asic co!cept2 rules o5 root locus2 applicatio! o5 root locus tech!i=ue 5or
co!trol systems1
3 :re5uenc' 4es-onse Anal'sis
:ode plots2 "ai! mar"i!2 phase mar"i!2 e55ect o5 additio! o5 poles a!d <eros o! $ode plots
< Anal'sis of Control S'stems in State G S-ace
:asic co!cepts o5 state2 state 3aria$le a!d state models2 tra!s5er matri02
Co!trolla$ility2 o$ser3a$ility2 o$tai!i!" state space e=uatio!s i! ca!o!ical
5orm1
(odule 7ise (easura#le Students &earning 9utcomes
11 Stude!ts /ill $e 5amiliar /ith Co!trol system 5u!dame!tals such as ope! loop2 closed loop systems
21 Stude!ts should ha3e -!o/led"e o5 mathematical modeli!"2 si"!al 5lo/ "raphs etc1
31 E!a$le to a!aly<e time respo!se o5 seco!d order system
41 E!a$le to a!aly<e Compe!sati!" circuits li-e lead2 la" compe!sator1
51 F!dersta!di!" -!o/led"e o5 sta$ility usi!" Gouth-*ur/it<2 Ny=uist criteria
61 E!a$le to a!aly<e circuits i! state space1
9utcomes as regards to im-ro%ement in Communication S)ills
Tech!ical paper /riti!" %rese!tatio!2 semi!ar
Com-uter sage = &a# Tool
&a#orator' E*-eriences,
Inde-endent &earning E*-eriences,
S.Y.B.Tech Curriculum Electronics 2013-14 Page 2"
Title of the Course, ECA8"II .E+ /.3 &" 1 T" P" Cr" 1
S.Y.B.Tech Curriculum Electronics 2013-14 Page 30
Scheme of E%aluation ISE SE"I SE"II ESE (inimum for Passing
.0 /0 /0 30 20
Pre"4e5uisite Courses, ECA8"I
Te*t#oo),
11 “+esign !ith op(amp and analog integrated circuits”, Ser"io Dra!co2 Tata Mc9ra/ *ill2 Ne/
elhi1
21 “&perational amplifiers and linear integrated circuits”2 Go$ert D1 Cou"hli! a!d Drederic- D1
riscoll2 %*I1
4eferences,
11 “&p(amp and ,inear 5ntegrated $ircuits”, Gama-a!t 9ai-/ad2 %*I1
21 “&perational Amplifiers”, To$ey a!d 9ramme1
31 “,inear 5ntegrated $ircuits”, 1 Goy Choudhury a!d S1 :1 8ai!2 Ne/ A"e I!ter!atio!al %u$lishers2
2
!d
Editio!2 20031
Course 9#$ecti%es ,
Course 9#$ecti%es,
11 To u!dersta!d /or-i!" o5 di55ere!tial ampli5ier a!d operatio!al ampli5ier1
21 To study the op-amp $ased circuits li-e oscillators2 multi3i$rators etc1
31 Applicatio!s o5 op-amp i! A!alo" Computatio!s1
41 To study the applicatio!s o5 acti3e 5ilters a!d %##s1
Course &earning 9utcomes,
11 A$le to anal'Fe the op-amp $ased circuits1
21 A$le to design a li!ear 3olta"e re"ulator a!d acti3e 5ilters1
31 Electro!ic %ro4ects usi!" op-amps2 li-e a!alo" co!trollers etc1
Assessments,
Teacher>s Assessme!t $ased o! - ?ui<+*ome assi"!me!ts+Mi!i %ro4ects+a!y other @10AB
T/o Semester e0ami!atio!s SE I C SE II @20A eachB1 Each e0ami!atio! is o5 o!e hour duratio! a!d /ill $e
assessed 5or 20 Mar-s o! 33A o5 the sylla$us co3ered @$et/ee! start o5 the term a!d Dirst Sem E0am i1e1
9e!erally Module 1 a!d 2 5or SE I a!d $et/ee! SE I C SE II i1e1 9e!erally Module 3 a!d 4 5or SE IIB1 ESE @50AB
E T/o hours duratio! a!d /ill $e assessed 5or 50 Mar-s a!d /ould $e o! e!tire sylla$us /ith /ei"hta"e 20A each
5or the sylla$us o5 SE I "e!erally @module 1 a!d 2Ba!d SE II "e!erally @Module 3 a!d 4B a!d 60A o! the sylla$us
co3ered a5ter SE II "e!erally @Module 5 a!d 6B1
Course Contents,
.. 9-erational Am-lifier,
Ampli5ier 5u!dame!tals2 di55ere!tial ampli5ier2 $asic op-amp co!5i"uratio!2 op-amp po/eri!"2
5eed$ac- i! op-amp circuits2 ideal op-amp a!alysis1
/. Basic 9-"Am- Circuits,
I!3erti!" a!d No!-i!3erti!" ampli5iers2 adder2 su$tractor2 3olta"e to curre!t co!3erters2 curre!t to
3olta"e co!3erters2 i!strume!tatio! ampli5ier2 tra!sducer $rid"e ampli5ier2 #o"+A!tilo" ampli5ier1
1. 9-"Am- Characteristics,
Simpli5ied op-amp circuit dia"ram2 i!put $ias a!d o55set curre!t2 i!put o55set 3olta"e2 i!put o55set
error compe!satio!2 lo/ i!put $ias op-amp2 ope! loop respo!se2 closed loop respo!se2 tra!sie!t
respo!seP Noise properties) !oise dy!amics2 sources o5 !oise2 op-amp !oise2 lo/ !oise op-amp2
sta$ility pro$lemsP sta$ility i! co!sta!t 9:%1op-amp circuits2 i!ter!al 5re=ue!cy compe!satio! a!d
S.Y.B.Tech Curriculum Electronics 2013-14 Page 31
e0ter!al 5re=ue!cy compe!satio!1
2. Acti%e :ilters,
The tra!s5er 5u!ctio!2 5irst order acti3e 5ilter2 sta!dard seco!d order acti3e 5ilter2 ;GC multiple
5eed$ac- 5ilters2 state 3aria$le a!d $i-=uad 5ilters2 e55ect o5 5i!ite 9:% o! 5ilters2 audio 5ilter
applicatio!s1
3. Com-arators and Wa%eform !enerators,
7olta"e Comparator2 comparator applicatio!2 Schmitt tri""ers2 pea- detector2 sample a!d hold circuit2
Si!e /a3e "e!erators2 multi3i$rators2 mo!olithic timers @IC555B2 tria!"ular /a3e "e!erators2 sa/
tooth /a3e "e!erators2 mo!olithic /a3e5orm "e!erators2 7 to D a!d D to 7 co!3erter1
<. ;oltage 4egulators and P&&s,
%recisio! recti5ier2 #i!ear re"ulators2 #i!ear re"ulator applicatio!s2 s/itchi!" re"ulators2 phase
loc-ed loop2 a!alo" a!d di"ital phase detector2 mo!olithic %##s) NE5652 C40461
(odule 7ise (easura#le Students &earning 9utcomes
11 Com-rehend the pri!ciples $ehi!d a!alysis o5 op-amp $ased electro!ic circuits1 @#1 a!d #2B
21 A--l' the tools to anal'Fe the electro!ic circuits $uilt usi!" op-amps1 @#2 a!d #5B
31 Com-are and contrast the acti3e 5ilter circuits a!d passi3e 5ilters1 @#4B
41 8esign the #i!ear 3olta"e re"ulators a!d Compare /ith s/itchi!" re"ulators1 @#6B
51 Test, de#ug and e%aluate the per5orma!ce o5 op-amp $ased circuits2 /a3e5orm "e!erators a!d
mo!olithic timers1 @#3 a!d #5B
61 Wor) in team a!d de3elop the ha!ds o! s-ills 5or $uildi!" the op-amp $ased electro!ic circuits1
9utcomes as regards to im-ro%ement in Communication S)ills
%articipatio! i! Circuit esi"! + %ro4ect Competitio!s1
Com-uter sage = &a# Tool
%G&TEFS simulatio! so5t/are
&a#orator' E*-eriences,
esi"! a!d Testi!" o5 op-amp $ased circuits
Inde-endent &earning E*-eriences,
A$le to select a op-amp 5or a particular applicatio! a!d desi"! a!alo" co!trollers li-e o!-o552
proportio!al etc1
S.Y.B.Tech Curriculum Electronics 2013-14 Page 32
Title of the Course, (icrocontroller Interfacing and Peri-herals &a#
.E+ /<.
&"0 T" P" 2 Cr" /
Scheme of E%aluation
ISE ESE (inimum for Passing
30 30 /0 (ISE) C /0 (ESE)
Pre"4e5uisite Courses,
Te*t#oo),I(051 Architecture %ro"rammi!" a!d Applicatio!sI2 ;e!!th
4eferences,
12“-./0 and Embedded S"stems”2 Ma<idi
21I4eil A/0,#,/0,$/0” Ma!!uals1
Course 9#$ecti%es ,
11 F!dersta!d to use de3elopme!t tools
21 F!dersta!d to /rite a!d de$u" C pro"rams 5or (051
31 F!dersta!d to /rite2 test a!d 3eri5y the so5t/are 5or "i3e! hard/are o5 (051 $ased system
41 A$ility to desi"! hard/are @circuitB o5 a small (051 $ased system
Course &earning 9utcomes,
11 A$ility to use de3elopme!t tools
21 A$ility to /rite a!d de$u" C pro"rams 5or (051
31 A$ility to /rite2 test a!d 3eri5y the so5t/are 5or "i3e! hard/are o5 o5 (051 $ased system
41 A$ility to desi"! hard/are @circuitB o5 a small (051 $ased system
Assessments
Course Contents,
Dirst 2 E0perime!ts o! C pro"rammi!" 5or (051Study o5 i!ter!al data memory architecture o5 (0511
31 Timer pro"rammi!" as timer
41 Dre=ue!cy measureme!t
51 Time Measureme!t
61 E3e!t Cou!ter
'1 %,M 9e!eratio!
(1 E0ter!al I!terrupts
J1 Serial commu!icatio! @Echo pro"ramB
101 Serial commu!icatio! @*ard/are co!trol throu"h %C -ey$oardB
111 Multiprocessor commu!icatio! @Fsi!" %roteusB
121 Multiple0ed #E display i!ter5aci!"
131 #C I!ter5aci!"
141 Gelay i!ter5aci!"2 AC i!ter5aci!"
151 ;ey$oard i!ter5aci!"
161 Stepper motor i!ter5aci!"
1'1 AC i!ter5aci!"
1(1 Thum$/heel i!ter5aci!"
1J1 I2C protocol 5or E2%G&M accessi!"
201 S%I %rotocol 5or GTC I!ter5aci!"
211 esi"! o5 (051 $ased system
221 esi"! o5 (051 $ased system
S.Y.B.Tech Curriculum Electronics 2013-14 Page 33
231 esi"! o5 (051 $ased system
241 esi"! o5 (051 $ased system
(odule 7ise (easura#le Students &earning 9utcomes
9utcomes as regards to im-ro%ement in Communication S)ills
Com-uter sage = &a# Tool
&a#orator' E*-eriences,
Inde-endent &earning E*-eriences,
S.Y.B.Tech Curriculum Electronics 2013-14 Page 34
Title of the Course, Analog Communication Engineering &a# .E+
/</
&" T" P"/ Cr" .
Scheme of E%aluation
ISE ESE (inimum for Passing
30 30 /0 (ISE) C /0 (ESE)
Pre"4e5uisite Courses, :asic electro!ics e!"i!eeri!"
Te*t#oo), #a$ Ma!ual
4eferences,
11 HElectro!ic commu!icatio! systemsI :la-e2 Thomso! a!d elmar1 seco!d editio!
21 HElectro!ic commu!icatio! systemsI2,ay!e Tomasi2 %earso! educatio!2 5
th
editio!
31 HA!alo" a!d di"ital commu!icatio! 2 :1%1#athi2 &05ord pu$licatio!
HEleme!ts o5 Electro!ic Na3i"atio!I2N1 S1 Na"ara4a2 TM* %u$licatio!
Course 9#$ecti%es ,
11 A$le to u!dersta!d a!d a!aly<e the pri!ciple a!d /or-i!" o5 amplitude modulatio!2
demodulatio!2 AM Tra!smitter+recei3er
21 A$le to u!dersta!d a!d a!aly<e pri!ciple a!d /or-i!" o5 5re=ue!cy modulatio!2 demodulatio!
AM Tra!smitter+recei3er
31 A$le to u!dersta!d a!d a!aly<e pri!ciple a!d /or-i!" o5 modulatio! a!d demodulatio! o5
%AM2 %,M2%%M2 %CM system
41 F!dersta!d the /or-i!" o5 s/itchi!" types i! telepho!e system
51 F!dersta!d the di55ere!t types o5 A!te!!a
61 F!dersta!d the 5u!dame!tals o5 ,a3e %ropa"atio!
'1 F!dersta!d the operatio! o5 radar system2 radar per5orma!ce 5actors
Course &earning 9utcomes,
11 The stude!ts /ill $e a$le to desi"! the $asic commu!icatio! circuits a!d test them1
21 They /ill ha3e u!derstood the $asic co!cepts o5 commu!icatio! system
31 A$le to simulated outputs compare /ith desired outputs
41 They /ill ha3e to use so5t/are pac-a"e@MAT#A:B
Assessments
Teacher>s Assessme!t $ased o! - ?ui<+*ome assi"!me!ts+Mi!i %ro4ects+a!y other
ISE- 50A a!d ESE-50A $ased o! a$o3e me!tio!ed list o5 e0perime!t
Course Contents,
11 Study o5 spectrum a!aly<er
21 Study o5 AM modulatio! +demodulatio!
31 Study o5 AM recei3er
41 Study o5 AM tra!smitter
51 Study o5 DM recei3er
61 Study o5 DM tra!smitter
'1 Study o5 sampli!" theorem a!d reco!structio!
(1 Study o5 a!te!!a trai!er -it
J1 Study o5 modulatio!-demodulatio! o5 %AM2 %,M2%%M2
101 ,rite code 5or AM a!d DM modulatio! process i! MAT#A
S.Y.B.Tech Curriculum Electronics 2013-14 Page 35
(odule 7ise (easura#le Students &earning 9utcomes
11 ?ui<+Test+&ral+Assi"!me!ts to test the u!dersta!di!" o5 /or-i!" o5 amplitude modulatio!2
demodulatio!2 AM Tra!smitter+recei3er
21 ?ui<+Test+&ral+Assi"!me!ts to test the u!dersta!di!" o5 /or-i!" o5 5re=ue!cy modulatio!2
demodulatio! AM Tra!smitter+recei3er
31 ?ui<+Test+&ral+Assi"!me!ts to test o5 modulatio! a!d demodulatio! o5 %AM2 %,M2%%M2 %CM
system
41 ?ui<+Test+&ral+Assi"!me!ts to 5i!d out the u!dersta!di!" o5 s/itchi!" types i! telepho!e
system
51 ?ui<+Test+&ral+Assi"!me!ts to test the /or-i!" o5 di55ere!t types o5 A!te!!a
61 ?ui<+Test+&ral+Assi"!me!ts to 5i!d out u!dersta!di!" o5 operatio! o5 radar system2 Gadar
per5orma!ce 5actors
9utcomes as regards to im-ro%ement in Communication S)ills
Tech!ical paper /riti!" %rese!tatio!2 semi!ar
Com-uter sage = &a# Tool
%erso!al Computer /ith %roteus2 MAT#A: so5t/are a!d *ard/are chassis+setups
&a#orator' E*-eriences,
E0perime!t $ased o! module 12223 a!d Assi"!me!ts+Tutorials $ased o! module 425a!d 6
Inde-endent &earning E*-eriences,
S.Y.B.Tech Curriculum Electronics 2013-14 Page 36
Title of the Course, ECA8"II &AB .E+ /<3 &" T" P"/ Cr" .
Scheme of E%aluation
ISE ESE (inimum for Passing
30 30 /0 (ISE) C /0 (ESE)
Pre"4e5uisite Courses, ECA8"I &AB
Te*t#oo),
11 “+esign !ith op(amp and analog integrated circuits”, Ser"io Dra!co2 Tata Mc9ra/ *ill2 Ne/ elhi1
21 “&perational amplifiers and linear integrated circuits”2 Go$ert D1 Cou"hli! a!d Drederic- D1
riscoll2 %*I1
4eferences,
11 “&p(amp and ,inear 5ntegrated $ircuits”, Gama-a!t 9ai-/ad2 %*I1
21 “&perational Amplifiers”, To$ey a!d 9ramme1
31 “,inear 5ntegrated $ircuits”, 1 Goy Choudhury a!d S1 :1 8ai!2 Ne/ A"e I!ter!atio!al
%u$lishers2 2
!d
Editio!2 20031
Course 9#$ecti%es ,
Measureme!t o5 op-amp parameters1
11 To study the op-amp $ased circuits li-e oscillators2 multi3i$rators etc1
21 To study the per5orma!ce a!alysis o5 acti3e 5ilters1
31 To study the re"ulated po/er supply1
41 To study applicatio!s o5 mo!olithic timers a!d %##s1
51 To u!dersta!d the pri!ciple o5 s/itchi!" re"ulator S935241
Course &earning 9utcomes,
11 A$le to compare the per5orma!ce o5 di55ere!t types o5 op-amp2 $ased o! its measured
parameters1
21 A$le to compare per5orma!ce o5 acti3e a!d passi3e 5ilters1
31 A$le to $uild a!d test circuit to per5orm a!alo" computatio!s1
41 A$le to $uild a!d test a timer applicatio! usi!" IC5551
51 A$le to desi"! a!d test a li!ear 3olta"e re"ulator usi!" IC '(NN2 #M31'1
Assessments
Course Contents,
&ist of E*-eriments,
((inimum .0 e*-eriments should #e -erformed)
11 Study o5 i!3erti!" a!d !o!-i!3erti!" ampli5iers a!d 3olta"e 5ollo/ers
21 Study o5 adder a!d su$tractor
31 Study o5 i!strume!tatio! ampli5ier @circuit usi!" 3 op-ampsB
41 Study o5 Comparator a!d Schmitt tri""er circuit1
51 Study o5 %ea- detector
61 Study o5 I!te"rator a!d di55ere!tiator
'1 Study o5 #%D a!d *%D
(1 Study o5 Measureme!t o5 op-amp parameters
J1 Study o5 GC &scillators
S.Y.B.Tech Curriculum Electronics 2013-14 Page 3
101 Study o5 IC(03( a!d its applicatio!s
111 Study o5 #i!ear 7olta"e Ge"ulator
121 Study o5 S/itchi!" 7olta"e Ge"ulator S935241
131 Study o5 %recisio! Gecti5ier
141 S=uare a!d tria!"ular /a3e "e!erator
151 Study o5 IC555
161 Study o5 %## usi!" IC4046+IC565
(odule 7ise (easura#le Students &earning 9utcomes
11 Test, de#ug and e%aluate the per5orma!ce o5 op-amp $ased circuits2 /a3e5orm "e!erators a!d
mo!olithic timers1
21 Wor) in team a!d de3elop the ha!ds o! s-ills 5or $uildi!" the simple electro!ic circuits1
9utcomes as regards to im-ro%ement in Communication S)ills
%articipatio! i! Circuit esi"! + %ro4ect Competitio!s1
Com-uter sage = &a# Tool
%G&TEFS simulatio! so5t/are
&a#orator' E*-eriences,
esi"! a!d testi!" o5 3arious op-$ased circuits li-e oscillators2 multi3i$rators2 i!strume!tatio! ampli5ier
a!d acti3e 5ilters1
Inde-endent &earning E*-eriences,
A$le to select a op-amp 5or a particular applicatio! a!d desi"! a!alo" co!trollers li-e o!-o552
proportio!al etc1 A$le to per5orm mathematical operatio!s @a!alo" computerB usi!" op-amp $ased
circuits1
Course Code, ;B8& &a# .E+/<< &". T" P"/ Cr"/
Scheme of E%aluation
ISE ESE (inimum for Passing
30 30 /0 (ISE) C /0 (ESE)
S.Y.B.Tech Curriculum Electronics 2013-14 Page 3!
Pre"4e5uisite Courses, 8igital 8esign
Te*t#oo),
11 67H+, 6, ou"las %erry2 Tata Mc9ra/-*ill2
21 6+igital S"stem +esign 8sing 7H+,6, Charles * Goth2 Ce!"a"e #ear!i!" I!dia
4eferences,
11 6Fundamentals of +igital ,ogic 8sing 7H+, 6, Stea5a!2 Mc9ra/ *ill
21 +igital +esign9 H+,(#ased Approach, Ma!4ita Sri3asta3a2Ce!"a"e #ear!i!" I!dia
Course 9#$ecti%es ,
11 To -!o/ the *# la!"ua"e 5or i"ital esi"!
21 To u!dersta!d the di55ere!ce i! *# a!d other hi"h le3el pro"rammi!" la!"ua"e
31 To u!dersta!d the co!cept i! simulatio! a!d sy!thesis
Course &earning 9utcomes,
11 A$le to /rite the C de$u" the pro"ram
21 A$le to impleme!t o! -its
Assessments
Teacher>s Assessme!t $ased o! - ?ui<+*ome assi"!me!ts+Mi!i %ro4ects+a!y other
ISE @50AB $ased o! oral2 time-to-time su$missio!2 Test etc1
ESE @50AB E Three hours duratio! a!d /ill $e assessed 5or 60 Mar-s a!d /ould $e o! e!tire sylla$us
Course Contents,
(odule ., ;B8&, I!troductio! to 7*#2
%ro"ram structure2 Types a!d Co!sta!ts2 Attri$utes2 Du!ctio!s a!d %rocedures2 #i$raries a!d
%ac-a"es2 Types o5 7*# architectures@Structural2 ata 5lo/2 :eha3ioralB2 7*# co!curre!t
a!d se=ue!tial co!structs2 Com$i!atio!al a!d Se=ue!tial lo"ic desi"! usi!" 7*#
(odule /, ;erilog )%ro"ram structure2 Types a!d Co!sta!ts2 Attri$utes2 Du!ctio!s a!d Tas-s2
Stateme!ts2 etc1
(odule 7ise (easura#le Students &earning 9utcomes
11 A$le to -!o/ the di55ere!ce i! *# la!"ua"e a!d other hi"h le3el la!"ua"e1
21 Capa$le to /rite2 e0ecute a!d de$u" the pro"ram
9utcomes as regards to im-ro%ement in Communication S)ills
Com-uter sage = &a# Tool, Nili!0 e!3iro!me!t2 ;its
&a#orator' E*-eriences,
Inde-endent &earning E*-eriences,
S.Y.B.Tech Curriculum Electronics 2013-14 Page 3"