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# LIST OF EXPERIMENTS

## 1. Verifcation of Boolean theorems using digital logic gates.

2. Design and implementation of Adder and Subtractor using basic gates and
universal
gates for arbitrary functions.
3. Design and implementation of code converters for BD to !"cess#3
conversion and
!"cess#3 to BD conversion.
\$. Design and implementation of \$#bit binary adder % subtractor using basic
gates and
&S' devices.
(. Design and implementation of 1) bit parity generator % chec*er using '
+\$1,-.
). Design and implementation of 2#bit and ,#bit magnitude comparator.
+. Design and implementation of multiple"ers and demultiple"ers.
,. Design and implementation of decoders and encoders.
.. Design and testing of /ip#/ops using gates.
1-. 'mplementation of S'S01 S'201 2'S0 and 2'20 shift registers using /ip#
/ops.
11. Design and implementation of Synchronous% Asynchronous counters.
QUESTION SETUP-I
1. a) The output of a logic gate is 1 when all its inputs are at logic 0.Identify the gate and
construct the logic circuit for those gates and verify the truth table
b) The output of a logic gate is 0 when any one of the input is at logic 1,specify the
gate and construct the logic circuit and verify the truth table
2. a) A useful mathematical system for specifying and transforming logic functions using
digital logic gates.
b) esign a logic circuit for the e!pression "# \$A%&%'&%(%'A%(%)%. )erify the result
using Truth table.
c) esign a logic circuit for the e!pression "# \$A&'&('A()% .)erify the result using
Truth table.
*. a) If the minuend, subtrahend and &+,,+-.I/ bits are respectively applied to the
Augend, Addend and the (A,,".I/ inputs of a full adder, prove that the 012 output of
the full adder will produce the correct I334,4/(4 output.
b) 5ropose and (onstruct The (ircuit -hich 1sed to 0um *.&it )alue and 6enerate Two
outputs.
c) esign and Implement The (ircuit -hich 1sed to 0ubtract *.&it )alue and 6enerate
two +utputs.
d) 5ropose and (onstruct The (ircuits 1sing 1niversal 6ates -hich 1sed to 0um And
0ubtract 2.&it )alue And 6enerate Two +utputs.
7. a) esign and Implement four bit code conversion from binary code to code which is used
primarily for indicating the angular position of a shaft on rotating machineries. )erify the result
using 8.2ap.
b) 5ropose and construct 7 bit unit binary code to self complementing code convertor and
)erify the result using 8.2ap.
c) 5ropose and construct 7. bit binary code to cyclic code convertor. )erify the result using 8.
2ap.
d) The code where all successive numbers differ from their preceding number by single bit
convert to unit binary number.Identify and design the code
9. a) Three women namely A,& : ( together involved in a research activities. The pro;ect
involve an arithmetic operation \$i.e addition and subtraction) of 2.half byte binary number. After
si! months women.( withdraw from the pro;ect. women.A is interested in the addition operation
of 2.half byte binary number and women.& is interested in subtraction operation of 2.half byte
binary number. &oth women A : & want the output at the same time. esign a digital circuit
which satisfies the need of both women.
b) 5ropose a digital circuit that performs Addition and subtraction of two half byte binary
numbers simultaneously using e!clusive +, gate
c) 5ropose a digital circuit that performs Addition operation by using two half byte binary
numbers simultaneously by using I( <7=*
d) 5ropose a digital circuit that performs subtraction operation by using two half byte binary
numbers simultaneously using /+T gate
>. a) A * bit binary word is sent from Transmitter to ,eceiver which are situated 98m apart.
1nfortunately 1 bit error occurs at the receiver. 1 bit parity bit is sent along with the input i)
etermine the e?uation for +dd parity and 4ven parity.
ii)esign a digital circuit that detects that 1 bit error.
b) A transmitter section is situated at 0alem and receiver is situated at ,asipuram. A man @"A
wants to send 2.byte of data from transmitter to receiver. 1ne!pectedly 1 bit error occurs while
transmission. esign a digital circuit which detects that error bit and correct it. esign a digital
circuit for above said problem.
< .a) esign and Implement AB& and AC& e!pressions, where A and & are 2 bit inputs.)erify
the result using 8.2ap.
b) esign and Implement A is greater than & and A is e?ual to & e!pressions, where A and
& are eight inputs. )erify the result using 8.2ap.
=. a)5ropose and (onstruct the digital switch which can be used in time and fre?uency division
multiple!ing systems in the transmitting end.
b) esign and Implement digital switch which can be used in time and fre?uency
multiple!ing systems in receiving end.
D. a)5ropose and (onstruct the logic circuit which is used in the address decoding of
combinational circuit.
b) 5ropose and (onstruct the logic circuit which is used as feedbacE devices for motor speed
control, length measurement, position and input for rate and speed indication and control address
decoding of combinational circuit.
10. a)5ropose a one bit storage memory cell which has the specification of output will go to
indeterminate state if both inputs are high.
b) 5ropose a one bit storage memory cell which has the specification, that is used to create and
edge.triggered latch, which is important to the design of (51s,and also output will toggle when
both inputs are high.
c) 5ropose a one bit storage memory cell which has the specification ,toggle flip-flop changes
its output on each clocE edge, giving an output which is half the fre?uency of the signal to the
toggle input.
d) 5ropose a one bit storage memory cell which has the specification of output will go to be
delayed based on the inputs .
11 .a) esign a digital clocE which shifts 7.bit value from first flipflop to last flipflop. Assume 7
bit data is applied seriously to first flipflop and obtained serial output in last flipflop.
b) esign a digital clocE which shifts 7.bit value from first flipflop to last flipflop. Assume 7
bit data is applied seriously to first flipflop and obtained parallel output from each flipflop.
c) esign a digital clocE which shifts 7.bit value from first flipflop to last flipflop. Assume 7
bit data is given in parallel and output is obtained in serial manner.
d) esign a digital clocE which shifts 7.bit value from first flipflop to last flipflop. Assume 7
bit data is applied parallely to first flipflop and obtained parallel from each flipflop.
12. a)esign a digital clocE which counts se?uence from Fero to seven. Apply the clocE
simultaneously to all flip flops
b) esign a digital clocE which counts se?uence from seven to Fero. Apply the clocE
simultaneously to all flip flops
c)esign a digital clocE which counts se?uence from Fero to seven. Apply the clocE to first flip
flop only.
d) esign a digital clocE which counts se?uence from seven to Fero. Apply the clocE to first flip
flop only.
I/T4,/AG 4HA2I/4, 4HT4,/AG 4HA2I/4,
QUESTION SETUP-II
1) a) Implement the following circuit diagram using logic gates.
b) Implement the following circuit diagram using logic gates.

c ) A burglar alarm for a car has a normally low switch on each of four doors. If any door is
opened the output of that switch goes II6I. The alarm is set off with an active.G+- output
signal. -hat type of gate will provide this logicJ 0upport your answer with an e!planation.
d) Implement the following circuit diagram using logic gates.

e) Implement the following circuit diagram using logic gates.
f) esign a circuit which would give output according to the following graph.
g) esign a circuit which would give output according to the following graph.
2. a) Two boys A : & went for a walE on a fine evening. The two naughty boys have a bet
among themselves. They started to throw stones on a pond. The boy whose stone falls on a pond
will be success and the other will be failure. After so many trials they conclude that A lost the
game and & won the game. esign a digital circuit for two boys A : &, such that the union of A
: & with whole complement produces only one output as high.
b) 2inimiFe the logic function"(A,&,(,) #K(0,1,2,*,9,<,=,D,11,17) . 1se 8arnaugh map.
raw logic circuit for the simplified function.
c) )erify 1niversal 6ates and (omplementary 6ate, and also esign a logic circuit for the
e!pression "# \$A&'&('A()% .)erify the result using Truth table.
d) Implement the following circuit diagram using logic gates.
*) a) If the minuend, subtrahend and &+,,+-.I/ bits are respectively applied to the Augend,
Addend and the (A,,".I/ inputs of a full adder, prove that the 012 output of the full adder
will produce the correct I334,4/(4 output.
b) i)5ropose and (onstruct The (ircuit -hich 1sed to 0um *.&it )alue and 6enerate Two
+utputs.
ii) esign and Implement The (ircuit -hich 1sed to 0ubtract *.&it )alue and 6enerate Two
+utputs.
iii) 5ropose and (onstruct The (ircuits 1sing 1niversal 6ates -hich 1sed to 0um And
0ubtract 2.&it )alue And 6enerate Two +utputs.
c) esign a digital circuit that performs Addition and subtraction of three bit binary numbers
using logic gates.
7) a) esign and Implement four bit unit distance code to binary code convertor. )erify the
result using 8.2ap.
b) (onvert a system of writing numerals that assigns a four.digit binary code to each digit 0
through D in a decimal \$base.10) numeral to 0tibitF code.
c) esign and Implement 7 bit code conversion from binary code to code which is used
primarily for indicating the angular position of a shaft on rotating machineries. )erify the result
using 8.2ap.
d ) esign and Implement four bit unit distance code to binary coded decimal convertor. )erify
the result using 8.2ap.
e) A scientist L&% worE in an ,: pro;ect say missile launching. -hile worEing in one of the
missile peripherals he worEed on a half byte binary number namely H. 0cientist .& wants the
result \$H'*).esign a digital circuit which satisfies what the scientist need.
9 a) etermine the number of <7=*s \$four.bit binary adders) and <7=>s \$?uad two.input 4H.+,
gates) re?uired to design a =.bit adderMsubtractor circuit and design and implement the same.
b) Three women namely A,& : ( together involved in a research activities. The pro;ect involve
an arithmetic operation \$i.e addition and subtraction) of 2.half byte binary number. After si!
months women.( withdraw from the pro;ect. women.A is interested in the addition operation of
2.half byte binary number and women.& is interested in subtraction operation of 2.half byte
binary number. &oth women A : & want the output at the same time. esign a digital circuit
which satisfies the need of both women.
>) a) In a certain chemical.processing plant, a li?uid chemical is used in a manufacturing
process. The chemical is stored in two different tanEs. A level sensor in each tanE produces a
II6I voltage when the level of chemical in the tanE drops below the level in the other tanE.
esign a circuit that monitors the chemical level in each tanE and indicates when the level in any
two tanEs drops below each other and maintained e?ually. Assume that the two tanEs are
represented by 2 bits.
b) Two IT employees in a organiFation worEs on a software pro;ect in a team. 4mployee @AA
wants to write a coding which compares 2.?uarter byte binary numbers and employee.& wants to
compare 2.one byte binary numbers. esign a digital circuit which satisfies employee.& need.
c) In a certain chemical.processing plant, a li?uid chemical is used in a manufacturing process.
The chemical is stored in two different tanEs. A level sensor in each tanE produces a II6I
voltage when the level of chemical in the tanE drops below the level in the other tanE. esign a
circuit that monitors the chemical level in each tanE and indicates when the level in any two
tanEs drops below each other and maintained e?ually. Assume that the two tanEs are represented
by = bits.
<) a) Implement a circuit for checEing data reception in the receiver side of a communication
system. Assume that the data is 1> bits wide.
b) Implement a circuit having a security bit in the sender side of a communication system.
Assume that the data is 1> bits wide.
c) 5rove that 5o # A Hnor & Hnor ( and 5e #A Hor & Hor (, where 5o and 5e is in error
correcting codes, respectively and A,& and ( are the Inputs. esign the igital circuit for the
above e!pressions and verify the output using 8.2ap.
d ) A transmitter section is situated at 0alem and receiver is situated at ,asipuram. A man @"A
wants to send 2.byte of data from transmitter to receiver. 1ne!pectedly 1 bit error occurs while
transmission. esign a digital circuit which detects that error bit and correct it. esign a digital
circuit for above said problem.
=) a) esign a digital switch which has 1 data input, m address inputs : 2! outputs, where
H#mNE outputs where 8 represents unity integer and %m% is a positive integer and it is three times
the LE% value. raw the circuit for above mentioned digital switch.
b) esign and Implement 1 input and 7 output digital switch which can be used in time and
fre?uency multiple!ing systems.
c) esign and Implement 7 input and 1 output digital switch which can be used in time and
fre?uency multiple!ing systems.
d) esign a digital switch which has 2Nn input, 1 data input and single output when n#2.iscuss
the practical application for the above mentioned digital switch.
D ) a) . esign a digital circuit that has 2N; inputs, where ;#2NE and m outputs, where 2NE#* and
m#2NE.iscuss the practical application of the circuit.
b) esign a digital circuit that has ! input and 2Np,where p#2Nw ,where 2Nw is a binary
e!ponential function which taEes the value of * and ! is a real positive integer which taEes the
same value of 2Nw.comment the practical application of the above digital circuit.
10) a) Implement the circuit for the following truth table.
b)esign and implement a circuit which is used to eliminate the undesirable condition of the
indeterminate state in 0, latch is to ensure that inputs 0 and , are never e?ual to 1 at the same
time.
c) The function table of a certain flip.flop is given. Identify the flip.flop.
d) esign a one bit storage memory cell which has the specification of output will toggle when
both inputs are high.
e) esign a one bit storage memory cell which has the specification of one input and one output
and the output is not same as that of input when the clocE pulse is given.
f) esign a one bit storage memory cell which has the specification of one input and one output
and the output is same as that of input when the clocE pulse is given.
11) a) Two men 5,O worEs on a networEing pro;ect. 2en.5 wants to move a half byte word from
left to right serially. 2en.O wants to shift half byte word from left to right where input is given
serially and output is obtained in parallel. esign a digital circuit for above mentioned
application.
b) Two men 5,O worEs on a networEing pro;ect. 2en.5 wants to move a half byte word from left
to right both serially and the output is obtained in parallel manner also. 2en.O wants to shift half
byte word from left to right where input is given parallel and output is obtained parallel. esign a
digital circuit for above mentioned application.
c) Two men 5,O worEs on a networEing pro;ect. 2en.5 wants to move a half byte word from left
to right serially. 2en.O wants to shift half byte word from left to right where input is given sin
parallel and output is obtained serially. esign a digital circuit for above mentioned application.
12) a) esign and implement the following circuit.Assume that the clocEs are not given
simultaneously.
b) esign and implement the following circuit.Assume that the clocEs are not given
simultaneously.
( ) esign a synchronous circuit for the following state diagram.
d) esign and implement the following circuit.Assume that the clocEs are given
simultaneously.
e) esign a synchronous circuit for the following state diagram.

I/T4,/AG 4HA2I/4, 4HT4,/AG 4HA2I/4,
MARK SPLITUP
MARK SPLITUP
MAX.MAR
KS
MARKS
OBTAINED
PASS/FAIL
!"perimental setup
3-
!"ecution of 2ractical
3-
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3-
Viva Voce
1-
3otal &ar*s
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'43!54A6 !7A&'4!5
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2<) a)Implement the following circuit diagram using logic gates.
b)esign and Implement The (ircuit -hich 1sed to add *.&it )alue and 6enerate Two +utputs.
2=)a)Implement the following circuit diagram using logic gates.
b) esign and Implement The (ircuit -hich 1sed to 0ubtract *.&it )alue and 6enerate Two
+utputs.