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WORKING MODEL ON TRIPPING SEQUENCE

RECORDER-CUM-INDICATOR.
ABSTRACT:
In power stations and continuous process control plants, a
protection system is used to trip (automatically cutout)
faulty systems to prevent damages and ensure the overall
safety of the personnel and machinery. But this often results
in multiple or cascade tripping of a number of subunits.
Looking at all the tripped units doesnt reveal the cause of
failure. It is therefore very important to determine the
seuence of events that have occurred in order to e!actly
"nd out the cause of failure and revive the system with
minimal loss of time.
INTRODUCTION:
#he circuit presented here stores the tripping seuence in
a system with up to four units$blocks. It uses an additional
relay contact point in each unit that closes whenever
tripping of the corresponding unit occurs. %uch contact
points can be identi"ed easily, especially in systems using
programmable logic controllers (&L's).
#his circuit records tripping of up to four units and displays
the order in which they tripped. ( clock circuit, however fast,
cannot be employed in this circuit because the clock period
itself will be a limiting factor for sensing the incidence of
fault. Besides, it may also mask a number of events that
might have occurred during the period when the clock was
low. )ence the events it selves are used as clock signals in
this circuit.
BLOCK DIAGRAM:
*igure shows that the block diagram of the tripping
seuence recorder+cum+indicator.the inputs derived from
au!iliary relay contacts(,$-) of subunits or push+to+on
switches are latched by .% /ip+/ops when the corresponding
subunits trip, causing the following four actions.
0. #he latch outputs are -.ed to activate audio alarm.
1. #he latch outputs are di2erentiated individually and then
-.ed to provide clock pulses to the counter to increment the
output of the counter that is initially preset at 0(decimal).
3.each individual latch output activates the associated
latch$decoder$driver and 4+segment display the number held
at the output of the counter, which indicates the total
number of trips that have taken place since the last
presetting.
5. L67s associated with each of the latch, decoder, and
driver sets remain lit to indicate the readiness of the sets to
receive the tripping input. L67s associated with the tripped
unit go o2.
Circuit description:
I'0 (cd5853)9 are uad ,-. .% /ip+/ops, ,-. means whenever
inputs are low the output is high and for high inputs, output is low.
:uad ,-. .% /ip+/ops, /ip+/ops are used for memory storing
devices. #hat is, they have present input as well as past outputs.
#hese are used to capture and store the information pertaining to
the tripping of individual units.
I'1 ('75;08)9 #his is a B'7 (binary coded decimal) up$down
counter, which is used count for every clock pulse.
I'3+I'< ('7 5;00)9 this is a B'7+to+4+segment latch
$driver$decoder. =hich converts binary coded decimal seuence
to 4+segment display (it displays for every increasing counter).
I'0 ('75853) is a uad ,-. .% /ip+/ops, these are used to
capture and store the information pertaining to the tripping of
individual units. .eset pins of all /ip+/ops and sub+parallel enable
(&6) pin0 of B'7 up$down+counter '75;08 (I'1) are returned to
ground via 08+kilo+ohm resistor .>, while set pins of all .% /ip+
/ops are returned to ground via individual 08+kilo+ohm resistors
.08
%chematic diagram of tripping seuence recorder+cum+
indicator
Initially ,all the four : outputs of I'0 are at logic 8.the au!iliary
relay contacts of the sub units, which are depicted here by push+
to+on switches %0 through %5,connect the set terminal of the
corresponding stage of .% /ip+/op to ?01@ whenever tripping of a
speci"c subunit occurred. #his makes the output of the associated
/ip+/op go high. #hus whenever a seuence of tripping of
subunits occurs, the corresponding outputs (0:+5:) go high in the
order of the tripping of the associated subunits.
(ll the 5 outputs are connected to the corresponding latch A
enable inputs of B'7 latch+cum+decoder+driver I's
('75;00).these : outputs are also -.ed using diodes 70+75 to
activate an audible alarm and also routed to a set of di2erentiator
networks (comprising capacitors '0 through 'B and resistors .1
through .;).
( di2erentiator provides a sharp pulse corresponding to the
tripping of a subunit. (ll such di2erentiated pulses are -.ed via
diodes 7; through 7B and coupled to the counter stage formed
by I'1 ('75;08, a synchronous up$down+counter with preset)
after ampli"cation and pulse shaping by transistor ampli"er
stages built around transistors #1 and #3. #hese pulses serve as
clock to count the number of trappings that occurred after a reset.
'ircuit component 9+
.esistors
(.0+.4,.>+.0;,.04+.0>,.18,.10,.13,.15)+
08C-)D(18)
(.1<+;3)+548ohm(13)
(.B,.0<,.0>,.11,.1;) A0Cohm
'apacitors
c0+++c5E8.80uf(5)
%6DI'-,7F'#-.
7iodes(70+7B) ++I,5884(B)
I'0+'75853B6(0)
I'1+I';+'75;08(0)
I'<E'75;08(0)
#.(,%I%#-.%
#0+04+B';54(4)
#B+#00EB';;4(5)
7I%0+7I%5EL#;53.(5)
DI%'6LL(,6-F%
%=I#')6%(%0E%;)&F%) #- -, %=I#')(;)
L67%E(5)
BFGG6.
Operation:
Let us assume that 3 units, say, 6,),(("fth,eigth,and
"rst),tripped in order following a fault.
=hen the system is reset(before any tripping),the outputs of all
.% /ip+/ops(0:+5:) are low. #his L6 active low makes latches I'3
through I'< transparent and as the counter is preset to 0(since
&0input is high while &1,&3,&5 are low) with the help of switch
%;,all the latches hold that H0and their decodedb,csegment
outputs go high.
)owever, the common cathode drive is absent in all the 4+
segment displays because driver transistors #5+#4 are cut o2 due
to the low outputs of all .% /ip+/ops and hence the displays are
blank. (t the same time, the low outputs of all .% /ip+/ops (0:+
5:) forward bias &n& transistors #B+#00 associated with L670+
L675 of each of the displays. (s a result, all these L67s glow,
indicating no tripping.
,ow when unit ( trips, output 0: of .% /ip+/op I'0 goes high to
provide the base drive to common+cathode drive transistor #5.
#his, intern, activates7I%; to display0indicating that unit (
tripped "rst. #he corresponding L670 goes o2 as transistor #00 is
cut o2.(lso, latch I'0 is disabled due to logic 0 on its pin; and
therefore it does not respond it further changes in its B'7 data
input. %imultaneously, the buIIer goes on to sound an audible
alarm, indicating the emergency situation at the plant.
#he di2erentiator formed by '0 and .1 responds to the low+to+
high transition of 0: and generates a short pulse. #his pulse
passes through diode 7; and #1J#3Kreaches clock pin of counter
I'1.the counter counts upJits output becomes 8808, same as )
counter counts up and output became 8800
In prototype,L67s 704 through 715 were "!ed below the
corresponding 4+segment displays pertaining to subunits (
through ) to provide a visual indication that these units are ready
to respond to a tripping.
APPLICATIONS:
#his circuit can also be used in uiI games to decide the order in
which the teams responded to a common uestion.
RESULT: +whenever an event is tripped the corresponding switch
or relay contact is -,, the corresponding L67 is -**, other L67s
are -, and the corresponding display is -, to show which unit is
tripped. If no. of events tripped increases the corresponding
L67s shows the numbers then the alarm is -,.
CONCLUSION: In order to determine the seuence of events that
have occurred in any power stations and continuous process
control plants, in order to e!actly trace out cause of failure and
revive the system with minimal loss of time.