5 views

Uploaded by thangam8891

digital lab

You are on page 1of 3

b. Convert binary code to gray code

2. a. Verify the Demorgans laws using logic gates

b. Convert EXCESS- 3 code to BCD code

3. a. Convert gray code to binary code

b. Verify the associative property using logic gates

4. a. Convert BCD code to EXCESS- 3 code

b. Verify the distributive property using logic gates

5. a. Design a 3 -bit subtractor using logic gates

b. Design a device capable of shifting information, taking multiple input and

single output.

6. a. Design a 3 -bit adder using logic gates

b. Design a device capable of shifting information, taking multiple input and

multiple output

7. a. Design a 2- bit subtractor using logic gates

b. Design a device capable of shifting information, taking single input and

multiple outputs.

8. a. Design a 3 -bit adder using logic gates

b. Design a device capable of shifting information in a serial fashion

9. a. Design a 8-bit parity checker using digital logic gates

b. Design a circuit to produce many o/p from one i/p (a data distributor)

10. a. Design a 8-bit parity generator using IC74180

b. Design a circuit to produce one o/p from many i/p lines

11. a. Design a 2- bit adder

b. Design a combinational circuit to compare two 4-bit numbers using logic

IC7485

12. a. Design a 4-bit ripple counter

b. Design a circuit to produce one o/p from many i/p lines

13. a. Design a MOD-12 ripple counter

b. Design a data distributor

14. Design a MOD- 10 ripple counter

b. Design a data distributor

15. a. Verify consensus theorem using logic gates.

b. Design a device capable of shifting information in a serial fashion

16. a. Design a device capable of shifting information, taking multiple input and

multiple output

b. Design a data selector

b. Convert binary code to gray code

producing

producing

producing

gates and

producing

b. Convert EXCESS- 3 code to BCD code

b. Verify the associative property using logic gates

b. Verify the distributive property using logic gates

b. Design a device capable of shifting information, taking multiple input and producing

single output.

b. Design a device capable of shifting information, taking multiple input and producing

multiple output

b. Design a device capable of shifting information, taking single input and producing

multiple outputs.

b. Design a device capable of shifting information in a serial fashion

b. Design a circuit to produce many o/p from one i/p

b. Design a circuit to produce one o/p from many i/p lines

b. Design a combinational circuit to compare two 4-bit numbers using logic gates

b. Design a circuit to produce one o/p from many i/p lines

b. Design a data distributor

b. Design a combinational circuit to compare two 4-bit numbers using IC7485

b. Convert binary code to gray code

16. a. Verify the Demorgans laws using logic gates

b. Convert EXCESS- 3 code to BCD code

b. Verify the associative property using logic gates

b. Verify the distributive property using logic gates

19. a. Verify consensus theorem using logic gates.

b. Design a device capable of shifting information in a serial fashion

20. a. Design a device capable of shifting information, taking multiple input and producing

multiple output

b. Design a data selector

21. . Verify the commutative property using logic gates

b. Convert binary code to gray code

22. a. Verify the Demorgans laws using logic gates

b. Convert EXCESS- 3 code to BCD code

b. Verify the associative property using logic gates

b. Verify the distributive property using logic gates

b. Design a device capable of shifting information, taking multiple input and producing

single output.

- Frequency CounterUploaded byablaska
- EncoderUploaded byHue Bach
- Vhdl ExampleUploaded byRabab M Aly
- Digital Clock Written ReportUploaded bymultisporky
- Digital Design ExamplesUploaded byArjun Reddy Reddy
- Assignment3MCUploaded byhardip1
- Data Sheet-IC 4017-NXP Philips.pdfUploaded byGirish Oniyil
- 01c. Timer.pptUploaded bydoddysuryo
- Hardware Slides 11Uploaded byTaqi Shah
- Chapter 1Uploaded bynill
- The 555 Timer Circuit IIUploaded byDeshitha Chamikara Wickramrathna
- Project 1Uploaded bySanika Arora
- chap08Uploaded byAaissa Aaiss
- AdcUploaded byMinhaz Alam
- counter.pdfUploaded byCharles Robiansyah
- Pico PrimerUploaded byMilivoje_Ranci_8384
- CountersUploaded bynatasha jha
- 07490674Uploaded byAnju Bala
- CONTENT DigitalUploaded byHari Kurniawan
- Experiment 1Uploaded byHimanshu Gupta
- Chapter02_StorageComponents - Part1.pdfUploaded byTrần Thảo Nguyên
- Mini Project DocUploaded byKoundinya Chunduru
- 17 - State Machine DesignUploaded byForu Raju
- TimersUploaded bypraveen_kodgirwar
- 03b4f77ba31beaefe950dd7533b351ce_c7bf76a8650534125628e737c59c01a9Uploaded bycdabanes
- The Hardware Implementation Was Based on the Generation of Blocks That Perform Simple OperationsUploaded byShashank Mitta
- C12Uploaded byAndreea Ștefura
- UDPUploaded bySreeSirivella
- DIC SyllabusUploaded bySneha Nargundkar
- 128 PouerPCUploaded byYermakov Vadim Ivanovich

- DIP.pdfUploaded bySelva Raj M
- Cceleglove ApplicationsUploaded bythangam8891
- Robatic Arm Paper DocumentsUploaded bythangam8891
- Lab Manual Question for Digital LabUploaded bythangam8891
- Formations 002838 AUploaded bythangam8891
- High Speed Networks Two Marks Questions and Answers 2MARKS-Libre (1)Uploaded bythangam8891
- LIC model qpUploaded byreshmikareddy
- Orcad PSpice NotesUploaded by69bus
- Passport Apply in TamilUploaded bythangam8891
- Ex 2 ModifiedUploaded bythangam8891
- Introduction to Tanner ToolUploaded byshantanudeka
- MSW A4 FormatUploaded byricardus25
- matlabUploaded bythangam8891
- Nab 2012 Press Faq FinalUploaded bythangam8891
- DSP BasicprogramsUploaded bythangam8891
- Freq Mod n DemodUploaded bySumathy Subramanian
- Data RateUploaded bythangam8891
- EC_2403_RF and Microwave_Engineering.pdfUploaded bythangam8891
- EE213 VLSI IntroductionUploaded byAman Singla

- vhdlUploaded bySalil Saxena
- ICT1001+-+Lab+2++3+-+Combinatorial++Sequential+CircuitsUploaded byI.A. Tuhin
- Experiment-10 (Adder & Subtractor)Uploaded byM Balaji
- EE2255-QBDEUploaded bysunvenkat
- Reversible Computing Performance AnalysisUploaded byDeepak Karuppusamy
- Problems Apliccation Logic DigitalUploaded byMarlon Hurtado
- 8bitRISC-rahmanUploaded byUmair Gujjar
- Sub TractorsUploaded byranger
- Chapter 2Uploaded byapi-3701035
- Digital QsUploaded byDinesh Reddy
- Kogge–Stone adderUploaded byVijay Dhar Maurya
- Lec 13 Multiplexer Demux XORUploaded byPiyooshTripathi
- EE221-Lecture-29-30.pptUploaded bysayed Tamir jan
- Combinational Logic Circuits_PPTUploaded byAllanki Sanyasi Rao
- Digital Electronics LabUploaded byJuno Hera Magallanes Huyan
- 47240550 VHDL ProgramsUploaded byRelu Socoteanu
- LMECE420 lab manualUploaded by7sem
- DLC 2 MARKSUploaded bysramkm
- Area Delay Power Efficient Carry Select AdderUploaded byAzeem Top
- Ch4 Combinational CircuitsUploaded bybiswarupmca
- Tutorial on Logic Synthesis for Lookup-Table Based FPGAsUploaded bymaamir1234
- Arithmetic Building BlocksUploaded byVenkateshwarlu Pillala
- SN74LS83DUploaded byCarl Ox
- תכן לוגי מתקדם- הרצאה 7 | Functional DecompositionUploaded byRon
- lec9.pdfUploaded byMustafa Rashik Hasnain
- 13A04303(SS) Switching Theory and Logic DesignUploaded bysubbu
- Design of Half Full Adder, Half Full Subtractor and Parallel AddersubtractorUploaded byMani Bharathi
- 03 Nand Nor ConversionsUploaded byGuru Prasad Iyer
- DPSD (2)Uploaded byDhilip Prabakaran
- CMOS_DataBookUploaded byFredy Balmore Bonilla