---------------------------------------------------------------| | | | | National Semiconductor | | | | 33333 22222 000 33333 22222 | | 3 3 2 2 0 0 3 3 2 2 | | 3 2 0 0 0 3 2 | | 33333 222 0 0 0 33333 222 | | 3 2 0 0 0 3 2 | | 3 3 2 0 0 3 3 2 | | 33333

2222222 000 33333 2222222 | | | | NS32032 MICROPROCESSOR Instruction Set Summary | | | | | | | | | | | | | | | | G | | ~ ~ ~ N A | | S S S I N I D D V D D D D D D D D | | T T T L M N B 3 c 3 2 2 2 2 2 2 2 | | 2 1 0 O I T 2 1 c 0 9 8 7 6 5 4 3 | | | | ^ ^ ^ ^ | | | ^ | ^ ^ ^ ^ ^ ^ ^ ^ | | | | | | | | | | | | | | | | | | | | | | | | | v v | v | v v v v v v v v | | ------------------------------------| | |10 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 26| | | Reserved ---|9 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 27|<-> AD22 | | ST3 <--|8 28|<-> AD21 | | ~PFS <--|7 29|<-> AD20 | | ~DDIN <--|6 30|<-> AD19 | | Reserved ---|5 31|<-> AD18 | | Reserved ---|4 32|<-> AD17 | | PHI1 -->|3 33|<-> AD16 | | PHI2 -->|2 34|<-> AD15 | | ~ADS <--|1 NS32032 35|<-> AD14 | | U/~S <--|68 36|<-> AD13 | | Reserved ---|67 37|<-> AD12 | | Reserved ---|66 38|<-> AD11 | | ~AT/~SPC <->|65 39|<-> AD10 | | ~DS/~FLT <->|64 40|<-> AD9 | |~RST/~ABT -->|63 41|<-> AD8 | | Reserved ---|62 42|<-> AD7 | | Reserved ---|61 5 5 5 5 5 5 5 5 5 5 4 4 4 4 4 43|<-> AD6 | | (connect to |60 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 44| | | Vcc via 4K7 ------------------------------------| | resistor) | | | | | | ^ ^ | | | ^ ^ ^ ^ ^ ^ | | | | | | | | | | | | | | | | | | | | | | v v v v v | | | | | v v v v v v | | | | R ~ ~ ~ ~ ~ ~ R G G B A A A A A A | | e B B B B H H D N N B D D D D D D | | s E E E E L O Y D D G 0 1 2 3 4 5 |

| e 0 1 2 3 D L B L | | r A D 1 | | v | | e | | d | | | | | | | | | |Written by Jonathan Bowen | | Programming Research Group | | Oxford University Computing Laboratory | | 8-11 Keble Road | | Oxford OX1 3QD | | England | | | | Tel +44-865-273840 | | | |Created April 1985 | |Updated May 1985 | |Issue 1.0 Copyright (C) J.P.Bowen 1985| ------------------------------------------------------------------------------------------------------------------------------|Mnemonic |Description | |---------------+----------------------------------------------| |ABSi g,g |Take Absolute value | |ABSf g,g |Take Absolute floating point value | |ACBi s,g,d |Add 4-bit Constant and Branch if non-zero | |ADDi g,g |Add | |ADDf g,g |Add floating point values | |ADDCi g,g |Add with Carry | |ADDPi g,g |Add Packed (BCD) | |ADDQi s,g |Add Quick a 4-bit constant | |ADDR g,g |Move effective Address | |ADJSPi g |Adjust Stack Pointer | |ANDi g,g |Logical AND | |ASHi g,g |Arithmetic Shift, left or right | |Bcc d |Branch on condition (cc) | |BICi g,g |Bit Clear | |BICPSRi g |Bit Clear Processor Status Register (i=W/D #)| |BISPSRi g |Bit Set Processor Status Register (i=W/D #)| |BPT |Breakpoint Trap | |BR d |Branch (PC relative) | |BSR d |Branch to Subroutine | |CASEi g |Case (multiway branch) | |CATSTn g |Custom Address Test (n=0-1) (#)| |CBITi g,g |Test and Clear Bit | |CBITIi g,g |Test and Clear Bit Interlocked | |CCALnc g,g |Custom Calculate (n=0-3) | |CCMPc g,g |Custom Compare | |CCVnci g,g |Custom Convert custom value to integer (n=0-2)| |CCV3ic g,g |Custom Convert integer to custom value | |CCV4DQ g,g |Custom Convert double to quad value | |CCV5QD g,g |Custom Convert quad to double value | |CHECKi r,g,g |Check index bounds | |CMPi g,g |Compare | |CMPf g,g |Compare floating point values | |CMPMi g,g,d |Compare Multiple: displacement bytes |

|CMPQi s,g |Compare Quick with a 4-bit constant | |CMPSi ol |Compare Strings | |CMPSTi ol |Compare Strings, Translating bytes | |COMi g,g |Complement all bits | |CMOVnc g,g |Custom Move (n=0-2) | |CVTP r,g,g |Convert to bit field Pointer | |CXP d |Call External Procedure | |CXPD g |Call External Procedure using Descriptor | |DEIi g,g |Divide Extended Integer | |DIA |Diagnose (hardware breakpoint) | |DIVi g,g |Divide, rounding down | |DIVf g,g |Divide floating point values | |ENTER (rl),d |Enter procedure (save registers) | |EXIT (rl) |Exit procedure (restore registers) | |EXTi r,g,g,d|Extract bit field (array orientated) | |EXTSi g,g,m,m|Extract Short bit field | |FLAG |Flag trap | |FLOORfi g,g |Convert f.p. to largest integer <= value | |FFSi g,g |Find First Set bit | |IBITi g,g |Test and Invert Bit | |INDEXi r,g,g |Recursive Indexing step for N-D arrays | |INSi r,g,g,d|Insert bit field (array orientated) | |INSSi g,g,m,m|Insert Short bit field | |JSR g |Jump to Subroutine | |JUMP g |Jump | |LCR cr,g |Load Custom Register (#)| |LCSR g |Load Custom Status Register | |LFSR g |Load Floating point Status Register | |LMR mr,g |Load Memory management Register (#)| |LPRi ar,g |Load dedicated Register (a=PSR/INTBASE #)| |LSHi g,g |Logical Shift, left or right | |MEIi g,g |Multiply to Extended Integer | |MODi g,g |Modulus (remainder from QUO) | |MOVi g,g |Move a value | |MOVif g,g |Move an integer to a floating point value | |MOVf g,g |Move a floating point value | |MOVFL g,g |Move and lengthen a floating point value | |MOVLF g,g |Move and shorten a Long floating point value | |MOVMi g,g,d |Move Multiple: displacement bytes | |MOVQi s,g |Move Quick and extend a 4-bit constant | |MOVSi ol |Move String | |MOVSTi ol |Move String, Translating bytes | |MOVSUi g,g |Move value from Supervisor to User space (#)| ------------------------------------------------------------------------------------------------------------------------------|Mnemonic |Description | |---------------+----------------------------------------------| |MOVUSi g,g |Move value from User to Supervisor space (#)| |MOVXiD g,g |Move with sign Extension to Double word | |MOVXBW g,g |Move with sign Extension Byte to Word | |MOVZiD g,g |Move with Zero extension to Double word | |MOVZBW g,g |Move with Zero extension Byte to Word | |MULi g,g |Multiply | |MULf g,g |Multiply floating point values | |NEGi g,g |Negate (2's complement) | |NEGf g,g |Negate floating point value | |NOP |No Operation | |NOTi g,g |Logical NOT (LSB only) |

|ORi g,g |Logical OR | |QUOi g,g |Quotient (divide, rounding towards zero) | |RDVAL g |Validate address for Reading (#)| |REMi g,g |Remainder from QUO | |RESTORE (rl) |Restore general purpose registers | |RET d |Return from subroutine | |RETI |Return from Interrupt (#)| |RETT d |Return from Trap (#)| |ROTi g,g |Rotate, left or right | |ROUNDfi g,g |Round a floating point value to an integer | |RXP d |Return from External Procedure call | |Scci g |Save condition code (cc) as a Boolean value | |SAVE (rl) |Save general purpose registers | |SBITi g,g |Test and Set Bit | |SBITIi g,g |Test and Set Bit Interlocked | |SCR cr,g |Store Custom Register (#)| |SCSR g |Store Custom Status Register | |SETCFG (o) |Set Configuration register (#)| |SFSR g |Store Floating point Status Register | |SKPSi ol |Skip over String | |SKPSTi ol |Skip over String, Translating bytes | |SMR mr,g |Store Memory management Register (#)| |SPRi ar,g |Store dedicated Register (a=PSR/INTBASE #)| |SUBi g,g |Subtract | |SUBf g,g |Subtract floating point values | |SUBCi g,g |Subtract with Carry (borrow) | |SUBPi g,g |Subtract Packed (BCD) | |SVC |Supervisor Call | |TBITi g,g |Test Bit | |TRUNCfi g,g |Truncate toward zero floating point to integer| |WAIT |Wait for interrupt | |WRVAL g |Validate address for Writing (#)| |XORi g,g |Logical Exclusive OR | |---------------+----------------------------------------------| | CFG |Configuration register (4-bit) | | EXTERNAL |External link table entry | | FP |Frame Pointer register (32-bit, top 8 zero) | | INTBASE |Interrupt Base register (32-bit, top 8 zero) | | MOD |Module register (16-bit) | | PC |Program Counter (32-bit, top 8 zero) | | PSR |Processor Status Register (16-bit) | | Rn or Fn |General purpose Registers (32-bit, n=0-7) | | SB |Static Base register (32-bit, top 8 zero) | | SP0 (SP) |Supervisor Stack Pointer (32-bit, top 8 zero) | | SP1 (SP) |User Stack Pointer (32-bit, top 8 zero) | | TOS |Top Of current Stack | | US |User Status (8-bit, bottom byte of PSR) | |---------------+----------------------------------------------| | ar |Dedicated reg. (SP/SB/FP/MOD/INTBASE/PSR/US) | | c |Custom length (D/Q=double/quad word) | | cc |(EQ/NE/CS/CC/HI/LS/GT/LE/FS/FC/LO/HS/LT/GE) | | cr |Custom slave processor register | | d |Displacement constant (8/16/32-bit) | | f |Floating point length (F/L=standard/long) | | g |General operand | | i |Integer length (B/W/D=byte/word/double word) | | m |Implied immediate constant (8-bit) | | mr |Memory management status/control register |

| n |Digit | | o |Options (B/U/W=backward/until/while) | | ol |Option list (C/M/F/I=custom/MMU/FPU/interrupt)| | r |General purpose register (R0-R7/F0-F7) | | rl |General purpose register list | | s |Short signed 4-bit value | | # |Privileged instruction | ----------------------------------------------------------------