You are on page 1of 2

Presidency University, Bangladesh

Course Outline

Course Title: VLSI-I


Course Code: EE 309, Section I
Semester:
Fall 14
Credit hours: 3.0
Instructor:
Muhammad Asaduzzaman
#01675219957 [ You are requested to text first, I will call you back]
Email: asaduzzamanm@mail.presidency.edu.bd
Room:6008
Time Schedules: Monday, Wednesday (03:00 pm- 04:30 pm)
Text Book

Basic VLSI Design by Pucknell and Eshraghian (P &E)


CMOS VLSI Design: A Circuits and System Perspective by Weste Harris & Banerjee (WH&E)

References

Fundamentals of Digital Logics by Brown & Vranesic (B&V)


Design of VLSI Design by Linda E. M. Brackenbury (L)

Homework

Three homeworks will be given. Solution of the homeworks will be discussed in the class. No late
submission is allowed.

Class Test

There will be total three (3) quizzes (10 to 15 minutes long each) in class. The best two (2) will be
taken.

Exams

Mid-terms and final exams will be closed book, closed notes. The materials for final exam will be
informed in due time. There will be no grade exemptions from the final. Final examination is not
comprehensive.

Test Policy

If you are absent from a test, and you have not spoken to me personally beforehand, your
grade for the test will be zero.

Attendance
Policy

Full Marks=5, Attendance less than 60% will get a zero for attendence

Grading

The course grade will be determined from a weighted average of the quizzes, homework
assignments, mid-term exams and the final. The weights are as follows:
Attendance & Class Participation
Homework
Quiz
Mid-term Exam
Final Exam
Project & Presentation

5%
10%
10%
20-25 %
35 %
15-20%

Course Grade
UGC Grading policy will be followed
Objectives:

to obtain overview of MOS technology


to familiarize students with CMOS fabrication
to get students acquainted with VLSI design process
to make students aware of delay consideration, cost calculation, floor-planning and gate-level designing
to make them introduced with lambda based design, stick diagram drawing, simulation of subsystem

Course Outcome:

Students will be able to understand conventional and non-conventional MOS technology


Students would be able to design sub-circuits at the gate level
Students will be able to calculate delay for a particular circuit
They should be able to consider how the system can be made faster, how the delays can be minimized
They will possess the knowledge of implementing CMOS design projects

Weekly Course Plan is given below:


Week

Topic

1
2

MOS transistor basics: Physical structure


CMOS logic
Dynamic operation of logic gates, Power dissipation, Different practical situation
consideration
MOS devices and basic circuits
C-V characteristics of MOS, Pass transistor DC characteristics, Switch level RCdelay model
Quiz-1
Delay Estimation, Transistor scaling
Mid Term Exam+ Submission deadline for assignment 1
Subsystem Design Processes: Example with a 4 bit shifter
Design Process of Computational element: Different types of adder
Quiz-2+Submission deadline for assignment 2
Memory, registers and aspects of system timing: Dynamic and Static Memory Cell
Memory, registers and aspects of system timing: Forming arrays of memory cells
CMOS fabrication and layout, lambda based design Rules
Quiz-3+ Submission deadline for assignment 3
Counters, Coding, Shifters, Multiplicator
Testing, Verification
Coding, Simulation
Project Presentation

3
4

5
6
7
8
9
10
11
12
13

Reference
B&V-3.8.5-3.9

L-C2
W, H & B- 2.3,
2.5,2.6
W, H & B- C4
P& E-C7
P& E-C8
P& E-C9
P& E-C9

W, H & B-C8
W, H & B-C12

Honor code
I expect to be honest with me. Please do not copy assignments. Any prove of copying will
result in a zero in that assignment. Any kind of cheating during quizzes, mid-terms and final exam would
be taken care of strictly. Proof of copying in the exams will lead straight F in the course.