You are on page 1of 8



Characterization of the Static Thermal Coupling

Between Emitter Fingers of Bipolar Transistors
Steffen Lehmann, Yves Zimmermann, Andreas Pawlak, and Michael Schrter, Senior Member, IEEE
Abstract A strategy for compact modeling the static thermal
coupling between the emitter fingers of SiGe heterojunction
bipolar transistors (SiGe-HBTs) is described. An extraction
methodology that includes the nonlinear temperature dependence
of the thermal conductivity is introduced and applied to suitable
test structures. The experimental results are used for calibrating
a 3-D numerical solution of the equation for heat conduction
based on a Greens function approach. The latter can then be
employed for generating thermal coupling networks for arbitrary
transistor configurations.
Index Terms Self-heating, SiGe-HBT modeling, temperaturedependent thermal conductivity, thermal coupling.


S a means of delivering high power within integrated

circuits using a given bipolar transistor technology,
typically a large emitter window area is required. This can
be achieved by increasing the emitter width or length at the
expense of a decreased power-handling capability per unit
area because of self-heating [1]. Because for a width increase
the transistor performance typically degrades, often multiple
emitters or transistors with small emitter width in parallel are
used. Although the temperatures and performance degradation using such devices are reduced compared with a single transistor solution, thermal interaction still exist between
the emitter fingers. This thermal interaction can be further
reduced by emitter ballasting resistors, limiting the emitter
length [2], or increasing the finger distance. Unfortunately,
all of these options also degrade the electrical device performance. Therefore, a compromise between the emitter geometry and acceptable thermal interaction of the emitter fingers
has to be found. Such an optimization requires a method to
predict the temperature distribution within multi-emitter finger
transistors, in particular also for varying emitter geometry.
Time consuming and computationally expensive numerical

Manuscript received April 28, 2014; accepted September 19, 2014.

Date of current version October 20, 2014. This work was supported in
part by the Cluster for Application and Technology Research in Europe
on NanoElectronics, Bundesministerium fr Bildung und Forschung, through
the RF2THz Project, and in part by the European Union within the FP7
Programme through the DOTSEVEN Project. The review of this paper was
arranged by Editor G. Niu.
S. Lehmann, Y. Zimmermann, and A. Pawlak are with the Chair
for Electron Devices and Integrated Circuits, Technische Universitt
Dresden, Dresden 01069, Germany (e-mail:;;
M. Schrter is with the Chair for Electron Devices and Integrated
Circuits, Technische Universitt Dresden, Dresden 01069, Germany, and
also with the Department of Electronics and Communication Engineering,
University of California at San Diego, La Jolla, CA 92093 USA (e-mail:
Color versions of one or more of the figures in this paper are available
online at
Digital Object Identifier 10.1109/TED.2014.2359994

simulations can easily show deviations of up to 20% compared

with measurements [3], [4] even if a lot of layout details
are considered and reasonable thermal conductivity values are
used. For practical purposes, the large number of unknowns
being required for numerical simulations rather suggests a
simplification of the simulation approach but with a calibration
toward experimental results for the given process technology.
In this sense, a methodology based on measurements and an
empirical polynomial fit for the finger spacing dependence of
the coupling has been presented in [5]. The latter methodology
relies on additional thermal imaging equipment to determine
the coupling and its accuracy is limited by the resolution of
thermal imaging. Although in [6] and [7] thermal coupling
coefficients have been determined based on purely electrical
data, an adjustable scaling approach to characterize different
than measured structures is not being presented. To overcome
these issues, here a methodology based on a simple test
structure, electrical dc measurements only, and a calibrated
fast solution of the heat transport equation is proposed. This
approach allows for generating thermal networks for various
emitter geometries and is applied to SiGe-HBTs of a standard
BiCMOS-technology [8] that is suitable for state-of-the-art
circuit design [9], [10].
In [11] and [12], static thermal coupling was already studied, whereas [13] describes the basic approach for compact
modeling also applied in this paper. An alternative approach
using a resistive network is presented in [14], whereas in [15],
only a single equivalent thermal resistance is determined,
which shows a small-signal solution for an SOI technology.
Most aforementioned approaches rely on externally accessible
thermal nodes in the electrical device model for realizing a
thermal subcircuit. The circuit topology accounting for static
self-heating and thermal coupling employed in this paper is
shown in Fig. 1 for a transistor with two emitter fingers.
For multiple emitter finger configurations or emitter finger
segmentation [2], [13], the subcircuit shown in Fig. 1 can
easily be extended by additional voltage-controlled voltage
sources. As indicated, the total temperature rise of one finger
comprises a contribution from its own self-heating together
with the attenuated temperature increase due to the coupled
self-heating of the adjacent finger represented by a respective
voltage-controlled voltage source. The combined temperature
increase over ambient at each emitter finger can then be
written as
T1 = rth1 (TE1 )Pdis1 + c12rth2 (TE2 )Pdis2


T2 = c21rth1 (TE1 )Pdis1 + rth2 (TE2 )Pdis2


0018-9383 2014 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See for more information.



Fig. 1. Thermal subcircuit for a two-finger transistor. At the temperature

nodes Tn1 and Tn2 , the temperature increases T1 and T2 over Tamb can
be obtained.

where Pdis is the power dissipation, and rth is the thermal

resistance for the corresponding emitter finger. The indices for
the coupling factors cSH indicate the heating emitter finger H
and affected sensing emitter finger S. The total temperature
for emitter finger N
TEN = Tamb + TN


is defined by the ambient temperature Tamb and temperature

increase TN . In contrast to [13], (1) is implicit with respect
to T since the thermal resistances dependence on the
temperature needs to be considered for advanced HBTs as will
be presented subsequently. Consideration of the temperature
dependence of the thermal resistance for the emitter finger N
(see [16]) with respect to a nominal temperature Tnom can be
achieved by implementation of

TEN rth
rthN = rth0N
within the subcircuit, e.g., as Verilog-A model.
The generation of the thermal subcircuit path for, e.g.,
the single emitter finger 1 requires the determination of the
parameter values for the thermal resistance rth1 , the technology
specific temperature exponent rth valid for all rth and of the
coupling factors c1N for all contributing emitter fingers N.
The extraction of the thermal resistance is based on the
idea of simultaneous extraction of parasitic emitter and thermal
resistances [17] and has been adapted in [18] and applied here
together with HICUM [19]. Test results for extracted rth values
from compact model simulations of different transistor sizes
yield a range of confidence of 2% for values averaged over
the collector current range used for the extraction. In contrast
to the recommended bias range in [18], in the range considered
for the extraction test a lower extraction accuracy is achieved
for the emitter resistance (<11%) and particularly its weak
temperature dependence.
To extract coupling factors, test structures with two or more
emitter fingers are required. If the emitter fingers allow for
separate biasing, one emitter finger H can be operated at high
power dissipation Pdis,H and self-heating, whereas another
finger S will be operated at low power dissipation Pdis,S for
sensing the impact of thermal coupling. Knowing the thermal
resistances rth,H and rth,S for each of the emitter fingers,
the corresponding self-heating at the fingers can be derived.

Fig. 2. (a) Cross section of five-finger test structure with equal distance
between adjacent emitter fingers and symmetrically connected emitter fingers.
One common base and one common collector contact is used. (b) Complete
thermal subcircuit of the five-finger structure.

At the sensing emitter finger, a temperature sensitive parameter (TSP) of its electrical characteristics is used to determine
the total temperature increase TS at this location. This allows
calculating the coupling factor of finger H toward finger S
cSH =

TS rth,S (TE,S )Pdis,S

rth,H (TE,H )Pdis,H


Note, that neither the temperature dependence of the thermal resistances nor the self-heating at the sensing finger is
neglected. This method is designated in the following as heatsense method. In contrast to the linearized VBE sensitivity
used in [6] and [7], this paper employs the emitter current
as TSP. For calibration purposes, the temperature dependence
of the emitter current in forward-gummel biasing has to be
determined and modeled. For the low to medium current range,
a simplified transfer current formulation

IE = IES exp
and a well-known temperature dependence formulation for the
saturation current IES derived from the temperature dependence of the intrinsic carrier density and mobility

are applied. The temperature TE is here the finger temperature
(3) and is considered for the calculation of the thermal
voltage VT and saturation current IES . The saturation current
at nominal temperature IES0 , nonideality factor m, temperature
coefficient , and bandgap voltage VGB are extracted for each
relevant emitter finger or finger combination (in case of shorted
emitter fingers).
A suitable test structure with five emitter fingers is shown
in Fig. 2(a). Each finger is laid out in CBEBC configuration although one common base and one common collector



contact pad is used for all fingers. The emitters can be connected separately or, as indicated in the figure, symmetrically
(comparable with [14]). While the latter option saves the space
for two emitter pads on the wafer, it also may be useful if low
thermal coupling is expected, since the according temperature
increase at least can be doubled and allows a more sensitive
determination of coupling factors. In contrast, not all coupling
factors, e.g., c15 , of the thermal subcircuit in Fig. 2(b) can
be extracted for the symmetrically connected test structure
using the heat-sense method. Therefore, an extraction approach
designated as rth -ratio method in the following is applied and
the heat-sense method is slightly adapted, too. The following
assumptions are made for the extraction due to the absence of
any deep trench isolation (DTI).
1) All fingers have the same thermal resistance (which has
been verified in [20])
rth1 (TE ) = rth2 (TE ) = = rth (TE ).


2) The emitter resistance rE has the same value for each

single emitter finger and its temperature dependence
is considered. The same is assumed for the collector
resistance rCx since for each emitter finger, a similar
symmetrical double contact configuration for the collector is realized.
3) For symmetrically connected emitter fingers, the power
dissipation for the emitter fingers 1 and 5 is the same
Pdis,1 = Pdis,5 =




VCEa (rE + rCx )
IE,Ea .


4) Similarly, the power dissipations for the emitter fingers

2 and 4 are the same
Pdis,2 = Pdis,4 =

IE,Eb .
Pdis,Eb VCEb (rE + rCx )
The thermal resistance rth3 for the third (single) finger is
determined first, followed by the equivalent thermal resistance
rth,Ea for the combined fingers 1 and 5, which is defined by



Considering the symmetry of the transistor structure, the

temperature increases at emitter fingers 1 and 5 must be
identical reading
TEa = rth (TE1 )Pdis,1 + c15rth (TE5 )Pdis,5
= rth (TE1 )Pdis,5 + c51rth (TE5 )Pdis,1 .


Following the assumption made with respect to the equality of

the fingers thermal resistances, (9) and (14) can be inserted
into (13), and rearranging toward the coupling factors yields
c15 = c51 =



Since the ratio of two measured thermal resistances is used

for extraction, the method is designated as rth -ratio method.
The method can be applied to determine the coupling factors
c42 and c24 , too. Using the equivalent thermal resistance rth,Eb
for the combined fingers 2 and 4, the respective coupling
factors can be written as
c42 = c24 =
Since both coupling factors should be identical to c13 and c53 ,
heating Ec (finger 3) and sensing Ea (fingers 1 and 5) represent
an alternative for the extraction using the heat-sense method,
too. To extract other coupling factors, e.g., c32 or c52 , usually
two emitter fingers are used as heat source and the coupled
temperature is determined at the other finger(s). For example,
to determine the coupling of the emitter fingers 2 and 4 toward
finger 3, increasing VBEb generates high-power dissipation
and thus self-heating primarily at the fingers 2 and 4 while
operating finger 3 in the low-injection current range with
constant VBEc . The observed increase in emitter current IEc
measured for finger 3 is then caused by the temperature
increase at finger 3
TEc = rth (TEc )Pdis,Ec + c32rth (TEb )


The first term at the right-hand side of (17) considers the
self-heating of finger 3, whereas the coupled contributions of
the fingers 2 and 4 are represented by the two last terms.
Although often the temperature increase at the sensing device
due to its own power dissipation is neglected, here the selfheating is considered to keep the extraction method applicable
also for medium sensing currents. In contrast, the usually
very low thermally coupled heat fraction of emitter finger 3
toward fingers 2 and 4 is neglected here. Considering the test
structures symmetry, (17) can be rewritten as
+ c34rth (TEb )

TEc = rth (TEc )Pdis,Ec + c32rth (TEb )Pdis,Eb .


The coupling factors of fingers 2 and 4 toward 3 can be

calculated rearranging (18) to
c32 = c34 =

TEc rth (TEc )Pdis,Ec

rth (TEb )Pdis,Eb


For determining the temperature increase TEc in (19),

the corresponding saturation current IES0 is fine-calibrated to
fit the characteristic in a region with negligible self-heating.
Then, (6) and (7) are solved consistently for TEc based on
the measured IEc . To consider the temperature dependence of
the thermal resistance at fingers 2 and 4 in the denominator
of (19), the thermal coupling between these two fingers needs
to be considered by numerically solving the implicit equation
for the total temperature increase at fingers 2 and 4

Tamb + TEb rth Pdis,Eb
(1 + c24 ) (20)
TEb = rth0
from which the heating term in (19) can be identified as
rth (TEb )Pdis,Eb =

(1 + c24 )







The same methodology is applied to determine the coupling of

the emitter fingers 1 and 5 toward finger 3 if the voltage VBEa
instead of VBEb is increased toward high-injection currents.
The coupling factors can be determined then by solving
c31 = c35 =

TEc rth (TEc )Pdis,Ec

rth (TEa )Pdis,Ea


To determine the thermal coupling between, e.g., emitter

fingers 1 and 4, a measurement with constant VBEa in the
low-injection current range and increasing VBEb can be used.
Then, the temperature increase at the emitter finger 1 reads
+c12rth2 (TEb )
+c15rth5 (TEa )
+c14rth4 (TEb )
The coupling factor c12 between two directly adjacent emitter
fingers is assumed to be equal to the previously extracted c32 .
Thus, the coupling factors between fingers 1 and 4 and
fingers 5 and 2 can be calculated using the rearranged equation
TEa = rth1 (TEa )

c14 = c52 =

2TEa rth (TEa )(1 + c15 )Pdis,Ea

c32 .
rth (TEb )Pdis,Eb


The temperature increase TEa and heating term in the

denominator are determined with the previously explained
heat-sense method. Table I shows the extraction sequence for
the symmetrically connected five-finger transistor based on the
discussed extraction methods.
Test structures with four different emitter finger lengths
consisting of five single or three double emitter fingers were
manufactured in a SiGe-HBT process [8] and measured. On a
first test chip, the shortest test structure was realized in the
symmetrical connection scheme [Fig. 2(a)]. Later on, three
longer test structures were also fabricated with single and
double emitter fingers separately contacted.
Table II shows determined thermal resistances and coupling
factors of the extraction. For each structure, its acronym,
number of single or double fingers, and emitter window size
are indicated. The bold values are results of the rth -ratio
method, which was applied to all structures except SML. For
example, the spacing between the double emitter fingers of
LNG2 and between two adjacent single emitter fingers of
LNG are the same, which allows to determine c12 by the

Fig. 3.
Coupling factor extraction for the symmetrically connected test
structure MIN with increasing VBEb = Vh to heat finger 2 and 4 at
VCB = [0.5, 1.0, 1.5] V and VBEc = [0.7, 0.725, 0.75, 0.775, 0.8] V for the
sensing currents IEc at Tamb = 300 K. (a) Forward gummel characteristic of
heating current IEb (dashed lines) and sensing emitter current IEc (solid lines).
(b) Reextracted saturation currents (dashed lines), sensed emitter currents
IEc (symbols), and emitter current IEc modeled using saturation current and
temperature increase (solid lines). (c) Temperature increase at the heating
fingers (dashed lines) and at the sensing fingers (solid lines). (d) Coupling
factor for all measurements (solid lines) and averaged value (dashed line)
determined within the range indicated by dotted lines.

rth -ratio method. Note, the extracted values for the double
finger transistors are parameters per double finger.
A coupling factor extraction by the heat-sense method
is shown in detail in Fig. 3 for measurements of the test
structure with the shortest finger length. For this example, the
fingers 2 and 4 are heated simultaneously and the temperature
increase at the enclosed emitter finger 3 is sensed. To get an
idea of the bias dependence of the method, four VBC voltages
are applied generating different ranges of power dissipation
at the heating fingers as well as five VBEc values generating
different levels of power dissipation at the sensing finger. The
resulting sense currents IEc are indicated by the solid lines in
the forward gummel characteristics of the heating fingers in
Fig. 3(a). Fig. 3(b) presents the measured and modeled sense




Fig. 4. Dependence of the coupling factor c12 on the power dissipation with
VCB = [0, 0.25, 0.5, 0.75, 1.0] V and VBE,1 = [0.64, 0.66, 0.68, 0.70] V for
the sensing currents IE,1 at T = 300 K. Sudden decrease of a few curves
for transistor LNG 20 mW power dissipation is caused by oscillation issues
being observed with the heating currents.

Fig. 6. Thermal resistance of one emitter finger versus the device temperature TE simulated with GFM for Tamb = [300400] K and P dis =
[0.1, 1.3, 2.5, 3.7, 4.9, 6.1] mW/m2 . Inset: normalized coupling factors
derived from experiment 1 for the applied power dissipation range.

Fig. 5. Extraction results for the devices with single emitter fingers (solid
lines) and the devices with double emitter fingers (dashed lines) shown in
Table II. (a) Determined thermal resistances (circles) and compact model
results using (4) (lines). (b) Determined coupling factors using heat-sense
method (circles) and rth -ratio method (stars).

surface and with planar heat sources and sensors of the size
of the emitter area is used. In addition, sensor domains allow
for additional coupling factor determination versus distance.
The thermal resistances are determined by
rth =

currents IEc at a linear scale and with negligible self-heating.

From these characteristics, the temperature increase [Fig. 3(c)]
is calculated. The observed coupling factor in Fig. 3(d) shows
negligible dependence on the voltage Vh = VBEb in the
determination range, indicated by the dotted lines.
The determined coupling factors of the separately connected
test structures (Fig. 4) show a slight decrease (1.5%) with
the power dissipation, which is consistent with the behavior
obtained in [7]. Nevertheless, for the modeling of thermal
coupling, this minor impact is neglected in this paper also due
to the aforementioned achievable accuracy for the extraction
of the thermal resistances and respective coupling factors.
An overview on the extracted thermal resistances and spatial
dependence of the extracted coupling factors is given in
Fig. 5. As expected, an increasing coupling for decreasing
distance and increasing emitter finger length is observed. The
higher values obtained for the coupling factors using the
rth -ratio method will be explained by the simulation results
in Section V.
To interpret the data obtained from measurements, a numerical solution of the heat conduction equation based on the
Greens function method (GFM) [21], [22] is used. The
GFM solution applied here is only valid for a homogeneous
region but is capable of capturing the nonlinearity introduced
by the temperature-dependent thermal conductivity.
The transistor structure has been strongly simplified for the
simulations. A semi-infinite silicon body with an adiabatic



using the absolute value of the dissipated power in the heat

source area Pdis,A and the average temperature increase in
the sensing area Tmean . A set of simulation experiments is
performed to investigate the nonlinear behavior of the thermal
coupling (Table III). These experiments are performed with
the LNG structure applying P dis of up to 6 mW/m2 per
finger, since particularly the LNG structure shows significantly higher thermal coupling using the rth -ratio method.
Experiment 1 allows to determine the thermal resistance per
finger and all coupling factors depicted for the equivalent
thermal subcircuit in Fig. 2(b) considering the test structures
symmetry and superposition principle. Due to the temperature
dependence of the thermal conductivity, not only the thermal
resistance, but also the coupling factors are expected to behave
nonlinearly with respect to temperature and power dissipation.
This nonlinear nature also limits the applicability of the superposition principle for modeling, which is shown by comparing
the experiments 5 and 6 to the superimposed results of the
experiments 24.
Results of experiment 1 in Fig. 6 show that the impact of the
ambient temperature on one hand and of the self-heating on the
thermal resistance on the other hand needs to be distinguished.
A temperature increase reduces the thermal conductivity of
silicon. Thus, for increasing the ambient temperature, a higher
equivalent thermal resistance can be expected. Furthermore,
the thermal conductivity is reduced primarily at and around
the heat source due to additional local temperature increase
caused by self-heating. This causes a secondary increase of
the thermal resistance. The thermal resistance is modeled by



Fig. 7. Lateral temperature distribution in y-direction at the surface in the

middle of the emitter fingers (z-direction) while dissipating 6 mW/m2 per
active emitter finger. Comparison of the superimposed experiments 2, 3, and 4
(dashed lines) with the temperature distributions of experiment 5 and 6 (solid
lines). The finger width wE0 = 0.44 m for fingers 2, 3, and 4 is indicated
by the vertical dotted lines.

Fig. 8.
Thermal resistance of one single emitter finger versus device
temperature. Results of the initially used (squares) and adapted heat conductivity model (crosses) for the GFM are compared with compact model
results determined from measurements (circles). Simulated power dissipation density per emitter area is similar to that of the measurements P dis
[0.16] mW/m2 .

(4) with respect to the total emitter finger temperature TE ,

including already the ambient temperature and self-heating,
and will give a single characteristic in Fig. 6. In contrast,
the rth (TE ) characteristics of the GFM simulation show a
dispersion with respect to Pdis . A first approach for modeling this dispersion could be a linearized solution of the
temperature dependence as presented in [23]. Since the thermal
resistances extracted from measurements did not show a clear
dispersion trend, (4) was applied for the analysis. The possible
reasons for the absence of dispersion are limitations of the
power density and relatively low thermal resistances for the
technology investigated here, which may not be valid anymore
for future technology nodes [24].
The inset in Fig. 6 shows the coupling factors normalized
to its maximum derived from experiment 1. For all coupling
factors, a decrease of 5% for the applied range of power
dissipation is determined, which can be explainedsimilarly
as for the thermal resistanceby the temperature dependence
of the thermal conductivity. The behavior could be modeled
by a linear function. But, considering the small impact on the
total device temperature and accuracy limits of the extraction
procedure from measurements it may be neglected for compact
modeling. A more serious issue is observed with experiments 5 and 6 shown in Fig. 7. The impact of locally increased
temperature and thus decreased thermal conductivity leads to
higher temperatures than those of the linearly superimposed
experiments 2 to 4. This means: 1) the superposition principle
so far assumed for compact modeling should be carefully
revisited for each technology and 2) in case of using more
than one heating finger, the extraction methods are expected
to overestimate the coupling factors. The latter can be proven
by the comparison of the coupling factors determined by the
heat-sense method against those determined by the rth -ratio
method [Fig. 5(b)].




Using a temperature dependence of the thermal conductivity
for silicon derived from literature [20], [25], the simulated
thermal resistances from GFM tends to result in too small


values compared with the measurements as shown in Fig. 8.

There may be various causes for the deviationsan overview
on a simulation study with a box integration method [20] is
given in Table IV. Additional impact can be due to inaccuracies of the thermal conductivities of the different materials
(poly-/mono-Si with doping dependence, SiO2 , SiGe, silicide,
and so on) and by metallization and contact heat flow [26].
Therefore, an obvious first attempt to adapt the GFM simulations to the measurements will be the determination of
an effective thermal conductivity model for the bulk material
to match the measured thermal resistances. To keep a low
number of parameters being required for the adaptation of
the simulations to the measurements, the metallization path
is not considered. The initially used conductivity models for
Si, SiO2 , and SiGe of [20] cover a wide temperature range
(T = [4500] K) and were adapted to experimental results
found in the literature, e.g., [25]. To match the measured data,
a simplified model
(T /K)b1
is adjusted for Si with a1 = 65 W/(cmK) and b1 = 0.7
[Fig. 9(a)]. The thermal conductivity for that model at 300 K is
20% lower than the initially used one (see [25]) and a lower
temperature dependence is obtained. This may be reasonable since the realistic structure includes also SiO2 -domains,



Fig. 9. (a) Calibration of thermal conductivity. Dashed line: originally applied

thermal conductivity model used for GFM. Solid line: adapted conductivity
model. Dashed-dotted line: conductivity model of [25]. (b) Comparison of
coupling factors determined with heat-sense method (circles) and values
determined with calibrated GFM (crosses) at Tamb = 300 K.

Fig. 10. Measured collector current densities of the five finger transistor
LNG (triangles, AE0 = 5 0.44 27.8 m2 ) and a single finger transistor
with similar emitter dimensions (circles, AE0 = 1 0.44 27.8 m2 )
at VBE = [0.83, 0.85] V compared with simulations (solid lines). For the
LNG transistor, the respective thermal network is considered.

which have a two orders of magnitude lower thermal conductivity. The thermal resistances can be reproduced within a 5%
error range over device temperature and power dissipation density except for the smallest transistor structure MIN (12%),
which was also manufactured with another wafer run.
As shown in Fig. 9(b) for the coupling factors determined
with the calibrated GFM, a good agreement with the measured
values can be obtained. The deviations of the symmetrically
connected test structure MIN can be explained by the nonlinear
effects and their resulting dependencies during the extraction.
In Fig. 10, the impact of the thermal coupling on the
transistor behavior is shown by measured and modeled output current densities for a single finger and a five finger
transistor (LNG). Since for both devices the emitter finger
sizes are equal, the same electrical compact model is used for
each single finger. For the five finger transistor, the thermal
subcircuit as shown in Fig. 2(b) is used for modeling the
thermal coupling. The resulting higher finger temperatures
generate a significantly higher current density, particularly at
higher power densities. This behavior is also confirmed by
comparison with the measurements.
This paper describes in detail a methodology to determine
thermal coupling between emitter fingers of bipolar transistors
from measurements of test structures. In contrast to the often

used thermal-electric feedback coefficient [27], the emitter

current is employed as TSP and the self-heating of the sensor
emitter fingers is considered. The presented novel rth -ratio
method can already be performed if a single-finger and a
double-finger transistor are available although a five-finger
transistor connected separately or symmetrically allows the
more convenient determination. Issues resulting from using the
latter test structure being symmetrically contacted as presented
in [14] were discussed. Extracted thermal resistances and
coupling factors for different emitter finger distances and
finger lengths are presented. The results are discussed by
means of a calculation method based on the Greens function
for a simplified transistor structure. The thermal conductivitys
temperature dependence is considered and its impact on the
thermal coupling has been shown.
The GFM was calibrated with experimentally determined
thermal resistances. The coupling factors obtained using the
calibrated GFM show a good agreement with the measured
coupling factor results. This holds also for comparisons
of electrical transistor characteristics. It is shown that a
GFM-based calculation method can be calibrated with a set
of suitable test structures and with the presented extraction
methodology. The method can be used to calculate self-heating
for other geometries, numbers and locations of emitter fingers
and transistors, and allows the geometry scalable generation of self-heating networks within seconds (in contrast to,
e.g., 3-D FEM methods [3]). The complete methodology is
expected to be also applicable to other calculation methods
(see [14], [15]), architectures (DTI [28]), transistor types
(FET, HEMT), and material systems (InP-HBTs).
The authors would like to thank G. Fischer from IHP,
Frankfurt, Germany, for providing the test structures and
F. Utermhlen for the simulation support.
[1] G.-B. Gao, M.-Z. Wang, X. Gui, and H. Morkoc, Thermal design
studies of high-power heterojunction bipolar transistors, IEEE Trans.
Electron Devices, vol. 36, no. 5, pp. 854863, May 1989.
[2] J.-S. Rieh, D. Greenberg, Q. Liu, A. Joseph, G. Freeman, and
D. Ahlgren, Structure optimization of trench-isolated SiGe HBTs for
simultaneous improvements in thermal and electrical performances,
IEEE Trans. Electron Devices, vol. 52, no. 12, pp. 27442752,
Dec. 2005.
[3] V. dAlessandro et al., Impact of layout and technology parameters
on the thermal resistance of SiGe:C HBTs, in Proc. Bipolar/BiCMOS
Circuits Technol. Meeting, Oct. 2010, pp. 137140.
[4] L. La Spina, V. dAlessandro, S. Russo, and L. K. Nanver, Thermal
design of multifinger bipolar transistors, IEEE Trans. Electron Devices,
vol. 57, no. 8, pp. 17891800, Aug. 2010.
[5] J. M. Andrews, C. M. Grens, and J. D. Cressler, Compact modeling
of mutual thermal coupling for the optimal design of SiGe HBT power
amplifiers, IEEE Trans. Electron Devices, vol. 56, no. 7, pp. 15291532,
Jul. 2009.
[6] N. Nenadovic et al., Extraction and modeling of self-heating and mutual
thermal coupling impedance of bipolar transistors, IEEE J. Solid-State
Circuits, vol. 39, no. 10, pp. 17641772, Oct. 2004.
[7] M. Weiss, A. K. Sahoo, C. Maneux, S. Fregonese, and T. Zimmer,
Mutual thermal coupling in SiGe:C HBTs, in Proc. Symp. Microelectron. Technol. Devices, Sep. 2013, pp. 14.
[8] D. Knoll et al., A flexible, low-cost, high performance SiGe:C BiCMOS
process with a one-mask HBT module, in Proc. Int. Electron Devices
Meeting, Dec. 2002, pp. 783786.


[9] F. Ellinger et al., Power-efficient high-frequency integrated circuits

and communication systems developed within Cool Silicon cluster
project, in Proc. SBMO/IEEE MTT-S Int. Microw. Optoelectron. Conf.,
Aug. 2013, pp. 12.
[10] D. Fritsche, R. Wolf, and F. Ellinger, Analysis and design of a stacked
power amplifier with very high bandwidth, IEEE Trans. Microw. Theory
Techn., vol. 60, no. 10, pp. 32233231, Oct. 2012.
[11] P. Baureis, Electrothermal modeling of multi-emitter heterojunctionbipolar-transistors (HBTs), in Proc. 3rd Int. Workshop Integr. Nonlinear
Microw. Millimeterwave Circuits, Oct. 1994, pp. 145148.
[12] W. Liu, Thermal coupling in 2-finger heterojunction bipolar transistors,
IEEE Trans. Electron Devices, vol. 42, no. 6, pp. 10331038, Jun. 1995.
[13] D. Walkey, T. Smy, R. Dickson, J. Brodsky, D. Zweidinger, and R. Fox,
Equivalent circuit modeling of static substrate thermal coupling using
VCVS representation, IEEE J. Solid-State Circuits, vol. 37, no. 9,
pp. 11981206, Sep. 2002.
[14] H. Beckrich-Ros, S. Ortolland, D. Pache, D. Cli, D. Gloria, and
T. Zimmer, A nodal model dedicated to self-heating and thermal
coupling simulations, IEEE Trans. Semicond. Manuf., vol. 21, no. 2,
pp. 132139, May 2008.
[15] A. Darwish, H. Hung, A. Bayba, and K. El-Kinawi, Accurate calculation of junction temperature of HBTs, IEEE Trans. Microw. Theory
Techn., vol. 59, no. 3, pp. 652659, Mar. 2011.
[16] J. C. J. Paasschens, S. Harmsma, and R. van der Toorn, Dependence
of thermal resistance on ambient and actual temperature, in Proc.
Bipolar/BiCMOS Circuits Technol. Meeting, 2004, pp. 9699.
[17] H. Tran, M. Schroter, D. Walkey, D. Marchesan, and T. Smy, Simultaneous extraction of thermal and emitter series resistances in bipolar
transistors, in Proc. Bipolar/BiCMOS Circuits Technol. Meeting, 1997,
pp. 170173.
[18] A. Pawlak, S. Lehmann, and M. Schroter, A simple and accurate method
for extracting the emitter and thermal resistance of BJTs and HBTs,
in Proc. IEEE Bipolar/BiCMOS Circuits Technol. Meeting, 2014,
pp. 175178.
[19] M. Schrter and A. Chakravorty, Compact Hierarchical Bipolar Transistor Modeling With HICUM. Singapore: World Scientific, 2010.
[20] F. Utermhlen, Analysis and modeling of self-heating in integrated
heterojunction bipolar transistors, Dipl.-Ing. (MSEE) thesis, Chair
Electron Devices Integr. Circuits, Technische Univ. Dresden, Dresden,
Germany, 2011.
[21] M. N. Ozisik, Heat Conduction, 2nd ed. New York, NY, USA: Wiley,
[22] Y. Zimmermann, Modeling of spatially distributed and sizing effects in
high-performance bipolar transistors, Dipl.-Ing. (MSEE) thesis, Chair
Electron Devices Integr. Circuits, Technische Univ. Dresden, Dresden,
Germany, 2004.
[23] D. J. Walkey, T. J. Smy, T. W. MacElwee, and M. Maliepaard, Linear
models for temperature and power dependence of thermal resistance in
Si, InP and GaAs substrate devices, in Proc. 7th Annu. IEEE Symp.
Semiconductor Thermal Meas. Manage., 2001, pp. 228232.
[24] M. Schroter et al., Physical and electrical performance limits of highspeed SiGeC HBTsPart I: Vertical scaling, IEEE Trans. Electron
Devices, vol. 58, no. 11, pp. 36873696, Nov. 2011.


[25] V. Palankovski and R. Quay, Analysis and Simulation of Heterostructure

Devices. New York, NY, USA: Springer-Verlag, 2004.
[26] D. Walkey, D. Celo, and T. Smy, A simplified model for the effect of
interfinger metal on maximum temperature rise in a multifinger bipolar
transistor, IEEE Trans. Comput.-Aided Design Integr. Circuits Syst.,
vol. 22, no. 1, pp. 1525, Jan. 2003.
[27] R. Pritchard, Electrical Characteristics of Transistors. New York, NY,
USA: McGraw-Hill, 1967.
[28] K. E. Moebus, Y. Zimmermann, G. Wedel, and M. Schroter, Thermal
modeling of BOX/DTI enclosed power devices with Greens function
approach, in Proc. IEEE Semiconductor Conf. Dresden, Sep. 2011,
pp. 14.

Steffen Lehmann received the M.S. degree in electrical engineering from

the Technische Universitt Dresden (TUD) working on parameter extraction
for SiGe HBTs. He is currently working on experimental characterization and
compact modeling of devices for large-signal applications, with focus on SiGe
HBT technologies.

Yves Zimmermann received the M.S. degree in electrical engineering from

the Technische Universitt Dresden (TUD). He is currently working on
electro-thermal modeling and simulation methods as well as on parasitic and
passive device modeling for integrated circuit design.

Andreas Pawlak received the M.Sc. degree in electrical engineering from

the Technische Universitt Dresden (TUD), Dresden, Germany, modeling
SiGe-Heterojunction Transistors for mm-Wave applications using the HICUM
compact model.
He is currently at TUD, where he is working on the modeling of physical
effects of very advanced SiGe-HBTs and the extension of the compact model
formulations, as well as on the characterization of integrated bipolar devices.

Michael Schrter (M93) received his Ph.D. in electrical engineering from

the Ruhr-University Bochum, Germany, in 1988. From 1993 to 1996 and
20092011 he worked for Nortel, Rockwell, Conexant, and RFNano in
various engineering and management positions. Since 1999 he has been a
full Professor and Head of the Chair for Electron Devices and Integrated
Circuits at the TU Dresden, Germany.