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ESPRIT

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Mixed Signal Design Cluster

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Work Shop

Introduction to Sigma-Delta Modulation

Prof. Dr. Qiuting Huang

Seedamm-Plaza, Pfäffikon, Switzerland October 22 nd , 2001

Outline

q ADC as a Tracking Loop q Linearity and Quantization Noise q First Order SD-Modulator q Higher Order Loops q Cascaded Modulators q Non-Idealities q Conclusions

Motivation for Oversampled Converters

q Need for spectral efficiency in communications systems (ADSL, UMTS, etc. ) => high requirements for A/D and D/A converters (12-14 bit of resolution and linearity)

q VLSI technologies: Low component accuracy, decreasing analog signal dynamic range => difficult for Nyquist rate converters and anti- aliasing filters

q IDEA: Exchange of speed + complexity vs. analog resolution

q Solution: Oversampled data converters, spectral shaping of quantization noise

Published Sigma-Delta Converters

150 NAIKNAWARE00 140 130 Speed vs. Resolution Trade-Off Audio KERTH94 120 LEUNG97 Precision 110 FUJIMORI96 Measurement
150
NAIKNAWARE00
140
130
Speed vs. Resolution
Trade-Off
Audio
KERTH94
120
LEUNG97
Precision
110
FUJIMORI96
Measurement
ADSL
ADAMS86
GSM
100
RABII97
GEERTS00
BOSER88
LONGO93
90
BALMELLI00
Broadband Wireline
Communications
BURGER98
BURGER01
80
Speech
FELDMAN98
70
GEERTS00
HAIRAPETIAN96
Mobile
60
Communications
50
10
100
1k
10k
100k
1M
10M
100M
Dynamic Range [dB]

Input Signal Bandwidth [Hz]

Generic ADC as Tracking Loop

A/D (Quantizer)

 

u

A(u)

w

q(w)

 

n

u A(u) w q(w) n - D/A n f(y)
 
u A(u) w q(w) n - D/A n f(y)
 
   
u A(u) w q(w) n - D/A n f(y)
-

-

   
   
 

D/A

D/A n

n

f(y)

f(y)
   
Generic ADC as Tracking Loop A/D (Quantizer) u A(u) w q(w) n - D/A n f(y)
Generic ADC as Tracking Loop A/D (Quantizer) u A(u) w q(w) n - D/A n f(y)

x

Generic ADC as Tracking Loop A/D (Quantizer) u A(u) w q(w) n - D/A n f(y)

y

Examples:

  • - Dual-Slope

  • - SAR

  • - SD - Modulation

 

A

o

q

o

x

 

A q

o

>> 1

y =

in signal band

æææææÆ

y

=

f

 
 

1 + A

o

q

o

f

- 1

(x)

q D/A converter determines gain and linearity of entire A/D converter

D/A Converter Linearity and Quantizer Levels

  • q Dynamic Range Is Determined by Linearity and Noise

  • q Static Linearity Depends on Matching Accuracy of Components Except for a 1-bit D/A

  • q Quantization Noise Decreases with Increasing Quantizer Levels

  • q Noise Power Is Spread Between DC and f s /2

  • q DR Can Be Traded with Speed

Spectral Behavior of Quantization Error (Noise) 10bit Quantizer (Output Signal): 5bit Quantizer (Quantization Error): 0 0
Spectral Behavior of Quantization Error (Noise)
10bit Quantizer (Output Signal):
5bit Quantizer (Quantization Error):
0
0
-20
-20
-40
-40
-60
-60
-80
-80
-100 0
-100
/2
Frequency [Hz]
F s
/2
Frequency [Hz]
F s
10bit Quantizer (Quantization Error):
1bit Quantizer (Quantization Error):
0
0
-20
-20
-40
-40
-60
-60
-80
-80
-100 0
-100 0
/2
/2
Frequency [Hz]
F s
Frequency [Hz]
F s
Integrated Systems Laboratory
ETH Zürich
Magnitude [dBFS]
Magnitude [dBFS]
Magnitude [dBFS]
Magnitude [dBFS]

First Order SD Modulator

Block Diagram

u(kT s )

v(kT s )

d(kT s )

First Order SD Modulator Block Diagram u(kT ) v(kT ) d(kT ) Low- Pass Ú dt
Low- Pass
Low-
Pass
Ú dt Integrator 1bit quantizer D/A
Ú dt
Integrator
1bit
quantizer
D/A

First Order Shaped Noise

0 -20 -40 -60 -80 -100 Fs/2000 Fs/200 Fs/20 Fs/2 Frequency [Hz] Magnitude [dB FS ]
0
-20
-40
-60
-80
-100
Fs/2000
Fs/200
Fs/20
Fs/2
Frequency [Hz]
Magnitude [dB FS ]

Example:

Q(.) u[k] e[k] x[k] v[k] +1 D -1 x[k] = x[k-1] + e[k-1] v[k] = Q(x[k])
Q(.)
u[k]
e[k]
x[k]
v[k]
+1
D
-1
x[k] = x[k-1] + e[k-1]
v[k] = Q(x[k])

e[k]

= u[k] – v[k]

K

u[k]

x[k]

v[k]

 

e[k]

Av.

0

-

-0.1

-1

 

1

 

1

0.2

 

0.9

1

-

0.8

 

2

0.2

 

0.1

1

-

0.8

 

3

0.2

-

0.7

-1

 

1.2

 

4

0.2

 

0.5

1

-

0.8

 

5

0.2

-

0.3

-1

 

1.2

0.2

6

0.2

 

0.9

1

-

0.8

 

General Single-Path SD Modulator

e(kT s )

x(kT s ) w(kT s ) y(kT s ) + H(z) A/D - D/A
x(kT s )
w(kT s )
y(kT s )
+
H(z)
A/D
-
D/A

The power spectrum of quantizer error e(kTs) = y(kTs) – w(kTs) can be assumed white and uncorrelated with x(kTs), if the latter is sufficiently active.

The power of quantization error is:

e

2

rms

1

=

2 p

2

p

Ú

E (

W

0

)

2

d

W

,

W =

w

T

s

Linearized General Model

E(z)

E(z) X(z) W(z) Y(z) W(z) Y(z) X(z) + H(z) A/D H(z) D/A
E(z)
X(z)
W(z)
Y(z)
W(z)
Y(z)
X(z)
+
H(z)
A/D
H(z)
D/A
 

In-band

H(W)

>>1

NTF(W)

<<1

STF(W)

1

Y

(

z

)

=

STF

=

STF

 
STF H ( z ) 1 + H ( z ) H ( z ) 1

H

(

z

)

  • 1 + H

(

z

)

H

(

z

)

  • 1 + H

(

z

)

NTF

Linearized General Model E(z) E(z) X(z) W(z) Y(z) W(z) Y(z) X(z) + H(z) A/D H(z) D/A

X

(

z

)

+

1

(
1

+ H

(

z

)

E

z

)

  • 1 (

+ H

z

)

1

X

(

z

)

=

-

=

1

-

NTF

 

1

  • 1 H

+ H

(

z

)

+

(

z

)

Higher Order Loops

F

L H(z) - 1 Ê z H ( z - 1 1 - z ) =
L
H(z)
-
1
Ê
z
H
(
z
- 1
1 -
z
) = Á Á Ë
ˆ ˜ ˜ ¯
z -1
z -1
z -1
Output noise spectral density
(
W =wT
=
2
pfT
)
s
s
-
j
W
L
1
(1
-
e
)
W<< 1
-
j
W
L
(
W
)
=
E
(
W
)
=
E
(
W
)
æææÆ ª
(1
-
e
)
E
(
W
)
j W
-
j
W
L
-
j
W
L
1
+
H
(
z
=
e
)
(1
-
e
)
+
e

Total in-band noise

N

o

W W o o 1 1 2 L * - j W = Ú F (
W
W
o
o
1
1
2 L
*
-
j
W
=
Ú
F
(
W
)
F
(
W
)
d
W =
Ú
1 -
e
E ( W
2 p
p
-W
0
o
W
1
o
2
e
(2
sin(
x
)
ª
x x
,
<<
1
2
2 L
rms
æææææÆ
e
Ú
W
d
W =
W
rms
o
p
(2
L +
1)
p
0

)

  • 2 d

W =

e

2

rms

  • 1 W

p

o

Ê

Á 2sin(

Ú

  • 0 Ë

ˆ

2 L

W

) ˜
2

¯

E ( W

)

2

  • d W

L +

1)

= e

  • 2 p

2 L

rms

2

L +

1

OSR

-

(2

  • L +

1)

OSR =

p

W

o

p

=

w

o

T

s

RMS-Noise in Signal Band

RMS-Noise in Signal Band O dB corresponds to that of PCM sampled at Nyquist rate Integrated

O dB corresponds to that of PCM sampled at Nyquist rate

Stability of Higher Order Modulators

- j w T 1- e s 2 6 dB 1 0 wT p s 0
-
j
w
T
1-
e
s
2
6 dB
1
0
wT
p
s
0

Solutions:

NTF(z) = (1-z -1 ) L implemented with a

chain of integrators can lead to unstable modulator behavior for L ³ 3

  • q Add feedforward and feedback paths to increase damping Þ Higher order single loop modulators

  • q Cascade 1 st and 2 nd order stages Þ Cascaded modulators

Design of Single Loop Modulators

  • 1. Design of NTF(z)

    • - Filter function (e.g. inverse Chebychev)

    • - STF = 1 – NTF

    • - Steeper noise shaping can be tolerated with more quantizer levels

  • 2. Compute H(z) H(z) = 1 - 1/NTF

  • 1. Choose appropriate topology to implement H(z)

  • 2. Compute coefficients

  • 3. Simulate behavior with quantizer

  • 10 0 10 STF NTF 20 30 40 50 Pass-Band 60 70 80 90 100 3
    10
    0
    10
    STF
    NTF
    20
    30
    40
    50
    Pass-Band
    60
    70
    80
    90
    100
    3
    4
    5
    6
    10
    10
    10
    10

    Frequency [Hz]

    c2 b1 b2 b3 d1 d2 d3 a1 a1 = 1/4 c2 = 0.0105 b1 =
    c2
    b1
    b2
    b3
    d1
    d2
    d3
    a1
    a1 = 1/4
    c2 = 0.0105
    b1 = 1/4
    b2 = 1/2
    b3 = 1/6
    d1 = 4/5
    d2 = 3/5
    d3 = 3/5

    Þ ds-toolbox (R. Schreier, ftp://next242.ece.orst.edu/pub/delsig.tar.Z)

    Achievable SNR

    Butterworth Type NTF (all zeros at DC)

    160 L = 5 140 L = 4 120 L = 3 100 L = 2
    160
    L
    = 5
    140
    L
    = 4
    120
    L
    = 3
    100
    L
    = 2
    80
    60
    40
    20
    0
    4
    8
    16
    32
    64
    128
    256

    OSR

    Optimized NTF (zeros optimally spread over pass-band)

    160 L = 5 140 L = 4 120 L = 3 100 L = 2
    160
    L
    = 5
    140
    L
    = 4
    120
    L
    = 3
    100
    L
    = 2
    80
    60
    40
    20
    0
    4
    8
    16
    32
    64
    128
    256

    OSR

    Stability of Single Loop Modulators

    E(z) X(z) H(z) k + Y(z) - Quantizer Gain 0 £ k £ 1
    E(z)
    X(z)
    H(z)
    k
    +
    Y(z)
    -
    Quantizer Gain
    0 £ k £ 1
     

    1

    1

    + kH

    (

    kH

    (

    z

    )

    + kH

    (

    z

    • 1 )

    NTF =

    z )

    STF =

    • q Single bit quantizer

    - Ardalan/Paulos (TrCAS, Jun87) - Maguire/Huang (ISCAS94)

    • q Multi bit quantizer

    v u
    v
    u

    v = k u

    Stability of Single Loop Modulators E(z) X(z) H(z) k + Y(z) - Quantizer Gain 0 £

    Cascaded Modulators

    Single Loop Modulator

    H(z) - D/A
    H(z)
    -
    D/A
    A/D
    A/D
    Cascaded Modulators Single Loop Modulator H(z) - D/A A/D Analog input Digital output Cascaded Modulator H(z)

    Analog

    input

    Digital

    output

    Cascaded Modulator

    H(z) A/D - Digital Analog output 1 input Digital Final D/A signal digital - processing outpu
    H(z)
    A/D
    -
    Digital
    Analog
    output 1
    input
    Digital
    Final
    D/A
    signal
    digital
    -
    processing
    outpu t
    Digital
    output 2
    H(z)
    A/D
    -
    D/A

    1-1 Cascaded Modulator

    z -1 - e n ' g e n -1 ' g e + e -
    z -1
    -
    e
    n
    '
    g
    e
    n -1
    '
    g
    e
    +
    e
    -
    e
    n
    -2
    n
    n
    - 1
    -
    X(z)
    z -1
    -
    '
    e
    n
    '
    (
    x
    +
    e
    -
    e
    )
    -
    Y(z)
    n
    n
    '
    n - 1
    z -1
    z -1
    '
    '
    y
    ª
    x
    +
    (1
    -
    g
    )(
    e
    -
    e
    )
    -
    (
    e
    -
    2
    e
    +
    e
    )
    n
    n
    -2
    n
    -2
    n
    -
    3
    n
    n
    -
    1
    n
    -
    2

    Þ Performance depends on matching of analog and digital transfer functions

    SD Modulator Non-Idealities I

    q

    Nonlinear STF due to quantization (Huang/Maguire (ISCAS 93))

    - Example: 3 rd order modulator with inv. Chebychev NTF Output Spectrum at Maximum Input Level
    - Example: 3 rd order modulator with inv. Chebychev NTF
    Output Spectrum at Maximum Input Level
    0
    -20
    -40
    -60
    89 dB 89 dB
    -80
    Harmonics
    -100
    3rd
    -120
    -140
    10 3
    10 4
    10 5
    10 6
    Frequency [Hz]
    Integrated Systems Laboratory
    ETH Zürich

    SD Modulator Non-Idealities II

    q Tones - Limit cycles in the pass-band - Tones near f s /2 Output Spectrum
    q Tones
    - Limit cycles in the pass-band
    - Tones near f s /2
    Output Spectrum of 2x Pass-Band Width
    Output Spectrum Near fs/2
    0
    0
    Tones
    - 6 dB
    -20
    -20
    full scale
    -40
    -40
    - DC-input @ -51 dB
    -60
    -60
    full scale
    -80
    -80
    Tones
    -100
    -100
    -120
    -120
    30 kHz sinusoidal input
    @-43 dB full scale
    -140
    -140
    0
    0.2
    0.4
    0.6
    0.8
    1
    1.2
    1.4
    1.6
    1.8
    2
    5.7
    5.8
    5.9
    6
    6.1
    6.2
    6.3
    6.4
    6.5
    x 10 5
    Frequency [Hz]
    x 10 6
    Frequency [Hz]
    q Circuit non-idealities ® other presentations
    Integrated Systems Laboratory
    ETH Zürich

    Conclusions

    q Linearity of an A/D converter is determined by that of its D/A q Matching accuracy is typically limited, which makes linearity a problem for monolithic integration of A/D converters q One-bit D/A is potentially very linear, but too much noise is generated by a 1-bit quantizer q Noise shaping, effected by feedback, enables S and N to be separated q A SD converter is therefore a combination of 1-bit quantizer for linearity, noise shaping for S and N separation and digital filtering for noise removal