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2, MARCH 2008
793
A Novel Zero-Voltage-Switching
PWM Full Bridge Converter
Wu Chen, Student Member, IEEE, Xinbo Ruan, Senior Member, IEEE, and Rongrong Zhang
I. INTRODUCTION
794
type. (b) T
1) All the switches and diodes are ideal, except for the rectifier
diode, which is equivalent to an ideal diode and a paralleled
capacitor to simulate the reverse recovery.
2) All the capacitors, inductance and transformer are ideal.
3) The turns ratio of the transformer is the primary winding:
.
the reset winding: the secondary winding
Fig. 3 shows the equivalent circuits of the switching stages in
a half period. The second half period is similar to the first half
period.
[Refer to Fig. 3(a)]
1) Stage 1
Prior to , the power is transferred from the input source
to the load through
and
.
is turned off
at zero voltage due to
and
limit the rising rate of
the voltage across . The resonant inductance current
charges
and discharges , and the potential voltage of
is
point decays. In the meanwhile, the capacitor
discharged. As the potential voltage of point is greater
is reverse biased. The voltage of
dethan zero,
conducts naturally.
creases to zero at and
[Refer to Fig. 3(b)]
2) Stage 2
can be turned on at zero voltage when
conducts.
continues to be discharged since the voltage of point
is still higher than zero.
and continue decaying.
and the voltage of
This stage finishes when
point reduce to zero correspondingly.
[Refer to Fig. 3(c)]
3) Stage 3
and
conduct simultaneously, clamping the secis equal to , and the circuit
ondary voltage at zero.
operates in free-wheeling mode.
[Refer to Fig. 3(d)]
4) Stage 4
is turned off at zero voltage at , and
is charged and
is discharged in a resonant manner. This stage finishes
when
rises to
and
falls to zero at .
[Refer to Fig. 3(e)]
5) Stage 5
conducts naturally when
decays to zero, and
can be turned on at zero voltage.
is equal to , and both
Fig. 2. Key waveforms of ZVS PWM full-bridge converters. (a) Without reset
winding. (b) With reset winding.
. At
of them decay linearly with the rate of
and cross zero, and continue increasing linearly in the
negative direction. The load current flows through both the
and reach the reflected filter
rectifier diodes. At
turns off.
inductance current, and
[Refer to Fig. 3(f)]
6) Stage 6
resonates with
after , and
is charged in
continue increasing. At ,
a resonant manner. and
rises to 2
, and the prithe voltage of
is
, the potenmary voltage of the transformer,
tial voltage of point reduces to zero. So
conducts,
at
, and the voltage of
is clamped
clamping
accordingly.
at 2
[Refer to Fig. 3(g)]
7) Stage 7
795
;t ]
. (b) [t
;t ]
. (c) [t
;t ]
. (d)[t
;t ]
. (e) [t
;t ]
. (f) [t
;t ]
. (g) [t
;t ]
. (h) [t
;t ]
(1)
declines downwards to the reflected filter inductance
current when
conducts, and increases in the negative
,
direction. The voltage of the reset winding is
decrease quickly.
which is applied to , making
is greater than
before , and the current difference
flows through . This stage finishes when equals
at
, and
turns off naturally. The further simplified equivalent circuit of this stage is shown in Fig. 4(a).
[Refer to Fig. 3(h)]
8) Stage 8
where
, and
.
Equation (1) illustrates that the maximum value of
will never exceed
though slight oscillation exists. In practice,
will finally stay at the average value
since the inherent parasitic resistance
exists in the power circuit, which will be presented in Section IV.
796
Fig. 5. Primary current comparison. (a) Without reset winding. (b) With reset
winding.
(3)
(8)
(4)
(9)
where
is the primary turns of the transformer.
From (3) and (4), we can see that in order to obtain the same
voltage ratio, we should have
(5)
It means the transformer primary winding in the full-bridge
converter is split into two windings, and one of them is used as
the reset winding in the proposed converter.
where
is the output load current;
is the static
is the
drain-to-source on-resistance of the main switch; and
forward voltage drop of the clamping diode.
From (8) and (9), the conduction time of the clamping diode
without reset winding can be derived as
(10)
797
= 270 V).
(13), yields
(14)
In order to observe the concrete comparisons, a prototype is
designed and built with the following parameters:
% VDC;
input voltage
: 180 VDC;
output voltage
maximum output current : 6 A;
switching frequency : 100 kHz;
H (Ferroxcube, core:
resonant inductance
E32/16/9-3C90, bobbin: CPH-E 42/20-1S -12PD, 8 turns
Litz wire: dia. 0.1 mm, 200 strands);
: IRFP450 (International Recti main switches
;
fier), and its
clamping diodes: DSEI30-06A (IXYS), and its forward
V;
voltage
798
Fig. 9. Waveforms of the Tr_lag type converters. (a) Without reset winding. (b) With reset winding (n :
(n : n : n = 13 : 2 : 13).
respectively;
turns ratio : 15:13;
: 600 F, which is approximately
reflected capacitor
calculated by the experimental results.
According to (11), Fig. 6 shows the maximum filter inductance to ensure the clamping diode turn off naturally, it can be
should be less than 230 H.
seen that
The minimum duty cycle of the proposed converter is
(15)
So the minimum conduction time
is
(16)
799
Fig. 10. Waveforms of the leading switch and the lagging switch. (a) v ; v
and i of the leading switch Q . (b) v ; v and i of the lagging switch Q .
The voltage stress of the rectifier diode in the proposed con, which is slightly higher than the converter
verter is 2
without reset winding, and the difference is
(18)
In the prototype, however, the difference is too small to influence the choice of the rectifier diodes.
IV. EXPERIMENTAL VERIFICATION
A prototype with 180V/6A output of the proposed ZVS
PWM full-bridge converter was built and tested to verify the
operation principle. The output filter inductance is 230 H
(Ferroxcube, core: E42/21/20-3C90, bobbin: CPH-E 42/20-1S
-12PD, 40 turns, copper strip and its cross section size is
800
801