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EE 735 : Microelectronics Simulations Lab

Circuits Assignment-1 (Due on 17th October)
1.

Input-output characteristics of the inverter

Rd = 1kΩ

Rd = 5kΩ
Input-output characteristics with various RD

Rd = 2kΩ

Rd = 10kΩ

VGS VDS = 0.7V . but the maximum output voltage swing will decrease. the magnitude of the derivative increases. increasing Rd improves the noise margin of the inverter. Reason: Since in the transition region the transistor is in linear region.r.Inference: With the increase in the resistance Rd.5𝑉𝐷𝑆 = 2L 𝑅𝐷 Differentiating above equation w. VGS i.e.3V VDS = 0. W 𝑉𝐷𝐷 − 𝑉𝐷𝑆 2 ) 𝐼𝐷 = β ((𝑉𝐺𝑆 − 𝑉𝑇 )𝑉𝐷𝑆 − 0. the larger will be the gain of the amplifier used with this inverter sub circuit. 2. The larger the slope of the linear region at the transition. the transition width (of input voltage) between output high and output low decreases and the output low voltage at input high voltage also decreases. we get 𝑑𝑉𝑜𝑢𝑡 𝑑𝑉𝑖𝑛 = − 1 β W 2L 𝑅𝐷 𝑉𝐷𝐷 +𝑉𝐺 −𝑉𝑇 −𝑉𝑜𝑢𝑡 Thus. Thus. DC analysis plot IDS vs. Thus the transition becomes more sharp as the drop is faster in the linear region. as RD increases.t. VIN .

. gm = slope of the curve in saturation region 𝒈𝒅𝒔 = 𝟏 𝒓𝒅𝒔 = 𝝏𝑰𝑫 𝝏𝑽𝑫𝑺 = slope of the ID vs.40 = 1+0.1V Thus.3V is ≈ 0. 0.9V is ≈4mA. the device is in saturation for all VDS used to plot above curves.35 Thus.25 Also. From the current equation in saturation region IDS α (1+λVDS). VGS curve. 0.6 V At VGS=0.3𝜆 1+0.VDS = 0.9V VDS = 1.8V. from all above curves. The current for VDS = 0.9𝜆 → 𝜆 = 0. VT = 0.35mA and for VDS = 0.

1 1.7V.64 mAV . (VGS < VDS + VT = 1.9V W 𝐼𝐷 = β 2L ((𝑉𝐺𝑆 − 𝑉𝑇 )2 )(1 + 𝜆𝑉𝐷𝑆 ) _______ At VGS = 0. VDS=0.9 1.2271 ∗ 10−3 = β 0.4 kΩ -1 Thus. β = 1.9V).222 ∗ 0.5165 mAV-2 in saturation region.VDS (V) β.5 kΩ 0.5).5165 1. Now.5165 1.4 21.5165 1.3 kΩ 1. we can assume that gm = 1.9) 2 ∗ 0. ID = 0.5165 1.01 ∗ (1 + 0. consider the plot of ID vs. rds = 21kΩ at the operating point (VGS=0.6 22. .2µ Thus.7V 0.3 1. VGS at VD = 0.0 kΩ 0.2271 mA 5µ 0. mAV-2 gm ( mAV-1 ) at VGS=0.7V.7 1.7V rds = (1+λVDS )(λIDS)-1 at VGS=0.641 21.674 21.

ID = 22. 3.9V .7*10-5 A =β 2L (𝑉𝐺𝑆 − 𝑉𝑇 )2 (1 + 0. VGS curve. VD = 0.9V.516 mAV-2 Thus.760*10-9*λ = 4.The ID vs.2*10-5 AV-1 W At VDS = 0. i.222 V-1 𝒓𝒅𝒔 = 𝟐𝟑. The magnitude(id)/magnitude(vg) vs. the results obtained are almost same as that obtained from ID vs. VDS curve for VGS = 0. we get λ = 0.7V is as follows: 𝜕𝐼 From the curve slope.7V.01V peak ac) at VG = 0. frequency for applied small signal gate voltage(0. 𝜕𝑉 𝐷 . in saturation region. 𝟖 𝒌Ω β = 1. 𝐷𝑆 𝜕𝐼𝐷 𝜕𝑉𝐷𝑆 = 1 𝑟𝑑𝑠 W = β 2L (𝑉𝐺𝑆 − 𝑉𝑇 )2 λ = 8. for larger values of VDS.9λ) Solving the above two equations.e.

Thus. VD = 0. 𝑔𝑎𝑖𝑛 = −𝑔𝑚 (𝑟𝑑𝑠 ||𝑅𝐷 ) Specifications: VOUT = 0. frequency for applied small signal drain voltage (0. 𝑔𝑚 = 1. The circuit will be : The small signal equivalent of the above circuit is: So.7V .9V Thus.01V peak ac) at VG = 0.7V. gain = 5.6421 𝑚Ω−1 The (vd / id) vs.15 𝑘Ω 4. VG = 0. 𝑣𝑜𝑢𝑡 = −𝑔𝑚 𝑣𝑖𝑛 (𝑟𝑑𝑠 ||𝑅𝐷 ) Thus. 𝑟𝐷𝑆 = 22.9V.

01 ∗ (1 + 0. since 𝑔𝑚 ∝ 𝐼𝐷𝑆 as all other parameters (voltages.9 𝑅𝐷 Thus.93 𝐿 𝑅𝐷 From gain.95kΩ. 𝑊 1 = 98. β) are same as calculated in previous parts.0975 ∗ 10−3 𝑅𝐷 𝐿 This gives. our current value of rds follows the relation: 0.5 > 5 as specified.Now.5165𝑚 ∗ = 𝛽 ∗ 0. since 𝑟𝑑𝑠 ∝ 𝑟𝑑𝑠 = 22.9 𝑊 𝑊 ((𝑉𝐺𝑆 − 𝑉𝑇 )2 )(1 + 𝜆𝑉𝐷𝑆 ) = 1. Current through RD = Current through NMOS.9) 𝑅𝐷 2𝐿 2𝐿 0. 0.15𝑘 1 𝐼𝐷𝑆 . So. 𝑟𝑑𝑠 ||𝑅𝐷 = 0.5V. 𝟗𝟑 𝟏 𝑹𝑫 condition is met VD will be 0.59𝑅𝐷 0. Large signal calculations.222 ∗ 0.2271 ∗ 10−3 = 5. we get |𝑔𝑎𝑖𝑛| = 𝑔𝑚 (𝑟𝑑𝑠 ||𝑅𝐷 ) = 5.848𝑅𝐷 If all the above conditions are satisfied. if 𝑾 𝑳 = 𝟗𝟖. I chose W/L = 25 as in inverter and hence RD = 3.9 𝑊 = 9. So. .9V and gain will be 5.

Output signal = 542mV peak-to-peak.t time are as follows: Input signal = 100mV peak-to-peak.42 . Gain = 5.r.5. The output and input signals w.

Input signal = 200mV peak-to-peak.2mV peak-to-peak Gain = 5. Output signal = 1021.11 .

Output signal = 1520mV peak-to-peak.Input signal = 400mV peak-to-peak.8 . Gain = 3.

723 V p-p Input = 0. The differential input and output for 200mV peak sinusoid input is Output = 1.6.4 V p-p Gain = 4.31 .

Now.227 mA.33mV p-p gain = 4. for the given differential amplifier circuit. Now. the Vb should be such that the current through the voltage source equals the one with 0. Thus. Thus the corresponding input-output curve is Input = 100mV p-p Output = 463.745 V for the same current. from previous part of the same question. IDS = 0.633 . from the ID-VGS curve of the nmos transistor at VD = 0.3V at the source.3V we get VG = 0.

AC analysis : Input = 50 mV peak Output = 234 mV peak Gain = 4.68 Thank you. .