Chapter 12

The Signal Attributes Library

his chapter is an introduction to the Signal Attributes library. This is the eleventh library
in the Simulink group of libraries and consists of two sublibraries, the Signal Attribute
Manipulation SubLibrary, and the Signal Attribute Detection SubLibrary blocks
shown below. We will describe the function of each block included in this library and we will perform simulation examples to illustrate their application.

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12.1 The Signal Attribute Manipulation SubLibrary
The Signal Attribute Manipulation SubLibrary contains the blocks described in Subsections
12.1.1 through 12.1.10 below.

12.1.1 The Data Type Conversion Block

The Data Type Conversion block converts an input signal of any Simulink data type to the data
type and scaling specified by the block's Output data type mode, Output data type, and / or Output scaling parameters. The input can be any real or complexvalued signal. If the input is real,
the output is real, and if the input is complex, the output is complex. When using this block, we
must specify the data type and / or scaling for the conversion. The data types and the Data Type
Conversion block are described in Section 2.17, Chapter 2, Page 229.

12.1.2 The Data Type Duplicate Block

The Data Type Duplicate block is used to ascertain that all inputs have the same data type. We
use the Data Type Duplicate block to check for consistency of data types among blocks. If all signals do not have the same data type, the block returns an error message. The Data Type Duplicate block is typically used in such a way that one signal to the block controls the data type for all
other blocks. The other blocks are set to inherit their data types via back propagation. The block
is also used in a user created library. These library blocks can be placed in any model, and the data
type for all library blocks are configured according to the usage in the model. To create a library
block with more complex data type rules than duplication, we use the Data Type Propagation
block which is described in Subsection 12.1.3, this chapter, Page 124.
Example 12.1
Let us consider the model of Figure 12.1. For all three gain blocks the Signal data types have been
specified as Inherit via back propagation. The gains in Gain 2 and Gain 3 blocks are very high and
thus the Display 2 and Display 3 blocks output the value of 0 indicating an overflow condition. To
obtain the true values in Display 2 and Display 3 blocks, we change the Signal data types from
Inherit via back propagation to uint(16) and uint(32) respectively as shown in Figure 12.2.

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Figure 12.1. Model 1 for Example 12.1

Figure 12.2. Model 2 for Example 12.1

Next, we return to the model of Figure 12.1, we add a Data Type Duplicate block, and we specify
the Signal data type for the Constant block as uint(32), and now our model appears as shown in
Figure 12.3. The advantage here is that we can specify any Signal data type and that will be inherited by the three gain blocks.

Figure 12.3. Model 3 for Example 12.1

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12.1.3 The Data Type Propagation Block

The Data Type Propagation block allows us to control the data type and scaling of signals in our
model. We can use this block in conjunction with fixedpoint blocks that have their Specify data
type and scaling parameter configured to Inherit via back propagation . The block has three
inputs: Ref1 and Ref2 are the reference inputs, while the Prop input back propagates the data
type and scaling information gathered from the reference inputs. This information is subsequently
passed on to other fixedpoint blocks.
Example 12.2
The model of Figure 12.4 performs the arithmetic operation 2.5 ( 5.75 + 2.375 + 1.8125 ) . The Ref1
signal represents the sum of the terms, the Ref2 signal represents the multiplier, and the Prop signal is the product. For all four Constant blocks the parameter Signal data types is specified as
Inherit from Constant value, and for the Sum and Product blocks the parameter Signal data
types is specified as Inherit via back propagation. The Display block Format is specified as decimal
(Stored Integer.)

Figure 12.4. Model for Example 12.2

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12.1.4 The Data Type Scaling Strip Block

The Data Type Scaling Strip block removes the scaling off a fixedpoint signal. It maps the input
data type to the smallest built in data type that has enough data bits to hold the input. The stored
integer value of the input is the value of the output. The output always has nominal scaling (slope
= 1.0 and bias = 0.0), so the output does not make a distinction between real world value and
stored integer value.
Example 12.3
For the model of Figure 12.5, the parameters for the Constant block the Signal data types were
specified as Output data type ufix(8) and output scaling value 2 3 . Accordingly, the binary presentation of the constant 5.875 is
2

( 00101.111 ) 2 = 1 2 + 1 2 + 1 2 + 1 2 + 1 2

= ( 5.875 ) 10

The Scaling Strip block removes the scaling and thus it outputs the value
5

( 00101111 ) 2 = 1 2 + 1 2 + 1 2 + 1 2 + 1 2 = ( 47 ) 10

Figure 12.5. Model for Example 12.3

12.1.5 The Data Conversion Inherited Block

The Data Type Conversion Inherited block converts one data type to another using inherited
data types. In other words, this block dictates that different types of data be converted to be all
the same. The first input is used as the reference signal and the second input is converted to the
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reference type by inheriting the data type and scaling information. Either input is scalar expanded
such that the output has the same width as the widest input.
Example 12.4
I the model of Figure 12.6, the input at u from the Constant 2 bloc appears at the output y but the
signal has been converted to that specified by the first input, i.e., ufix(8) 2 3 .

Figure 12.6. Model for Example 12.4

12.1.6 The IC (Initial Condition) Block

The IC (Initial Condition) block sets the initial condition of the signal at its input port, i.e., the
value of the signal at t=0. The block does this by outputting the specified initial condition at t=0,
regardless of the actual value of the input signal. Thereafter, the block outputs the actual value of
the input signal. This block is useful for providing an initial guess for the algebraic state variables
in the loop.
Example 12.5
In the model of Figure 12.7, the Memory block introduces a delay of 1 second while the IC block
establishes an initial condition of 2. The output waveforms with and without the initial condition
are shown in Figure 12.8.

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Figure 12.7. Model for Example 12.5

Figure 12.8. Output waveforms for the model of Figure 12.7

12.1.7 The Signal Conversion Block

The Signal Conversion block converts a signal from one type to another. The block's Output
parameter allows us to choose the type of conversion to be performed. We can choose one of the
four types listed below:
Contiguous copy Converts a muxed signal whose elements occupy discontiguous areas of memory to a vector signal whose elements occupy contiguous areas of memory.
The block does this by allocating a contiguous area of memory for the elements of the muxed signal and copying the values from the discontiguous
areas (represented by the block's input) to the contiguous areas (represented
by the block's output) at each time step.
Bus copy Outputs a copy of the bus connected to the block's input.

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Virtual bus Converts a nonvirtual bus to a virtual bus. This option enables us to combine an
originally nonvirtual bus with a virtual bus.
Nonvirtual bus Converts a virtual bus to a nonvirtual bus.
Example 12.6
In the model of Figure 12.9, the Signal Conversion blocks output is specified as Contiguous copy.
Accordingly the numbers 5.878 and 5.879 originally occupying discontiguous areas of memory,
are converted to a vector signal whose elements occupy contiguous areas of memory as indicated
in the Display block.

Figure 12.9. Model for Example 12.6

12.1.8 The Rate Transition Block

The Rate Transition block transfers data from the output of a block operating at one rate to the
input of another block operating at a different rate. Systems containing blocks that are sampled at
different rates are referred to as multirate systems. The Rate Transition block's parameters allows
us to specify options that trade data integrity and deterministic transfer for faster response and / or
lower memory requirements.
Example 12.7
In the model of Figure 12.10, the parameters for the Discrete ZeroPole blocks 1 and 2 are specified as Zeros: 0.2, Poles: 0.5. The Sample time for the Discrete ZeroPole block 1 is specified as
[ 1 0.5 ] where 1 is the sample time, and 0.5 is the offset. Since the initial condition is zero, the
offset causes no output until t = 0.5 . The Sample time for the Discrete ZeroPole block 2 is spec-

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ified as 0.75 with no offset. Accordingly, the model of Figure 12.10 is a multirate system and the
output waveforms are shown in Figure 12.11.

Figure 12.10. Model for Example 12.7

Figure 12.11. Output waveforms for the multirate model of Figure 12.10

An application of the Rate Transition block is illustrated with the next example.
Example 12.8
The model of Figure 12.12 shows three multirate systems where the sample times are as indicated.
The Rate Transition 1 block behaves as a ZeroOrder Hold block in a fasttoslow transition,
while the Rate Transition 2 block behaves as a Unit Delay block in a slowtofast transition.
After the simulation command is executed, a label appears on the upper left of the block to indicate its behavior. The Rate Transition 1 block behaves as a ZeroOrder Hold block and this is
indicated as ZOH. Likewise, the Rate Transition 2 block behaves as a Unit Delay block and this is
indicated as 1 z . The Unit Delay block is described in Section 2.15, Chapter 2, Page 224, and
the ZeroOrder Hold block is described in Subsection 5.2.3, Chapter 5, Page 523. For other
behaviors of the Rate Transition block, please refer to the Help menu for this block.

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Figure 12.12. Model for Example 12.8

The waveforms displayed by the Scope blocks in Figure 12.12 are shown in Figures 12.13, 12.14,
and 12.15. The amplitude for all three Sine Wave blocks is specified as 2.

Figure 12.13. Waveform for Scope 1 in Figure 12.12

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Figure 12.14. Waveform for Scope 2 in Figure 12.12

Figure 12.15. Waveform for Scope 3 in Figure 12.12

12.1.9 The Signal Specification Block

The Signal Specification block allows us to specify the attributes of the signal connected to its
input and output ports. If the specified attributes conflict with the attributes specified by the
blocks connected to its ports, Simulink displays an error. If no conflict exists, Simulink eliminates
the Signal Specification block from the compiled model, that is, the Signal Specification block
behaves as a virtual block.
Example 12.9
In the model of Figure 12.16, the Zero-Order Hold and the Unit Delay blocks are both specified
for Inherited Sample Time and thus no conflict exists and the Signal Specification block is a virtual block. However, if the Sample Time for the Unit Delay block is changed to 0.2 as shown in
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Figure 12.17, Simulink displays an error message that an illegal rate transition was found involving the Unit Delay block.

Figure 12.16. Model with the Signal Specification block acting as a virtual block

Figure 12.17. Model where the attributes (sample times) of the Signal Specification block do not agree

12.1.10 The Data Type Propagation Examples Block

The Data Type Propagation Examples block shown in Figure 12.18 contains example uses of
Data Type Propagation blocks.

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Figure 12.18. Example uses of Data Type Propagation blocks

12.2 The Signal Attribute Detection SubLibrary

The Signal Attribute Detection SubLibrary contains the blocks described in Subsections
12.2.1 through 12.2.3 below.

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12.2.1 The Probe Block

The Probe block provides essential information about the signal on its input. The block can output the input signal's width, dimensionality, sample time, and/or a flag indicating whether the
input is a complex-valued signal. The block has one input port. The number of output ports
depends on the information that we select for probing. Each probed value is output as a separate
signal on a separate output port. During simulation, the block's icon displays the probed data.
Example 12.10
In the model of Figure 12.19, the Display 1 block indicates the number of the elements of the
probed signal, the Display 2 block is a 2 1 vector that specifies the period and offset of the sample time, respectively, the Display 3 block shows the value 0 implying that the probed signal is not
complex, the Display 4 block indicates the output the dimensions of the probed signal, and the
Display 5 block shows the value 0 implying that the probed signal is not framed.*

Figure 12.19. Model for Example 12.10

* Please logon to http://festvox.org/docs/speech_tools1.2.0/x15608.htm#SIGPR-EXAMPLEFRAMES for a

description of framebased signals.

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12.2.2 The Weighted Sample Time Block

The Weighted Sample Time block adds, subtracts, multiplies, or divides the input signal, u, by a
weighted sample time Ts. The math operation is specified with the Operation parameter. Also, we
can specify to use only the weight with either the sample time or its inverse. We enter the weighting factor in the Weight value parameter. If the weight is 1, w is removed from the equation.
Example 12.11
In the model of Figure 12.20, the parameters for all blocks are specified as annotated. Thus, the
Display 1 block shows the values of the constant blocks, the Display 2 block shows the Weighted
Sample Time, the Display 3 block shows the inverse of the Weighted Sample Time, and the Display 4 block shows the results of the division u Ts w , where w = 2 for u = 1, 2, and 3 .

Figure 12.20. Model for Example 12.11

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12.2.3 The Width Block

The Width block generates an output that displays the width of its input vector, or the sum of the
widths of two or more vectors.
Example 12.12
In the model of Figure 12.21, the vectors A and B are specified in MATLABs Command Window as
A=[1 3 5 7 9]; B=[2 4 6 8];

The Width block outputs the sum of the widths of the vectors A and B .

Figure 12.21. Model for Example 12.12

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Summary
12.3 Summary
The Data Type Conversion block converts an input signal of any Simulink data type to the
data type and scaling specified by the block's Output data type mode, Output data type, and/or
Output scaling parameters.
The Data Type Duplicate block is used to ascertain that all inputs have the same data type.
We use the Data Type Duplicate block to check for consistency of data types among blocks. If
all signals do not have the same data type, the block returns an error message.
The Data Type Propagation block allows us to control the data type and scaling of signals in
our model. We can use this block in conjunction with fixed-point blocks that have their Specify data type and scaling parameter configured to Inherit via back propagation.
The Data Type Scaling Strip block removes the scaling off a fixed point signal. It maps the
input data type to the smallest built in data type that has enough data bits to hold the input.
The stored integer value of the input is the value of the output.
The Data Type Conversion Inherited block converts one data type to another using inherited data types. In other words, this block commands that different types of data be converted
to be all the same. The first input is used as the reference signal and the second input is converted to the reference type by inheriting the data type and scaling information.
The IC (Initial Condition) block sets the initial condition of the signal at its input port, i.e.,
the value of the signal at t=0. The block does this by outputting the specified initial condition
at t=0, regardless of the actual value of the input signal. Thereafter, the block outputs the
actual value of the input signal.
The Signal Conversion block converts a signal from one type to another. The block's Output
parameter lets us select the type of conversion to be performed. We can choose one of four
types: Contiguous copy, Bus copy, Virtual bus, or Nonvirtual bus.
The Rate Transition block transfers data from the output of a block operating at one rate to
the input of another block operating at a different rate. Systems containing blocks that are
sampled at different rates are referred to as multirate systems.
The Signal Specification block allows us to specify the attributes of the signal connected to its
input and output ports. If the specified attributes conflict with the attributes specified by the
blocks connected to its ports, Simulink displays an error at the beginning of a simulation.
The Data Type Propagation Examples block contains example uses of Data Type Propagation blocks.
The Probe block provides essential information about the signal on its input. The block can
output the input signal's width, dimensionality, sample time, and/or a flag indicating whether
the input is a complex-valued signal.

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The Weighted Sample Time block adds, subtracts, multiplies, or divides the input signal, u, by
a weighted sample time Ts. The math operation is specified with the Operation parameter.
The Width block generates an output that displays the width of its input vector, or the sum of
the widths of two or more vectors.

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