rangkaian voltage shifting

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rangkaian voltage shifting

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You are on page 1of 5

Number 6001

Dr. Maciej A. Noras

Abstract A brief description of voltage shifting circuits.

Introduction

2U

U

U

In applications requiring a unipolar AC voltage sig0

0

nal, the signal may be delivered from a bi-polar

t

t

T

voltage amplifier/generator and repositioned rela-U

tive to a zero volt reference (an earth ground) usT

ing a voltage level shifting circuit. In addition, the

voltage level shifting technique is frequently used

to generate high voltage DC outputs from lower

Figure 2: Shifted signal.

voltage AC sources. The maximum voltage (AC

The steady state current drawn from the AC

or DC) produced at the output of a single stage of

source

(amplifier, for example) follows the depenthe level shifting circuit is nominally equal to the

dency:

peak-to-peak value of the AC signal delivered by

C1 C2 dU

the amplifier/generator.

(1)

I=

C1 + C2 dt

For a sinusoidal AC voltage input

AC voltage shifting

U = U sin (2ft)

(2)

An example of an AC voltage shifting circuit diaC1 C2

I=

2fU cos (2ft)

(3)

gram (Villard circuit) is shown in Figure 1. FigC1 + C2

ure 2 shows the input and the output voltage of

The output voltage Uout across the capacitor C2

the circuit. In order to move the voltage signal

is:

toward negative values, it is necessary to reverse

C1

Uout = U

(4)

the diode shown on the schematic in Figure 1. AdC1 + C2

ditionally, if the capacitors C1 and C2 are polar,

they also need to be reversed.

C1

C2

amplifier

(AC source)

load

TREK, INC.

U=1000 sin (2ft) V;

f=100 Hz;

C1=C2=63 nF.

The maximum current is 20 mA (eq. 3) and the

voltage across the C2 is 1000 V (eq. 4). These

results are shown in Figure 3.

When the capacitor C1 becomes smaller

(C1=31.5 nF), the output voltage value drops (Figure 4) according to equation 4. Current I also decreases, as the total capacitance of the circuit decreased.

Lockport, NY 14094

Example

0408/MAN Rev. 2

page 1 of 5

Number 6001

input voltage

voltage, V

2000

1000

0

1000

2000

voltage across C1

voltage, V

2000

1000

0

1000

2000

voltage across C2

voltage, V

2000

1000

0

1000

2000

current, mA

80

60

40

20

0

20

40

60

80

0.01

0.02

0.03

0.04

0.05

time, s

0.06

0.07

0.08

0.09

0.1

Figure 3: Simulation results for the circuit shown in Figure 1, where f=100 Hz, C1=C2=63 nF.

When considering a choice of capacitors for

the voltage shifting circuit, two factors have to

be taken into account: total capacitance of C1

C1C2

and C2 connected in series( C1+C2

), and the ratio

of a capacitive divider formed by both capacitors

C1

). It is important to pay attention on the volt( C1+C2

age rating of the capacitors.

The frequency of the input voltage signal also influences choice of capacitors. For example, if the

frequency is changed from 100 Hz to 1 kHz, the

current drawn from the source multiplies by the

factor of 10 (Figure 5). Capacitor values have to

be lowered by the factor of 10 to get back to the

20 mA current level.

DC voltage generation

from Figure 1, a DC high voltage signal can be obtained. Figure 7 presents a two stage DC voltage

multiplier generating positive output DC voltage.

A similar, two stages negative DC voltage circuit

is shown in Figure 8.

+ D.C.

amplifier

(AC source)

The output voltage Uout from the capacitive divider is maximized for C1>>C2. For example, let

C1=12,000 nF and C2=1 nF. Results of a simulation with these C1 and C2 values are shown in

Figure 6.

C

D

TREK, INC. 190 Walnut Street Lockport, NY 14094 Tel: (716) 438-7555

Call: 1 800 FOR TREK FAX: (716) 201-1804

Copyright 2013 TREK, INC.

0408/MAN Rev. 2

page 2 of 5

Number 6001

input voltage

voltage, V

2000

1000

0

1000

2000

voltage across C1

voltage, V

2000

1000

0

1000

2000

voltage across C2

voltage, V

2000

1000

0

1000

2000

current, mA

80

60

40

20

0

20

40

60

80

0.01

0.02

0.03

0.04

0.05

time, s

0.06

0.07

0.08

0.09

0.1

Figure 4: Simulation results for the circuit shown in Figure 1, where f=100 Hz, C1=31.5 nF, C2=63 nF.

D

- D.C.

amplifier

(AC source)

n * 2U

2U

U

0

-U

T

The number of stages that can be used in this

kind of design is limited by current capabilities of

Copyright 2013 TREK, INC.

0408/MAN Rev. 2

Web: www.trekinc.com

page 3 of 5

Number 6001

input voltage

voltage, V

2000

1000

0

1000

2000

voltage across C1

voltage, V

2000

1000

0

1000

2000

voltage across C2

voltage, V

2000

1000

0

1000

2000

current, mA

800

600

400

200

0

200

400

600

800

0.001

0.002

0.003

0.004

0.005

time, s

0.006

0.007

0.008

0.009

0.01

Figure 5: Simulation results for the circuit shown in Figure 1, where f=1000 Hz, C1=C2=63 nF.

the circuit. The DC output voltage has an AC voltage ripple U (Figure 10) given by equation [1]:

n * 2U

no load

U

with load

U =

I n (n + 1)

,

fC

4

(5)

T=1/f

where I is the load current and n is the number of

stages. A voltage drop U (Figure 10) due to the

load can be calculated using formula [1]:

I

U =

fC

2n3 n

3 6

Lockport, NY 14094

Copyright 2013 TREK, INC.

(6)

References

Voltage Engineering: Fundamentals. Newnes,

2 edition, 2000.

Tel:

E-mail: sales@trekinc.com

0408/MAN Rev. 2

(716) 438-7555

Web: www.trekinc.com

page 4 of 5

Number 6001

voltage across C1

2000

1000

1000

voltage, V

voltage, V

input voltage

2000

0

1000

0

1000

2000

2000

voltage across C2

1000

current, mA

voltage, V

2000

0

1000

2000

8

6

4

2

0

2

4

6

8

current, mA

current through C1

8

6

4

2

0

2

4

6

8

0.02

0.04

0.06

0.08

time, s

C1=12000 nF, C2=1 nF, f=100 Hz

0.1

Figure 6: Simulation results for f=1000 Hz, C1=12000 nF, C2=1 nF.

Copyright 2013 TREK, INC.

0408/MAN Rev. 2

Web: www.trekinc.com

page 5 of 5

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