5 views

Uploaded by Krishna Saladi

verilog

- A1_001_A_GIT 0763
- Microwind and DSCH User Manual v3.1 Lite
- Question Papers_ EDC
- Review on Double-gate MOSFETs- Scaling, Operation, Challenges and Opportunities.
- IEEE paper on Silicon nanowires and their significance
- Cadence Digital Design Synthesis Flow
- Computer Organisation- IIT Kanpur
- 2-sem-ece.pdf
- edc- 2marks
- Asic and Fpga Design
- DDPP4TOCweb
- HDL Coder and Matlab
- vlsi1
- Low Power Dissipation in Johnson Counter using DFAL Technique
- lect09_fabrication2
- AO4800
- Intro of vlsi tech.pdf
- ISL958_datasheet
- Xilinx ISE in-Depth Tutorial
- Material Excelente

You are on page 1of 4

simulation in Cadence

G. Angelov1), M. Hristov

Technical University of Sofia, Faculty of Electronics Engineering and Technology

8 Kliment Ohridski Str

1797 Sofia, Bulgaria

1)

gva@ecad.tu-sofia.bg

Abstract- The paper presents an open source

implementation of the EKV MOSFET compact model in

Matlab and in Verilog-A codes; the Verilog-A code is simulated

in Cadence Spectre circuit simulator. The implemented EKV

model uses a simplified formulation given by Godfrey and

Lazzaro with explicit threshold voltage (rather than explicit

pinch-off voltage). Verification is performed against

measurements taken from the literature and against the

simulation results obtained by simulation with the conventional

BSIM3v3 compact model of a 0.35 m CMOS technology

design kit.

I.

INTRODUCTION

frequency integrated circuits, the compact MOSFET model

is the key enabler to efficiently achieving the analog design

goals. Recently, the demand for flexible, consistent,

physics-based and full-featured compact models has

increased particularly in view of the sub-100 nm CMOS

technologies.

Generally, MOSFET device models are built-in circuit

simulators using general-purpose programming languages

like C/C++ or Fortran. Accordingly, they are targeted

specifically to the interface and internal data structures of

their host simulator, and hence are inherently non-portable.

Facilities for adding custom open source models (or userdefined models) have been made available in some

simulation environments, but such interfaces have typically

been non-standard, non-portable, and inefficient. Under

these conditions, modification/optimization of a model or

new model creation becomes a time-consuming and errorprone task.

A comprehensive attitude to overcome this gap between

model development and its implementation in simulators

might be in formulating open source models in analog

HDLs such as Verilog-A/AMS [1]. In the recent years

Verilog-A has become increasingly viewed as a leading

candidate for new compact model development. The recent

rise in interest for Verilog-A based compact model

development has resulted in compiled solutions becoming

available, with an ongoing emphasis on improved

simulation performance.

At the stage of model optimization, the general-purpose

computational package Matlab might be used as a platform

for modifying and testing the model equations. The high

extraction and optimization of model parameters.

In this context the EKV MOSFET model is excellent

example of a compact model suitable for implementation in

Matlab as it provides accurate modeling results while having

small number of parameters. The EKV model employs

many fewer model parameters than the latest BSIM model

versions [2]. And it has been implemented in lots of

commercial circuit simulators (Spectre, PSpice, etc.).

The present paper presents the basic approach to provide

circuit designers with more flexible and straightforward

access to simulation models. That is, to first modify and/or

adapt a compact model for the particular design needs using

general purpose mathematical platform, then to code it into

a HDL, and finally to embed it in a library of the CAD tool

used in the design process, making it available for circuit

designers. In particular, we have first implemented an EKV

model formulation given by Godfrey and Lazzaro [5] (with

explicit formulation of the threshold voltage rather than the

pinch-off voltage) in Matlab, then we have recoded it in

Verilog-A, and finally implemented it as a cellview in

Cadence Spectre simulator.

II. GODFREY-LAZZARO FORMULATION OF THE EKV

MODEL

The original EKV model (Enz, Krummenacher, and

Vittoz) is described in detail in [3] and its version EKV v2.6

(Bucher, Lallement, Enz, Thodoloz, Krummenacher) in

[4]. Despite small number of parameters in EKV v2.6, it still

remains fairly complex. That is why we take the simplified

version of the model set forth by Godfrey and Lazzaro in [5].

The latter model (it is proceeds from the Vittoz-Oguey

approximation for obtaining a single expression for the drain

current) offers simpler treatment of the EKV modeling

methodology while retaining its applicability for circuit

simulations. .

Below, we briefly present the basic equations of the

model formulation by Godfrey-Lazzaro (GL) used in our

implementations in Matlab and Verilog-A.

A. Smoothing Function and Drain Current

For MOSFETs in strong inversion the channel current is a

quadratic function while for MOSFETs in weak inversion

the channel current is an exponential function. Vittoz and

that interpolates (smoothes) these separate expressions [5] :

(x 2)2 , x >> 0

(1)

F ( x ) = ln 1 + e

=

e x , x << 0

This function smoothly interpolates between the quadratic

and exponential operational regimes and allows to express

the MOSFET behavior in the otherwise difficult case of

moderate inversion. The EKV model is based on the same

interpolation approach as well. This is a mathematical trick

and it is not really physically motivated.

Using the smoothing function (1) the channel current for

the MOSFET takes the form

2

ID =

x2

2U T2

( I F I R )(1 + c V DS )

(

(

(3)

(4)

V + + (V V ) , NMOS(V 0)

b

b

B

S

BS

FB

(5)

VTh =

V FB b b (VB VS ) , PMOS (V BS 0)

The flat band voltage is given by

V FB = ms

Q ss

C ox

(6)

Si = 11.7 0.

The Fermi potential (NA the doping concentration) is

b = 2 F = 2U T ln

NA

ni

(7)

1

C ox

2 10 6 Si

(11)

s =

s1 , s1 0.1 b

(12)

In (12)

VG V FB V B + V S

VTh

(13)

Effective channel width W, and channel length L

determine the device aspect ratio W/L. Although related to

the metallurgical length, shorter than the mask length

(referred to as drawn length in the Godfrey-Lazzaro

model) owing to lateral diffusion, the effective channel

length is rather an electrical parameter to which drain

current is inversely proportional. Its determination is

strongly correlated with the measurement and modeling of

the I-V characteristics. In Godfrey-Lazzaro model, the

following equations are used to calculate the effective length

and width:

L = Ld 0.33 , W = Wd 0.49

(14)

that the physical parameters are reasonably independent of

each other and therefore can be separately adjusted to reflect

and fit the device physical behaviors. This enables the

designer to experiment with circuit behavior as a function of

changes in physical parameter values, and associate this

with feasible device fabrication processes.

(8)

ni = 1.64 1015 T 1.706 e

C ox

C ox + C dep

which is a function of the surface potential s:

s1 = b tanh

B. Threshold Voltage

What differs most in the Godfrey-Lazzaro formulation

compared to the well-recognized EKV model is that

Godfrey and Lazzaro use explicit formulation of the

threshold voltage while the EKV uses explicit formulation

of the pinch-off voltage.

The threshold voltage is

C. Other Quantities

The remaining model quantities in the GL model are

listed below. The transfer parameter (appearing in (2))

W

= 10 4 C ox

(10)

L

is temperature dependent. Its temperature dependence arises

from the dependence on temperature of the mobility =

(T).

In the above equations Cox = qox/tox and

(2)

the transfer parameter, UT is the thermal voltage UT =

kT/q (0.026 V at 300 K). The forward current and the

reverse current are, respectively, given with

(9)

Eg =

q 1.785+ 9.025105T 3.5 107T 2 , 150< T 300

Eg

2 kT

(8)

sequential processing language like Matlab to allow the

input voltages, VD; VS; VG and VB to be vectors. The

resulting current is returned also as a vector. This makes it

easy to use the code to produce I-V curves. It would be

correspondingly easy to apply the same vectors to test

equipment for device measurement.

channel length modulation (Early) effect.

V0 = 1./lambda_c;

gamma = (1/Cox)*sqrt (2*e_s*rho*1e6) ; % body

effect

%

-------------------------------------%

Threshold voltage:

%

-------------------------------------Vt = Vfb + abs(phi_b) + gamma*sqrt(abs(phi_b)

- Vbs);

phi_s = phi_b*tanh((Vg - (Vfb + Vbs))./Vt);

if(phi_s < phi_b/10) phi_s = phi_b/10; end;

Cdep = sqrt(rho*e_s*1e6./(2.0*phi_s));

kappa = Cox./(Cox + Cdep);

%

%

%

k1

U1

Vds

-------------------------------------Notational expressions:

-------------------------------------= 2*beta*(Ut^2)./kappa;

= 1/(2*Ut);

= Vd - Vs;

%

-------------------------------------%

Core model equations:

%

-------------------------------------If

= (log(1 + exp(U1*(kappa.*(Vg - Vt) Vs)))).^2;

Ir

= (log(1 + exp(U1*(kappa.*(Vg - Vt) Vd)))).^2;

Idsi = (If - Ir);

Ids = k1.*Idsi.*(1 + lambda_c.*Vds);

Afterwards, the respective numeric values are input in

Matlab and Verilog-A versions of the GL model to perform

a comparison (the Verilog-A version is simulated again in

Cadence Spectre). All characteristics have been obtained

using a single parameter set. Since the simulation results of

the Matalb and Verilog-A implementations of the GodfreyLazzaro model give identical results, in the figures below

we denote these results just with a EKV GL simulation

label.

For the simulated characteristics we have calculated the

integral error between each simulated and experimental

characteristic by taking the ratio of the integrals of the

respective curves. The accuracies are in Table I.

In the output characteristic (Figure 1) we observe quite

good agreement between simulation and measurement

results 4.21 % accuracy. For the lower gate voltages (Vg =

1, 1.3 V) we observe discrepancy between measurement/

BSIM3v3 and our simulation of the Godfrey-Lazzaro model.

Figure 1. Output characteristics

I

ds

x 10

vs. V @ V

ds

gs

EKV GL sim

BSIM3v3 simulation

measurement [6]

cellview in the libraries of Cadence Design Framework.

Below we provide a portion of the GL model Verilog-A

code.

Ids [A]

analog begin

VG = V(g); VS = V(s); VD = V(d);

// Threshold voltage

Vt = Vfb + abs(phi_b) + gamma*sqrt(abs(phi_b)

- Vbs);

.

// Drain current (66)

Id = k1.*Idi.*(1 + lambda_c.*Vd);

1.5

2.5

VBS = 0 V; L = 0.7 m W = 20 m..

between measurement and Godfrey-Lazzaro EKV

implementation is very good 5.38 %.

I

ds

x 10

vs. V @ V

gs

bs

EKV GL sim

ISI data

ds

[A]

end // analog

endmodule

20 m. In the figures below we present simulation results

obtained by our implementation of the Godfrey-Lazzaro

model, the results obtained by the BSIM3v3 within the

Cadence Spectre simulator (for a 0.35 m CMOS

technology with length set to 0.7 m) and the measurements

taken from [6]. Simulated characteristics are presented in

Figures 1 to 4; they are produced in Matlab. The BSIM3v3

simulation results are taken from the Spectre output file and

0.5

Vds [V]

//

// Branch contributions

//

I(d,s) <+ Id;

0.5

1.5

2.5

Vgs [V]

IDS(VGS) @ VBS = 2.5, 2.0, 1.5, 1.0, 0.5 and 0 V ;

VDS = 0.05 V; L = 0.7 m W = 20 m.

TABLE I

ACCURACY OF THE EKV-GL MODEL SIMULATIONS

x 10

Characteristic

EKV GL sim

ISI data

V. CONCLUSION

0

0.5

1.5

ds

2.5

[V]

gmd = dIDS/dVDS(VDS) @ VGS = 1.020, 1.316, 1.612, 1.908, 2.204 and

2.500 V ; VBS = 0 V; L = 0.7 m W = 20 m.

g vs. V @ V

2.5

x 10

gs

bs

EKV GL sim

ISI data

1.5

gs

[A]/[V]

ds

g = dI /dV

4.21

5.38

6.14

12.6

7.08

is 7.08 %.

md

ds

= dI /dV

ds

[A]/[V]

Accuracy %

Ids(Vds)@Vgs

Ids(Vgs)@Vbs

gmd

gm

Average

0.5

with compact models for circuit-level design purposes has

been suggested. Simulation results have demonstrated the

validity of the method for analyzing MOSFET device

behaviors with an open source model (Gofrey-Lazzaro

formulation of the EKV model) in a standard IC design

CAD tool (Cadence). The open source code allows direct

access to model equations and parameters where the use of a

general purpose mathematical platform (such as Matlab)

plays an indispensable role. The fact that the model is coded

in a HDL (Verilog-A), makes it portable and applicable to

different simulation environments.

Coupling the flexibility of open source models and their

portable applicability to industry standard IC design tools

leads to real benefits for both design and educational

purposes.

ACKNOWLEDGMENT

0.5

1.5

gs

2.5

[V]

the Project BY-TH-115/2005.

gm = dIDS/dVGS(VGS) @ VBS = 2.5, 2.0, 1.5, 1.0, 0.5 0 V ;

VDS = 0.05 V; L = 0.7 m W = 20 m.

REFERENCES

[1]

gm and gmd characteristics. Here the accuracy is much

lower compared to the other characteristics. This is expected

since these are second order relations.

In Table I are given the average accuracies of the

simulated characteristics with the EKV-GL model.

The results demonstrate the validity of the suggested

method for open simulations using standard HDL model

implementation. The fast and accurate simulations with

accuracy comparable to commercial simulators show the

practical applicability of the method to circuit-design and

optimization purposes. The main advantages are that the

method offers flexibility of modeling by enabling the

designer to directly access model equations and the

portability of the model allowing the use of the model in

different CAD tools.

Changing the paradigm for compact model integration in circuit

simulators using Verilog-A, Technical Proceedings of the 2003

Nanotechnology Conference and Trade Show (Nanotech 2003), Vol.

2, February 2003, pp. 376379.

[2] G. Angelov, T. Takov, and St. Risti "MOSFET Models at the Edge

of 100-nm Sizes", Proc. of the 24th Intl. Conf. on Microelectronics

(MIEL 2004), Ni, Serbia and Montenegro, Vol. 1, pp. 295-298, May

2004.

[3] C. C. Enz, F. Krummenacher and E. A. Vittoz, An Analytical MOS

Transistor Model Valid in All Regions of Operation and Dedicated to

Low-Voltage and Low-Current Applications, Journal of Analog

Integrated Circuits and Systems Processing, vol. 8, pp. 83114, 1995.

[4] M. Bucher, C. Lallement, C. Enz, F. Thodoloz, F. Krummenacher,

The EPFLEKV MOSFET Model Equations for Simulation,

Technical Report, Model Version 2.6, Revision II (July 1998).]

[5] M. D. Godfrey, J. Lazzaro, A Device Model for Analog VLSI

Circuits, 1997 (available online at

http://qss.stanford.edu/~godfrey/analog_systems/models_2/CMOS_M

odeling_2.pdf

[6] M. Bucher, C. Lallement, C. Enz and F. Krummenacher, Accurate

MOS Modelling for Analog Circuit Simulation usingthe EKV MOST

Model, IEEE ISCAS 96, pp. 703-6 vol.4, 1996.

- A1_001_A_GIT 0763Uploaded byAdam Ck
- Microwind and DSCH User Manual v3.1 LiteUploaded byPavan Pathak
- Question Papers_ EDCUploaded byrose308
- Review on Double-gate MOSFETs- Scaling, Operation, Challenges and Opportunities.Uploaded byIJAR Journal
- IEEE paper on Silicon nanowires and their significanceUploaded byKarthigai Pandian M
- Cadence Digital Design Synthesis FlowUploaded bySathish Kumar
- Computer Organisation- IIT KanpurUploaded bySuperdudeGaurav
- 2-sem-ece.pdfUploaded byMohamed Yousuf
- edc- 2marksUploaded byMalarselvi Kumaran
- Asic and Fpga DesignUploaded byGiri Reddy
- DDPP4TOCwebUploaded byravindarsingh
- HDL Coder and MatlabUploaded bykhoa
- vlsi1Uploaded byKirthi Rk
- Low Power Dissipation in Johnson Counter using DFAL TechniqueUploaded byEditor IJRITCC
- lect09_fabrication2Uploaded byorengeneral
- AO4800Uploaded byMuhammad Ramdhan Musiam
- Intro of vlsi tech.pdfUploaded byVimal Raj
- ISL958_datasheetUploaded byCristian Sen Gonzalez
- Xilinx ISE in-Depth TutorialUploaded bySanjay Singh
- Material ExcelenteUploaded byJean Carlos Zabaleta
- 20005593 AUploaded byTest
- Lecture_6Uploaded byvuaphu
- labDDCA_Ch4Uploaded byCao Huy
- PVT Variation Tolerant Standby Power Reduction Techniques for Submicron SRAMsUploaded byspicemonkey
- Modeling and Simulation of a Grid-Tied 21.0 kWp Real Solar Power Plant as Case Study, Using the VHDL-AMS LanguageUploaded byFrank IHdez
- 04523220Uploaded byhimaja1
- V Balasubrahmanyam D's ResumeUploaded byBalasubrahmanya VaRma Dandu
- 96 Journ JAICSP TransUploaded byandrej2112
- EEEB273 XtorsFormulaUploaded bygahbi7
- cv shehryar hussainUploaded byShah Bukhari Syed

- MentorUploaded byiC60
- 297_49023_CO3-STICKDIAGRAMS-28-7-15Uploaded byKrishna Saladi
- 104616 Pulse Modulation(Pcm,Pwm,Communiation)Uploaded bychetanajitesh76
- Brain Gate PptUploaded byKrishna Saladi
- 8051 TutorialUploaded byadtest91
- 8051 Instruction Set Rv01Uploaded bylizhi0007
- angle modUploaded byKrishna Saladi
- 09 Mujeeb Mobility Study (5)Uploaded byKrishna Saladi
- 8254 Programmable Interval TimerUploaded byNeel Kanak
- m DellingUploaded byKrishna Saladi
- 01393990Uploaded byKrishna Saladi
- Rs232 Serial CommunicationUploaded byJuan Diaz
- Different Kinds of ISAs We Have Looked at LC3 ISA,Uploaded byrongdenpr
- IO InterfacingUploaded byKrishna Saladi
- 07 Basic ElectronicsUploaded byKrishna Saladi
- Induction MachinesUploaded byprakashee417534
- 555 Timer WorksheetUploaded byKrishna Saladi

- dev_002219 chassis testingUploaded byAbinash Kumar
- Delmia DPM M6 - Create Output FilesUploaded bykakaka22
- Methodology for the Calibration of VISSIM in Mixed TrafficUploaded byUsman Rafiq
- 0420-NOS as AnswersUploaded byTebello Ratau
- SG2V3_UserManualUploaded byCarlosSinchi
- Ems 2015Uploaded byExcequiel Quezada
- IE_403_LAB_1Uploaded byAldo Ruiz
- Bluetooth SimulationUploaded bytidus152
- Fuzzy logic digital analogue interfaces for accurate mixed-signal simulationUploaded bySundeep Chopra
- EAAP33 PresentationUploaded byamvita
- AspenInPlantCostEstimatorV7 3 1-UsrUploaded byLyn Gutiérrez
- A Matlab Based Simulator for Autonomous Mobile RobotsUploaded byanaffira
- Blocksim FlyerUploaded byPravin Tambe
- Multisim Elvis.user.GuideUploaded byMonica Pereira Giannareas
- Alpha AirlineUploaded byAngela Reyes
- CPEE Big Data Analytics and Optimization CurriculumUploaded byKaushik Madaka
- HRMR the Influence of Technology (Stone Et Al., 2014)Uploaded byShalini Kolla
- ChevronTexaco R&D Addresses Upstream Technology ChallengesUploaded bydrilling moneytree
- ANSYS Fluid Dynamics Update - ANSYSUploaded byBhaskar Nandi
- SSRN-id1668453.pdfUploaded byRafiki
- 2013-01-0151 (1)Uploaded byxmanian9
- SAE 2005-01-1125Uploaded byJeremy Diaz
- Reducing Lead Times in a Two-process Cell Using Lean and SimulationUploaded byHadi P.
- Computer Hardware Servicing NC IIUploaded byalvindelacruz
- MentorGraphic - Computational Fluid Dynamics Analysis & Simulation ExplainedUploaded byornot
- Architecture Based SystemsUploaded byCarlos Espinosa
- SWEEP get_closer_to_autodesk-industrial_machinery_presentation.pdfUploaded bycod
- GE6sigmaUploaded byFisher1987
- Russo, Spreafico - Triz industrial case studies.pdfUploaded byMorales Nieto Jeovani Marcos
- Resume ArifinUploaded byapi-27411749