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MULTICONVERTER UNIFIED POWER-QUALITY CONDITIONING SYSTEM: MC-UPQC

ABSTRACT
ABSTRACT

In order to meet PQ standard limits, it may be necessary to include some sort of compensation. Modern solutions can be found in the form of active rectification or active filtering. A shunt active power filter is suitable for the suppression of negative load influence on the supply network, but if there are supply voltage imperfections, a series active power filter may be needed to provide full compensation. In recent years, solutions based on flexible ac transmission systems (FACTS) have appeared. The application of FACTS concepts in distribution systems has resulted in a new generation of compensating devices. A unified power quality conditioner (UPQC) is the extension of the unified power-flow controller (UPFC) concept at the distribution level. It consists of combined series and shunt converters for simultaneous compensation of voltage and current imperfections in a supply feeder. An IPFC consists of two series VSCs whose dc capacitors are coupled. This allows active power to circulate between the VSCs. With this configuration, two lines can be controlled simultaneously to optimize the network utilization. An interline unified power-quality conditioner (IUPQC), which is the extension of the IPFC concept at the distribution level. The IUPQC consists of one series and one shunt converter. It is connected between two feeders to regulate the bus voltage of one of the feeders, while regulating the voltage across a sensitive load in the other feeder. In this configuration, the voltage regulation in one of the feeders is performed by the shunt-VSC. However, since the source impedance is very low, a high amount of current would be needed to boost the bus voltage in case of a

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voltage sag/swell which is not feasible. It also has low dynamic performance because the dc-link capacitor voltage is not regulated.

This paper presents a new unified power-quality conditioning system (MC-UPQC), capable of simultaneous compensation for voltage and current in multi-bus/multi-feeder systems. In this configuration, one shunt voltage-source converter (shunt VSC) and two or more series VSCs exist. The system can be applied to adjacent feeders to compensate for supply-voltage and load current imperfections on the main feeder and full compensation of supply voltage imperfections on the other feeders. In the proposed configuration, all converters are connected back to back on the dc side and share a common dc-link capacitor. Therefore, power can be transferred from one feeder to adjacent feeders to compensate for sag/swell and interruption. The proposed topology can be used for simultaneous compensation of voltage and current imperfections in both feeders by sharing power compensation capabilities between two adjacent feeders which are not connected. The system is also capable of compensating for interruptions without the need for a battery storage system and consequently without storage capacity limitations. The performance of the MC-UPQC as well as the adopted control algorithm is illustrated by simulation.

I. INTRODUCTION

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With increasing applications of nonlinear and electronically switched devices in distribution systems and industries, power-quality (PQ) problems, such as harmonics, flicker, and imbalance have become serious concerns. In addition, lightning strikes on transmission lines, switching of capacitor banks, and various network faults can also cause PQ problems, such as transients, voltage sag/swell, and interruption. On the other hand, an increase of sensitive loads involving digital electronics and complex process controllers requires a pure sinusoidal supply voltage for proper load operation [1]. In order to meet PQ standard limits, it may be necessary to include some sort of compensation. Modern solutions can be found in the form of active rectification or active filtering [2]. A shunt active power filter is suitable for the suppression of negative load influence on the supply network, but if there are supply voltage imperfections, a series active power filter may be needed to provide full compensation [3]. In recent years, solutions based on flexible ac transmission systems (FACTS) have appeared. The application of FACTS concepts in distribution systems has resulted in a new generation of compensating devices. A unified power-quality conditioner (UPQC) [4] is the extension of the unified power-flow controller (UPFC) [5] concept at the distribution level. It consists of combined series and shunt converters for simultaneous compensation of voltage and current imperfections in a supply feeder .

Recently, multiconverter FACTS devices, such as an interline power-flow controller (IPFC) [9] and the generalized unified power-flow controller (GUPFC) [10] are introduced. The aim of these devices is to control the power flow of

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multilines or a subnetwork rather than control the power flow of a single line by, for instance, a UPFC. When the power flows of two lines starting in one substation need to be controlled, an interline power flow controller (IPFC) can be used. An IPFC consists of two series VSCs whose dc capacitors are coupled. This allows active power to circulate between the VSCs. With this configuration, two lines can be controlled simultaneously to optimize the network utilization. The GUPFC combines three or more shunt and series converters. It extends the concept of voltage and power-flow control beyond what is achievable with the known two- converter UPFC. The simplest GUPFC consists of three converters—one connected in shunt and the other two in series with two transmission lines in a substation. The basic GUPFC can control total five power system quantities, such as a bus voltage and independent active and reactive power flows of two lines. The concept of GUPFC can be extended for more lines if necessary. The device may be installed in some central substations to manage power flows of multilines or a group of lines and provide voltage support as well. By using GUPFC devices, the transfer capability of transmission lines can be increased significantly. Furthermore, by using the multiline-management capability of the GUPFC, active power flow on lines cannot only be increased, but also be decreased with respect to operating and market transaction requirements. In general, the GUPFC can be used to increase the transfer capability and relieve congestions in a flexible way. This concept can be extended to design multiconverter configurations for PQ improvement in adjacent feeders. For example, the interline unified power-quality conditioner (IUPQC), which is the extension of the IPFC concept at the distribution level, has been proposed in [11]. The IUPQC consists of one series and one shunt converter. It is connected between two feeders to regulate the bus voltage of one of the feeders, while regulating the voltage across a sensitive load in

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the other feeder. In this configuration, the voltage regulation in one of the feeders is performed by the shunt-VSC. However, since the source impedance is very low, a high amount of current would be needed to boost the bus voltage in case of a voltage sag/swell which is not feasible. It also has low dynamic performance because the dc-link capacitor voltage is not regulated. In this paper, a new configuration of a UPQC called the multiconverter unified power-quality conditioner (MC-UPQC) is presented. The system is extended by adding a series-VSC in an adjacent feeder. The proposed topology can be used for simultaneous compensation of voltage and current imperfections in both feeders by sharing power compensation capabilities between two adjacent feeders which are not connected. The system is also capable of compensating for interruptions without the need for a battery storage system and consequently without storage capacity limitations.

POWER QUALITY

The contemporary container crane industry, like many other industry segments, is often enamored by the bells and whistles, colorful diagnostic displays, high speed performance, and levels of automation that can be achieved. Although these features and their indirectly related computer based enhancements are key

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issues to an efficient terminal operation, we must not forget the foundation upon which we are building. Power quality is the mortar which bonds the foundation blocks. Power quality also affects terminal operating economics, crane reliability, our environment, and initial investment in power distribution systems to support new crane installations. To quote the utility company newsletter which accompanied the last monthly issue of my home utility billing: ‘Using electricity wisely is a good environmental and business practice which saves you money, reduces emissions from generating plants, and conserves our natural resources.’ As we are all aware, container crane performance requirements continue to increase at an astounding rate. Next generation container cranes, already in the bidding process, will require average power demands of 1500 to 2000 kW – almost double the total average demand three years ago. The rapid increase in power demand levels, an increase in container crane population, SCR converter crane drive retrofits and the large AC and DC drives needed to power and control these cranes will increase awareness of the power quality issue in the very near future.

POWER QUALITY PROBLEMS

For the purpose of this article, we shall define power quality problems as:

‘Any power problem that results in failure or mis operation of customer equipment, manifests itself as an economic burden to the user, or produces negative impacts on the environment.’

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When applied to the container crane industry, the power issues which degrade power quality include:

• Power Factor • Harmonic Distortion • Voltage Transients • Voltage Sags or Dips • Voltage Swells The AC and DC variable speed drives utilized on board container cranes are significant contributors to total harmonic current and voltage distortion. Whereas SCR phase control creates the desirable average power factor, DC SCR drives operate at less than this. In addition, line notching occurs when SCR’s commutate, creating transient peak recovery voltages that can be 3 to 4 times the nominal line voltage depending upon the system impedance and the size of the drives. The frequency and severity of these power system disturbances varies with the speed of the drive. Harmonic current injection by AC and DC drives will be highest when the drives are operating at slow speeds. Power factor will be lowest when DC drives are operating at slow speeds or during initial acceleration and deceleration periods, increasing to its maximum value when the SCR’s are phased on to produce rated or base speed. Above base speed, the power factor essentially remains constant. Unfortunately, container cranes can spend considerable time at low speeds as the operator attempts to spot and land containers. Poor power factor places a greater kVA demand burden on the utility or engine-alternator power source. Low power factor loads can also affect the voltage stability which can ultimately result in detrimental effects on the life of sensitive electronic equipment or even intermittent malfunction. Voltage transients created by DC drive SCR line notching, AC drive voltage chopping, and

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high frequency harmonic voltages and currents are all significant sources of noise and disturbance to sensitive electronic equipment

It has been our experience that end users often do not associate power quality problems with Container cranes, either because they are totally unaware of such issues or there was no economic Consequence if power quality was not addressed. Before the advent of solid-state power supplies, Power factor was reasonable, and harmonic current injection was minimal. Not until the crane Population multiplied, power demands per crane increased, and static power conversion became the way of life, did power quality issues begin to emerge. Even as harmonic distortion and power Factor issues surfaced, no one was really prepared. Even today, crane builders and electrical drive System vendors avoid the issue during competitive bidding for new cranes. Rather than focus on Awareness and understanding of the potential issues, the power quality issue is intentionally or unintentionally ignored. Power quality problem solutions are available. Although the solutions are not free, in most cases, they do represent a good return on investment. However,

if power quality is not specified, it most likely will not be delivered.

Power quality can be improved through:

• Power factor correction, • Harmonic filtering, • Special line notch filtering,

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• Transient voltage surge suppression, • Proper earthing systems. In most cases, the person specifying and/or buying a container crane may not be fully aware of the potential power quality issues. If this article accomplishes nothing else, we would hope to provide that awareness.

In many cases, those involved with specification and procurement of container cranes may not be cognizant of such issues, do not pay the utility billings, or consider it someone else’s concern. As a result, container crane specifications may not include definitive power quality criteria such as power factor correction and/or harmonic filtering. Also, many of those specifications which do require power quality equipment do not properly define the criteria. Early in the process of preparing the crane specification:

• Consult with the utility company to determine regulatory or contract requirements that must be satisfied, if any. • Consult with the electrical drive suppliers and determine the power quality profiles that can be expected based on the drive sizes and technologies proposed for the specific project. • Evaluate the economics of power quality correction not only on the present situation, but consider the impact of future utility deregulation and the future development plans for the terminal.

THE BENEFITS OF POWER QUALITY

Power quality in the container terminal environment impacts the economics of the terminal operation, affects reliability of the terminal equipment, and affects other

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consumers served by the same utility service. Each of these concerns is explored in the following paragraphs. 1. Economic Impact The economic impact of power quality is the foremost incentive to container terminal operators. Economic impact can be significant and manifest itself in several ways:

a. Power Factor Penalties

Many utility companies invoke penalties for low power factor on monthly billings. There is no industry standard followed by utility companies. Methods of metering and calculating power factor penalties vary from one utility company to the next. Some utility companies actually meter kVAR usage and establish a fixed rate times the number of kVAR-hours consumed. Other utility companies monitor kVAR demands and calculate power factor. If the power factor falls below a fixed limit value over a demand period, a penalty is billed in the form of an adjustment to the peak demand charges. A number of utility companies servicing container terminal equipment do not yet invoke power factor penalties. However, their service contract with the Port may still require that a minimum power factor over a defined demand period be met. The utility company may not continuously monitor power factor or kVAR usage and reflect them in the monthly utility billings; however, they do reserve the right to monitor the Port service at any time. If the power factor criteria set forth in the service contract are not met, the user may be penalized, or required to take corrective actions at the user’s expense. One utility company, which supplies power service to several east coast container terminals in the USA, does not reflect power factor penalties in their monthly billings, however, their service contract with the terminal reads as follows:

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‘The average power factor under operating conditions of customer’s load at the point where service is metered shall be not less than 85%. If below 85%, the customer may be required to furnish, install and maintain at its expense corrective apparatus which will increase the Power factor of the entire installation to not less than 85%. The customer shall ensure that no excessive harmonics or transients are introduced on to the [utility] system. This may require special power conditioning equipment or filters. The IEEE Std. 519-1992 is used as a guide in Determining appropriate design requirements.’

The Port or terminal operations personnel, who are responsible for maintaining container cranes, or specifying new container crane equipment, should be aware of these requirements. Utility deregulation will most likely force utilities to enforce requirements such as the example above. Terminal operators who do not deal with penalty issues today may be faced with some rather severe penalties in the future. A sound, future terminal growth plan should include contingencies for addressing the possible economic impact of utility deregulation.

b. System Losses

Harmonic currents and low power factor created by nonlinear loads, not only result in possible power factor penalties, but also increase the power losses in the distribution system. These losses are not visible as a separate item on your monthly

utility billing, but you pay for them each month. Container cranes are significant contributors to harmonic currents and low power factor. Based on the typical demands of today’s high speed container cranes, correction of power factor

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alone on a typical state of the art quay crane can result in a reduction of system losses that converts to a 6 to 10% reduction in the monthly utility billing. For most of the larger terminals, this is a significant annual saving in the cost of operation.

c. Power Service Initial Capital Investments

The power distribution system design and installation for new terminals, as well as modification of systems for terminal capacity upgrades, involves high cost, specialized, high and medium voltage equipment. Transformers, switchgear, feeder cables, cable reel trailing cables, collector bars, etc. must be sized based on the kVA demand. Thus cost of the equipment is directly related to the total kVA demand. As the relationship above indicates, kVA demand is inversely proportional to the overall power factor, i.e. a lower power factor demands higher kVA for the same kW load. Container cranes are one of the most significant users of power in the terminal. Since container cranes with DC, 6 pulse, SCR drives operate at relatively low power factor, the total kVA demand is significantly larger than would be the case if power factor correction equipment were supplied on board each crane or at some common bus location in the terminal. In the absence of power quality corrective equipment, transformers are larger, switchgear current ratings must be higher, feeder cable copper sizes are larger, collector system and cable reel cables must be larger, etc. Consequently, the cost of the initial power distribution system equipment for a system which does not address power quality will most likely be higher than the same system which includes power quality equipment.

2. Equipment Reliability

Poor power quality can affect machine or equipment reliability and reduce the life of components. Harmonics, voltage transients, and voltage system sags

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and swells are all power quality problems and are all interdependent. Harmonics affect power factor, voltage transients can induce harmonics, the same phenomena which create harmonic current injection in DC SCR variable speed drives are responsible for poor power factor, and dynamically varying power factor of the same drives can create voltage sags and swells. The effects of harmonic distortion, harmonic currents, and line notch ringing can be mitigated using specially designed filters.

  • 3. Power System Adequacy

When considering the installation of additional cranes to an existing power distribution system, a power system analysis should be completed to determine the adequacy of the system to support additional crane loads. Power quality corrective actions may be dictated due to inadequacy of existing power distribution systems to which new or relocated cranes are to be connected. In other words, addition of power quality equipment may render a workable scenario on an existing power distribution system, which would otherwise be inadequate to support additional cranes without high risk of problems.

  • 4. Environment

No issue might be as important as the effect of power quality on our environment. Reduction in system losses and lower demands equate to a reduction in the consumption of our natural nm resources and reduction in power plant emissions. It is our responsibility as occupants

UNIFIED POWER QUALITY CONDITIONER

The provision of both DSTATCOM and DVR can control the power quality of the source current and the load bus voltage. In addition, if the DVR and

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STATCOM are connected on the DC side, the DC bus voltage can be regulated by the shunt connected DSTATCOM while the DVR supplies the required energy to the load in case of the transient disturbances in source voltage. The configuration of such a device (termed as Unified Power Quality Conditioner (UPQC)) is shown in Fig. This is a versatile device similar to a UPFC. However, the control objectives of a UPQC are quite different from that of a UPFC.

STATCOM are connected on the DC side, the DC bus voltage can be regulated by the

CONTROL OBJECTIVES OF UPQC

The shunt connected converter has the following control objectives

1.

To balance

the source currents

by injecting negative and zero sequence

components required by the load

2. The compensate for the harmonics in the load current by injecting the required harmonic currents

3.

To control

the power

factor by injecting the required reactive current (at

fundamental frequency)

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4. To regulate the DC bus voltage. The series connected converter has the following control objectives

1. To balance the voltages at the load bus by injecting negative and zero sequence voltages to compensate for those present in the source.

2. To isolate the load bus from harmonics present in the source voltages, by injecting the harmonic voltages

3. To regulate the magnitude of the load bus voltage by injecting the required active and reactive components (at fundamental frequency) depending on the power factor on the source side

4. To control the power factor at the input port of the UPQC (where the source is connected. Note that the power factor at the output port of the UPQC (connected to the load) is controlled by the shunt converter.

Operation of UPQC

4. To regulate the DC bus voltage. The series connected converter has the following control objectives

The operation of a UPQC can be explained from the analysis of the idealized equivalent circuit shown in Fig. 14.16. Here, the series converter is represented by a voltage source VC and the shunt converter is represented by a current source IC.

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Note that all the currents and voltages are 3 dimensional vectors with phase coordinates. Unlike in the case of a UPFC (discussed in chapter 8), the voltages and currents may contain negative and zero sequence components in addition to harmonics. Neglecting losses in the converters, we get the relation

Note that all the currents and voltages are 3 dimensional vectors with phase coordinates. Unlike in

where X,Ydenote the inner product of two vectors, defined by

Note that all the currents and voltages are 3 dimensional vectors with phase coordinates. Unlike in

Let the load current IL and the source voltage VS be decomposed into two Components given by

Note that all the currents and voltages are 3 dimensional vectors with phase coordinates. Unlike in

Where I1p L contains only positive sequence, fundamental frequency components. Similar comments apply to V 1pS . IrL and V rS contain rest of the load current and the source voltage including harmonics. I1pL is not unique and depends on the power factor at the load bus. However, the following relation applies for I1p L .

Note that all the currents and voltages are 3 dimensional vectors with phase coordinates. Unlike in

This implies that hIrL ; VLi = 0. Thus, the fundamental frequency, positive sequence component in IrL does not contribute to the active power in the load. To meet the control objectives, the desired load voltages and source currents must contain only positive sequence, fundamental frequency components and

Note that all the currents and voltages are 3 dimensional vectors with phase coordinates. Unlike in

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where V ¤ L and I¤S are the reference quantities for the load bus voltage and the source current respectively. Ál is the power factor angle at the load bus while Ás is the power factor angle at the source bus (input port of UPQC). Note that V ¤ L(t) and I¤S (t) are sinusoidal and balanced. If the reference current (I¤C ) of the shunt converter and the reference voltage (V ¤ C) of the series converter are chosen as

Note that the

constraint (14.30) implies that V 1p C

is the reactive voltage in

quadrature with the desired source The above
quadrature with the desired source
The above

current, I¤S

.

It

is

easy

to

derive that

equation

shows

that

for

the

operating

conditions assumed, a UPQC can be viewed as a inaction of a DVR and a STATCOM with no active power °ow through the DC link. However, if the magnitude of V ¤ L is to be controlled, it may not be feasible to achieve this by injecting only reactive voltage. The situation gets complicated if V 1p S is not constant, but changes due to system disturbances or fault. To ensure the regulation of the load bus voltage it may be necessary to inject variable active voltage (in phase with the source current). If we express

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This implies that both ¢VC and ¢IC are perturbations involving positive sequence, fundamental frequency quantities (say, resulting from symmetric voltage sags). the power balance on the DC side of the shunt and series converter. The perturbation in VC is initiated to ensure that

Thus, the objective of the voltage regulation at the load bus may require exchange of power between the shunt and series converters.

Remarks:

1. The unbalance and harmonics in the source voltage can arise due to

uncompensated nonlinear and unbalanced loads in the upstream of the UPQC.

2. The injection of capacitive reactive voltage by the series converter has the advantage of raising the source voltage magnitude.

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VOLTAGE SOURCE CONVERTERS (VSC):

A voltage-source converter is a power electronic device, which can generate a sinusoidal voltage with any required magnitude, frequency and phase angle. Voltage source converters are widely used in adjustable-speed drives, but can also be used to mitigate voltage dips. The VSC is used to either completely replace the voltage or to inject the ‘missing voltage’. The ‘missing voltage’ is the difference between the nominal voltage and the actual. The converter is normally based on some kind of energy storage, which will supply the converter with a DC voltage. The solid-state electronics in the converter is then switched to get the desired output voltage. Normally the VSC is not only used for voltage dip mitigation, but also for other power quality issues, e.g. flicker and harmonics.

The voltage source rectifier operates by keeping the dc link voltage at a desired reference value, using a feedback control loop as shown in Fig. 12.36. To

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accomplish this task, the dc link voltage is measured and compared with a reference VREF. The error signal generated from this comparison is used to switch the six valves of the rectifier ON and OFF. In this way, power can come or return to the ac source according to dc link voltage requirements. Voltage VD is measured at capacitor CD. When the current ID is positive (rectifier operation), the capacitor CD is discharged, and the error signal ask the Control Block for more power from the ac supply. The Control Block takes the power from the supply by generating the appropriate PWM signals for the six valves. In this way, more current flows from the ac to the dc side, and the capacitor voltage is recovered. Inversely, when ID becomes negative (inverter operation), the capacitor CD is overcharged, and the error signal asks the control to discharge the capacitor and return power to the ac mains. The PWM control not only can manage the active power, but also reactive power, allowing this type of rectifier to correct power factor. In addition, the ac current waveforms can be maintained as almost sinusoidal, which reduces harmonic contamination to the mains supply. Pulsewidth-modulation consists of switching the valves ON and OFF, following a pre-established template. This template could be a sinusoidal waveform of voltage or current. For example, the modulation of one phase could be as the one shown in Fig. 12.37. This PWM pattern is a periodical waveform whose fundamental is a voltage with the same frequency of the template. The amplitude of this fundamental, called VMOD in Fig. 12.37, is also proportional to the amplitude of the template. To make the rectifier work properly, the PWM pattern must generate a fundamental VMOD with the same frequency as the power source. Changing the amplitude of this fundamental

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Operation principle of the voltage source rectifier. FIGURE A PWM pattern and its fundamental VMOD. and

Operation principle of the voltage source rectifier.

Operation principle of the voltage source rectifier. FIGURE A PWM pattern and its fundamental VMOD. and

FIGURE A PWM pattern and its fundamental VMOD. and its phase-shift with respect to the mains, the rectifier can be controlled to operate in the four quadrants:

leading power factor rectifier, lagging power factor rectifier, leading power factor

inverter, and lagging power factor inverter. Changing the pattern of modulation, as shown in Fig. 12.38, modifies the magnitude of VMOD. Displacing the PWM pattern changes the phase-shift. The interaction between VMOD and V (source voltage) can be seen through a phasor diagram. This interaction permits understanding of the four-quadrant capability of this rectifier. In Fig. 12.39, the following operations are displayed: (a) rectifier at unity power factor; (b) inverter at unity power factor; (c) capacitor (zero power factor); and (d) inductor (zero power factor). In Fig. 12.39 Is is the rms value of the source current is . This current flows through the semiconductors in the same way as shown in Fig. 12.40. During the positive half cycle, the transistor TN connected at the negative side of

the dc link is switched ON, and the current is begins to flow through TN .iTn

..

The

current returns to the mains and comes back to the valves, closing a loop with

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another phase, and passing through a diode connected at the same negative terminal of the dc link. The current can also go to the dc load (inversion) and return through another transistor located at the positive terminal of the dc link. When the transistor TN is switched OFF, the current path is interrupted, and the current begins to flow through diode DP, connected at the positive terminal of the dc link. This current, called iDp in Fig, goes directly to the dc link, helping in the generation of the current idc . The current idc charges the capacitor CD and permits the rectifier to produce dc power. The inductances LS are very important in this process, because they generate an induced voltage that allows conduction of the diode DP. A similar operation occurs during the negative half cycle, but with TP and DN

another phase, and passing through a diode connected at the same negative terminal of the dc

Changing VMOD through the PWM pattern.

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Four-quadrant operation of the force-commutatedrectifier: (a) the PWM force- commutated rectifier; (b) rectifier operation at unity

Four-quadrant operation of the force-commutatedrectifier: (a) the PWM force- commutated rectifier; (b) rectifier operation at unity power factor; (c) inverter operation at unity power factor; (d) capacitor operation at zero power factor; and (e) inductor operation at zero power factor.

Under inverter operation, the current paths are different because the currents flowing through the transistors come mainly from the dc capacitor CD. Under rectifier operation, the circuit works like a Boost converter, and under inverter operation it works as a Buck converter. To have full control of the operation of the rectifier, their six diodes must be polarized negatively at all values of instantaneous ac voltage supply. Otherwise, the diodes will conduct, and the PWM rectifier will behave like a common diode rectifier bridge. The way to keep the diodes blocked is to ensure a dc link voltage higher than the peak dc voltage generated by the

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diodes alone, as shown in Fig. 12.41. In this way, the diodes remain polarized negatively, and they will conduct only when at least one transistor is switched ON, and favorable instantaneous ac voltage conditions are given. In Fig. 12.41 VD represents the capacitor dc voltage, which is kept higher than the normal diode- bridge rectification value nBRIDGE. To maintain this condition, the rectifier must have a control loop like the one displayed in Fig.

diodes alone, as shown in Fig. 12.41. In this way, the diodes remain polarized negatively, and

Current waveforms through the mains, the valves, and the dc link.

VOLTAGE SOURCE INVERTER

Single-phase voltage source inverter can be found as half-bridge and full- bridge topologies. Although the power range they cover is the low one, they are widely used in power supplies, single-phase UPSs, and currently to form elaborate high-power static power topologies, such as for instance, the multi cell

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configurations that are reviewed The main features of both approaches are reviewed and presented in the following.

Types of VSI:

Half-Bridge VSI:

The power topology of a half-bridge VSI, where two large capacitors are required to provide a neutral point N, such that each capacitor maintains a constant voltage=2. Because the current harmonics injected by the operation of the inverter are low-order harmonics, a set of large capacitors (C. and Cÿ) is required. It is clear that both switches S. and Sÿ cannot be on simultaneously because short circuit across the dc link voltage source vi would be produced. There are two defined (states 1 and 2) and one undefined (state 3) switch state as shown in Table. In order to avoid the short circuit across the dc bus and the undefined ac output voltage condition, the modulating technique should always ensure that at any instant either the top or the bottom switch of the inverter leg is on.

configurations that are reviewed The main features of both approaches are reviewed and presented in the

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shows the ideal waveforms associated with the half-bridge inverter shown in Fig. 14.2. The states for the switches S. and Sÿ are defined by the modulating technique, which in this case is a carrier-based PWM. The Carrier-Based Pulse width Modulation (PWM) Technique: As mentioned earlier, it is desired that the ac output voltage. Va N follow a given waveform (e.g., sinusoidal) on a continuous basis by properly switching the power valves. The carrier-based PWM technique fulfils such a requirement as it defines the on and off states of the switches of one leg of a VSI by comparing a modulating signal vc (desired ac output voltage) and a triangular waveform vD (carrier signal). In practice, when vc > vD the switch S. is on and the switch is off; similarly, when vc < vD the switch S. is off and the switch Sÿ is on. A special case is when the modulating signal vc is a sinusoidal at frequency fc and amplitude ^vc , and the triangular signal vD is at frequency fD and amplitude ^vD. This is the sinusoidal PWM (SPWM) scheme. In this case, the modulation index ma (also known as the amplitude-modulation ratio) is defined as

shows the ideal waveforms associated with the half-bridge inverter shown in Fig. 14.2. The states for

and the normalized carrier frequency mf (also known as the frequency-modulation ratio) is

shows the ideal waveforms associated with the half-bridge inverter shown in Fig. 14.2. The states for

. vaN is basically a sinusoidal waveform plus harmonics, which features: (a) the amplitude of the fundamental component of the ac output voltage ^vo1 satisfying the following expression:

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27
27

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will be discussed later); (b) for odd values of the normalized carrier frequency mf the harmonics

will be discussed later); (b) for odd values of the normalized carrier frequency mf the harmonics in the ac output voltage appear at normalized frequencies fh centered around mf and its multiples, specifically,

will be discussed later); (b) for odd values of the normalized carrier frequency mf the harmonics

6;

. . .

Where k . 2; 4; 6;

for l . 1; 3; 5;

; and k . 1; 3; 5;

.for l . 2; 4;

. . ; (c) the amplitude of the ac output voltage harmonics is a function of the

. . .

. . .

modulation index ma and is independent of the normalized carrier frequency mf form f > 9; (d) the harmonics in the dc link current (due to the modulation) appear at normalized frequencies fp centered around the normalized carrier frequency mf and its multiples, specifically,

will be discussed later); (b) for odd values of the normalized carrier frequency mf the harmonics

where k . 2; 4; 6;

for l . 1; 3; 5;

; and k . 1; 3; 5;

.for l . 2; 4; 6;

. Additional important issues are: (a) for small values of mf (mf < 21), the carrier

. . .

. . .

. . .

.

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signal vD and the modulating signal vc should be synchronized to each other(mf integer), which is required to hold the previous features; if this is not the case, sub harmonics will be present in the ac output voltage; (b) for large values of mf (mf > 21), the sub harmonics are negligible if an asynchronous PWM

signal vD and the modulating signal vc should be synchronized to each other(mf integer), which is

technique is used, however, due to potential very low-order sub harmonics, its use should be avoided; finally (c) in the over modulation region (ma > 1) some intersections between the carrier and the modulating signal are missed, which leads to the generation of low-order harmonics but a higher fundamental ac output voltage is obtained; unfortunately, the linearity between ma and ^vo1achieved in the linear region does not hold in the over modulation region, moreover, a saturation effect can be observed The PWM technique allows an ac output voltage to be generated that tracks a given modulating signal. A special case is the SPWM technique (the modulating signal is a sinusoidal) that provides in the linear region an ac output voltage that varies linearly as a function of the modulation index and the harmonics are at well- defined frequencies and amplitudes.

29

These features simplify the design of filtering components. Unfortunately, the maximum amplitude of the fundamental ac voltage is vi=2 in this operating mode. Higher voltages are obtained by using the over modulation region (ma > 1); however, low-order harmonics appear in the ac output voltage.

These features simplify the design of filtering components. Unfortunately, the maximum amplitude of the fundamental ac

Square-Wave Modulating Technique:

Both switches S. and Sÿ are on for one-half cycle of the ac output period. This is equivalent to the SPWM technique with an infinite modulation index ma. Figure 14.5 shows the following: (a) the normalized ac output voltage harmonics

are at frequencies h . 3; 5; 7; 9;

, and for a given dc link voltage; (b) the

. . . fundamental ac output voltage features an amplitude given by

These features simplify the design of filtering components. Unfortunately, the maximum amplitude of the fundamental ac

and the harmonics feature an amplitude given by

These features simplify the design of filtering components. Unfortunately, the maximum amplitude of the fundamental ac

Selective Harmonic Elimination:

The main objective is to obtain a sinusoidal ac output voltage waveform where the fundamental component can be adjusted arbitrarily within a range and the intrinsic harmonics selectively eliminated. This is achieved by mathematically

generating the exact instant of the turn-on and turn-off of the power valves. The ac output voltage features odd half- and quarter wave symmetry;

therefore, even harmonics are not present(voh . 0; h . 2; 4; 6;

. .

.). Moreover, the

30

per-phase voltage waveform (vo . vaN), should be chopped N times per half-cycle in order to adjust the fundamental and eliminate N ÿ 1 harmonics in the ac output voltage waveform. For instance, to eliminate the third and fifth harmonics and to perform fundamental magnitude control (N. 3), the equations to be solved are the following:

per-phase voltage waveform (vo . vaN), should be chopped N times per half-cycle in order to

where the angles a1, a2, and a3 are defined as shown. The angles are found by means of iterative algorithms as no analytical solutions can be derived. The angles a1, a2, and

per-phase voltage waveform (vo . vaN), should be chopped N times per half-cycle in order to
per-phase voltage waveform (vo . vaN), should be chopped N times per half-cycle in order to

31

. . are plotted for different values of eliminate an even N ÿ 1 .N ÿ
. . are plotted for different values of eliminate an even N ÿ 1 .N ÿ

. .

. . are plotted for different values of eliminate an even N ÿ 1 .N ÿ

are plotted for different values of eliminate an even N ÿ 1 .N ÿ 1 . 2; 4; 6;

in Fig. 14.7a. The general expressions to .) number of harmonics is

where a1, a2; . . . ; aN should satisfy a1 < a2 <
where a1, a2;
. . .
; aN should satisfy a1 < a2 <

< aN <p=2. Similarly, to

_ _ _ eliminate an odd number of harmonics, for instance, the third, fifth and seventh, and to perform

. . are plotted for different values of eliminate an even N ÿ 1 .N ÿ

32

Fundamental magnitude control (N ÿ 1 . 3), the equations to be solved are:

Fundamental magnitude control (N ÿ 1 . 3), the equations to be solved are: where the

where the angles a1; a2; a3, and a4 are defined as shown in Fig.b. The angles a1; a2, a3 and a4 are plotted for different values of The general expressions to

Fundamental magnitude control (N ÿ 1 . 3), the equations to be solved are: where the
Fundamental magnitude control (N ÿ 1 . 3), the equations to be solved are: where the

eliminate an odd N -1 (N ÿ 1 . 3; 5; 7;

. .

.) number of harmonics are given by

Fundamental magnitude control (N ÿ 1 . 3), the equations to be solved are: where the

33

Full-Bridge VSI: The power topology of a full-bridge VSI. This inverter is similar to the half-

Full-Bridge VSI:

The power topology of a full-bridge VSI. This inverter is similar to the half- bridge inverter; however, a second leg provides the neutral point to the load. As expected, both switches S1. and S1ÿ (or S2. and S2ÿ) cannot be on simultaneously because a short circuit across the dc link voltage source vi would be produced. There are four defined and one undefined The undefined condition should be avoided so as to be always capable of defining the ac output voltage. In order to avoid the short circuit across the dc bus and the undefined ac output voltage condition, the modulating technique should ensure that either the top or the bottom switch of each leg is on at any instant. It can be observed that the ac output voltage can take values up to the dc link value vi , which is twice that obtained with half-bridge VSI topologies. Several modulating techniques have been developed that are applicable to full-bridge VSIs. Among them are the PWM (bipolar and unipolar) techniques.

Full-Bridge VSI: The power topology of a full-bridge VSI. This inverter is similar to the half-

Bipolar PWM Technique:

34

States 1 and 2 (Table) are used to generate the ac output voltage in this approach. Thus, the ac output voltage waveform features only two values, which are vi and ÿvi. To generate the states, a carrier-based technique can be used a sine half-bridge configurations where only one sinusoidal modulating signal has been used. It should be noted that the on state in switch S. in the half-bridge corresponds to both switches S1. and S2ÿ being in the on state in the full-bridge configuration. Similarly, Sÿ in the on state in the half-bridge corresponds to both switches S1ÿ andS2. being in the on state in the full-bridge configuration. This is called bipolar carrier-based SPWM. The ac output voltage waveform in a full-bridge VSI is basically a sinusoidal waveform that features a fundamental component of amplitude ^vo1that satisfies the expression

States 1 and 2 (Table) are used to generate the ac output voltage in this approach.

In the linear region of the modulating technique (ma _ 1),which is twice that obtained in the half-bridge VSI. Identical conclusions can be drawn for the frequencies and amplitudes of the harmonics in the ac output voltage and dc link current, and for operations at smaller and larger values of odd mf(including the over modulation region (ma > 1)), than in half bridge VSIs, but considering that the maximum ac output voltage is the dc link voltage vi . Thus, in the over modulation region the fundamental component of amplitude ^vo1 satisfies the expression

States 1 and 2 (Table) are used to generate the ac output voltage in this approach.

In contrast to the bipolar approach, the unipolar PWM technique uses the states 1, 2, 3, and to generate the ac output voltage. Thus, the ac output voltage

waveform can instantaneously take one of three values, namely

States 1 and 2 (Table) are used to generate the ac output voltage in this approach.

The signal

35

This is vc is used to generate van, and other hand, is used to generate vbN
This is vc is used to generate van, and other hand, is used to generate vbN

This

is

vc is used to generate van, and other hand,

is used to generate vbN ; thus

This is vc is used to generate van, and other hand, is used to generate vbN
This is vc is used to generate van, and other hand, is used to generate vbN

.On the

called

unipolar carrier-basedPWM. Identical conclusions can be drawn for the amplitude of the fundamental component and harmonics in the ac output voltage and dc link current, and for operations at smaller and larger values of mf , (including the over modulation region (ma > 1)), than in full-bridge VSIs modulated by the bipolar SPWM.

However, because the phase voltages phase, the output voltage

This is vc is used to generate van, and other hand, is used to generate vbN

are identical

but 180_

out of

This is vc is used to generate van, and other hand, is used to generate vbN

will not contain even harmonics.

Thus,

if mf

is taken even, the harmonics

in

the

ac output

voltage appear

at

normalized odd frequencies fh centered around twice the normalized carrier frequency mf and its multiples. Specifically,

This is vc is used to generate van, and other hand, is used to generate vbN

where k . 1; 3; 5;

and the harmonics in the dc link current appear at normalized

. . . frequencies fp centered around twice the normalized carrier frequency mf and its

multiples. Specifically,

This is vc is used to generate van, and other hand, is used to generate vbN

where k . 1; 3; 5;

This feature is considered to be an advantage because it

. . .. allows the use of smaller filtering components to obtain high-quality voltage and current waveforms while using the same switching frequency as in VSIs modulated

by the bipolar approach.

Selective Harmonic Elimination:

36

In contrast to half-bridge VSIs, this approach is applied in a per-line fashion for full-bridge VSIs. The ac output voltage features odd half- and quarter-wave

symmetry; therefore, even harmonics are not present

In contrast to half-bridge VSIs, this approach is applied in a per-line fashion for full-bridge VSIs.
In contrast to half-bridge VSIs, this approach is applied in a per-line fashion for full-bridge VSIs.

Moreover, the ac output voltage waveform in Fig. 14.8), should feature N pulses per half-cycle in order to adjust the fundamental component and eliminate N ÿ 1 harmonics. For instance, to eliminate the third, fifth and seventh harmonics and to perform fundamental magnitude control (N . 4), the equations to be solved are:

In contrast to half-bridge VSIs, this approach is applied in a per-line fashion for full-bridge VSIs.

The general expressions to eliminate an arbitrary N harmonics are given by

In contrast to half-bridge VSIs, this approach is applied in a per-line fashion for full-bridge VSIs.

number of

In contrast to half-bridge VSIs, this approach is applied in a per-line fashion for full-bridge VSIs.
In contrast to half-bridge VSIs, this approach is applied in a per-line fashion for full-bridge VSIs.

Shows a special case where only the fundamental ac output voltage is controlled. This is known as output control by voltage cancellation, which derives from the fact that its implementation is easily attainable by using two phase-shifted square- wave switching signals as shown in

37

38

38

39

39

Fig. Chopping angles for SHE and fundamental voltage control in half-bridge VSIs: (a) fundamental control and
Fig. Chopping angles for SHE and fundamental voltage control in half-bridge VSIs: (a) fundamental control and

Fig. Chopping angles for SHE and fundamental voltage control in half-bridge VSIs: (a) fundamental control and third, fifth, and seventh harmonic elimination; (b) fundamental control. Thus, the amplitude of the fundamental component and harmonics in the ac output voltage are given by

Fig. Chopping angles for SHE and fundamental voltage control in half-bridge VSIs: (a) fundamental control and

40

It can also be observed in Fig. 14.12c that for a1 . 0 square wave operation is

It can also be observed in Fig. 14.12c that for a1 . 0 square wave operation

achieved. In this case, the fundamental a output voltage is given by where the fundamental load voltage can be controlled by the manipulation of the dc link voltage

II. MODELLING OF THE UPQC

Figure shows the equivalent single-phase representation of the UPQC.

It can also be observed in Fig. 14.12c that for a1 . 0 square wave operation

Figure . Equivalent single-phase representation of the UPQC.

The distorted supply voltage vs at the PCC can be represented by the sum of two voltages, vf (fundamental) and vh (harmonics). The nonlinear load is modeled by a current source iL composed of both fundamental and harmonics that will be changed with different loads. The supply current is denoted by is and the voltage across the nonlinear load is denoted by vL. The voltage vz in Figure is the voltage drop across the line impedance Rl + jwLl. The series active filter of the UPQC is modeled by a series Voltage Source Inverter (VSI) with Lse and Cse as the second order low-pass interfacing filter and Rse as the losses of the series VSI. The shunt active filter of the UPQC is represented by a shunt VSI with Lsh and Csh as the second order low-pass interfacing filter and Rsh as the losses of the shunt VSI.

41

iCsh is the leakage capacitor current of the shunt low-pass interfacing filter.

iCsh is the leakage capacitor current of the shunt low-pass interfacing filter. represent the switching voltages

represent the switching voltages across the series and the shunt VSI outputs of the UPQC respectively. The injected voltage of the series active filter is denoted by vinj, while the injected current of the shunt active filter is denoted by iinj. Both u1 and u2 treated as manipulated variables and take continuous values between -1 and +1. The

voltage

iCsh is the leakage capacitor current of the shunt low-pass interfacing filter. represent the switching voltages

is the desired voltage level of each capacitor unit for the UPQC.

A state-space model for the UPQC is given by [8], [9]:

iCsh is the leakage capacitor current of the shunt low-pass interfacing filter. represent the switching voltages

42

where the state-variables are is (the supply current), ise (the current flowing through the inductance Lse),

where the state-variables are is (the supply current), ise (the current flowing through the inductance Lse), iinj (the injected current), vinj (the injected voltage) and vch (the voltage across the capacitance Csh, which is the same as the load voltage vL). In this state-space model, the supply voltage vs and the load current iL are considered as exogenous inputs to the “plant”, which act like disturbances, while the load voltage vL and the supply current is are considered as outputs of the plant. The variables u1 and u2 are regarded as the manipulated control inputs to the plant. The control objective is to regulate vL and is to sine waves of 50Hz without any harmonics, even though harmonics exist in vs and iL.

43

Three-Phase Voltage Source Inverters:

Single-phase VSIs cover low-range power applications and three-phase VSIs cover the medium- to high-power applications. The main purpose of these topologies is to provide a three-phase voltage source, where the amplitude, phase, and frequency of the voltages should always be controllable. Although most of the applications require sinusoidal voltage waveforms (e.g., ASDs, UPSs, FACTS, var compensators), arbitrary voltages are also required in some emerging applications (e.g., active filters, voltage compensators). The standard three-phase VSI topology is shown in Fig. 14.13 and the eight valid switch states are given in Table 14.3. As in single-phase VSIs, the switches of any leg of the inverter (S1 and S4, S3 and S6, or S5 and S2) cannot be switched on simultaneously because this would result in a short circuit across the dc link voltage supply. Similarly, in order to avoid undefined states in the VSI, and thus undefined ac output line voltages, the switches of any leg of the inverter cannot be switched off simultaneously as this will result in voltages that will depend upon the respective line current polarity. Of the eight valid states, two of them (7 and 8 in Table 14.3) produce zero ac line voltages. In this case, the ac line currents freewheel through either the upper or lower components. The remaining states (1 to 6 in Table 14.3) produce nonzero ac output voltages. In order to generate a given voltage waveform, the inverter moves from one state to another. Thus the resulting ac output line voltages consist of discrete values of voltages that are vi , 0, and ÿvi for the topology shown in Fig. The selection of the states in order to generate the given waveform is done by the modulating technique that should ensure the use of only the valid states.

44

II. PROPOSED MC-UPQC SYSTEM A. Circuit Configuration The single-line diagram of a distribution system with an
II. PROPOSED MC-UPQC SYSTEM A. Circuit Configuration The single-line diagram of a distribution system with an

II. PROPOSED MC-UPQC SYSTEM

A. Circuit Configuration The single-line diagram of a distribution system with an MC-UPQC is shown in

Fig.

II. PROPOSED MC-UPQC SYSTEM A. Circuit Configuration The single-line diagram of a distribution system with an

Fig. Single-line diagram of a distribution system with an MC-UPQC.

As shown in this figure, two feeders connected to two different substations supply the loads L1 and L2. The MC-UPQC is connected to two buses BUS1 and

45

BUS2 with voltages of and , respectively. The shunt part of the MC-UPQC is also connected
BUS2 with voltages of and , respectively. The shunt part of the MC-UPQC is also connected

BUS2 with voltages of and , respectively. The shunt part of the MC-UPQC

is also connected to load L1 with a current of

BUS2 with voltages of and , respectively. The shunt part of the MC-UPQC is also connected

. Supply voltages are denoted by

BUS2 with voltages of and , respectively. The shunt part of the MC-UPQC is also connected

while load voltages are

BUS2 with voltages of and , respectively. The shunt part of the MC-UPQC is also connected

Finally, feeder currents are denoted

BUS2 with voltages of and , respectively. The shunt part of the MC-UPQC is also connected
BUS2 with voltages of and , respectively. The shunt part of the MC-UPQC is also connected
BUS2 with voltages of and , respectively. The shunt part of the MC-UPQC is also connected

by and load currents are Bus voltages are distorted and may be subjected to sag/swell. The load L1 is a nonlinear/sensitive load which needs a pure sinusoidal voltage for proper operation while its current is non- sinusoidal and contains harmonics. The load L2 is a sensitive/critical load which needs a purely sinusoidal voltage and must be fully protected against distortion, sag/swell, and interruption. These types of loads primarily include production industries and critical service providers, such

B. MC–UPQC Structure

The internal structure of the MC–UPQC is shown in Fig.

BUS2 with voltages of and , respectively. The shunt part of the MC-UPQC is also connected

Fig. Typical MC-UPQC used in a distribution system. It consists of three VSCs (VSC1, VSC2, and VSC3) which are connected back to back through a common dc-link capacitor. In the proposed configuration, VSC1 is connected in series with BUS1 and VSC2 is connected in parallel with load L1 at the end of Feeder1. VSC3 is connected in series with BUS2 at the

46

Feeder2 end. Each of the three VSCs in Fig. 2 is realized by a three-phase converter with a commutation reactor and high-pass output filter as shown in Fig.

Feeder2 end. Each of the three VSCs in Fig. 2 is realized by a three-phase converter

Fig. Schematic structure of a VSC.

Feeder2 end. Each of the three VSCs in Fig. 2 is realized by a three-phase converter
Feeder2 end. Each of the three VSCs in Fig. 2 is realized by a three-phase converter

The commutation reactor and high- pass output filter are connected to prevent the flow of switching harmonics into the power supply. As shown in Fig, all converters are supplied from a common dc-link capacitor and connected to the distribution system through a transformer. Secondary (distribution) sides of the series-connected transformers are directly connected in series with BUS1 and BUS2, and the secondary (distribution)side of the shunt-connected transformer is connected in parallel with load L1. The aims of the MC-UPQC shown in Fig are:

1) to regulate the load voltage

Feeder2 end. Each of the three VSCs in Fig. 2 is realized by a three-phase converter

against sag/swell and disturbances in the system

to protect the nonlinear/sensitive load L1;

2) to regulate

the

load

voltage

Feeder2 end. Each of the three VSCs in Fig. 2 is realized by a three-phase converter

against sag/swell, interruption, and

disturbances in the system to protect the sensitive/ critical load L2; 3) to compensate for the reactive and harmonic components of nonlinear load

Feeder2 end. Each of the three VSCs in Fig. 2 is realized by a three-phase converter

current . In order to achieve these goals, series VSCs (i.e., VSC1 and VSC3) operate as voltage controllers while the shunt VSC (i.e., VSC2) operates as a current controller.

C. Control Strategy

As shown in Fig., the MC-UPQC consists of two series VSCs and one shunt VSC

which are controlled independently. The switching control strategy for series VSCs

47

and the shunt VSC are selected to be sinusoidal pulse width-modulation (SPWM) voltage control and hysteresis current control, respectively. Details of the control algorithm, which are based on the d–q method [12], will be discussed later. Shunt- VSC: Functions of the shunt-VSC are:

1) to compensate for the reactive component of load L1 current; 2) to compensate for the harmonic components of load L1 current; 3) to regulate the voltage of the common dc-link capacitor. Fig. shows the control block diagram for the shunt VSC.

The measured load current reference frame by using

and the shunt VSC are selected to be sinusoidal pulse width-modulation (SPWM) voltage control and hysteresis
and the shunt VSC are selected to be sinusoidal pulse width-modulation (SPWM) voltage control and hysteresis

is transformed into the synchronous dq0

where the transformation matrix is shown in (2), at the bottom of the page. By this transform, the fundamental positive-sequence component, which is transformed into dc quantities in the d and q axes, can be easily extracted by low- pass filters (LPFs). Also, all harmonic components are transformed into ac quantities with a fundamental frequency shift

and the shunt VSC are selected to be sinusoidal pulse width-modulation (SPWM) voltage control and hysteresis

where

and the shunt VSC are selected to be sinusoidal pulse width-modulation (SPWM) voltage control and hysteresis

are d-q components of load current,

and the shunt VSC are selected to be sinusoidal pulse width-modulation (SPWM) voltage control and hysteresis

are dc components, and
.

and the shunt VSC are selected to be sinusoidal pulse width-modulation (SPWM) voltage control and hysteresis

are the ac components of

If

If is the feeder current and is the shunt VSC current and knowing

is

the feeder

current and

If is the feeder current and is the shunt VSC current and knowing

is the shunt VSC current and knowing

, then d–q components of the shunt VSC reference current are defined

, then d–q components of the shunt VSC reference current are defined

as follows:

 

48

Consequently, the d–q components of the feeder current are This means that there are no harmonic

Consequently, the d–q components of the feeder current are

Consequently, the d–q components of the feeder current are This means that there are no harmonic

This means that there are no harmonic and reactive components in the feeder current. Switching losses cause the dc-link capacitor voltage to decrease. Other disturbances, such as the sudden variation of load, can also affect the dc link. In order to regulate the dc-link capacitor voltage, a proportional–integral (PI) controller is used as shown in Fig. The input of the PI controller is the error

Consequently, the d–q components of the feeder current are This means that there are no harmonic
Consequently, the d–q components of the feeder current are This means that there are no harmonic

between the actual capacitor voltage and its reference value

of the PI controller

Consequently, the d–q components of the feeder current are This means that there are no harmonic

is

added to the d component

. The output of the shunt-VSC

reference current to form a new reference current as follows:

Consequently, the d–q components of the feeder current are This means that there are no harmonic

As shown in Fig., the reference current in (9) is then transformed back into the abc reference frame. By using PWM hysteresis current control, the output- compensating currents in each phase are obtained

Consequently, the d–q components of the feeder current are This means that there are no harmonic

Series-VSC: Functions of the series VSCs in each feeder are:

1) to mitigate voltage sag and swell; 2) to compensate for voltage distortions, such as harmonics; 3) to compensate for interruptions (in Feeder2 only).

49

The control block diagram of each series VSC is shown in Fig. The bus voltage
is detected and then transformed into the synchronous dq0 reference frame

using

The control block diagram of each series VSC is shown in Fig. The bus voltage is

Where

The control block diagram of each series VSC is shown in Fig. The bus voltage is
The control block diagram of each series VSC is shown in Fig. The bus voltage is

are fundamental frequency positive-, negative-, and zero-sequence components, respectively, and is the harmonic component of the bus voltage. According to control objectives of the MC-UPQC, the load voltage should be kept sinusoidal with a constant amplitude even if the bus voltage is disturbed. Therefore, the expected load voltage in the synchronous dq0 reference frame

The control block diagram of each series VSC is shown in Fig. The bus voltage is
  • only has one value.

The control block diagram of each series VSC is shown in Fig. The bus voltage is

where the load voltage in the abc reference frame

The control block diagram of each series VSC is shown in Fig. The bus voltage is

is

The control block diagram of each series VSC is shown in Fig. The bus voltage is

The compensating reference voltage in the synchronous dq0 reference frame
is defined as

50

This means in (12) should be maintained at while all other unwanted components must be eliminated.
This means in (12) should be maintained at while all other unwanted components must be eliminated.
This means in (12) should be maintained at while all other unwanted components must be eliminated.

This means in (12) should be maintained at while all other unwanted components must be eliminated. The compensating reference voltage is then transformed back into the abc reference frame. By using an improved SPWM voltage control technique (sine PWM control with minor loop feedback) [8], the output compensation voltage of the series VSC can be obtained.

III. POWER-RATING ANALYSIS OF THE MC-UPQC

The power rating of the MC-UPQC is an important factor in terms of cost. Before

calculation of the power rating of each VSC in the MC UPQC structure, two models of a UPQC are analyzed and the best model which requires the minimum power rating is considered. All voltage and current phasors used in this section are phase quantities at the fundamental frequency. There are two models for a UPQC —quadrature compensation (UPQC-Q) and inphase compensation (UPQC-P). In the quadrature compensation scheme, the injected voltage by the series- VSC maintains a quadrature advance relationship with the supply current so that no real power is consumed by the series VSC at steady state. This is a significant advantage when UPQC mitigates sag conditions. The series VSC also shares the volt ampere reactive (VAR) of the load along with the shunt-VSC, reducing the power rating of the shunt-VSC. Fig. shows the phasor diagram of this scheme under a typical load power factor condition with and without a voltage sag.

51

Fig. Phasor diagram of quadrature compensation. (a) Without voltage sag. (b) With voltage sag. When the

Fig. Phasor diagram of quadrature compensation. (a) Without voltage sag. (b) With voltage sag.

Fig. Phasor diagram of quadrature compensation. (a) Without voltage sag. (b) With voltage sag. When the

When the bus voltage is at the desired value , the series-injected voltage is zero [Fig.(a)]. The shunt VSC injects the reactive component of load current , resulting in unity input-power factor. Furthermore, the shunt VSC compensates for not only the reactive component, but also the harmonic components of the load current . For sag compensation in this model, the quadrature series voltage injection is needed as shown in Fig. (b). The shunt VSC injects in such a way that the active power requirement of the load is only drawn from the utility which results in a unity input-power factor. In an inphase compensation scheme, the injected voltage is inphase with the supply voltage when the supply is balanced. By virtue of inphase injection, series VSC will mitigate the voltage sag condition by minimum injected voltage. The phasor diagram of Fig. explains the operation of this scheme in case of a voltage sag.

Fig. Phasor diagram of quadrature compensation. (a) Without voltage sag. (b) With voltage sag. When the
Fig. Phasor diagram of quadrature compensation. (a) Without voltage sag. (b) With voltage sag. When the
Fig. Phasor diagram of quadrature compensation. (a) Without voltage sag. (b) With voltage sag. When the
Fig. Phasor diagram of quadrature compensation. (a) Without voltage sag. (b) With voltage sag. When the
Fig. Phasor diagram of quadrature compensation. (a) Without voltage sag. (b) With voltage sag. When the

Fig. Phasor diagram of inphase compensation (supply voltage sag).

52

A comparison between in phase (UPQC-P) and quadrature (UPQC-Q) models is made for different sag conditions and load power factors in [13]. It is shown that the power rating of the shunt-VSC in the UPQC-Q model is lower than that of the UPQC-P, and the power rating of the series-VSC in the UPQC-P model is lower than that of the UPQC-Q for a power factor of less than or equal to 0.9. Also, it is shown that the total power rating of UPQC-Q is lower than that of UPQC-P where the VAR demand of the load is high. As discussed in Section II, the power needed for interruption compensation in Feeder2 must be supplied through the shunt VSC in Feeder1 and the series VSC in Feeder2. This implies that power ratings of these VSCs are greater than that of the series one in Feeder1. If quadrature compensation in Feeder1 and inphase compensation in Feeder2 are selected, then the power rating of the shunt VSC and the series VSC (in Feeder2) will be reduced. This is an important criterion for practical applications. Based on the aforementioned discussion, the power-rating calculation for the MC-UPQC is carried out on the basis of the linear load at the fundamental frequency. The parameters in Fig. are corrected by adding suffix “1,” indicating Feeder1, and the parameters in Fig. are corrected by adding suffix “2,” indicating Feeder2. As shown in Figs. 6 and 7, load voltages in both feeders are kept constant at regardless of bus voltages variation, and the load currents in both feeders are assumed to be constant at their rated values (i.e., , respectively)

A comparison between in phase (UPQC-P) and quadrature (UPQC-Q) models is made for different sag conditions
A comparison between in phase (UPQC-P) and quadrature (UPQC-Q) models is made for different sag conditions
A comparison between in phase (UPQC-P) and quadrature (UPQC-Q) models is made for different sag conditions
A comparison between in phase (UPQC-P) and quadrature (UPQC-Q) models is made for different sag conditions

53

The load power factors in Feeder1 and Feeder2 are assumed to be and the per-unit sags,

The load power factors in Feeder1 and Feeder2 are assumed to be and the per-unit sags, which must be compensated in Feeder1 and Feeder2, are supposed to be x1 and x2, respectively. If the MC-UPQC is lossless, the active power demand supplied by Feeder1 consists of two parts:

1) the active power demand of load in Feeder1; 2) the active power demand for sag and interruption compensation in Feeder2.

The load power factors in Feeder1 and Feeder2 are assumed to be and the per-unit sags,

Thus, Feeder1 current can be found as

The load power factors in Feeder1 and Feeder2 are assumed to be and the per-unit sags,

From Fig., the voltage injected by the series VSC in Feeder1 and thus the power

rating of this converter

The load power factors in Feeder1 and Feeder2 are assumed to be and the per-unit sags,

can be calculated as

The load power factors in Feeder1 and Feeder2 are assumed to be and the per-unit sags,

The shunt VSC current is divided into two parts.

1) The first part (i.e.,

The load power factors in Feeder1 and Feeder2 are assumed to be and the per-unit sags,

) compensates for the reactive component (and harmonic

components) of Feeder1 current and can be calculated from Fig. as

The load power factors in Feeder1 and Feeder2 are assumed to be and the per-unit sags,

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where is calculated. This part of the shunt VSC current only exchanges reactive power (Q) with

where is calculated. This part of the shunt VSC current only exchanges reactive power (Q) with the system. 2) The second part provides the real power (P), which is needed for a sag or interruption compensation in Feeder2. Therefore, the power rating of the shunt VSC can be calculated as

where is calculated. This part of the shunt VSC current only exchanges reactive power (Q) with
where is calculated. This part of the shunt VSC current only exchanges reactive power (Q) with

where is calculated. Finally, the power rating of the series-VSC in Feeder2 can be calculated. For the worst-case scenario (i.e., interruption compensation), one must consider . Therefore

where is calculated. This part of the shunt VSC current only exchanges reactive power (Q) with

IV. SIMULATION RESULTS

The proposed MC-UPQC and its control schemes have been tested through extensive case study simulations using PSCAD/ EMTDC. In this section, simulation results are presented, and the performance of the proposed MC-UPQC system is shown. A. Distortion and Sag/Swell on the Bus Voltage Let us consider that the power system in Fig. 2 consists of two three-phase three-

where is calculated. This part of the shunt VSC current only exchanges reactive power (Q) with

wire 380(v) (rms, L-L), 50-Hz utilities. The BUS1 voltage contains the

seventh-order harmonic with a value of 22%, and the BUS2 voltage

where is calculated. This part of the shunt VSC current only exchanges reactive power (Q) with

contains

the fifthorder harmonic with a value of 35%. The BUS1 voltage contains 25% sag

between

where is calculated. This part of the shunt VSC current only exchanges reactive power (Q) with

and 20% swell between

where is calculated. This part of the shunt VSC current only exchanges reactive power (Q) with

.

The

BUS2

voltage contains 35% sag between

where is calculated. This part of the shunt VSC current only exchanges reactive power (Q) with

and 30% swell between

where is calculated. This part of the shunt VSC current only exchanges reactive power (Q) with

. The nonlinear/sensitive load L1 is a three-phase rectifier

55

load which supplies an RC load of 10Ω and 30 F. Finally, the critical load L2 contains a balanced RL load of 10Ω and 100mH. The MC–UPQC is switched on at t=0.02 s. The BUS1 voltage, the corresponding compensation voltage injected by VSC1, and finally load L1 voltage are shown in Fig.

load which supplies an RC load of 10Ω and 30 F. Finally, the critical load L2

Fig. BUS1 voltage, series compensating voltage, and load voltage in Feeder1.

In all figures, only the phase a waveform is shown for simplicity. Similarly, the BUS2 voltage, the corresponding compensation voltage injected by VSC3, and finally, the load L2 voltageare shown in Fig.

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Fig. BUS2 voltage, series compensating voltage, and load voltage in Feeder2. As shown in these figures,

Fig. BUS2 voltage, series compensating voltage, and load voltage in Feeder2.

As shown in these figures, distorted voltages of BUS1 and BUS2 are satisfactorily compensated for across the loads L1 and L2 with very good dynamic response. The nonlinear load current, its corresponding compensation current injected by VSC2, compensated Feeder1 current, and, finally, the dc-link capacitor voltage are shown in Fig.

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Fig. Nonlinear load current, compensating current, Feeder1 current, and capacitor voltage. The distorted nonlinear load current

Fig. Nonlinear load current, compensating current, Feeder1 current, and capacitor voltage.

The distorted nonlinear load current is compensated very well, and the total harmonic distortion (THD) of the feeder current is reduced from 28.5% to less than 5%. Also, the dc voltage regulation loop has functioned properly under all disturbances, such as sag/swell in both feeders. B. Upstream Fault on Feeder2 When a fault occurs in Feeder2 (in any form of L-G, L-L-G, and L-L-L-G faults), the voltage across the sensitive/critical load L2 is involved in sag/swell or interruption. This voltage imperfection can be compensated for by VSC2. In this case, the power required by load L2 is supplied through VSC2 and VSC3. This implies that the power semiconductor switches of VSC2 and VSC3 must be rated

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such that total power transfer is possible. This may increase the cost of the device, but the benefit that may be obtained can offset the expense. In the proposed configuration, the sensitive/critical load on Feeder2 is fully protected against distortion, sag/swell, and interruption. Furthermore, the regulated voltage across the sensitive load on Feeder1 can supply several customers who are also protected against distortion, sag/swell, and momentary interruption. Therefore, the cost of the MC-UPQC must be balanced against the cost of interruption, based on reliability indices, such as the customer average interruption duration index (CAIDI) and customer average interruption frequency index (CAIFI). It is expected that the MC-UPQC cost can be recovered in a few years by charging higher tariffs for the protected lines. The performance of the MC-UPQC under a fault condition on Feeder2 is tested by applying a three-phase fault to ground on Feeder2 between 0.3s<t<0.4 s. Simulation results are shown in Fig.

such that total power transfer is possible. This may increase the cost of the device, but

59

Fig. Simulation results for an upstream fault on Feeder2: BUS2 voltage, compensating voltage, and loads L1 and L2 voltages.

C. Load Change

To evaluate the system behavior during a load change, the nonlinear load L1 is doubled by reducing its resistance to half at t=0.5 s. The other load, however, is kept unchanged. The system response is shown in Fig.

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Fig. Simulation results for load change: nonlinear load current, Feeder1 current, load L1 voltage, load L2

Fig. Simulation results for load change: nonlinear load current, Feeder1 current, load L1 voltage, load L2 voltage, and dc-link capacitor voltage.

It can be seen that as load L1 changes, the load voltages

Fig. Simulation results for load change: nonlinear load current, Feeder1 current, load L1 voltage, load L2

remain

undisturbed, the dc bus voltage is regulated, and the nonlinear load current is compensated. D. Unbalance Voltage The control strategies for shunt and series VSCs, which are introduced in Section II, are based on the d–q method. They are capable of compensating for the

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unbalanced source voltage and unbalanced load current. To evaluate the control system capability for unbalanced voltage compensation, a new simulation is performed. In this new simulation, the BUS2 voltage and the harmonic components of BUS1 voltage are similar to those given in Section IV. However, the fundamental component of the BUS1 voltage is an unbalanced

unbalanced source voltage and unbalanced load current. To evaluate the control system capability for unbalanced voltage

three-phase voltage with an unbalance factor voltage is given by

unbalanced source voltage and unbalanced load current. To evaluate the control system capability for unbalanced voltage
unbalanced source voltage and unbalanced load current. To evaluate the control system capability for unbalanced voltage

of 40%. This unbalance

The simulation results for the three-phase BUS1 voltage series compensation voltage, and load voltage in feeder 1 are shown in Fig.

unbalanced source voltage and unbalanced load current. To evaluate the control system capability for unbalanced voltage

Fig. BUS1 voltage, series compensating voltage, and load voltage in Feeder1 under unbalanced source voltage.

The simulation results show that the harmonic components and unbalance of BUS1 voltage are compensated for by injecting the proper series voltage. In this figure, the load voltage is a three-phase sinusoidal balance voltage with regulated amplitude.

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V. CONCLUSION

In this paper, a new configuration for simultaneous compensation of voltage and

current in adjacent feeders has been proposed. The new configuration is named multi-converter unified power-quality conditioner (MC-UPQC). Compared to a conventional UPQC, the proposed topology is capable of fully protecting critical and sensitive loads against distortions, sags/swell, and interruption in two-feeder systems. The idea can be theoretically extended to multibus/multifeeder systems by adding more series VSCs. The performance of the MC-UPQC is evaluated under various disturbance conditions and it is shown that the proposed MC-UPQC offers the following advantages:

1) power transfer between two adjacent feeders for sag/swell and interruption compensation; 2) compensation for interruptions without the need for a battery storage system and, consequently, without storage capacity limitation; 3) sharing power compensation capabilities between two adjacent feeders which are not connected.

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INTRODUCTION TO MATLAB

MATLAB is a software package for computation in engineering, science, and applied mathematics.

INTRODUCTION TO MATLAB MATLAB is a software package for computation in engineering, science, and applied mathematics.

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It offers a powerful programming language, excellent graphics, and a wide range of expert knowledge. MATLAB is published by and a trademark of The MathWorks, Inc.

The focus in MATLAB is on computation, not mathematics: Symbolic expressions and manipulations are not possible (except through the optional Symbolic Toolbox, a clever interface to maple). All results are not only numerical but inexact, thanks to the rounding errors inherent in computer arithmetic. The limitation to numerical computation can be seen as a drawback, but it’s a source of strength too: MATLAB is much preferred to Maple, Mathematical, and the like when it comes to numerics.

On the other hand, compared to other numerically oriented languages like C++ and FORTRAN, MATLAB is much easier to use and comes with a huge standard library.1 the unfavorable comparison here is a gap in execution speed. This gap is not always as dramatic as popular lore has it, and it can often be narrowed or closed with good MATLAB programming (see section 6). Moreover, one can link other codes into MATLAB, or vice versa, and MATLAB now optionally supports parallel computing. Still, MATLAB is usually not the tool of choice for maximum-performance Computing.

65

The MATLAB niche is numerical computation on workstations for non-experts in computation.

This is a huge niche—one way to tell is to look at the number of MATLAB- related books on mathworks.com. Even for supercomputer users, MATLAB can be a valuable environment in which to explore and fine-tune algorithms before more laborious coding in another language.

Most successful computing languages and environments acquire a distinctive character or culture.

In MATLAB, that culture contains several elements: an experimental and graphical bias, resulting from the interactive environment and compression of the write- compile-link-execute analyze cycle; an emphasis on syntax that is compact and friendly to the interactive mode, rather than tightly constrained and verbose; a kitchen-sink mentality for providing functionality; and a high degree of openness and transparency (though not to the extent of being open source software).

The fifty-cent tour

When you start MATLAB, you get a multi paneled desktop. The layout and behavior of the desktop and its components are highly customizable (and may in fact already be customized for your site).

The component that is the heart of MATLAB is called the Command

Window,

located

on

the

1Here

and

elsewhere

I

am

thinking

of

the

“old

66

FORTRAN,” FORTRAN 77. This is not a commentary on the usefulness of FORTRAN 90 but on my ignorance of it.

INTRODUCTION

Right by default. Here you can give MATLAB commands typed at the prompt, >>. Unlike FORTRAN and other compiled computer languages, MATLAB is an interpreted environment—you give a command, and MATLAB tries to execute it right away before asking for another.

At the top left you can see the Current Directory. In general MATLAB is aware only of files in the current directory (folder) and on its path, which can be customized. Commands for working with the directory and path include cd, what,

add path, and edit path (or you can choose “File/Set

path. . .

” from the menus).

You can add files to a directory on the path and thereby add commands to MATLAB; we will return to this subject in section 3.

Next to the Current Directory tab is the Workspace tab. The workspace shows you what variable names are currently defined and some information about their contents. (At start-up it is, naturally, empty.) This represents another break from compiled environments: variables created in the workspace persist for you to examine and modify, even after code execution stops. Below the Command Window/Workspace window is the Command History window. As you enter commands, they are recorded here. This record persists across different MATLAB sessions, and commands or blocks of commands can be copied from here or saved to files.

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As you explore MATLAB, you will soon encounter some toolboxes. These are individually packaged sets of capabilities that provide in-depth expertise on particular subject areas. There is no need to load them explicitly—once installed, they are always available transparently. You may also encounter Simulink, which is a semi-independent graphical control-engineering package not covered in this document.

Graphical versus command-line usage

MATLAB was originally entirely a command-line environment, and it retains that orientation. But it is now possible to access a great deal of the functionality from graphical interfaces—menus, buttons, and so on. These interfaces are especially useful to beginners, because they lay out the available choices clearly.2 As a rule, graphical interfaces can be more natural for certain types of interactive work, such as annotating a graph or debugging a program, whereas typed commands remain better for complex, precise, repeated, or reproducible tasks. One does not always need to make a choice, though; for instance, it is possible to save a figure’s styles as a template that can be used with different data by pointing and clicking. Moreover, you can package code you want to distribute with your own graphical interface, one that itself may be designed with a combination of graphical and command-oriented tools. In the end, an advanced MATLAB user should be able to exploit both modes of work to be productive.

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That said, the focus of this document is on typed commands. In many (most?) cases these have graphical interface equivalents, even if I don’t explicitly point them out.

In particular, feel free to right-click (on Control-click on a Mac) on various objects to see what you might be able to do to them.

WHAT IS SIMULINK

Simulink (Simulation and Link) is an extension of MATLAB by Math works Inc. It works with MATLAB to offer modeling, simulating, and analyzing of dynamical systems under a graphical user interface (GUI) environment. The construction of a model is simplified with click-and-drag mouse operations. Simulink includes a comprehensive block library of toolboxes for both linear and nonlinear analyses. Models are hierarchical, which allow using both top-down and bottom-up approaches. As Simulink is an integral part of MATLAB, it is easy to switch back and forth during the analysis process and thus, the user may take full advantage of features offered in both environments. This tutorial presents the basic features of Simulink and is focused on control systems as it has been written for students in my control systems .

Getting Started

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To start a Simulink session, you'd need to bring up Matlab program first. From Matlab command window, enter:

>> simulink

Alternately, you may click on the Simulink icon located on the toolbar as shown

70

To see the content of the blockset, click on the "+" sign at the beginning of

To see the content of the blockset, click on the "+" sign at the beginning of each toolbox.

To start a model click on the NEW FILE ICON as shown in the screenshot

above.

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Alternately, you may use keystrokes CTRL+N.

A new window will appear on the screen. You will be constructing your model in this window. Also in this window the constructed model is simulated. A screenshot of a typical working (model) window that looks like one shown below:

Alternately, you may use keystrokes CTRL+N. A new window will appear on the screen. You will

To become familiarized with the structure and the environment of Simulink, you are encouraged to explore the toolboxes and scan their contents.

You may not know what they are all about but perhaps you could catch on the organization of these toolboxes according to the category. For instant, you may see Control System Toolbox to consist of the Linear Time Invariant (LTI) system

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library and the MATLAB functions can be found under Function and Tables of the Simulink main toolbox. A good way to learn Simulink (or any computer program in general) is to practice and explore. Making mistakes is a part of the learning curve. So, fear not, you should be.

A simple model is used here to introduce some basic features of Simulink. Please follow the steps below to construct a simple model.

STEP 1: CREATING BLOCKS:

From BLOCK SET CATEGORIES section of the SIMULINK LIBRARY BROWSER window, click on the "+" sign next to the Simulink group to expand the tree and select (click on) Sources.

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A set of blocks will appear in the BLOCKSET group. Click on the Sine Wave blockand

A set of blocks will appear in the BLOCKSET group. Click on the Sine Wave blockand drag it to the workspace window (also known as model window)

74

I am going to save this model under the filename: "simexample1". To save a model, you

I am going to save this model under the filename: "simexample1". To save a model, you may click on the floppy diskette icon. Or from FILE menu, select Save or CTRL+S. All Simulink model file will have an extension ".mdl". Simulink recognizes file with .mdl extension as a simulation model (similar to how MATLAB recognizes files with the extension .m as an MFile).

Continue to build your model by adding more components (or blocks) to your model window. We'll continue to add a Scope from Sinks library, an Integrator block from Continuous library, and a Mux block from Signal Routing library.

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NOTE: If you wish to locate a block knowing its name, you may enter the name in the SEARCH WINDOW (at Find prompt) and Simulink will bring up the specified block.

To move the blocks around, simply location.

click

on

it

and

drag it

to

a desired

Once all the blocks are dragged over to the work space should consist following components:

of the

NOTE: If you wish to locate a block knowing its name, you may enter the name

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You may remove (delete) a block by simply clicking on it once to turn on the "select mode" (with four corner boxes) and use the DEL key or keys combination CTRL-X.

STEP 2: MAKING CONNECTIONS

To establish connections between the blocks, move the cursor to the output port represented by ">" sign on the block. Once placed at a port, the cursor will turn into a cross "+" enabling you to make connection between blocks.

To make a connection: left-click while holding down the control key (on your keyboard) and drag from source port to a destination port.

The connected model is shown below.

You may remove (delete) a block by simply clicking on it once to turn on the

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A sine signal is generated by the Sine Wave block (a source) and is displayed by the scope. The integrated sine signal is sent to scope for display along with the original signal from the source via the Mux, whose function is to multiplex signals in form of scalar, vector, or matrix into a bus.

STEP 3: RUNNING SIMULATION

You now can run the simulation of the simple system above by clicking on the play button (alternatively, you may use key sequence CTRL+T, or choose Start submenu under Simulation menu).

Double click on the Scope block to display of the scope.

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INTRODUCTION SimPowerSystems and other products of the Physical Modeling product family work together with Simulink® to

INTRODUCTION

SimPowerSystems and other products of the Physical Modeling product family work together with Simulink® to model electrical, mechanical, and control systems.

SimPowerSystems operates in the Simulink environment. Therefore, before starting this user’s guide, you should be familiar with Simulink. For help with

79

Simulink, see the Simulink documentation. Or, if you apply Simulink to signal processing and communications tasks (as opposed to control system design tasks), see the Signal Processing Block set documentation.

THE ROLE OF SIMULATION IN DESIGN

Electrical power systems are combinations of electrical circuits and electromechanical devices like motors and generators. Engineers working in this discipline are constantly improving the performance of the systems.

Requirements for drastically increased efficiency have forced power system designers to use power electronic devices and sophisticated control system concepts that tax traditional analysis tools and techniques. Further complicating the analyst’s role is the fact that the system is often so nonlinear that the only way to understand it is through simulation.

Land-based power generation from hydroelectric, steam, or other devices is not the only use of power systems. A common attribute of these systems is their use of power electronics and control systems to achieve their performance objectives.

What Is SimPowerSystems

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SimPowerSystems

is

a

modern

design

tool

that

allows

scientists

and

engineers to rapidly and easily build models that simulate power systems.

SimPowerSystems uses the Simulink environment, allowing you to build a model using simple click and drag procedures. Not only can you draw the circuit topology rapidly, but your analysis of the circuit can include its interactions with mechanical, thermal, control, and other disciplines. This is possible because all the electrical parts of the simulation interact with the extensive Simulink modeling library. Since Stimulant uses MATLAB® as its computational engine, designers can also use MATLAB toolboxes and Simulink block sets. SimPowerSystems and Sim Mechanics share a special Physical Modeling block and connection line interface.

SIMPOWERSYSTEMS LIBRARIES

You can rapidly put SimPowerSystems to work. The libraries contain models of typical power equipment such as transformers, lines, machines, and power electronics. These models are proven ones coming from textbooks, and their validity is based on the experience of the Power Systems Testing and Simulation Laboratory of Hydro-Québec, a large North American utility located in Canada,

81

and also on the experience of École de Technologie Supérieure and Universities Laval.

The capabilities of SimPowerSystems for modeling a typical electrical system are illustrated in demonstration files. And for users who want to refresh their knowledge of power system theory, there are also self-learning case studies.

The SimPowerSystems main library, power lib, organizes its blocks into libraries according to their behavior. The power lib library window displays the block library icons and names. Double-click a library icon to open the library and access the blocks. The main SimPowerSystems power lib library window also contains the Powergui block that opens a graphical user interface for the steady- state analysis of electrical circuits.

NONLINEAR

MODELS

SIMULINK

BLOCKS

FOR

SIMPOWERSYSTEMS

The nonlinear Simulink blocks of the power lib library are stored in a special\block library named powerlib_models. These masked Simulink models are used by SimPowerSystems to build the equivalent Simulink model of your circuit. See Chapter 3, “Improving Simulation Performance” for a description of the powerlib_models library

You must have the following products installed to use SimPowerSystems:

• MATLAB

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• Simulink

REFERENCES

[1] D. D. Sabin and A. Sundaram, “Quality enhances reliability,” IEEE Spectr., vol.

33, no. 2, pp. 34–41, Feb. 1996. [2] M. Rastogi, R. Naik, and N. Mohan, “A comparative evaluation of harmonic reduction techniques in three-phase utility interface of power electronic loads,” IEEE Trans. Ind. Appl., vol. 30, no. 5, pp. 1149–1155, Sep./Oct. 1994.

[3] F. Z. Peng, “Application issues of active power filters,” IEEE Ind. Appl. Mag.,

vol. 4, no. 5, pp. 21–30, Sep

..

/Oct.

1998.

[4] H. Akagi, “New trends in active filters for power conditioning,” IEEE Trans. Ind. Appl., vol. 32, no. 6, pp. 1312–1322, Nov./Dec. 1996.

[5] L. Gyugyi, C. D. Schauder, S. L. Williams, T. R. Rietman, D. R. Torjerson, and A. Edris, “The unified power flow controller: A new approach to power transmission control,” IEEE Trans. Power Del., vol. 10, no. 2, pp. 1085–1097, Apr.

1995.

[6] H. Fujita and H. Akagi, “The unified power quality conditioner: The integration of series and shunt active filters,” IEEE Trans. Power Electron., vol. 13, no. 2, pp. 315–322, Mar. 1998. [7] A. Ghosh and G. Ledwich, “A unified power quality conditioner (UPQC) for simultaneous voltage and current compensation,” Elect. Power Syst. Res., pp. 55– 63, 2001. [8] M. Aredes, K. Heumann, and E. H. Watanabe, “An universal active power line conditioner,” IEEE Trans. Power Del., vol. 13, no. 2, pp. 545–551, Apr. 1998.

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[9] L. Gyugyi, K. K. Sen, and C. D. Schauder, “Interline power flow controller concept: A new approach to power flow management in transmission systems,” IEEE Trans. Power Del., vol. 14, no. 3, pp. 1115–1123, Jul. 1999. [10] B. Fardanesh, B. Shperling, E. Uzunovic, and S. Zelingher, “Multi-converter FACTS Devices: The generalized unified power flow controller (GUPFC),” in Proc. IEEE Power Eng. Soc. Summer Meeting, 2000, vol. 4, pp. 2511–2517. [11] A. K. Jindal, A. Ghosh, and A. Joshi, “Interline unified power quality conditioner,” IEEE Trans. Power Del., vol. 22, no. 1, pp. 364–372, Jan. 2007. [12] M. Hu and H. Chen, “Modeling and controlling of unified power quality compensator,” in Proc. 5th Int. Conf. Advances in Power System Control, Operation and Management, Hong Kong, China, 2000, pp. 431–435. [13] M. Basu, S. P. Das, and G. K. Dubey, “Comparative evaluation of two models of UPQC for suitable interface to enhance power quality,” Elect. Power Syst. Res., pp. 821–830, 2007.

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