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Characteristics of a GaN-Based Light-Emitting

Diode With an Inserted p-GaN/i-InGaN
Superlattice Structure
Yi-Jung Liu, Tsung-Yuan Tsai, Chih-Hung Yen, Li-Yang Chen, Tsung-Han Tsai, and
Wen-Chau Liu, Senior Member, IEEE

AbstractAn interesting GaN-based light-emitting diode

(LED) with a ten-period i (undoped)-InGaN/p (Mg doped)-GaN
(2.5 nm/5 nm) superlattice (SL) structure, inserted between a
multiple-quantum well (MQW) structure and a p-GaN layer, is
fabricated and studied. This inserted SL can be regarded as a
confinement layer of holes to enhance the hole injection efficiency.
As compared with a conventional LED device without the SL
structure, the studied LED exhibits better current spreading
performance and an improved quality. The turn-on voltage, at 20
mA, is decreased from 3.32 to 3.14 V due to the reduced contact
resistance as well as the more uniformity of carriers injection.
A substantially reduced leakage current (10 7 to 10 9 A) and
higher endurance of the reverse current pulse are found. The
measured output power and external quantum efficiency (EQE)
of the studied LED are 13.6 mW and 24.8%. In addition, as
compared with the conventional LED without the SL structure,
the significant enhancement of 25.4% in output power as well as
the increment of 5% in EQE are observed due to the superior
current spreading ability and reduction of dislocations offered by
the SL structure.
Index TermsGaN, superlattice (SL), current spreading, hole
confinement, electrostatic discharge (ESD).


ECENTLY, high-brightness GaN-based light-emitting

diodes (LEDs) have attracted great interest for a number
of applications such as large-area outdoor display, exterior automotive lighting, traffic signals, and backlighting for cell-phones
[1], [2]. However, there are some drawbacks that need to be
overcome to improve the device performance. One of the
disadvantages is the low activation efficiency of Mg-doped
GaN surface [3], which may substantially increase the contact
resistances [4]. Thus, generally, the higher turn-on voltage of
a GaN-based LED is observed because of the Schottky-like
characteristics of p-GaN layer. In addition, due to the high
resistivity of the p-GaN (low activation efficiency and low hole
mobility) and the insulating nature of sapphire substrates, the
Manuscript received July 23, 2009; revised October 23, 2009 and November
04, 2009. Current version published February 12, 2010. This work was supported in part by the National Science Council of the Republic of China under
Contract NSC 97-2221-E-006-238-MY3.
The authors are with the Institute of Microelectronics, Department of Electrical Engineering, National Cheng-Kung University, Tainan 70101, Taiwan
Color versions of one or more of the figures in this paper are available online
Digital Object Identifier 10.1109/JQE.2009.2037337

current-crowding effect near n- and p- pads are found [5]. The

induced joule-heating effect underneath the n- and p- pads
deteriorates the optical, electrical properties, and the reliability
of LEDs [5].
Previously, based on the superlattice (SL) contact layer, there
were many applications to improve surface Ohmic contact properties by smoothing the p-GaN epilayer as well as increasing
the hole generation [6][9]. The current spreading capability
would be improved by the higher carrier concentration and
smoother surface. Moreover, the surface leakage current would
be suppressed due to the defect-free surface morphology by
introducing the SL contact layer. Thus, the V-defects which are
found to be the surface termination of mixed or screw dislocation [10], are directly blocked by a SL contact layer. A smooth
p-GaN surface is found. SL structure was also widely used as
a buffer to suppress the presence of underlying dislocations
or misfits [11], [12] when two materials with different lattice
constants were grown successively. Thus, the material quality
could be improved. On the other hand, the different approaches
by using the inserted SL structure to obtain better performance
were reported by Kinoshita et al. [13][15]. Unlike directly
increase the hole concentration on the topmost contact layer,
the hole injection would be provided by confining high density
of holes in the inserted SL layers near/neighboring the QW
layer. Thus, the carrier injection efficiency in QW is superior to
those LED devices without the inserted SL structure. Moreover,
different from the SL used for contact layer to reduce surface
pits, the dislocation-induced traps, vacancies, deep-level states,
strain, or leakage pathways in the p-GaN epilayer could be
significantly diminished by using an inserted SL structure [16],
[17]. The diminishment of threading dislocations, propagating
from the underlying epilayer to the p-GaN, could also be
responsible for the modulation of the inserted SL.
In this work, for the first time, the inserted SL structure is used
as a hole confinement layer in GaN-based LEDs. A ten-period i
(undoped)-InGaN/p (Mg-doped)-GaN (2.5 nm/5 nm) SL is inserted between a multiple-quantum-well (MQW) structure and
a p-GaN layer to serve as a current spreading layer as well as
a dislocation filter. The p-GaN layers in SL act as confinement
layers to cause the current to redistribute in the low-resistivity
InGaN layers. So, a more uniform hole injection is achieved.
The thermal generation under n- and p-electrodes could be reduced significantly because most of carriers would not be located just nearby the pads but spread much uniformly in the

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Cr/Pt/Au metal was deposited as n- and p-pad Ohmic contacts.

The ITO layer and n-p pads were activated for 30 min in a
nitrogen ambience at 470 C and 380 C, respectively. These
wafers were diced into individual chips with the dimension of
300 300 m . The clear transmission electron microscopy
(TEM) images of the MQW and SL layers were observed
and compared. The current-voltage ( ) characteristics of
studied devices were measured at room temperature by a
semiconductor parameter analyzer (HP 4156). The specific
contact resistances of p-pad/ITO/p-GaN interface were obtained by square transmission line model (s-TLM). The light
output power and electroluminescence (EL) were measured by
a Si photopic detector integrated with a current source. The
electrostatic discharge (ESD) characteristics were measured by
an Electro-Tech System ESD simulator Model 910.

Fig. 1. Schematic diagrams of the studied devices B (with ten-period p-GaN/iInGaN SL structure) and A (without SL structure). The equivalent circuit model
(a) and corresponding energy band diagram of the InGaN/GaN SL (b) are also
included. In (a), the current flowing paths are represented by dashed lines.

whole indium-tin-oxide (ITO) as well as epilayers. Hence, the

parasitic effect could be reduced under the forward LED operation [8]. In addition, due to the inserted SL, a near defect-free
p-GaN epilayer can be expected. Hence, the undesired current
crowding effect and surface leakage channels can be remarkably
The studied LED with the SL structure (denoted as device B)
was grown by a Thomas Swan metal organic chemical vapor
deposition (MOCVD) system on a c-plane (0001) oriented
sapphire substrate. The epitaxial structures consisted of 30-nm
GaN buffer layer, 2 m-thick undoped GaN layer, 2 m-thick
Si-doped n-GaN layer (
cm ), 12-period
InGaN/GaN (5 nm/12 nm) MQW as active layers, followed by
ten-period p-GaN/i-In Ga N (5 nm/2.5 nm) SL, and finally
a 0.5 m-thick Mg-doped p-GaN layer (
cm ).
For comparison, a conventional LED (denoted as device A) is
also grown with the similar epitaxial structure only without the
SL. Fig. 1(a) shows the schematic diagrams of devices A and
The wafers were first cleaned by acetone and deionized water
sequentially. Atomic force microscopy (AFM) measurements
were performed to analyze surface morphologies of as-grown
films. Then, an inductively coupled plasma (ICP) system was
utilized to define mesa regions. A 250 nm-thick ITO layer was
deposited on the p-GaN layer by an electronic beam evaporator.

The equivalent circuit model of the SL region of the studied

device B is also depicted in Fig. 1(a). When the device B is
biased under forward voltage, the InGaN layers (with lower
energy band gap) within SL can be designated as low-resis. Curtive conducting layers with many parallel resistors
rent can be injected widely through the whole InGaN layers.
The GaN layers (with higher energy band gap) within SL can
be regarded as series diodes
with higher turn-on voltages
to block vertical injection of carriers, until the applied voltage
is high enough to turn-on these . The corresponding energy
band diagram of the SL layers is shown in Fig. 1(b). Due to the
piezoelectric field induced by GaN and In Ga N layers, the
band bending phenomenon is observed. Holes tend to transport
laterally in InGaN layers prior to the injection into GaN layers,
until a higher voltage is applied. So, due to the band offset between GaN and InGaN layers, the injected carriers spread substantially widely for device B, as shown in Fig. 1(a). Obviously,
because of the absence of this SL structure, the injected carriers
are spread narrowly. Therefore, as compared with the device A,
the device B exhibits better current spreading ability and a reduced parasitic effect when the operation voltage is increased.
Fig. 2 shows the TEM image of device B near active regions. Distinct InGaN/GaN interfaces in MQW are observed.
The thickness of GaN barrier layers are around 12 nm, which is
thick enough to confine electron-hole pairs. Carriers transport is
mainly caused by the thermionic emission. The thinner InGaN
(around 5 nm) is a well layer to contribute the radiative recombination of carriers. Clearly, additional InGaN/GaN SL layers
were grown above MQW. Comparable thickness between GaN
confinement (5 nm) and InGaN channel (2.5 nm) layers are determined. The dominant carrier transport in SL is expected to
be caused by diffusion (to contribute current spreading uniformity) along with the tunneling (to limit the operation voltage)
Fig. 3 shows the dynamic resistances of devices A and B as a
function of voltage. From this figure, the influence of p-GaN/iInGaN SL can be clearly observed. When the forward bias is
below 1.5 V, the device B (with SL) exhibits larger resistance



Fig. 4. SIMS profile near the MQW layers for the device B.
Fig. 2. TEM image near the MQW layers for the device B.

Fig. 3. Dynamic resistances of devices A and B as a function of voltage. The

corresponding characteristics at higher voltage are shown in the inset.

about two-order of magnitude, as compared with the device

A (without SL). In the SL structure, the current regulation is
observed at InGaN/GaN heterojunctions [15]. Carriers easily
diffuse along the interface of heterojunctions, and the currentspreading effect can be observed. As the applied bias is increased from 1.5 to 3.0 V, the drastic drop of dynamic resistance of device B is found. This phenomenon can be attributed
to the existence of more carriers with significant energy which
spread uniformly among the whole SL structure when the forward voltage is increased, as mentioned above. The short-period
SL with high carriers density in the InGaN wells results in a
diffusing/tunneling transportation of free carriers [18]. Carriers
move not only in horizontal but also vertical. Hence, the undesired current-crowding effect can be suppressed. On the other
hand, the device A exhibits a moderate decrease of resistances
below 2.0 V. Then a relatively drastic drop phenomenon is observed under the forward voltage above 2.0 V. At this condition, the dynamic resistances go toward saturation and become
smaller, as shown in the inset of Fig. 3. From the high injection
region of the inset of Fig. 3, a smaller series resistance
of device B is clearly obtained. Experimentally, the series resistance
of device B is 12.1 , which is smaller than that of device A
(28.2 ). The series resistance
is mainly caused by the contact resistance and the effective cross-sectional area for carrier

distribution [15]. Therefore, it is inferred that the lower series

resistance of device B is caused by the better current spreading
ability induced by the SL structure. In addition, as the device B
is operated in the turn-on region (2.04.0 V), a relatively smaller
is accompanied. This phenomenon is
dynamic resistance
similar to the previous report [8], which used a SL structure to
obtain a more uniform distribution of carriers and a larger emitting area.
Fig. 4 depicts the secondary ion mass spectrometry (SIMS)
profile near the SL layers for the device B. The Cs ion source is
used in this work. The 0-nm depth is represented as the location
of p-GaN surface. Here, both SL and MQW layers are labeled in
dashed lines. In SL region, the Mg concentration is higher than
the nearby regions, indicating the doping process in GaN barrier
layers is achieved. Clearly, due to the limited resolution of SIMS
analysis, it is impossible to divide the 2.5-nm i-InGaN well from
the 5-nm Mg-GaN barrier layers apart. On the other hand, the
Mg doping concentration can still be determined to be around
cm by the SIMS data. Generally, the primary current
transport by diffusion or tunneling mechanism in SL layers is
decided by many factors. It is known that the hole concentration
primarily determines the hole effective mass [19]. In addition,
the thickness of GaN barrier layer in this work is around 5 nm,
confirmed by TEM analyses in Fig. 2. Both the two important
factors (hole effective mass and barrier thickness), which dominantly influence the tunneling probability [20], are poorer than
those obtained from the previous SL tunneling layer [9]. Furthermore, if the piezoelectric field is taken into consideration,
the 20% In composition induces a higher strain (as compared
with that obtained in [9]). Hole carriers are confined in a more
localized region in InGaN well layers [hown in the band diagram in Fig. 1(b)] resulting in a thicker barrier width. Due to
these reasons, the current tunneling phenomenon is hence limited. Experimentally, Fig. 3 also agrees well with the prediction.
The injected current is clearly suppressed when the applied forward voltage is lower than 2.0 V. It could be attributed to the
rather higher probability of current spreading than the possibility of current tunneling in the InGaN well layers. As a result,
a superior current spreading performance is achieved, provided
by the inserted SL layers.



Fig. 5. AFM images of the p-GaN surfaces, for the devices A(a) and B(b),

Fig. 5 shows the AFM images of devices A (a) and B (b), respectively. Based on these measurements, the values of surface
root-mean square roughness
of devices A and B are about
77.6 and 25.3 nm, respectively. There are many deep V-defects
on the p-GaN surface for the device A, while the suppression
of V-defects can be found for the device B. The higher surface roughness could be attributed to the formation of V-defects.
Clearly, with help of the inserted SL layers, the propagation of
threading dislocations can be suppressed underlying the p-GaN
layer, thus both improved leakage current and electrostatic discharge tolerance are anticipated. The inserted SL layer could reduce the strain-induced deformation in p-GaN layer, along with
an additional improvement on the surface morphology. Moreover, it is known that, for a device, a rougher surface is usually accompanied with a poorer surface contact property [21].
Thus, a higher specific contact resistance of device A is expected
which is consistent with the corresponding higher series resistance. By using an s-TLM method, the measured specific contact resistances (the p-pad/ITO/p-GaN interface) of devices A
and B are
-cm , respectively.
This is in agreement with the previous prediction.
Fig. 6(a) shows IV characteristics of devices A and B. The
turn-on voltages, under a forward operation current of 20 mA,
for devices A and B are 3.32 and 3.14 V, respectively. A decreased 0.18 V of voltage drop of device B is observed. This
is certainly caused by the superior current-spreading ability of
device B which substantially leads to the reduction of parasitic resistance and forward voltage. Another possible reason is
the smoother p-GaN surface of device B. Fig. 6(b) illustrates
the corresponding detailed IV characteristics. Clearly, the devices B exhibits a substantially lower reserve-biased leakage behavior. Experimentally, the inserted SL structure considerably

Fig. 6. (a) IV characteristics of devices A and B. (b) The corresponding detailed IV characteristics and the ESD-induced reverse characteristics of devices
A and B.

suppresses the propagation of dislocations. Thus, the p-GaN

bulk leakage current could be reduced drastically. Furthermore,
the improved surface contact properties of device B also causes
a reduced surface leakage. The ideality factor of the device A
(B) is 7.57 (2.12). The improved ideality factor is comparable
with that of the previous report [8]. These values are extracted
from the linear region of IV characteristics and ranged from
1 to 2 (1.5 to 2.5). As compared with the device without SL
layer, the quite different ideality factor could be attributed to
the great difference in material qualities of devices. The high
in GaN-based LEDs are mainly atideality factors
tributed to deep-level-assisted tunneling. Ideality factors close
to 2.0 are caused by the reduced recombination of holes into
the defect states in the p-GaN layer, which is consistent with
the Sah-Noyce-Shockley hypothesis [22]. Moreover, both the
poorer Ohmic contact property and current spreading ability for
the device A also lead to an increased ideality factor [8], [23].
Similar results were reported by Wang et al. [24]. The ESD characteristics of devices A and B are also measured and shown in
Fig. 6(b). 1400-V reverse pulse voltages are continuously applied to the chips for ten times of human body mode testing.
For device A, after the ESD stress, a significant increase of the
reverse current is observed. As compared with original values



Fig. 7. Output power and external quantum efficiency (EQE) as a function of


(in the order of

A), much higher leakage currents (in the order of
A) are generated for device
A. On the other hand, due to the presence of the inserted SLs,
the activation of leakage paths induced by the ESD stress is suppressed for device B. The device B can endure such a high pulse
voltage without significant increase in the leakage current.
Fig. 7 illustrates the light output power as well as external
quantum efficiency (EQE) as a function of operation current.
At 20 mA, the output powers for devices A and B are 10.8
and 13.6 mW, respectively. Apparently, the device B exhibits
25.4% improvement on output power. The improvement is due
to the more uniform distribution of injection carriers caused by
the presence of SL structure [15]. In addition, the V-defects in
the p-GaN layer of device A are found to be electronic activity
[10]. They form nonradiative recombination centers. Based on
the help of a defect-free p-GaN layer for the device B, the reduced injection loss caused by lower nonradiative recombination in the p-GaN layer is expected. It is also responsible for
the improved output power. In addition, this improvement is
enhanced at higher current region, as shown in Fig. 7. For instance, at 150 mA, the output power of device B is 1.31 times
higher than that of device A. For device B, the saturation point
of output power occurs at about 175 mA, whereas it is 150 mA
for device A. This improvement can be ascribed to the reduced
joule heating nearby n-p pad regions. Generally, the injection
of a LED can be expressed as [25]
where q is the electronic charge and V the active region volume.
A is the monomolecular recombination coefficient, which describes nonradiative recombination through traps and defects.
B is the radiative or bimolecular recombination coefficient associated with radiative emission in LEDs. C is the Auger recombination coefficient.
is denoted as the leakage current
diffused into p- or n-cladding layers under high injection. Its
known that the nonradiative Auger recombination become dominant with increasing the density of injected carriers. Thus, the
EQE of a LED is decreased with the operation current. This is
the so-called efficiency drooping effect [26]. As shown in Fig. 7,
at 20 mA, the EQEs of devices A and B are 19.8 and 24.8%,
respectively. Obviously, the device B shows 5.02% increment

Fig. 8. Micrographs of devices A and B under 20 mA, respectively.

in EQE. This enhancement is principally caused by the uniform current spreading and reduced injection loss generated by
the presence of SL structure. Furthermore, as described above,
mA), device A exhibits
under a high injection condition (
pronounced heating effect, along with Auger recombination,
both which certainly deteriorate the efficiency [26]. However,
for device B, due to the reduced current crowding effect, the
EQE droop is alleviated. In addition, from the (1), under a low
injection level, the injection current is dominated by the term
An which is related to nonradiative recombinations. The higher
mA) can be asEQE of device B at a low injection level (
cribed to the smaller coefficient A induced by reduced defects in
the p-GaN layer. Thus, the device B shows more pronounced radiative recombination over defect-induced nonradiative recombination, while device A does oppositely.
Fig. 8 shows the micrographs of LEDs A and B under 20 mA
(room temperature), respectively. Clearly, device A shows lower
injection density which is limited by the poorer p-GaN quality.
The result is consistent with the previous expectation in Fig. 7.
On the other hand, the injection density and current spreading
ability of device B are indeed superior to those of device A. As
a result, the high electrical and optical performance of a GaNbased LED with an inserted SL structure is achieved.
In summary, an interesting GaN-based LED with a ten-period
i-InGaN/p-GaN (2.5 nm/5 nm) SL structure is fabricated and
studied. As compared with a conventional LED without the SL
structure, the studied LED exhibits improved current spreading
performance and a high-quality p-GaN layer. The turn-on
voltage at 20 mA is decreased from 3.32 to 3.14 V due to
the reduced contact resistance as well as the more uniformity
of carriers injection. A substantially reduced leakage current
for the studied device is also obtained. After the ESD testing
(1400-V reverse voltage), the studied device exhibits only a
small increase in leakage current, while the LED device without
the SL structure shows a big increase. For the studied LED, the
significant enhancement of 25.4% in output power as well as
the increment of 5% in EQE are observed due to the superior
current spreading ability and a better film quality produced by
the presence of SL structure. In addition, these improvements


are enhanced especially at a higher injection condition, based

on the reduction of heat generation.

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Yi-Jung Liu was born in Taipei, Taiwan, on

September 4, 1984. He received the B.S. and M.S.
degrees in electrical engineering from the National
Cheng Kung University, Tainan, Taiwan, in 2007,
where he is currently working toward the Ph.D.
His research has focused on the III-V compound
light-emitting diodes.

Tsung-Yuan Tsai was born in Taoyuan, Taiwan,

on June 16, 1985. He received the B.S. degree from
Yuan Ze University, Taoyuan, Taiwan, in 2008.
He is currently working toward the M.S. degree
in the Institute of Microelectronics, Department
of Electrical Engineering, National Cheng-Kung
University, Tainan, Taiwan.
His research has focused on the III-V compound
light-emitting diodes.

Chih-Hung Yen was born in Taipei, Taiwan, on

July 22, 1974. He graduated from the National
Kaohsiung Institute of Technology in 1994 and
received the M.S.E. degree in electrical engineering
from National Cheng-Kung University, Tainan,
Taiwan, in 2001. He is currently working toward the
Ph.D. degree in the Institute of Microelectronics,
Department of Electrical Engineering, National
Cheng-Kung University, Tainan, Taiwan.
His research focuses on MOCVD growth
technology, III-V high-speed and microwave
semiconductor devices, such as AlGaAs-GaAs, InGaP-GaAs, InP-InGaAs heterojunction bipolar transistors (HBTs), and III-V, III-nitride-based compound
light-emitting diodes.



Li-Yang Chen was born in I-Lan, Taiwan, on July 15,

1983. He received the B.S. and M.S. degrees in electronic engineering from the National I-Lan University, Ilan, Taiwan, in 2005 and 2007, respectively. He
is currently working toward the Ph.D. degree in electrical engineering at the National Cheng-Kung University, Tainan, Taiwan.
His research has focused on the III-V heterostructure field-effect transistors.

Tsung-Han Tsai was born in Miao-Li, Taiwan,

on July 2, 1982. He received the B.S. degree from
Feng-Chia University, Taichung, Taiwan, in 2006.
He is currently working toward the Ph.D. degree
in the Institute of Microelectronics, Department
of Electrical Engineering, National Cheng-Kung
University, Tainan, Taiwan.
His research has focused on the field of
wide-bandgap semiconductor hydrogen sensors.

Wen-Chau Liu (A91M93SM02) was born

in Yurn-Lin Hsien, Taiwan, on June 21, 1957. He
received the B.S., M.S., and Ph.D. degrees in electrical engineering from the National Cheng-Kung
University (NCKU), Tainan, Taiwan, in 1979, 1981,
and 1986, respectively.
He was with the faculty at NCKU, as an Instructor
and an Associate Professor with the Department of
Electrical Engineering in 1983, 1986, and 1992, respectively. Since 2002, he has been a Distinguished
Professor in the same department, and since 2005,
he has been an Associate Chair with the Department of Electrical Engineering
and the Director of the Institute of Microelectronics, NCKU. His research and
teaching concern semiconductor device physics, analysis, and modeling. His
research currently focuses on III-V heterostructure and superlattice devices
including induced base transistor, superlattice-gate and heterostructure buffer
layer FETs, camel structure gate FET, sawtooth-doping-superlatticed devices,
heterostructure-emitter bipolar transistor, superlattice-emitter resonant-tunneling bipolar transistors, heterostructure-emitter and heterostructure-base
transistors, superlatticed negative-differential-resistance (NDR) devices,
quantum-well-doped NDR devices, metal-insulator-semiconductor-like multiple-switching devices, low- dimensional quantum electron devices, deep
submicrometer meter devices and technologies, and high-sensitivity semiconductor gas sensors. He has published more than 300 journal papers. He is the
holder of 54 patents in the semiconductor field.
Dr. Liu has passed the Higher Civil Service examinations and has received the
technical expert licenses of ROC in the electrical and electronic fields in 1979
and 1982, respectively. He is a member of Phi Tau Phi and the IEEE Electron
Devices Society.