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Lecture 6

ECEN 4517/5517
Experiment 4: inverter system
12 VDC

Battery

HVDC: 120 - 200 VDC


DC-DC
converter

DC-AC
inverter

Isolated
flyback

H-bridge

vac(t)

AC load
120 Vrms
60 Hz

d(t)
Feedback
controller

d(t)
Vref

Step-up dc-dc converter


with isolation (flyback)

DC-AC inverter (H-bridge)

Feedback controller to
regulate HVDC
ECEN 4517

Digital
controller

Due dates
Right now:
Prelab assignment for Exp. 3 Part 3 (one from every student)
Due within five minutes of beginning of lecture

This week in lab (Feb. 19-21):


Nothing due. Try to finish Exp. 3.

Next week in lecture (Feb. 26):


Prelab assignment for Exp. 4 Part 1 (one from every student)

Next week in lab (Feb. 26-28):


Definitely finish Exp. 3, and begin Exp. 4

The following week in lab (Mar. 4-6):


Exp. 3 final report due

ECEN 4517

Goals in upcoming weeks


Exp. 4: A three-week experiment
vHVDC

Exp. 4 Part 1:
Design and fabrication of
flyback transformer
Snubber circuit
Demonstrate flyback
converter power stage
operating open loop

Vbatt

snubber

PWM

Compensator

Exp. 4 Part 2:
Design feedback loop
Measure loop gain, compare with simulation and theory
Demonstrate closed-loop control of converter output voltage

ECEN 4517

Vref

Exp. 4, Part 3
H-bridge inverter, off grid
vHVDC
IR3101

IR3101

iac(t)
+

Filtering of ac output not explicitly shown

AC load
120 Vrms
60 Hz
vac(t)

Digital
controller

IR 3101 half-bridge modules with


integrated drivers

Exp. 4 Part 3: off-grid inverter

Grid-tied: control iac(t)

Demonstrate modified sine-wave inverter


(required)

Off-grid: control vac(t)

Demonstrate PWM inverter (extra credit)

ECEN 4517

Modified Sine-Wave Inverter


vac(t)

vac(t) has a
rectangular
waveform
Inverter transistors
switch at 60 Hz,
T = 8.33 msec

+ VHVDC

DT/2
T/2

VHVDC

Choose VHVDC larger than


desired Vac,RMS

RMS value of vac(t) is:


Vac,RMS =

1
T

vac t dt = D V HVDC
0

Can regulate value of


Vac,RMS by variation of D
Waveform is highly
nonsinusoidal, with
significant harmonics

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PWM Inverter
Average vac(t) has a
sinusoidal waveform
Inverter transistors
switch at frequency
substantially higher
than 60 Hz

vac(t)

Choose VHVDC larger than desired Vac,peak


Can regulate waveshape and value of Vac,RMS by variation of d(t)
Can achieve sinusoidal waveform, with negligible harmonics
Higher switching frequency leads to more switching loss and
need to filter high-frequency switching harmonics and commonmode currents
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The buck-boost converter

Vg

iL

Switch in position 1: Vg charges


inductor

Switch in position 2: energy stored in


inductor is transferred to output

Conversion ratio:

V = D
Vg
1D
Subinterval 1
iL
Vg

Subinterval 2
+

iL
Vg

ECEN 4517

See also:
supplementary
notes on Flyback
converter, Exp. 4
web page

The flyback converter:


A transformer-isolated buck-boost converter
Q1

buck-boost converter:

D1

Vg

V
+

Q1

construct inductor
winding using two
parallel wires:

D1
1:1

Vg

V
+

ECEN 4517

Derivation of flyback converter, cont.


Isolate inductor
windings: the flyback
converter

Q1

D1

1:1

Vg

LM

Flyback converter
having a 1:n turns
ratio and positive
output:

1:n

Vg

LM
Q1

ECEN 4517

D1
C

A simple transformer model


Multiple winding transformer
i1(t)

n1 : n2

Equivalent circuit model


i1(t)

i2(t)

v1(t)

v2(t)

v1(t)

i1'(t)

n1 : n 2

iM(t)
LM

v2(t)

i3(t)

i3(t)
+
v3(t)

v1(t) v2(t) v3(t)


n 1 = n 2 = n 3 = ...
0 = n 1i 1' (t) + n 2i 2(t) + n 3i 3(t) + ...

v3(t)

: n3

: n3

ECEN 4517

i2(t)

Ideal
transformer

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The magnetizing inductance LM


Transformer core B-H characteristic

Models magnetization of
transformer core material

B(t)

Appears effectively in parallel with


windings
If all secondary windings are
disconnected, then primary winding
behaves as an inductor, equal to the
magnetizing inductance

saturation

slope LM
H(t) i M (t)

At dc: magnetizing inductance tends


to short-circuit. Transformers cannot
pass dc voltages
Transformer saturates when
magnetizing current iM is too large
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v1(t) dt

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Volt-second balance in LM
The magnetizing inductance is a real inductor,
obeying
i1(t)

di (t)
v1(t) = L M M
dt

+
v1(t)

integrate:
i M (t) i M (0) = 1
LM

t
0

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Ts
0

n1 : n 2

i2(t)
+

iM(t)
LM

v2(t)

v1()d

Magnetizing current is determined by integral of


the applied winding voltage. The magnetizing
current and the winding currents are independent
quantities. Volt-second balance applies: in
steady-state, iM(Ts) = iM(0), and hence

0= 1
Ts

i1'(t)

i3(t)
+
v3(t)

: n3
Ideal
transformer

v1(t)dt
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The flyback transformer


Transformer model

ig

Vg

LM

vL

1:n

iC

D1




Q1







A two-winding inductor
Symbol is same as
transformer, but function
differs significantly from
ideal transformer
Energy is stored in
magnetizing inductance
Magnetizing inductance is
relatively small

Current does not simultaneously flow in primary and secondary windings


Instantaneous winding voltages follow turns ratio
Instantaneous (and rms) winding currents do not follow turns ratio
Model as (small) magnetizing inductance in parallel with ideal transformer

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Subinterval 1

Transformer model

ig
Vg

LM

vL

iC

1:n

vL = V g
iC = v
R
ig = i
CCM: small ripple
approximation leads to

Q1 on, D1 off

ECEN 4517

vL = V g
iC = V
R
ig = I
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Subinterval 2
Transformer model

ig
=0
Vg

+
vL

i/n

v/n
+

iC

1:n

vL = nv
i C = ni v
R
ig = 0
CCM: small ripple
approximation leads to

vL = V
n
i C = nI V
R
ig = 0

Q1 off, D1 on

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CCM Flyback waveforms and solution


vL

Vg

Volt-second balance:
vL = D Vg + D' V
n =0

V/n

Conversion ratio is
M(D) = V = n D
Vg
D'
Charge balance:

I/n V/R

iC

i C = D V + D' nI V = 0
R
R

V/R

Dc component of magnetizing
current is

ig
I

I = nV
D'R

Dc component of source current is

0
DTs
Conducting
devices:

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Ts
Q1

D'Ts

I g = i g = D I + D' 0

D1
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Equivalent circuit model: CCM Flyback


vL = D Vg + D' V
n =0

i C = D V + D' nI V = 0
R
R

Vg

Ig
DI

+ DV
g

D'V
n

D'I
n

I g = i g = D I + D' 0

D' : n
+

Ig
+

ECEN 4517

1:D

Vg

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Step-up DC-DC flyback converter


Need to step up the 12 V battery voltage to HVDC (120-200 V)
How much power can you get using the parts in your kit?
Key limitations:
MOSFET on-resistance (90 m)
Input capacitor rms current rating:


25 V 2200 F: 2.88 A

35 V 2200 F: 3.45 A

Snubber loss

Need to choose turns ratio, as well as D, fs, to minimize peak currents


Possible project for expo: build a better (and more complex) step-up dc-dc
converter

ECEN 4517

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Design of CCM flyback transformer


iM(t)

n1 : n2

i1

Vg

iM

LM

vM

D1
C

0
i1(t)
IM

i2
Q1

0
i2(t)
n1
I
n2 M

0
vM(t)
0

ECEN 4517

iM

IM

Transformer model

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Vg
DTs

Approach
Use your PQ 32/20 core
Choose turns ratio n2/n1, LM, D, and fs (choose your own
values, dont use values in supplementary notes)
Select primary turns n1 so that total loss Ptot in flyback
transformer is minimized:
Ptot = Pfe + Pcu = core loss plus copper loss

Determine air gap length


Determine primary and secondary wire gauges
Make sure that core does not saturate
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Core loss
CCM flyback example
B-H loop for this application:

The relevant waveforms:

B(t)

B(t)

Bsat

Bmax

Bmax

B
0

Hc(t)

vM(t)

Minor BH loop,
CCM flyback
example

B
Vg
n1 A c

Vg
DTs

BH loop,
large excitation

B(t) vs. applied voltage,


from Faradays law:

dB(t) vM (t)
=
n1 A c
dt
Solve for B:

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For the first


subinterval:

VgDTs
B=
2n 1A c

Vg
dB(t)
=
n1 A c
dt

Calculation of ac flux density


and core loss
Fitting an equation to the plot at right

P fe = K fe(B) A c l m
 = slope
Kfe = constant that depends on fs
Aclm = core volume
At 60C:

 = 2.6
Kfe = 16 (50 kHz), 40 (100 kHz)
with Pfe in watts, Aclm in cm3, B in Tesla
From previous slide:

VgDTs
B=
2n 1A c

More turns  less B  less core loss


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Copper loss
Power loss in resistance of wire
Must allocate the
core window area
between the various
windings

Winding 1 allocation
1WA
Winding 2 allocation
2WA

0 < j < 1
1 + 2 +

{
{

Total window
area WA

etc.

Optimum
choice:

m =

n mI m

nI

n=1

(leads to minimum total copper loss)

j j

(MLT )n 21 I 2tot
The resulting total copper loss is: Pcu =
WAK u
Choose wire gauges:

ECEN 4517

+ k = 1

1 K uW A
n1
K W
A w2 2 u A
n2
A w1

with

I tot =

j=1

nj
n1 I j

More turns  more resistance


 more copper loss
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Total power loss


Ptot = Pcu + Pfe
Power
loss
Co
ss P c

r lo

fe

ss P

P fe = K fe(B) A c l m

re l
o

ppe

Ptot = Pfe + Pcu

(MLT )n 21 I 2tot
Pcu =
WAK u
VgDTs
B=
2n 1A c

Ptot

Co

There is a value of B
(or n1) that minimizes
the total power loss

Optimum B

Prelab assignment for next week: use a


spreadsheet or other computer tool to compute
Ptot vs. n1, and find the optimum n1.
Then design your flyback transformer.

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Effect of transformer leakage inductance


Transformer model

Ll
ig

+ vl

1:n

LM
Vg

D1
C

Q1

Voltage spike
caused by
leakage
inductance

di
vl = L l l
dt

Ll induces a voltage spike across Q1

Vg + v/n

iRon
t

DTs

ECEN 4517

Leakage inductance is effectively in


series with transistor Q1
When MOSFET switches off, it
interrupts the current in Ll

vT(t)

vT(t)

Leakage inductance Ll is caused by


imperfect coupling of primary and
secondary windings

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If the peak magnitude of the


voltage spike exceeds the
voltage rating of the MOSFET,
then the MOSFET will fail.

Protection of Q1
using a voltage-clamp snubber
Snubber

Flyback transformer

ig

Rs

Vg

vs

1:n

Cs

D1
C

Q1

+
vT(t)

Snubber provides a place


for current in leakage
inductance to flow after
Q1 has turned off
Peak transistor voltage is
clamped to Vg + vs
vs > V/n

Energy stored in leakage


inductance (plus more) is
transferred to capacitor
Cs, then dissipated in Rs

Usually, Cs is large

Decreasing Rs decreases the peak transistor voltage but increases the


snubber power loss
See supplementary flyback notes for an example of estimating Cs and Rs
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