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Accurate modeling of layout parasitic to forecast EMI emitted from a DC-DC converter

Piotr Musznicki 1

Jean-Luc SCHANEN 2
senior member IEEE,

Bruno Allard 3
member IEEE

Piotr J Chrzan 1

1 Politechnika Gdanska,
Wydzial Elelktrotechnki i Automatyki KMiE ul. SOBIESKIEGO 7; 80-216 GDASK
2 Laboratoire d'Electrotechnique de Grenoble,
3 Centre de Genie Electrique de Lyon
CNRS UMR 5005 CEGELY INSA, 2 av Jean Capelle, 69621 Villeurbanne cedex
Abstract This paper illustrates how to account for all
parasitic due to the layout of a power converter (inductive and
capacitive), in order to forecast Electromagnetic Interferences
(EMI). The method is generic, and is validated here in the
simple example of a DC-DC converter, realized on different
technologies: Insulated Metal Substrate (IMS), Printed Circuit
Board (PCB). In addition, several layouts aspects will be
investigated. Conclusions are given on the influence of layout
and all other components on EMI.



The significant advances in power electronics have lead

to improved performance DC-DC converters. One of the
major challenges is to predict, with satisfying accuracy the
levels of the electromagnetic interference (EMI). To achieve
this task, precise models of all components of the converter
must be used. Indeed, the magnitude of emitted noise runs
on the electrical performance which depends on geometrical
structures of the system. So models for realistic
electromagnetic compatibility (EMC) including non ideal
electrical interconnections (parasitic capacitance and
inductance) passive components and semiconductors
devices are needed in design process. This paper will show
temporal simulations using the most possible precise models
for each component, including connections. These models
are described in section II, and simulation is validated in
comparison with measurement (section III)
However, a global EMC simulation is not sufficient to
understand all phenomena which originate EMI. Therefore,
it is not easy to modify the converter if the EMC behaviour
is not satisfying. Hence, a sensitivity study is carried out in
section IV, in order to determine the influence of each
element of the converter in the EMI spectrum
A 100W 14 V- 42 V boost converter, realized on IMS
(Insulated Metal Substrate) has been chosen to illustrate the
method. Switching frequency of MOS transistor is
f = 100 kHz with duty cycle 0.75. It has been designed for
typical automotive applications where this two level of
voltage can be found. The technology (IMS) is also
compliant with automotive constraints (easy cooling
substrate). This well known power electronics application
has been chosen because it is relatively simple, what allows
to understand and simulate EMC. Fig. 1 shows the converter
and its electrical circuit.

Input capacitors
(one electrolytic and
two paralleled




Fig. 1. Fundamental schematic diagram of considered boost converter

(with LISN). Top: picture of the converter (without the LISN)



To get accurate EMC behavior of a power converter

necessitates precise determination of switching waveforms.
Semiconductors devices such as diode and MOS can be
identified as disturbances sources and must be perfectly
modeled. However, even if a model can be provided, it is
also necessary to provide it with parameters. This is not the
simplest task. A generic parameter extraction method from
CEGELY has been used for this purpose [1].
For passive components (inductor and capacitors),
impedance measurement bridge has been used to get an
electrical equivalent circuit.
All interconnection parasitic (inductance, capacitance)
cannot be easily measured. Indeed, low values are
encountered, and it is furthermore hard to split an inductive
behavior into different contributions. Therefore, PEEC
modeling method [2] has been used to account for non ideal

Complete electrical equivalent circuit can thus be

obtained, including the converter itself with all complex
models of components and parasitic, but also the
measurement equipment (Line Impedance Stabilization
Network LISN) and the cabling impedance between LISN
and converter.
A. Semiconductor parameters determination:
The semiconductors used in this converter (MOSFET and
shottky diode) are unipolar components and therefore are
not the most difficult power components to be modeled:
bipolar effects are the most tricky (PIN diode [3], IGBT
Saber conventional models can easily be used for EMI
prediction. However, the model parameters must be
determined with sufficient accuracy.
This is not a so simple task, since manufacturer data are
not always sufficient. A specific parameter extraction
method has been used for this purpose [1]. It is not the aim
of this paper to describe the method in details, thus it is just
briefly reminded here.
MOSFET Saber model needs ten parameters, and diode
four. Among these parameters, some have an influence on
static behavior, and can be deduced from a curve tracer.
Care must be taken in order to avoid self heating of the
component during this static measurement: the current pulse
must be short. Conventional tracers are often not adapted,
and specific experimental setup has been built.
The method is based on an optimization algorithm, which
minimize the error between measured static characteristic
and simulated one, by modifying MOSFET or Diode
Once "static" parameters have been determined, a
dynamic test (in a chopper cell) is used with the same
optimization approach, in order to find the other parameters,
which acts on dynamic behavior only (as capacitance).
This methods is especially interesting since it is general
and can apply to any power component. For the power
MOSFET and the Shottky diode used in the studied boost,
parameters are listed hereafter.


(static or dynamic)

(static or dynamic)

Fig. 2. Principle of optimization method to determine semiconductor

parameters. 1st step: static measurement, 2nd step, dynamic measurement.


VTO - Zero-bias threshold voltage 3.76v[V],
IS - Bulk p-n saturation current 1[pA],
KP Transconductance 83.2,
RD - Drain ohmic resistance 1[m],
RS - Source ohmic resistance 1[m],
RG - Gate ohmic resistance 10 [],
THETA - Mobility modulation 2.025[1/V],
Crss = 1.14[nF] , Coss = [0.1n] Ciss = 14.8[nF]
Cgs = 14.8[nF] and Cds = 2.09[nF] - the inter-electrode
For diode
Is - saturation current injection 1[nA],
- series resistance 7.4[m],
Vj - voltage injection 0.3[V],
Cj - junction capacitance 1.47[nF]
B. Passive components models
As far as conducted EMI are considered, a typical ESLESR representation is sufficient for capacitors [5]. The
ceramic decoupling capacitors are of high quality and
present a only 1 nH Equivalent Series Inductance (ESL).
Electrolytic capacitors have been characterized with an
impedance bridge, and values of 30 nH and 50 m have
been obtained.
The measurement of the SESI 18K 1WR [6] shows that a
simple paralleled R-L-C representation is suitable until
several tenth of MHz. Parameters are given for a 8 A DC
L = 14.7 H
R = 3.96 k
C = 13 pF
Measurements have been carried out using an HP 4194A
impedance bridge, using the suitable test fixture, which
allows a DC current polarization.
C. Cabling model
This DC-DC converter has been realized on IMS. This
technology allows to obtain low inductive interconnections
between components, but also high value of parasitic
Values of self and mutual inductance of copper tracks
have been calculated using InCa software based on PEEC
method [7-8]. This method provides a very powerful
approach to account for non ideal behavior of conductors. It
is based on analytical formula to compute inductance and
coupling, provided a uniform current density. However, due
to bondings on copper tracks (see Fig. 1), current direction
is unknown, and a complete inductive meshing must be
used, contrary to other modeling used in the past [9].
According to PEEC method, a capacitive meshing can
also bee used (Fig.3).
Using strictly results from PEEC method in circuit
simulator is really too heavy for computer simulation.
Therefore, a model reduction for inductive aspects has been
proposed. The idea is similar to scattering matrix from the
microwave theory: the complete geometry is seen from
input-output only. For each conductor linking several


Fig. 3 Reduction of PEEC model of one interconnection

access, one is taken as reference. The differential equations

linking voltages (with respect to this reference point) to
currents are deduced from global PEEC model.

Fig. 4. InCa modelling of the Boost converter interconnections. 5 power

tracks (including bondings and screws) + 1 drive track (not taken into
account in the electrical circuit).

Vi =


Rij Iij + Lij

j =1

This reduction is illustrated Fig. 3. There are as many

reference points as conductors in the converter. In the
considered boost, 5 tracks are considered (including
bondings and screws see Fig. 4-), therefore, 5 reference
points are considered. To be noted that driver track (n6 in
Fig.4) has not been taken into account.
The parasitic capacitance behavior of layout is as
important as inductive one and has impact on EMI
spectrum. In PEEC method conductor is partitioned into
segments where capacitive meshing is added to inductive
one. Since we want to simplify the representation, less
complex model of connections will be used. The solution is
to add capacitor to each reference point of the structure,
which represents capacitance of one whole conductor. It
allows reducing number of capacitors to acceptable
magnitude in Saber simulation.
Values of parasitic capacitance are dependent on the
geometry of physical structure. In general dielectric and
insulate material properties (dielectric constants) thickness
and width of conductors are known. However, experimental
measurements on few representative copper tracks have
been carried out in order to confirm dielectric thickness and
effective dielectric constant. Then, all stray capacitances
have been calculated using Wheeler/Schneider [10] formula.
This formula works pretty well and also appreciates edge
effects. Six capacitors have thus been computed, and
connected to the inductive model of the structure.



Powerful simulator is needed, which allows to make
simulations with a sufficient small time step, according to
EMC frequency range required. Because of very high time
constants of basic boost converter and of LISN, long
simulations have been carried out to obtain steady state of
working application.
Simulations of complex model of the considered
converter have been carried out using the circuit simulator.
On Fig. 5. is presented equivalent Saber scheme of boost
converter, LISN and load where all interconnections of
converter (IMS, screws and bondings) are summarized into
a single macro components, using all differential equations.
In this case different calculation time step can generated
different results what could occur especially in the high
frequencies range, so adequately small step should be
chosen (for frequencies of emitted EMI above 30 MHz it
must be smaller than 0.016 s). Therefore, this operation
takes a lot of computer power, memory and of course time.
Exploitation of simulation in term of EMI, is simply
achieved with FFT of LISN voltage. Results are presented
on Fig. 6.
Another validation can be made by comparison on
MOSFET voltage (Fig. 7). The correlation is very good,
taking into account all measurement inaccuracies (voltage
cannot really be measured directly across the chip).

Fig. 5. Saber circuit including boost converter and LISN

Fig. 6 LISN voltage spectrum obtained with Saber

Fig. 8. LISN voltage spectrum obtained with spectrum analyszer.



mode filter

Fig. 7 MOSFET power voltage comparison

B. Measurement
An experimental investigation on conducted EMI of DCDC boost has been carried out. The converter has been
connected to power supply through a LISN, on which
spectrum from 50 kHz to 30 MHz has been measured in
typical conditions of work (Fig. 8). Many difficulties were
encountered to achieve accurately this measurement. Indeed,
half of the noise emitted from the converter was due to the
driver. Voltage quick variations of the driver (15 V) are
synchronous with the one of power circuit (42 V). Reducing
of noise emitted by driver has been realized using common
mode filter and by disposing it far from the ground plane
(Fig. 9), but total decreasing of it was not possible.
Another difficulty was the modeling of the load: the
100 W resistors exhibit a large capacitor with the reference
plane, which has not been taken into account in the Saber
model. Therefore, even if the global shape of the EMI
spectrum is similar, a 10dB difference is still noticeable
between simulation and measurement.
The comparison of power MOSFET voltage however is
nearly perfect (Fig. 7), what validates the semiconductor and
inductive modeling.
The EMI level on the two legs of the LISN (plus and
minus leg) are exactly the same. This remark can be made in
both simulation and measurement. This phenomenon can be
attributed to the use of nearly perfect input capacitors
(ceramic), which leads to a symmetrical path between plus
and minus tracks.

Fig. 9. Disposition of driver and converter.



To better understand the contribution of each parameter

of the model to EMI spectrum, a sensibility study has been
carried out. Each time, one element of the complete EMC
model has been replaced with an ideal behavior. The
comparison of this new result with the complete one allows
to determine the influence of the modified component. In
this study, the main goal is to determine the importance and
the frequency range of each component (semiconductors,
A. Semiconductors influence
Model of the MOSFET transistor - including parameters
presented in section II-A- used in the complete simulation
have been constructed with Saber tool Model Architect.
Next, it has been changed by ideal MOSFET ( charge
storage & ideal, simple characteristics...) model and new
simulations have been done. Voltages of LISN from these
two kinds of circuits are presented on Fig. 10.
It can be seen that there are different in range above
8 MHz. When the dynamic parameters of MOSFET
responsible for turn on and turn off process are altered,

envelope of spectra in mentioned range also changes.

Other series of simulations have been made by replacing
power diode model with ideal diode model. It can be noticed
looking at Fig. 11, that the differences in EMI spectrum
starts at 3 MHz, but is especially noticeable around 10 MHz.
Consequently, semiconductor models are of great
importance in the high frequency part of the spectrum.

Fig. 12. Influence of inductive connections on LISN spectrum.

Fig. 10. Influence of MOSFET parameters on LISN spectrum.

Fig.13. Influence of parasitic capacitances on LISN spectrum.

Fig. 11. Influence of power diode parameters on LISN spectrum.

B. Layout influence
Inductive modeling of the tracks is not negligible in
accurate EMI forecasting. Stray inductance plays a great
role in commutation and has an effect on semiconductor
behavior. In addition, voltage ringing occur which
contribute to EMI generation. The influence of stray
inductance is shown on Fig. 12, where comparison of results
of simulation with and without Saber macro component
generated in InCa is presented.
On the other side parasitic capacitances of copper track
can be removed. For IMS circuit, stray capacitance are of
great values and their role is consequently significant.
Removing parasitic capacitance gives great different on
spectra for all frequency range of emitted EMI. It can be
said that parasitic capacitance are important parameter for
EMC behavior description.
In the same idea, it is easy to replace IMS substrate with
conventional PCB. This results in an increase of stray
inductance, and a decrease of stray capacitance (between
1 pF to 50 pF for PCB and from 100 pF to 1000 pF for
IMS). This difference is due to the modified distance to the
ground plane (~1.3 mm for PCB and ~70 m for IMS).
The comparison of LISN spectrum for these two
technologies is presented Fig. 14. Disturbances generated in
PCB layout circuit are much lower than those from IMS,
due to lower stray capacitance.

Fig.14. Spectrum of LISN voltages for PCB and IMS (real)




A better knowledge of EMC generation mechanisms has

allowed the construction of a simple circuit to forecast EMC
behavior of the boost converter. Since inductive
characteristics of the interconnects and the semiconductor
switching characteristics acts in the high frequency range
only, the MOSFET and the diode have been replaced with a
simple voltage source, and no inductive parameters have
been taken into account for interconnects. On the contrary,
all capacitive aspects have been kept in the modeling.
In this simple scheme (Fig. 15) can be found the LISN
(Cn, Rn and Ln), the input capacitors (C1, C2 and C3), the
input inductor (L, CL, RL). Two main parasitic capacitance
due to the layout are also taken into account. They are
computed from the complete capacitive model.
This leads to a very light linear model, and therefore to
fast and easy calculations. It can be implemented in a simple
Mathcad document. Spectrum obtained with Mathcad sheet
is presented on Fig 16. It can be noticed that for frequencies
below 10 MHz results are similar to those from
measurement and Saber simulation.

allows forecasting EMI spectrum. After validation, with

experimental results, a sensibility study allows a better
understanding of the contribution of each stray element on
the global EMC spectrum. Information - about each
component influence - has been used to improve simple
model for disturbances forecasting.

Fig. 15 Simplified equivalent circuit for EMI estimation.


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Fig 16. EMI spectrum obtained with simple model.

This scheme was used in [11] to improve the capacitive

layout of this converter, with respect to EMC constraints. It
is thus shown in this paper that its accuracy is sufficient
under 10 MHz. The modeling and prediction of conducted
EMI using this model could be useful as a fast design and
optimization tool for Power Electronic applications.


Simulations and experimental investigations on

conducted EMI of hard switching boost converter were
carried out. A generic method to account for stray elements
of power layout (inductive and capacitive) in simulation has
been presented. An automatic coupling with SABER

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