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2006 IEEE PES Transmission and Distribution Conference and Exposition Latin America, Venezuela

**A Fast and Efficient Method for Frequency
**

Deviation Measurement Based on Genetic

Algorithms using a FPGA Approach

A. C. B. Delbem1, E. V. Simões1, B. F. Souza1, M. Oleskovicz 2, S. A. Souza,2

and D. V. Coury 2, Member, IEEE

**Abstract - The main objetive of this research is to present a
**

fast and efficient method based on Genetic Algorithms (GAs) for

measuring the frequency deviation as well as the voltage

magnitude and phase angle of a noisy sinusoid wave. The

situation was formulated as an optimization problem, and the

goal was to minimize the estimation error. The use of GAs has

the advantage of better immunity against noise disturbance

present in the input data. In addition, this work also investigates

the implementation of such a scheme in FPGA (FieldProgrammable Gate Array). It is expected that the new approach

is able to accurately estimate the frequency, voltage magnitude

and phase angle, simulating an on-line frequency relay.

The inicial performance suggests that the proposed

Index Terms – Frequency relay, Genetic algorithms, FPGA.

I. INTRODUCTION

I

**N a power system, the correct evaluation of the frequency is
**

an important task. Some good examples of application are

in power system relaying, power-quality monitoring and

operation as well as control of devices using digital

technologies.

The typical use of frequency estimation in power system is

for protection schemes against loss of synchronism [1], underand-over frequency relaying and for power system

stabilization [2]. Generally, frequency relays are used in

power system to protect the generating units. In addition to

provide complete primary and back up protection. The

**The authors acknowledge the Department of Electrical Engineering –
**

Engineering, School of Engineering of São Carlos and Department of

Mathematics and Computer Science, University of São Paulo (Brazil), for the

research facilities provided to conduct this project. This work was supported

by CNPq – Conselho Nacional de Desenvolvimento Científico e Tecnológico,

FAPESP - Fundação de Amparo à Pesquisa do Estado de São Paulo and

CAPES – Coordenação de Aperfeiçoamento de Pessoal de Nível Superior.

The authors A. C. B, Delbem1, E. V. Simões1 and B. F. Souza1 are with

Department of Mathematics and Computer Science, University of São Paulo,

SP, Brazil (e-mails: {acdb, bferes, simões}@icmc.usp.br).

The authors M. Oleskovicz2, S. A. Souza2 and D. V. Coury2 are with

Department of Electrical Engineering – Engineering School of São Carlos,

University of São Paulo, SP, Brazil (e-mails: {olesk, silvios,

coury}@sel.eesc.usp.br).

1-4244-0288-3/06/$20.00 ©2006 IEEE

**performance of these relays, however, depends primarily on
**

the accuracy of the frequency and voltage magnitude

measurements.

Some solutions have been suggested utilizing signal

processing for the estimation problem. The applications can be

categorized based on their time demand, that is: critical real

time application, such as the mentioned relay protection; online data monitoring in control room and off-line data analysis

from computer recordings. The classification is useful since

the different time demands imply in restrictions on what type

of frequency estimator and filter technique that can be used.

In general, the available frequency estimation techniques

use digitized samples of the system voltage. Considering the

power system voltage waveforms as purely sinusoidal, the

time between two zero crossings is an indication of system

frequency. However, in reality, the measured signals are

available in a distorted form and this can be a problem for the

frequency estimation. Discrete Fourier transform, Least Error

Square, Kalman filtering, orthogonal finite-impulse-response

(FIR) filtering, and iterative approaches [3]-[10] are some of

the important techniques in this area. Soft computing

techniques, such as Artificial Neural Network (ANN) [11] and

Genetic Algorithms (GAs) [12] are also utilized for power

frequency measurement.

This research presents a fast and efficient method based on

GAs for measuring the frequency deviation as well as the

voltage magnitude and phase angle of a sinusoid wave. In this

approach, the problem is formulated as an optimization

problem. The goal is to minimize the estimation error utilizing

Gas, which have the advantage of having immunity against

noise disturbance. However, it should be pointed out that one

of the main objectives of this study is to investigate if the

proposed GA approach for FPGA (Field-Programmable Gate

Array) is able to accurately estimate the frequency, voltage

magnitude and phase angle of a system. The performance of

the proposed estimator is judged though numerous examples

and the results obtained show that the technique estimates the

waveform parameters with high degree of accuracy.

EE is a methodology for the design of evolutionary hardware that coexists with the control system that it is trying to optimize inside a single chip (SOC solution).2 II.e. In many cases. so that there is no need for human intervention to evaluate. Its fundamental principle is “the fittest member of a population has highest probability for survival”. This has motivated many authors to propose frameworks for the design of reconfigurable solutions on FPGA. EE adds even more difficulty to the inherent real-time hardware problem of replicating entire experiments. the algorithm must be fast. evaluated. Additionally. seeing the controller as a whole and measuring only behavior performance). Altera’s Excalibur System with the NIOS Soft Core Embedded Processor [15] has been chosen as the system platform. individual chromosomes are decoded. It avoids the problems of evolving in simulation and transferring the design to physical chips and speeds up evolution by exploring the intrinsic parallelism of the FPGA logic cell arrays. After this. Noise in the sampled signals and the environment may result in a large variance across trials. Nevertheless. from which improvement is sought. the objective function establishes the basis of selection.. all these authors lack parallelism or independence from external computation. Amongst them. without the necessity of a processor (external or internal). A noticeable disadvantage of EE is that it is difficult to collect experimental data from the chip. many authors followed [21][23]. When designing evolutionary systems for parallel hardware. selection. and reproduction can be carried out autonomously and in parallel by the embedded evolutionary system.) should be decomposed and the sub-systems often include interactions mediated via very long interconnection lines. A GA operates on a population of current approximations – the individuals – initially drawn at random. such as evaluating each EA individual in parallel. III. BASIC CONCEPTS RELATED TO THE GENETIC ALGORITHMS A genetic algorithm (GA) is a search algorithm based on the mechanism of natural selection and natural genetics. There is a fitness value associated to each chromosome. By manipulating simultaneously a population of possible solutions. Soon after. the GAs can explore several areas of the search space. it is possible in many cases to include memory and processor hardware in the system. leading to project delays. it became possible to implement sophisticated full-parallel versions of EAs in hardware. Essentially. However. Fitness evaluation. he applied EAs to FPGAs and showed how to automatically produce useful circuits by evolution. a fitness value is derived from the raw individual performance measure as given by the objective function. Another major problem is that the interactions among sub-parts tend to grow exponentially as the systems become more concurrent. because it will analyze each individual from a population and its successive generations. The evolutionary algorithm is conceived in a way to explore parallelism. The proposed solution makes use of the System-On-Chip (SOC) concept [16] with high-level system integration. This uncertainty is also difficult to reproduce in simulation. breed.. a primary decomposition of the design becomes difficult to obtain. Individuals are encoded as strings – the chromosomes – so that its values represent a possible solution for a given optimization problem [13]. designing and programming such a specialized hardware can still be very complex. and the process continues for different generations. namely crossover and mutation. but in the evolutionary algorithm as well. FPGA – A SYSTEM-ON-CHIP-SOLUTION Specialized hardware poses as an attractive solution to cope with the necessary real-time constrains of modern applications. The GAs relies on two basic kinds of operators: genetic and evolutionary: Genetic operators. Evolutionary operators deal with determining which individuals will suffer crossover or mutation. or reconfigure the evolving population. When the complexity of the interactions grows. mainly in capacity and speed of the logic cell arrays. Nevertheless. such as the role of environment. Still.g. etc. FPGAs (Field-Programmable Gate Arrays) are a flexible alternative to implement complex models. so that the evolutionary process can be monitored and data can be transferred to an external computer to be analyzed. embedded within a real . it is not always clear how the evolutionary functions (e. At the reproduction stage. In this context. partner selection. as is used to bias the selection process. The better the solution the chromosome represents the larger its fitness its chances to survive and produce offspring. the development of a fitness function can be based on this return and can represent only a partial evaluation of the problem. The system hardware is not only autonomous in their application-specific control circuit. crossover. mutation. even by preserving the same random seeds. Thompson deserves credit for describing the first experiments with the Embedded Evolution (EE) concept. or both. Thompson [17]-[20] took the first steps towards bridging the gap between computer models of Evolutionary Algorithms (EAs) and physical reality. are responsible for establishing how individuals will exchange or simply change their genetic features in order to produce new individuals. With the advances on FPGA techniques in the last decade. The selected individuals are then modified using genetic operators. but it is practically impossible in a physical controller. In his work. select. since hardware functionality can be changed according to the task to be executed [14]. a GA tries to minimize or maximize the value presumed by the fitness function. having its main functions distributed among and embedded within the FPGA logic cells. and selected according to their fitness. An alternative to this is to allow evolution to deal with the unexpected interactions between sub-systems and design a controller based on the behavior of the complete system (i.

Consider 2 individuals. resulting in a less effective selection. . Here. 3 2 new points can be generated. similar to the blend crossover for real numbers [25]. For each of their 3 genes. xkmax ] . the integer values they can assume in the chromosome and the corresponding real value. x1j . If xkt is out of the range [ xkmin . modifying fitness and obscuring the fitness landscape. Crossover operator The offspring is created by randomly choosing one of the 5 points represented in Fig. it alters the behavior of the control circuit hardware. A graphical representation of chromosome is given by Fig. σ = 2 ). As a rule of thumb. The design of a fitness function in EE is more difficult than in simulation. Table I shows the number of bits used to encode each parameter. An exception for that is when a given Real range [2. Selection The selection process is concerned about stochastically choosing individuals for reproduction. The crossover of the proposed GA follows a general approach.5. Fig. evolution is manipulating a physical object that exists in real-time and space. Evolution should be able to exploit freely the collective behavior of the components of the control circuit without the necessity of predicting it from knowledge of their individual properties. 62. In EE. Moreover. Any stochastic components in the algorithm compound the problem. 2. In EE. to introduce more selection pressure in the environment and differentiate the better-adapted individuals. making δ 1 = 0 . Even stochastic noise is not always a problem and can present advantageous effects. Chromosome representation B. the selection is carried out by the well-known tournament operator [13]. because not all sensory information taken by simulation is actually available from the point of view of the integrated circuit in the real world. A chromosome has three sequences of bits representing three integer numbers. it is set to the bordery values. This operator has been reported to give adequate results for several application domains and can be easily implemented in FPGA [24]. 2 for each gene. as showed in Fig. Crossover Crossover is a genetic operator used to guide the evolutionary process through potentially better solutions. 2π] gene have the same value for the 2 parents. Towards the end of the evolutionary experiment. For example. 12. and behaves according to the physics of the electronic circuit.5] [58. In simulated evolution. With this value. chosen by the selection process. where σ is a user defined parameter (here.0] [0. The first number is an index for the value of Vm.t . far beyond the scope of conventional design. Parents are marked with empty circles. x1j or x1j + δ 1 . C. 255] [0. Encoding The proposed GA employes a binary-code scheme for representation of the parameters Vm (amplitude). 1. which is only a sub-set of the possibilities. It can take advantage of the rich structures and dynamical behaviors that are natural to the FPGA hardware.3 integrated circuit.0. PROPOSED GA FOR FPGAS A. However. TABLE I PARAMETERS ENCODING Parameter Vm f φ No of bits 8 8 9 Integer range [0. the differences between individual fitness become smaller. a truncated value δ t = xit + x tj is calculated. it emphasizes the best solutions in the current population. f (frequency) and φ (phase angle). This effect decreases the difference in fitness between two individuals that are neighbors in genotype space and may lead to imprecision in selecting the fittest robot. IV. which are written as x. Fig. this selection strategy has presented superior performance than the roulette wheel operator. the programmer can manipulate the rules to eliminate nondeterminism and produce repeatable trials. the first gene of the new individual xk can be any x1i − δ 1 . 255] [0. 2. xit and x tj (where t indicates the generation). a possible alternative is to increase the duration of a generation at the end of the experiment. 511] x1i + δ 1 . xkt is randomly chosen between xit / σ and xit * σ .[26]. the second number is an index for f and the third is an index for φ. This operator interchanges genetic material of different chromosomes in order to create individuals that can benefit from their parents’ fitness. 1. In this case.

. Sine and S’() vectors . t i ) − S ' (c f .. Different fitness functions can produce very different GA performances for the problem. the fitness function (FF) considered here is given by (1): φ. t i ) is the signal calculated over ( t i ) using the parameters f. 3. therefore. where l is the number of discretization points used for Table 1. n where c represents an individual of the population. in most cases. cφ . 1]. 3) stores the product f * t i .5]. Moreover. one can easily retrieve a number Index f *ti + φ . t i ) = c v m * sin( 2πc f t i + cφ ) FIG.4 D. Matrix 3 (Fig. as showed in Table 1. n is the number of points ( t i ) and S ( f . such that they can be easely configured into the FPGA. and p is the number of points used to discretize the sine function. FF (c) = max | S ( f . a sampling frequency of 800Hz and half cycle were considered. It has dimension mxn. as showed in Fig. Vm and φ codified in the chromosome c. n = 7. It works producing alteration of a gene value independently from the gene value of its parent. they concluded that. Furthermore. the sine function argument should be calculated and next the multiplication between amplitude and sine takes place.t is out of the range [ x.. After calculating matrix in Fig. where o is the number of discretization points used for Vm. cv m . The function S ' (c f . 6. the maximum function outperformed the sum one.. Fitness The fitness function is used to evaluate a solution of a problem. b. Consider the expanded form of S ' (c f . MATRIX Fig. Thus. It is important to notice that both S(⋅) and S’(⋅) are discretized. Memory Organization In order to largely reduce running time for evalutation of the fitness function. 4) of dimension mnxl. it is set to the bordery values. Formally. t i ) (1) i =0.. as explained at next section . It has p = 1024 points in [-1. it requires fewer operations than the sum function to be calculated and it is. c v m . ti ) . 5. t i ) is the original FIG. more suitably implemented in FPGAs. Fig. Based on experimentation. The values of the elements E. It has dimension oxp. V m . The proposed mutation operator adds 1 to (subtracts 1 from) each gene x. the authors use the maximum function. Fig. 5 computes S ' (c f . 5 are mapped to the S'() vector of Fig. indicating the index of one of its elements. t i ) in (1): S ' (c f . the fitness evalutation may require large running time depending on the employed fitness function. in this work. ti ) itself was discretized. cφ . This index is used to construct matrix sin( Index f *ti + φ ) (Fig. φ . MATRIX f * ti signal calculated over the point ( t i ) and S ' (c f . cφ . as showed in Table 1. 4. using q = 4096 points in [-12. cφ . c v m . c v m . As. cv m . t i ) (2) The computation of (2) can be splitted into two steps: first. Thus the elements of matrix in Fig. Matrix sin( Index f *ti + φ ) S ' (c f . which is the range it can assume. cv m . φ . 3-6 summarize the memory organization of the FPGA. For frequency-relaying estimation. and n is the number of points sampled of the waveform signal. 6. If x. where m indicates the number of discretization points used for f. cφ .max ] ..t of the chromosome according to a mutation rate. 12. 6 shows a graphical representation of the sine vector. cφ . are mapped into the discretized vector of the sine function. cφ . EL-Naggar and Youssef [12] have proposed two types of fitness functions: one is based on the sum of the errors in the equation and the other on the maximum individual error.min . V m . Mutation Mutation is the genetic operator responsible for generation of solution diversity in the population [27]. as showed in Table 1. in this work. cv m . given the considered values of Vm. x. Finally. mathematical calculations like multiplication and sine operations are computed a priori on a workstation. The results were stored in a tabular manner. matrix in Fig.5. F. 3.

9. phase angles and frequencies to test the algorithm. 62. The maximum error on estimating the phase angle was around 30o. one of the main objectives of this work is to investigate if the proposed GA could be implemented in FPGA (Field-Programmable Gate Array) simulating an online frequency relay with advantages if compared to the conventional one. . the authors used a data window size of 0. Fig.7%. a subset of the obtained results are highlighted.5 V [58. The experiments are based on a sine waveform with 60Hz and 0o. the results of the proposed method are averaged over 1000 trials. the estimation provides relative errors smaller than 1.5 cycle and a sampling frequency of 800 Hz.5. Fig. 9 shows the percentage errors for estimation of the three parameters when phase angle varies. 12. with 1 % noise and different amplitude values. Relative errors (%) when varying frequency (f) Fig. Relative errors (%) when varying Vm amplitude This work presented a method based on Genetic Algorithms (GAs) for measuring the frequency deviation as well as the voltage magnitude and phase angle for a sinusoid wave. frequency and phase. TABLE II PARAMETERS USED FOR TESTS WITH THE PROPOSED GA Parameter Amplitude (Vm) Frequency (f) Phase (φ) Values range considered [2. magnitude and phase angle of a noisy waveform. It shows a maximal relative error of 1. The experiments consist in generating a digitalized sine waveform.5] with steps of 2. 360] with steps of 30o The proposed GA was evaluated for more than 500 different test cases. As GAs are stochastic methods. The relative errors obtained are in general bigger for this set of tested cases. The test cases were generated considering the values range as shown in Table 2. In all experiments. For all the parameters. the obtained results for this set of tested cases are also adequate. Fig. The GA was very accurate in estimating the frequency and the amplitude of the waves. It also works properly for the phase estimation.80%. They provide estimation results involving effects of variation on amplitude. Thus. The relative errors were smaller than 0.5 Hz [0. For these cases.0. Relative errors (%) when varying phase φ VI. Fig. EXPERIMENTAL RESULTS The main objective of this work is to investigate if the proposed GA approach for FPGA is able to accurately estimate the voltage frequency.0] with steps of 0. The time reference is considered at the beginning of the data window. The various values considered are shown in Table 2.1% for this case.5 V. 8 shows the percentage errors for estimation of the three parameters for several frequency values. 7. CONCLUSIONS Fig. crossover probability of 1. runs of 300 generations. Moreover. Based on another study [28].4%. there are no guarantees that the same results will be encountered in different runs. the relative error was about 1. Nevertheless. In the following. the GA have the following parameters: population of 30 individuals. 8. mutation rate of 20%. 7 shows the percentage errors for estimation of the three parameters for the tested cases with different values of amplitude.

V. no.. Girgis and T.ICES 2000. 1. degree from the University of Kent at Canterbury. IEEE Trans. He became Assistant Professor with the University of São Paulo in 2003. “Field-programmable gate arrays: reconfigurable logic for rapid prototyping and implementation of digital systems”. and Z. University of São Paulo.html. Falmer Brighton. Report ID: Cognitive Science Research Paper Serial Nº. no. I. São Paulo. 1996. pp. degree from the University of São Paulo. 1984.. 157163. Basak. Fogel. pp. Bristol. S. pp.. Souza is currently a Ph. L. The University of Sussex School of Cognitive and Computing Sciences. Calgary. Sachdev and M. The University of Sussex School of Cognitive and Computing Sciences. Hosemann. It suggests that the proposed methodoloy could provide an efficient alternative for frequency relays. in 2002. no. “A numerical algorithm for direct real-time estimation of voltage phasor. UK. P. Mach. S. Delbem received the Ph.6 The inicial performance presented high performance both in the implementation point of view as well as high precision on the estimations realized. 52-59. Deb. John Wiley & Sons. His areas of research interest are Power System Protection as well as techniques for Power Systems Control and Protection.http://www. Falmer Brighton. Thompson. pp. In Communications of the Association of Computing Machinery... “Application of GAs in Frequency Digital Relays”. and G. A.. Hwang. Eckhardt. Pradhan. “A genetic based algorithm for frequency-relaying applications”. “Evolutionary Techniques for Fault Tolerance”. and A. J. “Unconstrained Evolution and Hard Consequences”. “Frequency estimation by demodulation of two complex signals”. John Wiley & Sons. G. UKC. Alberta. IEEE Transactions on Power Delivery. no. no. W. Akke. 42. Jul. vol. (Ed. Wright. 1989. 1996.. “Real Time for Real Power: Methods of Evolving Hardware to Control Autonomous Mobile Robots”. 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CSRP 397. 437-443. 4:65–85. Canada. Power Quality. and Iwata. REFERENCES [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] P. “A survey on system-on-a-chip design languages”. 4. 1999. 1025-1038. Report ID: Cognitive Science Research Paper Serial Nº.. 1992. D. El-Naggar and H. UK. IEEE Trans. 1994. Thompson and P. “An iterative technique for fast and accurate measurement of power system frequency”. pp. Stratix Altera. 13. University of São Paulo.. San Mateo. H. Falmer Brighton. dynamically reconfigurable computing (FPGAs). “An Evolved Circuit. Boston. So. England.. no. P. Yao. 1996. “Genetic algorithms in search. Electric Power Systems Research. England. P. and M. “Evolving Fault-Tolerant Systems”. Entwined With Physics”. M. [21] A. VII. IEEE Transactions on Power Delivery. [27] D. J. edition. 173-178. 1. K. “Nios development kit”. BN1 9QH. Publisher: Springer Verlag. University of São Paulo. England. Vargas. and G. 1999. England. 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