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THE DESIGN OF POWER AMPLIFIER FOR 5.8 GHZ WIRELESS LAN APLLICATION USING GAAS SUBSTRATE

H.K. CHOI J.C. LEE, B. LEE, J.H. KIM, N.Y. KIM, AND U.S. HONG

RFIC Research and Education Center & Mission Technology Research Center, Kwangwoon University, 447-1 Wolgye-dong Nowon-ku Seoul Korea 139-701 E-mail: nykim@daisy.kwangwoon.ac.kr

This paper describes a compact two-stage hybrid power amplifier for 5.8 GHz-band Wireless Local Area Network (WLAN) applications. The amplifier has been fabricated on high dielectric semiconductor wafer, and then the amplifier has small dimension compared with the conventional hybrid circuits. To fabricate the amplifier, the mask pattern is produced using electron beam lithography. Then the FET, capacitors and resistors are combined with the microstrip line pattern by silver epoxy. The size of the two-stage amplifier is measured to be 2.1 cm × 1.4 cm.

  • 1 Introduction

Recently, 5.8 GHz band Wireless Local Area Network (WLAN) is becoming more widely recognized as an economical alternative for short distance voice and data communication. Wireless LANs can provide all the functionality of wired LANs but without the physical constraints of the wire itself. In a typical WLAN configuration, a transmitter/receiver (transceiver) device, called an access point, connects to the wired network from a fixed location using standard Ethernet cable. End users access the WLAN through wireless-LAN adapters, which are implemented as PC cards in notebook computers; ISA or PCI cards in desktop computers, or integrated within hand-held computers. The power amplifier is the most important and expensive device in the RF block of Wireless LAN system. This paper is focused on the development of very compact HMIC power amplifier for WLAN application. A reduced two-stage hybrid power amplifier is fabricated using the P-HEMT on GaAs substrate. The size of the circuit by utilizing high dielectric substrate. Because the microstrip pattern is formed using semiconductor process technology, the high production accuracy can be achieved. The FET, capacitors and resistors are combined with the microstrip line pattern by the wire bonding technique, which is often adopted in the fabrication of microwave integrated circuits. This IC form like these is intermediate step for the semi-MMIC that is a ultimate goal after this work. Semi-MMIC can be the IC which all the component except for active device are fabricated on the same semiconductor substrate and thereafter only the discrete active device is mounted. The Semi-MMIC has many advantages over MMIC. Because the process of active device fabrication can be excluded in this configuration, the error, which is made in the process of active device fabrication dose not happen and the yield is expected to increase remarkably. Also, the equipments for active device are unnecessary and the cost of production is curtailed.

  • 2 Active and Passive Device

The amplifier is constructed by a HEMT and chip passive device on the thin film microstripline formed on GaAs substrate with a dielectric constant of 13.6, substrate thickness of 340 , and metal thickness of 2 . The calculated 50 and λ/4 line widths are 242 and 4436 , respectively. The size of circuit can be reduced in comparison with the conventional hybrid circuit on the high dielectric substrate.

The LP750 P-HEMT of Filtronics is used for the first stage and second stages as a active devices in this work. The large signal model is adapted to Curtice-Cubic GaAs FET model of Libra 6.1 CAD tool. It is utilized an Electron-Beam direct-write 0.25 by 750 Schottky barrier gate. There are pads such as drain, source, and

gate for wire bonding. The die size of the device is 320 430 and it has a large signal data of Curtice- Ettenberg Model.

The single-layer parallel-plate capacitor, BMS100K2C of Tecdia is used for RF coupling in the input and output port. The size of the capacitor is 305 305 . It can be mounted on the ground plane or on a microstrip line (conductive epoxy is used for this purpose). In the capacitor of this type, the connection to the circuit is made with bond wires or a ribbon. The parasitic inductance associated with a ribbon is usually lower than that associated with bonding wires. Typical widths are 10 mil, 15 mil, 20 mil, and so on. The 7 thin film resistor of IMS Inc has been used in this paper to improve the stability factor (K) of the power amplifier. It is inserted into the input of transistor and gate bias circuit.

  • 3 The Design and Fabrication of Power Amplifier

Basically, for a design of amplifier, the input and output matching network are designed to achieve the required stability, small signal gain, and bandwidth. The DC bias circuits are designed not to disturb the RF performance. Bias voltage is set at +7 V with the current of 35 % I dss in order to operate the amplifier in class A. The matching circuit is composed of only distributed elements and the circuit configurations of 1 stage and 2 stage are designed by the same structure. The amplifiers represent unstable condition in the vicinity of 1GHz. In order to improve the stability of amplifier in a low frequency, the resistor is inserted in the gate bias network. The resistor would not inserted in the drain bias circuit to avoid any dc power consumption through this resistor. Figure 1 represents the stability factor of amplifier with 7 resistor in gate bias network and Figure 2 shows the circuit with 7 resistor in gate bias network and the input of the transistor The mask pattern is defined using electron-beam lithography. Then the FET, capacitor, resistor is combined into the microstrip pattern. Since the microstrip pattern is formed using semiconductor process technology, the high production accuracy can be achieved. The grounding of transistor is achieved by the wire bonding from the source pad to the ground pad. Since the variation of the inductance in source of becomes the critical factor, which can change the characteristics of the amplifier, the wire bonding in the transistor source is one of the most important factor in the fabrication. Figure 4 shows the layout for mask pattern manufactured. The designed amplifier has a small signal gain of 22 dB and an output power of greater than 21 dBm in the frequency range of 5.725 GHz to 5.825 GHz at operating biases of V ds = +7 V and I ds =35 % I dss . This amplifier produces 15% power-added efficiency, and 1dB compressed output power of 21 dBm with an input VSWR of better than 2:1 from 5.725 GHz to 5.825 GHz. Figure 5 shows S 11 and S 22 on smith chart of the matched amplifier. This represents that the condition of matching is good in the designed frequency band. The frequency response of the transistor is shown in Figure 6 and the output power is shown in Figure 7. Figure 9 shows the dynamic load line of the designed amplifier. Dynamic load line analysis is used to achieve moderate efficiency and output power. For the high efficiency operation, the amplifier is biased at V ds of 7 V and I ds of 35 % I dss .

gate for wire bonding. The die size of the device is 320 430 and it has

Fig. 1. The stability factor of 1-stage

Fig. 2. The stability factor of 1-stage with Resistor in gate bias and input of transistor.

Fig. 3. The layout for fabrication of mask Fig. 4. The photograph of fabricated power amplifier

Fig. 3. The layout for fabrication of mask

Fig. 3. The layout for fabrication of mask Fig. 4. The photograph of fabricated power amplifier

Fig. 4. The photograph of fabricated power amplifier

Fig. 3. The layout for fabrication of mask Fig. 4. The photograph of fabricated power amplifier

Fig. 5 S 11 and S 22 of the matched network

Fig. 3. The layout for fabrication of mask Fig. 4. The photograph of fabricated power amplifier

Fig. 6. S 11 , S 22 , S 21 of amplifier

Fig. 3. The layout for fabrication of mask Fig. 4. The photograph of fabricated power amplifier

Fig. 7. The output power of amplifier

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Conclusion

In conclusion, a two-stage hybrid power amplifier for WLAN access point has been designed and fabricated on GaAs substrate. This amplifier has very compact size in comparison with the conventional hybrid circuit. The size of the amplifier is 2.1 cm 1.4 cm. At 7 Volt collector bias, the amplifier has achieved the gain of 22 dB, the output power (CW) of 21.4 dBm and PAE of 15% over 5.725 5.825 GHz. The input and output reflection loss are 15 dB and 20 dB respectively.

References

[1] G. Gonzalez, Microwave Transistor Amplifiers Analysis and Design, Prentice Hall, pp 212-283,

1996.

[2] Steve C. Crips, RF Power Amplifier for Wireless Communication, Artech House, pp 308-311,

1999

[3] Abrie, Design of RF and Microwave Amplifiers and Oscillators, Artech House, pp 217-235, 1999

[4] N. Shiga et all the authors., “X-Band MMIC Amplifier with Pulse-Doped GaAs MESFET's”, IEEE Transactions on Microwave Theory and Techniques, vol. 39, no. 12, 1991. [5] J. M Golio, Microwave MESFETs & HEMTs, Artech House, pp 174-196, 1991