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EC 6511 DSP LAB MAUAL FOR IIIRD YEAR VTH SEM ECE STUDENTS

EC 6511 DSP LAB MAUAL FOR IIIRD YEAR VTH SEM ECE STUDENTS

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Sri Muthukumaran Institute of Technology

Chikkarayapuram, Near Mangadu, Chennai-600069

AICTE Approved, NBA Accredited

ENGINEERING

LABORATORY MANUAL

Regulation 2013

V- Semester

Name

: ..

Reg .No

: ..

Branch

: ..

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EC6511

LTPC

0032

OBJECTIVES:

To implement Linear and Circular Convolution

To implement FIR and IIR filters

To study the architecture of DSP processor

To demonstrate Finite word length effect

LIST OF EXPERIMENTS:

MATLAB / EQUIVALENT SOFTWARE PACKAGE

1.Generation of sequences (functional & random) & correlation

2.Linear and Circular Convolutions

3.Spectrum Analysis using DFT

4.FIR filter design

5.IIR filter design

6.Multirate Filters

7.Equalization

DSP PROCESSOR BASED IMPLEMENTATION

8. Study of architecture of Digital Signal Processor

9. MAC operation using various addressing modes

10. Linear Convolution

11. Circular Convolution

12. FFT Implementation

13. Waveform generation

14. IIR and FIR Implementation

15. Finite Word Length Effect

TOTAL: 45 PERIODS

OUTCOMES: Students will be able to

Carry out simulation of DSP systems

Demonstrate their abilities towards DSP processor based implementation of

DSP systems

Analyze Finite word length effect on DSP systems

Demonstrate the applications of FFT to DSP

Implement adaptive filters for various applications of DSP

LAB EQUIPMENT FOR A BATCH OF 30 STUDENTS (2 STUDENTS PER

SYSTEM) PCs with Fixed / Floating point DSP Processors (Kit / Add-on Cards) 15 Units

LIST OF SOFTWARE REQUIRED: MATLAB with Simulink and Signal Processing

Tool Box or Equivalent Software in desktop systems -15 Nos Signal Generators (1MHz)

15 Nos CRO (20MHz) -15 Nos

Page 2

INDEX

S.No

Date

Page

No

Staff

Sign

Page 3

INDEX

S.No

Date

Page

No

Staff

Sign

Page 4

INTRODUCTION TO DIGITAL SIGNAL PROCESSING (DSP)

Why go digital?

Digital signal processing techniques are now so powerful that sometimes it is extremely difficult, if

not impossible, for analogue signal processing to achieve similar performance.

Examples:

FIR filter with linear phase.

Adaptive filters.

Analogue signal processing is achieved by using analogue components such as:

Resistors.

Capacitors.

Inductors.

The inherent tolerances associated with these components, temperature, voltage changes and

mechanical vibrations can dramatically affect the effectiveness of the analogue circuitry.

With DSP it is easy to:

Change applications.

Correct applications.

Update applications.

Additionally DSP reduces:

Noise susceptibility.

Chip count.

Development time.

Cost.

Power consumption.

Why NOT go digital?

Page 5

High frequency signals cannot be processed digitally because of two reasons:

Analog to Digital Converters, ADC cannot work fast enough.

The application can be too complex to be performed in real-time.

Real-time processing

DSP processors have to perform tasks in real-time, so how do we define real-time?

The definition of real-time depends on the application.

Example: a 100-tap FIR filter is performed in real-time if the DSP can perform and complete the following

operation between two samples

99

yn ak xn k

k 0

Real-time processing

Waiting Time 0

Why not use a General Purpose Processor (GPP) such as a Pentium instead of a DSP processor?

What is the power consumption of a Pentium and a DSP processor?

What is the cost of a Pentium and a DSP processor?

Why do we need DSP processors?

Use a DSP processor when the following are required:

Cost saving.

Smaller size.

Low power consumption.

Processing of many high frequency signals in real-time.

Use a GPP processor when the following are required:

Large memory.

Page 6

Advanced operating systems.

What are the typical DSP algorithms?

The Sum of Products (SOP) is the key element in most DSP algorithms:

Algorithm

Equation

M

y ( n)

x(n k )

x ( n k )

k 0

M

y ( n)

k 0

b y (n k )

k

k 1

Convolution

x ( k ) h( n k )

y ( n)

k 0

N 1

X (k )

n 0

F u

N 1

x 0

DSP processors are optimised to perform multiplication and addition operations.

Multiplication and addition are done in hardware and in one cycle.

Example: 4-bit multiply (unsigned).

Hardware

Microcode

Application Specific Integrated Circuits (ASICs) are semiconductors designed for dedicated

functions.

The advantages and disadvantages of using ASICs are listed below:

Page 7

Advantages

High throughput

Lower silicon area

Lower power consumption

Improved reliability

Reduction in system noise

Low overall system cost

Disadvantages

High investment cost

Less flexibility

Long time from design to market

Useful Links

Selection Guide:

\Links\DSP Selection Guide.pdf

The signal processing operations involved in many applications like commu- nication systems,

control systems, instrumentation, biomedical signal pro- cessing etc can be implemented in two

di erent ways

(1) Analog or continuous time method and

(2) Digital or discrete time method.

The analog approach to signal processing was dominant for many years. The analog signal

processing uses analog circuit elements such as resistors, ca-pacitors, transistors, diodes etc.

With the advent of digital computer and later microprocessor, the digital signal processing has

become dominant now a days.

The analog signal processing is based on natural ability of the analog system to solve di erential

equations the describe a physical system. The solution are obtained in real time. In contrast

digital signal processing relies on nu-merical calculations. The method may or may not give

results in real time.

Page 8

The digital approach has two main advantages over analog approach

(1) Flexibility: Same hardware can be used to do various kind of signal processing operation,while

in the core of analog signal processing one has to design a system for each kind of operation.

(2) Repeatability: The same signal processing operation can be repeated again and

again giving same results, while in analog systems there may be parameter variation due to

change in temperature or supply voltage. The choice between analog or digital signal processing

depends on application. One has to compare design time,size and cost of the implementation.

The applications of the digital signal processing will include the following main applications.

waveform generation

Convolution and correlation

Digital filtering

Adaptive filtering

FFTs and fast cosine transform

2. Audio applications

Audio watermarking

Coding and decoding

Effects generator

Surround sound processing

Three dimensional audio

3. Communications:

Communication security

Detection

Encoding and Decoding

Software radios

Page 9

man who developed ingenious physical instruments of extraordinary precision, mostly in the field of optics

,harmonic analyser, developed in 1898,could compute the first 80 co-efficients of the Fourier series of a

signal x(t) specified by any graphical description.

DO YOU KNOW?

Examples of continuous time systems are electric networks composed of resistors, capacitors,and

inductors that are driven by continuous time sources.

S.No

Chip Series

Analog Devices

ADSP-21XX series

Texas instruments,USA

TMS-320XXX series

Motorola Corporation,USA

M-56XXX series

S.No Technique of DSP

Scientist

Year

Term Z-transform

Jury

1964

Cooley-Tukey

1965

Cooley-Tukey

1965

1966

algorithms

4

algorithms

1967

1968

1973

Page 10

First applications of DSP for

From 1975

First 16x16-bit parallel multiplier,signal

processor

10

signals,speech coding, speech

identification Compact Disc (CD), Digital

Video Disc( DVD), digital recording

studios.

Fully digital transmission standards:

GSM,UMTS etc.,

Dsp applications in nearly every field.

For Reference:http://www.vlab.co.in/

Objectives of the Virtual Labs:

To provide remote-access to Labs in various disciplines of Science and Engineering. These

Virtual Labs would cater to students at the undergraduate level, post graduate level as well as to

research scholars.

To enthuse students to conduct experiments by arousing their curiosity. This would help them in

learning basic and advanced concepts through remote experimentation.

To provide a complete Learning Management System around the Virtual Labs where the students

can avail the various tools for learning, including additional web-resources, video-lectures,

animated demonstrations and self evaluation.

To share costly equipment and resources, which are otherwise available to limited number of

users due to constraints on time and geographical distances

http://www.digital.iitkgp.ernet.in/dsp/

The content of this website aims to provide a virtual laboratory platform for undergraduate

Engineering students studying the course of Digital Signal Processing.

Page 11

Developer(s)

MathWorks

Initial release

Stable release

Preview release

None []

Development status

Active

Written in

Operating system

and Mac OS X

Platform

IA-32, x86-64

Type

Technical computing

License

Website

Page 12

EX:NO: 1

DATE:

AIM:

To study about MATLAB R2013a

MATLAB:

MATLAB is a high performance language for technical computing. It integrates computation,

visualization and programming in an easy to use environment where problems and solutions are expressed

in familiar mathematical notations.

The name MATLAB stands for MATRIX LABORATORY. Today, MATLAB engines incorporate the

LAPACK and BLAS Libraries, embedding the state of the art in software for matrix computation.

USES:

Typical uses include,

Algorithm development

Data acquisition

The MATLAB system consists of 5 main parts:

This is the set of tools and facilities that help you use MATLAB functions and files. Many of these

tools are graphical user interface.

This is a vast collection of computational algorithms ranging from elementary functions like sum,

sine, cosine & complex arithmetic to more sophisticated functions like matrix inverse, matrix reign values,

Bessel functions and FFT.

This is a high level matrix / array language with control flow statement, functions, data structures, i/p, o/p

and object oriented programming features.

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GRAPHICS:

MATLAB has extensive facilities for displaying vectors and matrices as groups as well as annotating and

printing these graphs.

This is a library to write C & Fortran programs that interact with MATLAB. It includes facilities for

calling routines from MATLAB.

Expressions

EXPRESSIONS :

The building blocks of expressions are

Variables

Numbers

Operators

Functions

VARIABLES :

MATLAB does not require any type of declarations or dimensions when it encounters a new variable

name. It automatically creates the variable and allocates appropriate memory.

Example : num_stud = 25

NUMBERS :

MATLAB uses conventional decimal notation, with an optional decimal point. It uses E to specify a

power of ten. Imaginary nos used either i or j as a suffix.

Example : 3, -99, 1i, 3e5i

OPERATORS :

+

add

subtract

multiply

division

Page 14

\

left division

Power

FUNCTIONS :

MATLAB provides a large no.of standard functions including abs, sqrt, exp and stn.

SYNTAX:

abs :

y = abs(x)

b = sqrt(x)

y = exp(x)

c = sin(A)

TOOL BOXES :

There are a no.of tool boxes available in MATLAB some of them are:

Communication toolbox

Wavelet toolbox

RF toolbox

COMMUNICATION TOOLBOX:

The communication toolbox extends the MATLAB technical computing environment with functions, plot

as a graphical user interface.

The toolbox helps you to create algorithms for commercial and defense wireless s/ms.

FUNCTIONS :

Signal Sources: Sources of random signals Performance evaluation : analysing and visualizing

performances of a communication s/m.

Page 15

The filter design toolbox is a collection of tools that provides advanced techniques for designing simulation

and analysing digital filters.

The signal processing toolbox is a collection of tools built on the MATLAB numeric computing

environment. The toolbox supports a wide range of signal processing operations from wave generation to

filter design and implementation.

cepstral analysis

MATLAB COMMANDS:

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IMAGE PROCESSING TOOLBOX:

The image processing toolbox is a collection of functions that extend the capability of MATLAB numeric

computing environment. The toolbox supports a wide range of image processing operations including.

Morphological operations

Transforms

Deblurring

Image registration

SIMULINK :

Simulink is a software package for modeling, simulating and analysing dynamic systems. It supports linear

and non-linear s/ms, modeled in continuous time, sampled time, or a hybrid of the two systems may also

have different parts that are sampled at different rates (multirated).

RESULT:

Thus the MATLAB and MATLAB tools were studied.

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PROGRAM

% program to generate unit step sequence

n = -10:10;

s = [zeros(1,10) 1 ones(1,10)];

stem (n,s);

title ('unit step sequence');

xlabel ('time index n');

ylabel ('amplitude');

OUTPUT:

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EX.NO: 2

DATE:

AIM

To write a MATLAB program to generate the following standard input signals and plot the response.

1. Unit step,

2. Unit impulse,

3. Unit ramp,

4. Exponential signal

5. Sinusoidal signal,

6. Cos signal

7. Triangular wave,

8. Saw tooth wave

APPARATUS REQUIRED

SOFTWARE : MATLAB 7.10 (OR) High version

UNIT STEP SEQUENCE

The unit step sequence is a signal that is zero everywhere except at n >= 0 where its value is unity.

In otherwise integral of the impulse function is also a singularity function and is called the unit step

function.

MATHEMATICAL EQUATION

u(n) = 1 for n >= 0

= 0 for n < 0

ALGORITHM

1.

2.

3.

Discrete output is obtained for n>= 0 and zeros for all other values.

4.

5.

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PROGRAM

UNIT IMPLULSE SEQUENCE

%program to generate impulse sequence

n = -20:20;

s = [zeros(1,20) 1 zeros(1,20)];

stem (n, s);

title ('unit impulse sequence');

xlabel ('time');

ylabel ('amplitude');

OUTPUT

PROGRAM

%program to generate unit ramp sequence

n =0:10;

s =n;

stem (n,s);

title ('unit ramp sequence');

xlabel ('time index');

ylabel ('amplitude');

OUTPUT

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The unit impulse (sample) sequence is a signal that is zero everywhere except at n=0 where it is

unity. This signal sometime is referred to as the unit impulse.

MATHEMATICAL EQUATION

(n) = 1

=0

for n = 0

for n 0

ALGORITHM

1.

2.

3.

Discrete output is obtained for n = 0 and zeros for all other values.

4.

5.

This unit ramp sequence is signal that grows linearly when n>=0, otherwise it is zero.

MATHEMATICAL EQUATION

Ur (n) = n

=0

for n >= 0

for n< 0

ALGORITHM

1.

2.

3.

Discrete output is obtained for n>=0 and zeros for all other values

4.

5.

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PROGRAM

%program to generate exponential sequence

clf;

n=0:10;

s=exp(0.3*n);

figure(1);

stem(n,s);

grid;

title('Exponential sequence');

xlabel('time');

ylabel('amplitude');

OUTPUT

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EXPONENTIAL SEQUENCE

When the values of a>1, the sequence grows exponentially and when the value is 0<a<1, the

sequence decay exponentially.

MATHEMATICAL EQUATION

X (n) = an for all n

ALGORITHM

1. Start the program

2. Get the dimension of n

3. discrete output is obtained for n>= 0 and zeros for all other values

4. Output is generated in stem(plot) format

5. Terminate the process

SINUSOIDAL SEQUENCE

The sine function output is calculate by the following equation

General equation Fn = sin (2 * pi * f * t)

The modified sine wave equation is

X(t) = sin (2 *pi * Fin * Tsamp * t)

Where,

Tsamp(Sampling Time) = 1 / Fsamp,

Nsamp = Fsamp / Fin

t = No of Samples vary from 0 to Nsamp-1(It is generate single wave. Increase wave means to multiply that

no into Nsamp. Ex generate two cycles means multiply 2 into Nsamp.

MATHEMATICAL EQUATION

X(n) = A sin (2 * pi * f * t)

Where f frequency in Hz, t time in sec, A - Amplitude

Page 23

PROGRAM

%program to generate sine sequence

clear all;

Fin = 1000;

Fsamp = 900000;

Tsamp = 1 / Fsamp;

Nsamp = Fsamp/ Fin;

N = 0:5 * Nsamp-1;

x=sin(2*pi*Fin*Tsamp*N);

plot(x);

title ('Sine Wave');

xlabel('Time -- >);

ylabel('Amplitude-- >');

OUTPUT

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ALGORITHM

1. Initialize input Frequency and sampling frequency, these frequencies are very important to

generate the sine waveform. Input frequency is declared as Fin (this is generating frequency

range in Hertz), Sampling frequency is declared as Fsamp. Sampling frequency must be twice

of the input frequency.

2. Find Sampling Time using sampling Frequency (T = 1 / F), Tsamp = 1 / Fsamp

3. Find No of cycle to generate the output, it depends on the Number of samples per cycle

(Nsamp). It is calculated by using Fsamp & Fin, (Nsamp = Fsamp / Fin).

4. Generate single cycle output, use N value from 0 to Nsamp 1. Then generate multiple output

cycle using N values from 0 to no of cycle * Nsamp 1(no of cycle = 2, 3.etc)

5. Apply the values into a general formula.

6. Next , plot the output waveform into graph window, using plot function for continuous output

and use stem function for discrete output. To plot more than one figure in single graph window

subplot function is used. Syntax of subplot is

i. subplot(a, b, c)

Where, a = Row, b = Column, c = no of fig

7. Use the title function to give the name to the waveform.

8. Use xlabel and ylabel to find the unit for x and y axis.

COSINE SEQUENCE

The cosine function output is calculate by the following equation

General equation Fn = cos(2 * pi * f * t)

The modified cos wave equation is

X(t) = cos (2 * pi * Fin * Tsamp * t)

Where,

Tsamp(Sampling Time) = 1 / Fsamp,

Nsamp = Fsamp / Fin

t = No of Samples vary from 0 to Nsamp-1(It is generate single wave. Increase wave means to multiply that

no into Nsamp. Ex generate two cycles means multiply 2 into Nsamp.

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PROGRAM

%program to generate cosine sequence

clear all;

Fin = 1000;

Fsamp = 900000;

Tsamp = 1 / Fsamp;

Nsamp = Fsamp/ Fin;

N = 0:Nsamp-1;

x=cos((2*pi*Fin*Tsamp)*N);

plot(x);

title('cosine Wave');

xlabel('Time -- >);

ylabel('Amplitude-- >');

OUTPUT

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MATHEMATICAL EQUATION

X(n) = A cos (2 * pi * f * t)

Where f frequency in Hz, A - Amplitude

ALGORITHM

1. Initialize input Frequency and sampling frequency, these frequencies are very important to

generate the cosine waveform. Input frequency is declared as Fin (this is generating frequency

range in Hertz), Sampling frequency is declared as Fsamp. Sampling frequency must be twice

that of the input frequency.

2. Find Sampling time using sampling frequency (T = 1 / F), Tsamp = 1 / Fsamp

3. Find number of cycles to generate the output, it depends on Number of sample per cycle

(Nsamp) and is calculated by using Fsamp & Fin, (Nsamp = Fsamp / Fin).

4. Generate single output cycle which uses N value from 0 to Nsamp 1. Then generate multiple

output cycle which uses N value from 0 to no of cycle * Nsamp 1(no of cycle = 2, 3.etc)

5. Apply the values into general formula.

6. Plot the output waveform into graph window, use the plot function which uses continuous

output for analog and use the stem function for discrete output. To plot more than one figure in

single graph window subplot function is used. Syntax of subplot is

i. subplot(a, b, c)

Where, a = Row, b = Column, c = quadrant

7. The title function used to give the name to the waveform.

8. Then xlabel & ylabel is used to find the unit for x & y axis.

TRIANGULAR WAVE

The triangular function output is calculate by the following equation

General equation Fn = sawtooth ((2 * pi * f * t),0.5)

The modified Triangular wave equation is

X(t) = sawtooth((2 * pi * Fin * Tsamp),0.5)

Where,

Tsamp(Sampling Time) = 1 / Fsamp,

Nsamp = Fsamp / Fin

Page 27

PROGRAM

% Triangular wave

clear all;

Fin = 1000;

Fsamp = 900000;

Nsamp = Fsamp / Fin;

Tsamp = 1 / Fsamp;

n = 0: 2* Nsamp-1;

x=sawtooth(2 * pi * Fin * Tsamp * n,0.5);

plot(x);

title('Triangular Wave');

xlabel('Time - >');

ylabel('Amplitude- - >');

OUTPUT

Page 28

t = No of Samples vary from 0 to Nsamp-1(It is generate single wave. Increase wave means to

multiply that no into Nsamp. Ex generate two cycles means multiply 2 into Nsamp. The 0.5 value is

used for triangular wave sapping value.

ALGORITHM

1. Initialize input Frequency and sampling frequency, these frequencies are very important to

generate the Triangular waveform. Input frequency is declared as Fin (this is generating

frequency range in Hertz), Sampling frequency is declared as Fsamp. Sampling frequency must

be twice of the input frequency.

2. Find Sampling time using sampling frequency (T = 1 / F), Tsamp = 1 / Fsamp

3. Find number of cycles to generate the output, it depends on Number of sample per cycle

(Nsamp) and calculated by using Fsamp & Fin, (Nsamp = Fsamp / Fin).

4. Generate single output cycle which uses N value from 0 to Nsamp 1. Then generate multiple

output cycle which uses N value from 0 to no of cycle * Nsamp 1(no of cycle = 2, 3.etc)

5. Apply the values into general formula.

6. Plot the output waveform into graph window, use the plot function which uses continuous

output for analog and use the stem function for discrete output. To plot more than one figure in

single graph window subplot function is used. Syntax of subplot is

i. subplot(a, b, c)

Where, a = Row, b = Column, c = quadrant

7. The title function used to give the name to the waveform.

8. Then xlabel & ylabel is used to find the unit for x & y axis.

SAWTOOTH WAVE

The sawtooth function output is calculate by the following equation

General equation Fn = sawtooth (2 * pi * f * t)

The modified sawtooth wave equation is

X(t) = sawtooth (2 * pi * Fin * Tsamp)

Where,

Tsamp (Sampling Time) = 1 / Fsamp,

Nsamp = Fsamp / Fin

Page 29

PROGRAM

% sawtooth sequence

clear all;

Fin = 1000;

Fsamp = 900000;

Nsamp = Fsamp / Fin;

Tsamp = 1 / Fsamp;

n = 0: 3 * Nsamp-1;

x=sawtooth(2 * pi * Fin * Tsamp * n);

plot(x);

title('SawTooth Wave');

xlabel('Time- - >);

ylabel('Amplitude- - >);

OUTPUT

Page 30

t = No of Samples vary from 0 to Nsamp-1(It is generate single wave. Increase wave means to

multiply that no into Nsamp. Ex generate two cycles means multiply 2 into Nsamp. The 0.5 value is

used for triangular wave sapping value.

ALGORITHM

1. Initialize input Frequency and sampling frequency, these frequencies are very important to

generate the sawtooth waveform. Input frequency is declared as Fin (this is generating

frequency range in Hertz), Sampling frequency is declared as Fsamp. Sampling frequency

must be twice that of the input frequency.

2. Find Sampling time using sampling frequency (T = 1 / F), Tsamp = 1 / Fsamp

3. Find number of cycles to generate the output, it depends on Number of sample per cycle

(Nsamp) and is calculated by using Fsamp & Fin, (Nsamp = Fsamp / Fin).

4. To generate single output cycle which use N value from 0 to Nsamp 1. Then generate

multiple output cycle which use N value from 0 to no of cycle * Nsamp 1(no of cycle = 2,

3.etc)

5. Apply the values into general formula.

6. Plot the output waveform into graph window, use the plot function which uses continuous

output for analog and use the stem function for discrete output. To plot more than one figure

in single graph window subplot function is used. Syntax of subplot is

ii. subplot(a, b, c)

Where, a = Row, b = Column, c = quadrant

7. The title function used to give the name to the waveform.

8. Then xlabel & ylabel is used to find the unit for x & y axis.

RESULT

Thus the MATLAB programs for unit step, unit impulse, unit ramp, sinusoidal signal sawtooth ,

Triangular wave ,exponential signals were generated and their responses were plotted in discrete and

continuous time domain successfully.

Page 31

Viva voce:

1. What is signal.

2. Classify the signals.

3. What is an Energy and power signal?

4. What is the formula for energy and power?

5. what is continuous time and discrete time signal.

6. What is analog and digital signal?

7. What is even and odd signal?

8. What is multi channel and multidimensional signal?

9. What is energy of unit sample function?

10. what is unit step function.

11. How unit step and impulse function are related?

12. What is the condition for periodicity of DT signal?

13. What is deterministic and random signal.

14. what is causal and non causal signal.

15. what is unit impulse and unit ramp signal.

16. what is cos and sine signal.

17. what is sinc and saw tooth function.

18. what is Exponential signal.

19. What is Elementary signal?

20. What is BIBO stable system?

Page 32

EX.NO: 3 (a)

DATE:

Apparatus : PC having MATLAB software.

Procedure

1. OPEN MATLAB

2. File

New

Script.

3. File

4. Debug

Save

Page 33

Program :

% program for discrete convolution

% of x= [1 2] and h = [1 2 4]

clc;clear all;close all;

x = input('Enter the 1st sequence : '); %[1 2]

h = input('Enter the 2nd sequence : '); %[1 2 4]

y =conv(x,h);

subplot(2,3,1);stem(x);

ylabel('(x) ------>');

xlabel('(a)n ------>');

subplot(2,3,2);stem(h);

ylabel('(h) ------>');

xlabel('(b)n ------>');

title('Discrete Convolution');

subplot(2,3,3);stem(y);

ylabel('(y) ------>');

xlabel('(c)n ------>');

disp(' The resultant Signal is :');y

% program for discrete correlation

% of h =[4 3 2 1]

x1 = input('Enter the 1st sequence : '); %[1 2 3 4]

h1 = input('Enter the 2nd sequence : '); %[4 3 2 1]

y1 =xcorr(x1,h1);

Page 34

Page 35

subplot(2,3,4);stem(x1);

ylabel('(x1) ------>');

xlabel('(d)n ------>');

subplot(2,3,5);stem(h1);

ylabel('(h1) ------>');

xlabel('(e)n ------>');

title('Discrete Correlation');

subplot(2,3,6);stem(y1);

ylabel('(y1) ------>');

xlabel('(f)n ------>');

disp(' The resultant Signal is :');y1

Output :

Convolution :

Enter the 1st sequence : [1 2]

Enter the 2nd sequence : [1 2 4]

The resultant Signal is : y = 1

Correlation :

Enter the 1st sequence : [1 2 3 4]

Enter the 2nd sequence : [4 3 2 1]

The resultant Signal is : y1 = 1.0000

4.0000

10.0000

20.0000

25.0000

24.0000

16.0000

Page 36

Graph:

(h) ------>

1

0.5

2

1

1.5

(a)n ------>

4

3

2

1

0

2

(d)n ------>

2

1

0

4

2

2

3

(b)n ------>

Discrete Correlation

4

(h1) ------>

(x1) ------>

2

(e)n ------>

2

(c)n ------>

5

(f)n ------>

10

30

(y1) ------>

(x) ------>

1.5

Discrete Convolution

4

(y) ------>

20

10

RESULT

Thus the MATLAB programs for discrete convolution and correlation were plotted in discrete time

domain successfully.

Page 37

Page 38

EX.NO: 3(b)

DATE:

AIM

To write a MATLAB program to obtain the linear & circular convolution between two finite duration

sequences x(n) and h(n).

THEORY

Convolution is a powerful way of characterizing the input-output relationship of time invariant linear

systems. Convolution finds its application in processing signals especially analyzing the output of the

system.

The response or output y(n) of a LTI system for any arbitrary input is given by convolution of input and the

impulse response h(n) of the system.

y(n)

[ x( k )h(n k ]

(1)

If the input has L samples and the impulse response h(n) has M samples then the output sequence y(n)

will be a finite duration sequence consisting of L+ M-1 samples. The convolution results in a non-periodic

sequence. Hence this convolution is also called a periodic convolution.

The convolution relation of equation (1) can also be expressed as

y(n) = x(n) *h(n) = h(n) * x(n)

where the symbol * indicates convolution operation.

ALGORITHM

1. Initialize the two input sequences.

2. Find the length of first and second input sequences use the following syntax

length (x ).

Where, x input sequence

3. Find out the linear convolution output length using first sequence length and Second sequence

length (N = x+h-1).

Page 39

PROGRAM

%program to find linear convolution of two finite duration sequences

clear all;

Xn = [1,2,1,1];

Hn = [1,1,1];

x=length(Xn);

h = length(Hn);

N = x + h - 1;

Yn = conv(Xn,Hn);

subplot(2,2,1);

stem(Xn);

title('First Input Sequence');

xlabel('Length of First Input Sequence');

ylabel('Input Value');

subplot(2,2,2);

stem(Hn);

title('Second Input Sequence');

xlabel('Length of Second Input Sequence');

ylabel('Input Value');

subplot(2,2,3);

stem(Yn);

title('Linear Convolution Output Sequence');

xlabel('Length of Output Sequence');

ylabel('Output Value');

Page 40

4. Find Linear convolution of two input sequence using the conv(x,h) command. The conv

perform linear convolution operation.

Where, x First input sequence

h Second input sequence

5. Use the subplot & stem function to display the input & output in a single graph window. Else

use figure( ) function to display the input &output in separate window.

i. subplot(a, b, c)

Where, a = Row, b = Column, c = quadrant

6. The title function is used to give the name to the waveform.

7. The xlabel & ylabel is used to find the unit for x & y axis.

What is the need for convolution in digital signal processing?

If we need to add two signals in time domain, we perform convolution. A better way, is to convert the

two signals from time domain to frequency domain. This can be achieved by FAST FOURIER

TRANFORM. Once both the signals have been converted to frequency domain, they can simply be

multiplied. Since Convolution in time domain is similar to multiplying in Frequency domain. Once both

the signals have been multiplied, they can be converted back to time domain by Inverse Fourier Transform

method. Thus achieving accurate results.

Page 41

Enter the input sequence x(n) = [1,2,1,1]

Enter the input sequence h(n) = [1,1,1]

Convoluted output y(n) = 1, 3, 4, 4, 2, 1

PROGRAM

CIRCULAR CONVOLUTION

clear all;

Xn = [1,2,1,1];

Hn = [1,1,1];

x=length(Xn);

h = length(Hn);

N = max(x,h);

Yn = cconv(Xn,Hn,N);

subplot(2,2,1);

stem(Xn);

Page 42

title('First Input Sequence');

xlabel('Length of First Input Sequence');

ALGORITHM

1. Initialize the two input sequences.

2. Find the length of first and second input sequences use the following syntax

length (X ).

Where, x input sequence

3. Find out the circular convolution output length using First sequence length and Second

sequence length (N = max(x,h)).

4. Find circular convolution of two input sequence using the cconv function. The cconv

perform circular convolution operation.

5. Use the subplot & stem function to display the input & output in a single graph window. Else

use figure( ) function to display the input &output in separate window.

i. subplot(a, b, c)

where, a = Row, b = Column, c = quadrant

6. The title function is used to give the name to the waveform.

7. The xlabel & ylabel is used to find the unit for x & y axis.

Viva voce:

1. What is meant by convolution?

2. What are the types of convolution?

3. What is linear convolution?

4. What are the steps involved in the linear convolution.

5. What are the methods to obtain in the linear convolution?

6. What is need for linear convolution?

7. What are the properties of convolution?

8. What is circular convolution?

9. What are the methods involved in the circular convolution?

10. What is deconvolution?

11. What is need for circular convolution?

12. What is graphical method of linear convolution?

13. Compare linear and circular convolution.

14. What is the advantages & disadvantages of linear convolution?

15. What is the advantages & disadvantages of circular convolution?

Page 43

subplot(2,2,2);

stem(Hn);

title('Second Input Sequence');

xlabel('Length of Second Input Sequence');

ylabel('Input Value');

subplot(2,2,3);

stem(Yn);

title('Circular Convolution Output Sequence');

xlabel('Length of Output Sequence');

ylabel('Output Value');

INPUT & OUTPUT

Enter the input sequence x(n) = [1,2,1,1]

Enter the input sequence h(n) = [1,1,1]

Convoluted output y(n) = 3, 4, 4, 4

Page 44

RESULT

Thus the MATLAB programs for linear and circular convolution signals were generated and their

responses were plotted in discrete time domain successfully.

Page 45

Program :

DFT :

%prog for computing discrete Fourier Transform

clc;clear all;close all;

x =input('Enter the sequence ');

%x =[0 1 2 3 4 5 6 7]

%the length of sequence

x =fft(x,n);

stem(x);

ylabel('imaginary axis------>');

xlabel('(real axis------>');

title('Exponential sequence');

disp('DFT is');x

IDFT :

% prog for inverse discrete Fourier Transform (IDFT)

clc;clear all;close all;

x =input('Enter length of DFT ');

t = 0:pi/x:pi;

num =[0.05 0.033 0.008];

den =[0.06 4 1];

trans = tf(num,den);

[freq,w] =freqz(num,den,x); grid on;

subplot(2,1,1);plot(abs(freq),'k');

Page 46

EX.NO: 4

DATE:

Aim : To develop program for computing discrete Fourier Transform (DFT) and inverse discrete Fourier

Transform (IDFT).

Apparatus : PC having MATLAB software.

Procedure

1. OPEN MATLAB

2. File

New

Script.

3. File

4. Debug

Save

Page 47

disp(abs(freq));

ylabel('Magnitude');

xlabel('Frequency index');

title('Magnitude Response');

Output :

DFT :

Enter the length of Fourier Transform 8

n= 8

DFT is x = 28.0000

-4.0000

-4.0000 + 9.6569i

-4.0000 + 4.0000i

-4.0000 + 1.6569i

-4.0000 - 1.6569i

-4.0000 - 4.0000i

-4.0000 - 9.6569i

IDFT :

Enter length of DFT 4 = 0.0180

0.0166

0.0130

0.0093

Page 48

Graph:

DFT :

10

8

6

Imaginary axis------>

4

2

0

-2

-4

-6

-8

-10

4

5

Real axis------>

IDFT :

Magnitude Response

Magnitude

0.02

0.015

0.01

0.005

1.5

2.5

Frequency index

3.5

RESULT

Thus the MATLAB programs for DFT/IDFT done successfully.

Page 49

Page 50

EX.NO: 5

DATE:

How to set the amplitude, frequency and phase of the signal source.

How to set the sampling frequency of the source such that the signal is exactly reconstructed from

its samples.

The principal objective of this experiment is to understand the principle of sampling of continuous time

analog signal.

AIM

To perform sampling operation and view the aliasing effect.

THEORY

A key step in any digital processing of real world analog signals is converting the analog signals into

digital form. We sample continuous data and create a discrete signal. Unfortunately, sampling can

introduce aliasing, a nonlinear process which shifts frequencies. Aliasing is an inevitable result of both

sampling and sample rate conversion.

The Nyquist sampling theorem defines the minimum sampling frequency to completely represent a

continuous signal with a discrete one. If the sampling frequency is at least twice the highest frequency in

the continuous baseband signal, the samples can be used to exactly reconstruct the continuous signal. A

sine wave can be described by at least two samples per cycle (consider drawing two dots on a picture of a

single cycle, then try and draw a single cycle of a different frequency that passes through the same two

dots). Sampling at slightly less than two samples per cycle, however, is indistinguishable from sampling a

sine wave close to but below the original frequency. This is aliasing - the transformation of high frequency

information into false low frequencies that were not present in the original signal. The Nyquist frequency,

also called the folding frequency, is equal to half the sampling frequency f, and is the demarcation between

frequencies that are correctly sampled and those that will cause aliases. Aliases will be 'folded' from the

Nyquist frequency back into the useful frequency range.

ALGORITHM

1. Initialize input Frequency, sampling frequency and number of sample values (Nsamp).

Sampling frequency must be twice the input frequency.

2. Then two different sinusoidal signals are sampled at the same sampling frequency.

Page 51

PROGRAM

% Sampling and effect of aliasing

Fsamp = 10000;

Fin = 1000;

Nsamp = 100;

N = 0 : (Nsamp - 1);

k = 1;

Xa = sin(2 * pi * (Fin / Fsamp) * N);

Xb = sin(2 * pi * (Fin + (k * Fsamp))/ Fsamp * N);

subplot(2, 1, 1);

plot(N, Xa);

subplot(2, 1, 2);

plot(N, Xb);

OUTPUT

Page 52

3.Sample the second signal at low sampling frequency. According to sampling theorem the

sampling frequency value is twice the input frequency. So aliasing will occur in second signal.

4. Due to aliasing effect two signals are plotted in same wave.

5.The difference between these two sine wave signals is Aliasing Effect.

6. Next plot the output waveform into graph window, use the plot function which uses the

continuous function for analog output and use the stem function for discrete output.

7.To plot more than one figure in single graph window subplot function is used. Syntax of subplot

is

subplot(a, b, c)

Where, a = Row, b = Column, c = no of fig

8. The title function is used to give name to the wave form.

9. Then xlabel & ylabel are used to find unit of x & y axis.

RESULT

Thus the sampling operation and effect aliasing is performed.

Page 53

Viva voce

1. What is sampling theorem?

2. What is aliasing?

3. What is Nyquist rate and Nyquist interval?

4. What is damped and undamped system?

5. What is the condition for aliasing effect?

6. What is the sampling frequency?

7. What are the methods to obtain sampling theorem?

8. What is the need of sampling theorem?

9. What is the need of aliasing effect?

10. What are the advantages & disadvantages of sampling theorem?

11. Why CT signals are represented by samples?

12. What is meant by sampling.

13. What is meant by aliasing.

14. . What are the effects aliasing.

15. How the aliasing process is eliminated.

16. . Define Nyquist rate.and Nyquist interval.

17. . Define sampling of band pass sig

Page 54

EX.NO: 6

DATE:

The experiment enables students to understand:

Different types of window functions.

Designing of Lowpass and highpass FIR filters using these window functions

Designing of bandpass and bandstop FIR filters using these window functions.

AIM

To write a MATLAB program for the design of FIR Filter for the given cutoff frequency using windowing

technique. Also plot the magnitude and phase responses for the same.

THEORY

The filters designed by using finite number of samples of impulse response are called FIR filters. These

finite number of samples are obtained from the infinite duration desired impulse response h d(n). Here

hd(n)is the inverse Fourier transform of Hd(), where Hd() is the ideal (desired) frequency response. The

various methods of designing FIR filters are (i). Fourier Series method, (ii). Window method, (iii).

Frequency Sampling method, (iv) Optimal filter design method. Here we discuss about window method

only.

FILTER TYPES

1. Low Pass Filter

2. High Pass Filter

3. Band Pass Filter

4. Band Reject Filter

1.

The low pass filter equation is

2 Fc

Hd ( n )

sin(Wc n) / n

2.

n 0

n/2 n n/2

1 2 Fc

Hd (n)

sin (Wc n) / n

n 0

n/2 n n/2

Page 55

PROGRAM Hamming Window

Low Pass Filter

clear all;

Fcut = 1000;

Fsamp = 7500;

N = 60; % Order of the filter

d=fdesign.lowpass('N,fc',N,Fcut,Fsamp);

Hd=window(d,'window',@hamming);

fvtool(Hd);

Page 56

3. BAND PASS FILTER

The band Pass filter equation is

2( Fc2 Fc1)

Hd (n)

sin (Wc2 n) sin (Wc1 n) / n

4.

n 0

n/2 n n/2

The band reject filter equation is

2( Fc1 Fc2)

Hd (n)

sin (Wc1 n) sin (Wc2 n) / n

n 0

n/2 n n/2

Fc1 = Fps / Fsamp

Fc2 = Fst / Fsamp

Wc = 2Fc

Wc1 =2Fc1 & Wc2 =2Fc2

DESIGN OF FIR FILTERS USING WINDOWS

The desired frequency response H d(ej) of a filter is periodic in frequency and can be expanded in a Fourier

series. The resultant series is given by

Hd (e )

jw

(n)e jwn ]

..(1)

Where

hd (n) 1 / 2 H (e jw )e jwn d

(2)

Page 57

High Pass Filter

clear all;

Fcut = 1000;

Fsamp = 7500;

N = 60; % Order of the filter

f= fdesign.highpass(N,fc,N,Fcut,Fsamp)

Hd=window(d,'window',@hamming);

fvtool(Hd);

Page 58

And known as Fourier coefficients having infinite length. One possible way of obtaining FIR filter is to

truncate the infinite Fourier series at n= (N-1)/2, where N is the length of the desired sequence. But

abrupt truncation of the Fourier series results in oscillation in the pass band and stop band. These

oscillations are due to slow convergence of the Fourier series and this effect is known as the Gibbs

phenomenon. To reduce these oscillations, the

Fourier coefficients of the filter are modified by multiplying the infinite impulse response with a finite

weighing sequence (n) called a window.

Where

(n) = (-n) 0 for |n| (N-1)/2

=0

After multiplying window sequence w(n) with Hed(n), we get a finite duration sequence h(n) that satisfies

the desired magnitude response,

h(n) = hd(n)(n)

=0

for |n| > (N-1)/2

The frequency response H(ej) of the filter can be obtained by convolution of H d(ej)) and W(ej)

given

by

Hd (e jw )

(n)e jwn ]

(1)

H (e ) 1 / 2 Hd (e j )e j ( w ) d

j

(2)

= H(e ) * W(e )

Because both Hd(ej) and W(ej) are periodic function, the operation often called as periodic convolution.

WINDOW TYPES

Rectangular window

Rectangular window function can be found by the following equation

Page 59

Band Pass Filter

Fpass = 1000;

Fstop = 2000;

N = 60;

f = fdesign.bandpass('N,fc1,fc2', N,Fpass, Fstop, Fsamp);

He = window(f,'window',@hamming);

fvtool(He);

Page 60

1 for ( N 1) / 2 n ( N 1) / 2

rec (n)

0 Otherwise

Hamming window

Hamming window function is calculated by the given equation

0.54 0.46

0

hm (n)

cos(2n) / ( N 1) for ( N 1) / 2 n ( N 1) / 2

Otherwise

Hanning window

Hanning window function is calculated by the given equation

0.5 0.5

0

hn (n)

cos(2n) / ( N 1) for ( N 1) / 2 n ( N 1) / 2

Otherwise

Blackman window

Blackman window function is calculated by following equation

b1(n)

for ( N 1) / 2 n ( N 1) / 2

0

Otherwise

Page 61

Band Stop Filter

Fpass = 1000;

Fstop = 2000;

N = 60;

f = fdesign.bandpass('N,fc1,fc2', N,Fpass, Fstop, Fsamp);

He = window(f,'window',@hamming);

fvtool(He);

Page 62

ALGORITHM

1. Initialize the cutoff frequency, sampling frequency and Order of the filter for low pass and high

pass filter. Then specify the Pass band and stop frequency for band pass & band stop filter.

2.

Declare the five filter types (low pass, high pass, Band pass, Band Reject), with the above

specification.

1. Low pass = fdesign.lowpass(N,fc,N,Fcut,Fsamp)

2. High pass = fdesign.highpass(N,fc,N,Fcut,Fsamp)

3. Band pass = fdesign.bandpass('N,fc1,fc2', N,Fpass, Fstop, Fsamp)

4. Band stop = fdesign.bandstop('N,fc1,fc2', N,Fpass, Fstop, Fsamp)

i.

Bartlett window

- @bartlett

- @blackman

- @hamming

- @hann

v. Kaiser window

- @kaiser

vii. Triangular window

- @triang

4. Then use the fvtool for display the filter response outputs (fvtool filter visualization tool).

RESULT

Thus the FIR filters were designed using various windowing techniques in MATLAB and the output has

been verified.

Page 63

Viva voce:

2. State properties of FIR filters?

3. Why FIR filters are inherently stable?

4. What are the advantages of all zero filters?

5. How linear phase is achieved in FIR filters?

6. Which are the different FIR filter design methods?.

7. How FIR filters is designed using windows.

8. What is Gibbs phenomenon?.

9. Why does Gibbs phenomenon take place.

10. How Gibbs phenomenon can be reduced or avoided?.

11. Check whether following filter has linear phase?. H(n)={5 3 2 3 5}

12. What is transition band?.

14. Why transition band is provided?

Page 64

EX.NO:7

DATE:

The experiment enables students to understand:

Filter designing techniques like Butterworth, Chebyshev 1, Chebyshev 2, Elliptic etc.

AIM

To write a MATLAB program to design Butterworth & Chebychev low pass, high pass, band pass and

band stop digital IIR filter from the given specifications.

THEORY

The filters designed by considering all the infinite samples of impulse response are called IIR filters. IIR

filters are of recursive type, whereby the present output sample depends on the present input, past input

samples and output samples.

ALGORITHM

1. Initialize the pass band ripple, stop band attenuation and sampling frequency.

2.

1. Butterworth buttord

2. Chebychev1 cheb1ord

3. Chebychev2 cheb2ord

1. Butterworth butter

2. Chebychev1 cheby1

3. Chebychev2 cheby2

4.

Declare the five filter types (low pass, high pass, Band pass, Band Reject), with the above

specification. It is only for butterworth filter.

1. [b, a] = butter(n, wn,'low');

2. [b, a] = butter(n, wn,high);

3. [b, a] = butter(n, wn,'passband');

4. [b, a] = butter(n, wn,'stop');

1. [b, a] = cheby1(n,rp, wn,'low')

2. [b, a] = cheby1(n,rp, wn, high)

3. [b, a] = cheby1(n,rp, wn,'passband')

Page 65

PROGRAM

%Design of Butterworth filter

% Low Pass Filter

rp = 3; % passband ripple

rs = 60; % stopband attenuation

fs = 20000; % sampling frequency

wp = 4200 / 10000;

ws = 5000 / 10000;

[n, wn] = buttord(wp, ws, rp, rs);

[b, a] = butter(n, wn,'low'); % Calculate filter coefficients

fvtool(b, a);

Page 66

4. [b, a] = cheby1(n,rp, wn,'stop')

5. Then use fvtool for display the filter response outputs (fvtool filter

visualization tool).

Page 67

% HIGH PASS FILTER

rp = 3; % passband ripple

rs = 60; % stopband attenuation

fs = 20000; % sampling frequency

wp = 4200 / 10000;

ws = 5000 / 10000;

[n, wn] = buttord(wp, ws, rp, rs);

[b, a] = butter(n, wn, 'high'); % Calculate filter coefficients

fvtool(b, a);

Page 68

% BAND STOP FILTER

rp = 3; % passband ripple

rs = 60; % stopband attenuation

fs = 20000; % sampling frequency

[n, wn] = buttord(wp, ws, rp, rs);

[b, a] = butter(n, wn,'stop'); % Calculate filter coefficients

fvtool(b, a);

Page 69

% BAND PASS FILTER

rp = 3; % passband ripple

rs = 60; % stopband attenuation

fs = 20000; % sampling frequency

wp = [2500 3500] / 10000;

ws = [2000 4000] / 10000;

[n, wn] = buttord(wp, ws, rp, rs);

[b, a] = butter(n, wn,'bandpass'); % Calculate filter coefficients

fvtool(b, a);

Page 70

RESULT

Thus the MATLAB programs for the design of Butterworth & Chebychev LPF, HPF, BPF and BSF were

designed and also their magnitude responses has been plotted successfully.

Page 71

Viva voce:

2. What are various methods to design IIR filters?

3. What is the main problem of bilinear transformation?

4. What is prewarping?

5. State the frequency relationship in bilinear transformation.

6. Where the j axis of s-plane is mapped in z-plane in bilinear transformation.

7. Where left hand side and right-hand sides of s-plane are mapped in z-plane in

bilinear transformation.

9.Which filter approximation has ripples in its response?

10.Can IIR filter be designed without analog filters?

11.What is the advantages of designing IIR filter using pole zero plot?.

12.What do you mean by ideal low pass filter?

13.Is it possible to design ideal low pass filter?

14.What is the necessity of filter approximation?

Page 72

EX.NO: 8 (a)

INTERPOLATION

DATE:

AIM:

The objective of this program is To Perform upsampling on the Given Input Sequence.

EQUIPMENT REQUIRED:

P IV Computer

Windows Xp SP2

MATLAB

Procedure

1. OPEN MATLAB

2. File

New

Script.

3. File

4. Debug

Save

THEORY:

Up sampling on the Given Input Sequence and Interpolating the sequence.

Page 73

PROGRAM:

clc; clear all; close

all; N=125;

n=0:1:N-1; x=sin(2*pi*n/15);

L=2;

figure(1)

stem(n,x); grid on;

xlabel('No.of.Samples');

ylabel('Amplitude'); title('Original

Sequence'); x1=[zeros(1,L*N)];

n1=1:1:L*N;

j =1:L:L*N; x1(j)=x;

figure(2) stem(n1-1,x1);

grid on;

xlabel('No.of.Samples');

ylabel('Amplitude'); title('Upsampled

Sequence'); a=1;

b=fir1(5,0.5,'Low');

y=filter(b,a,x1);

figure(3) stem(n1-1,y);

grid on;

xlabel('No.of.Samples');

ylabel('Amplitude');

title('Interpolated Sequence');

EXPECTED GRAPH:

Page 74

Result:

This MATLAB program has been written to perform interpolation on the Given Input sequence.

Page 75

PROGRAM:

clc; clear all;

close all; N=250 ;

n=0:1:N-1;

x=sin(2*pi*n/15);

M=2;

figure(1)

stem(n,x); grid on;

xlabel('No.of.Samples');

ylabel('Amplitude'); title('Original

Sequence'); a=1;

b=fir1(5,0.5,'Low');

y=filter(b,a,x);

figure(2)

stem(n,y); grid on;

xlabel('No.of.Samples');

ylabel('Amplitude'); title('Filtered

Sequence'); x1=y(1:M:N);

n1=1:1:N/M;

figure(3) stem(n1-1,x1);

grid on;

xlabel('No.of.Samples');

ylabel('Amplitude');

title('Decimated Sequence');

EXPECTED GRAPH:

Page 76

EX.NO: 8 (b)

DECIMATION

DATE:

AIM:

The objective of this program is To Perform Decimation on the Given Input Sequence.

EQUIPMENT REQUIRED:

P IV Computer

Windows Xp SP2

MATLAB

Procedure

1. OPEN MATLAB

2. File

New

Script.

3. File

4. Debug

Save

THEORY:

Decimation on the Given Input Sequence by using filter with filter-coefficients a and b.

Result:

This MATLAB program has been written to perform Decimation on the Given Input

Sequence.

Page 77

PROGRAM

clc; clear all; close

all;

M=3000; % number of data samples T=2000; %

number of training symbols dB=25; % SNR in dB

value

ChL=5; % length of the channel(ChL+1)

EqD=round((L+ChL)/2); %delay for equalization

Ch=randn(1,ChL+1)+sqrt(-1)*randn(1,ChL+1); % complex channel

Ch=Ch/norm(Ch);

% scale the channel with norm

TxS=round(rand(1,M))*2-1; % QPSK transmitted sequence

TxS=TxS+sqrt(-1)*(round(rand(1,M))*2-1);

n=randn(1,M); %+sqrt(-1)*randn(1,M); %Additive white gaussian noise

n=n/norm(n)*10^(-dB/20)*norm(x); % scale the noise power in accordance with SNR

x=x+n;

K=M-L; %% Discarding several starting samples for avoiding 0's and negative

X=zeros(L+1,K); % each vector column is a sample

for i=1:K X(:,i)=x(i+L:-1:i).';

end

%adaptive LMS Equalizer

e=zeros(1,T-10); % initial error

c=zeros(L+1,1); % initial condition

mu=0.001;

% step size

for i=1:T-10

e(i)=TxS(i+10+L-EqD)-c'*X(:,i+10); % instant error

c=c+mu*conj(e(i))*X(:,i+10);

% update filter or equalizer coefficient

end

sb=c'*X; % recieved symbol estimation

%SER(decision part)

sb1=sb/norm(c); % normalize the output sb1=sign(real(sb1))+sqrt(1)*sign(imag(sb1)); %symbol detection start=7;

sb2=sb1-TxS(start+1:start+length(sb1));

%

error

detection

SER=length(find(sb2~=0))/length(sb2); % SER calculation disp(SER);

% plot of transmitted symbols

subplot(2,2,1), plot(TxS,'*');

grid,title('Input symbols'); xlabel('real part'),ylabel('imaginary part') axis([-2 2 2 2])

% plot of received symbols

subplot(2,2,2), plot(x,'o');

grid, title('Received samples'); xlabel('real part'), ylabel('imaginary part')

Page 78

EX.NO: 9

EQUALIZATION

DATE:

Aim :

To develop program for equalization.

Apparatus :

PC having MATLAB software.

Procedure:

Equalizing a signal using Communications System Toolbox software involves these steps:

1. Create an equalizer object that describes the equalizer class and the adaptive algorithm that you

want to use. An equalizer object is a type of MATLAB variable that contains information about

the equalizer, such as the name of the equalizer class, the name of the adaptive algorithm, and the

values of the weights.

2. Adjust properties of the equalizer object, if necessary, to tailor it to your needs. For example,

you can change the number of weights or the values of the weights.

3. Apply the equalizer object to the signal you want to equalize, using the equalize method of the

equalizer object.

Page 79

% subplot(2,2,3),

plot(sb,'o');

grid, title('Equalized symbols'), xlabel('real part'), ylabel('imaginary part')

% convergence

subplot(2,2,4),

plot(abs(e));

grid, title('Convergence'), xlabel('n'), ylabel('error signal')

Expected graph:

Page 80

RESULT:

Thus the equalization program is designed and developed.

Page 81

Applications

Digital imaging

Medical ultrasound

Portable ultrasound equipment

CT scanners

Magnetic resonance imaging

Page 82

EX.NO: 10

DATE:

AIM:

To study architecture of TMS 320C5416

THEORY:

TM320C5416 consists of CPU containing various functional units such as ALU, MAC unit, EXP

encoders, brrel registers, shifters, memory mapped registers, system control interface, program address

generation logic and data address generation logic and eight 16 bit buses with interconnection.

5AX BUSEs :

The 5AX architecture in built around eight major 16 bit buses. The program bus arrives the

instruction code and immediate operands from program memory. Three data buses interconnect to various

elements such as CPU, DAGEN, on chip peripherals and the memory. The CB & DB carry operands that

are read from data memory. The EB carrier data to be written in memory.

INTERNAL MEMORY ORGANIZATION :

1. ON CHIP ROM :

This is part of program memory space and in some cases, part of data

memory space. The amount of ON Chip on data devices varies.

2. ON - CHIP DUAL ACCESS RAM :

The DARAM is composed of several blocks can be accessed twice per machine cycle CPU can read from

and write to a single block of DARAM in same cycle.

3. ON CHIP SINGLE ACCESS RAM :

The SARAM is composed of several blocks. Each block is accessible once per machine cycle. For either a

read or write, the SARAM is always mapped in data space and primarily written to store data values.

4. ON CHIP MEMORY SECURITY :

The 5AX maskable memory security option protects contents of on chip memories, When this option is

chosen, no externally originating instruction can access on chip

5. MEMORY MAPPED REGISTE :

The data memory space contains memory mapped registers for CPU and onchip peripherals. These

registers are locked on data page sampling access to them.

6. CENTRAL PROCESSING UNIT:

The 5AX CPU is common to all its devices. The block diagram is given in 5AX CPU content.

7. 40 BIT ALU :

Two 40 bit accumulator register barred shift registers supporting A 16 to 31 shift range

8. MULTIPLY OR ACCUMULATOR BLOCK :

9. 16 Bit temporary registers, TRM compare, select and store unit exponent encoders.

Page 83

Page 84

9.STATUS REGISTERS:

STO & STI has status of various mode for 15x devices. STO has flag produced key arithimetic

operation and bit manipulation in status of mode and instruction executed by processor.

10.TRN REG:

It set the transistor device divide on half to new matrix to perform the algorithm.

RESULT:

Thus the architecture of TMS320C5416 was studied.

Page 85

PROGRAM:

a) ADDITION

.mmregs

. global start

start: ld # 1000h,a;

.add # 00h,a:

.end

ii) SUBRACTION

. mmregs

. global start;

start: ld # 1000h, a:

sub # 0100h,a

.end

iii) MULTIPLICATION

. mmregs

. global start;

start: ld # 1000h,a

mpy # 0100h,a

.end

iv) DIVISION

. mmregs

. global start;

start: ld # 1000h,a

Div # 0100h,a

.end

Page 86

EX.NO : 11

DATE :

AIM:

To write an assembly language program to perform aritmmetic operation using TMS320C5416.

SOFTWARE USED:

TMS software

PROCEDURE:

Step 1: Start the program.

Step2: Get the data and check for the proper working.

Step3: Condition of the processor using diagonistic tools.

Step4: Create a new project & open a new source file and enter the source file and enter the

source code in it.

Step5: Add a source file command file and library file to the project created.

Step6: Load the program and run it

Step7: The required output is recorded

Page 87

OUTPUT:

ADDITION:

Addition

Tabulation

1.

A=1000h

2.

A=2000h

3.

A=1FFFh

4.

A= 0002h

5.

A= 0020h

SUBTRACTION:

Instruction

After execution

1.

A= 1100h

2.

A= 1000h

Page 88

RESULT:

Thus the program is executed and output is verified.

Page 89

PROGRAM:

# include <stdio.h

# include <math.h

float y [100];

main ( )

{

float i;

int j =0;

for ( i= 0 ; I < 0.02;)

}

{

y[i]= sin (2*3.14 *100*i);

j++;

i+ = 0.002;

}

for (j=0; j 100;j++)

print f ( % d \n ,y[j];

OUTPUT:

Page 90

EX.NO : 12

DATE:

AIM:

To write a program in C language to generate sine wave series using TMS 320C5416.

SOFTWARE USED:

TMS 320C5416

PROCEDURE:

i) Check the processor working conditions of the processor with the diagnostic loads.

ii) Open a new project in that open a new source file and the program code.

iii) To that source add a command file library file and a command file.

iv) Now compile the source code.

v) Now load the program and run it.

vi) The required output is obtained.

RESULT:

Thus the program for generatig a sine wave is executed and the output is obtained.

Page 91

PROGRAM:

# include <stdio.h>

int y [10]

main ( )

{

int m=4;

int n=4;

int I,j ;

int x[7] = {1, 2, 3, 4,0, 0, 0 };

int h[7] = {1, 2,3, 4, 0, 0, 0};

for ( i=0; i< mm+n-1; i+ +)

{

y[i]= 0;

for (j=0; j< I ;j++)

y[ i]+ = x[j] * h[i-j];

for (i=0; I < m+n-1; i++)

printf ( % f \ n , y[i];

}

OUTPUT:

Page 92

EX.NO : 13

DATE:

AIM:

To perform linear convolution using processor TMS 320 VC5416.

APPARATUS REQUIRED:

C5416 software processor.

PROCEURE:

i)Conect TMS v 5416 bit to pc

ii) Open code and compare studio and ensure working conditions of the processor with the

diagnostic loads.

iii) Open a new project in that open a new source file and the program code.

iv)To that source add a command file library file and a command file.

v) Now compile the source code.

vi) Now load the program and run it.

vii)The required output is obtained.

RESULT:

Thus the program for generating a sine wave is executed and the output is obtained

Page 93

PROGRAM:

.mmregs

. global start

Start: rsbx sxm

stm #3h,bk

stm #105eh,ar1

ld #ar1+%,a,

ld #ar1+%,a

ld #ar1+%,a

ld #ar1+%,a

ld #ar1+%,a

ld #ar1+%,a

.end

OUTPUT:

Instructions

Before execution

After execution

Sxm=0

(0x105c)=0x0000

Bk=3

(0x105c)=0x4413

(AC1)=0xBEEF

(A)=105EH

(A)=0x0000

(A)=0x44C3

(A)=0xBEEF

(0x105E)=0xBEEF

(A)=0x0000

(A)=0x44C3

Page 94

EX.NO : 14

DATE :

AIM:

To perform linear convolution using processor TMS 320 VC5416.

APPARATUS REQUIRED:

C5416 software processor.

PROCEDURE:

i)Conect TMS v 5416 bit to pc

ii) Open code and compare studio and ensure working conditions of the processor with the

diagnostic loads.

iii) Open a new project in that open a new source file and the program code.

iv)To that source add a command file library file and a command file.

v) Now compile the source code.

vi) Now load the program and run it.

vii)The required output is obtained.

RESULT:

Page 95

PROGRAM:

Main( FFT 256 C )

# include <math.h>

#define DTS 619 # of points for FFT

# define P<314159265358979

type def start of float real ,image;

void fft complex * a, int n);

float to buffer (pts);

short I;

short buffer count = 0;

short flag = 0;

complex w(pts);

complex samples [pts];

main ( )

{

for ( i= 0; I < pts; i+ +)

{

w( i) , real = cos (2* pi* i)/ (pts/ t2.0);

w(i), imag= -sin (2*pi*pi*i)/ (pts/t2.0);

}

for ( i= 0; I, pts; I++)

{

io buffer [ I ] = sin(2* pi *10*i\64);

samples [ i ] real= 0;

samples [ I ] . imag =0;

}

Page 96

EX.NO : 15

DATE:

AIM:

To implement 64 point FFT using DIT algorithm in TMS 320 C 5416 DSP processor.

APPARATUS REQUIRED:

PC, TMS 320C5416 ,USB

PROCEDURE:

1.

2.

3.

4.

Open code composer studio and make sure bit is in proper working.

Start project and library file , command file and source file.

The compile program , build and loading is done.

Run program and output is received by graph.

Page 97

samples [ I ] .imag=0;

for [ I =0;; i< pts;i++);

{

x1 [ I ] = sqrt ( samples [ I ]

0;

}

}

FFT. C:

# define PTS 64

type def start { float, real , imag};

void fft ( composer xy , intu)

{

complex turn p, turnp2;

int upper = = log , lower leg;

int num stages;

int index- stages;

I = 1;

Do

{

num-stages + = 1;

i= I * 2

}

while ( i/ n);

leg diff = N/2;

for ( i= 0; I < num stages ; I ++);

{

index = 0;

for ( j =0; j ,

Page 98

Page 99

{

for ( upper leg= j ; upper- leg ( N) ; upper-leg+)

= (2*leg diff)};

lower leg = upper. Leg+ leg difference

temp.real = [ y[ upper leg ]].real +[y9lower-leg]]

temp.real = [y[ upper leg]] = imag+ (g(lower-leg))

cy [ lower.leg].imag= temp2.real*w[index+imag+[ temp2 imag +index]real;

}

index + = step;

}

leg-differ leg-diff/2;

step+=2

}

j= 0

for ( i=1; i< N-1; i++)

{

j = j k;

k= k/2;

}

k= k/2;

}

i = j- k;

}

I = j +k;

{

temp1.real = [ y( I ).real];

temp2. imag = [y( j )imag];

(y [ i]).real = [ y(I ). Imag];

Page 100

INPUT

OUTPUT:

Page 101

(y[I ] . real = temp1. real;

( y [j ]. Imag= temp1.imag;

}

}

return;

}

Page 102

RESULT:

Thus program for 64 point FFT has been executed and output is obtained suddenly

Page 103

VIVA QUESTIONS

2. Define Correlation of the sequence.

3. State any two DFT properties

4. Differentiate IIR filters and FIR filters.

5. Write the characteristics features of Hanning window

6. Define pre-warping effect? Why it is employed?

7. Give any two properties of Butterworth filter.

8. When a FIR filter is said to be a linear phase FIR filter

9. Write the characteristics features of rectangular window.

10. Write the expression for Kaiser window function..

11. What are the advantages and disadvantages of FIR filters?

12. Write the characteristics features of Hamming window

13. Why mapping is needed in the design of digital filters?

14. What are the effects of finite word length in digital filters?

15. List the errors which arise due to quantization process.

16. Discuss the truncation error in quantization process.

17. Write expression for variance of round-off quantization noise.

18. What is sampling?

19. Define limit cycle Oscillations, and list out the types.

20. When zero limit cycle oscillation and Over flow limit cycle oscillation has occur?

21. Why? Scaling is important in Finite word length effect.

22. What are the differences between Fixed and Binary floating point number

representation?

23. .What is the error range for Truncation and round-off process

24. What is the need for spectral estimation?

25. How can the energy density spectrum be determined?

26. What is autocorrelation function?

27. What is the relationship between autocorrelation and spectral density?

28. Give the estimate of autocorrelation function and power density for random

signals?

29. Obtain the expression for mean and variance for the autocorrelation function of

random

30. signals.

31. Define period gram.

32. What are the factors that influence the selection of DSPs.

33. What are the advantages and disadvantages of VLIW architecture? What is

pipelining? and What are the stages of pipelining?

34. What are the different buses of TMS 320C5x processor and list their functions

35. List the various registers used with ARAU.

36. What are the shift instructions in TMS 320 C5x.

37. List the on-chip peripherals of C5x processor.

Page 104

Page 105

Page 106

EX.NO: 16

DATE:

AIM

To write a program for calculating Fast Fourier Transform of given input signal using MATLAB software

package.

THEORY

FFT

The implementation of DFT through digital computers requires the memory to store x(n) and values of

coefficients WknN . The amount of accessing and storing of data in computation is directly proportional to

the number of arithmetic operations involved. Therefore, for direct computation of N- point DFT the

amount computation and computation time is proportional to N 2. From equation (1) observe that the direct

calculation of the DFT requires N2 complex multiplications and N (N-1) complex additions. Direct

computation of DFT is basically inefficient, primarily because it does not exploit the symmetry and

periodicity properties of the twiddle or phase factor WN.

As the value of N increases, the direct computation of DFT becomes a time taking and complex process,

which also leads to very high memory capacity requirements.

The computationally efficient algorithms, known collectively as Fast Fourier Transform (FFT) algorithms

exploit the symmetry and periodicity properties of the twiddle or phase factor WN. In particular, these two

properties are:

Wk+N/2 N = -WkN

Wk+N

= WkN

The FFT is a method for computing the DFT with reduced number of calculations. The computational

efficiency is achieved if we adopt a divide and conquer approach. This approach is based on the

decomposition of an N- point DFT into smaller DFTs.

Page 107

PROGRAM

% Illustration of fft Computation

clear all;

Xn = [1, 1, 0, 0];

N = length (Xn);

x = fft (Xn, N);

subplot(2,2,1);

stem(Xn);

title('Input sequence ');

xlabel('Length of Input Sequence');

ylabel('Input Values');

subplot(2,2,2);

stem(real(x));

title('Output real sequence ');

xlabel('Real Output Length');

ylabel('Real Values');

subplot(2,2,3);

stem(imag(x));

title('Output imag sequence ');

xlabel('Imag Output Length');

ylabel('Imag Values');

Page 108

For performing radix-2 FFT, the value of N should be such that, N=2 m. Here the decimation can be

performed m times, where m=log N. In direct computation of N-point DFT, the total number of complex

additions are N (N-1) and the total number of complex multiplications is N 2. In radix-2 FFT, the total

number of complex additions are reduced to N.log 2N and total number of complex multiplications are

reduced to (N/2). log 2N.

DECIMATION IN TIME ALGORITHM

The DIT FFT algorithm decompose the DFT by sequentially splitting x(n) in time domain into sets of

smaller and smaller subsequences and then forms a weighted combination of the DFTs of these sequences.

DECIMATION IN FREQUENCY ALGORITHM

The DIF FFT algorithm decomposes the DFT by recursively splitting the sequence elements X (k) in the

frequency domain into sets of smaller and smaller subsequences.

CALCULATION OF MAGNITUDE AND PHASE RESPONSE

Magnitude response of X (k)can be obtained as,

X (k) = [ XR (k)] 2 + [ XI (k) ] 2

X(k) = tan 1[ XI (k) / XR (k) ]

In an N-point sequence, if N can be expressed as N= r m , then the sequence can be decimated into r- point

sequences. For each r- point sequence, r- point DFT can be computed. From the results of r-point DFT, r2point DFTs are computed. From the results of r2-point DFTs, the r3-point DFTs are computed and so on,

until we get rm-point DFT. In computing N-point DFT by this method a number of stages of computation

will be m times. The number is called Radix of the FFT algorithm.

Page 109

INPUT

Enter the input sequence : 1, 1, 0, 0

OUTPUT

Real Output = 2 1 0 1

Imaginary Output = 0 -1 0 1

Page 110

ALGORITHM

1. Initialize the variable Xn. Then find the length of the input sequence (Xn) and store the value

into variable N. It is the FFT order (4, 8, 16, .. point fft).

2. Find the FFT for the given input sequence and use the function fft (Xn, N). N refers the order

of FFT.

3. The FFT output is in complex form, so the output contains Real and Imaginary values. Use

stem (real(x)) to plot Real values and stem(imag(x)) is used to plot the imaginary values.

4. Then use the subplot and stem function to display the input and output in a single graph

window. Else use figure( ) function to display the input & output in separate window.

5. The title function is used to give the name to the waveform.

6. The xlabel & ylabel is used to find the unit for x & y axis.

RESULT

Thus the calculation of Fast Fourier Transform of input signal was verified and Real & imaginary values

are plotted.

Page 111

Page 112

EXP NO: 17 STUDY OF VARIOUS ADDRESSING MODES OF DSP(TMS320C6713

PROCESSOR) USING SIMPLE PROGRAMMING EXAMPLES

DATE:

AIM :

To Study the various addressing modes of DSP (TMS320C6713 Processor) using simple example

programmes.

1.1.

ARCHITECTURE

The TMS320C6713 is a 32 bit floating point processor, operating at 225MHz which delivers up to

1350 million floating-point operations per second (MFLOPS) and 1800 million instructions per

second (MIPS). The C6713 uses a two-level cache-based architecture and has a powerful and

diverse set of peripherals. The level1 program cache (L1P) is a 4K-byte direct-mapped cache and

the level1 data cache (L1P) is a 4K-Byte 2-way set-associative cache. The level 2 memory/cache

(L2) consists of a 256K-Byte memory space that is shared between program and data space. The

C6713 has a rich peripheral set that includes two multichannel Audio Serial Ports (McBSPs), two

Inter-Integrated Circuit (I 2C) buses, one dedicated General-Purpose Input/Output(GPIO) module,

two general-purpose timers, a host-port interface (HPI), and a external memory interface (EMIF)

capable of interfacing to SDRAM, SBSRAM, and asynchronous peripherals.

1.2.

- Program fetch unit

- Instruction dispatch unit, advanced instruction packing (C64 only)

- Instruction decode unit

- Two data paths, each with four functional units

- 32-bit registers, Control registers, Control logic

- Test, emulation, and interrupt logic

The program fetch, instruction dispatch, and instruction decode units can deliver up to eight 32bit instructions to the functional units every CPU clock cycle. The processing of

instructions occurs in each of the two data paths (A and B), each of which contains four

functional units (.L, .S, .M, and .D) and 16 32-bit general-purpose registers for the C6713. A

control register file provides the means to configure and control various processor operations.

Page 113

16

32

HPI

GPIO

Timer 0

Timer 1

I2C0

I2C1

McBSP0

McBSP1

McASP0

McASP1

EMIF

Enhanced

DMA

Controller

(16 channel)

L2

Memory

192K

Bytes

(Up to

4-way)

L2 Cache /

Memory

4 Banks

64K Bytes

Total

M1

D2

M2

Set Associative

4K Bytes

D1

S2

In-circuit

Emulation

Interrupts

Control

Test

Control

logic

Control

registers

Power - Down

Logic

L2

Register file A

Register file A

S1

Data path B

C67 x TMCPU

Data path A

PLL x4 through x 25 Multiplier /1

through /32 Dividers

L1

Instruction Decode

Instruction Dispatch

Instruction Fetch

L1P Cache

Direct Mapped

4K Bytes Total

Page 114

g ni xel pi tl u Mni P

1.3

INTERNAL MEMORY

It is a part of 32-bit, byte-addressable address space. Internal (on-chip) memory is

organized in separate data and program spaces. When off-chip memory is used, these spaces

are unified on most devices to a single memory space via the external memory interface (EMIF).

The C6713 has two 32-bit internal ports to access internal data memory. Besides there is a single

internal port to access internal program memory, with an instruction-fetch width of 256 bits.

1.4

MEMORY AND PERIPHERAL OPTIONS

A variety of memory and peripheral options are available for the C6713 DSP:

*

Memories

- Large on-chip RAM, up to 7M bits

- Program cache

- 2-level caches

- 32-bit external memory interface supports SDRAM, SBSRAM, SRAM, and other

asynchronous memories for a broad range of external memory requirements and

maximum system performance.

DMA Controller transfers data between address ranges in the memory map without

intervention by the CPU. There are four programmable channels and a fifth auxiliary

channel inside the DMA block.

EDMA Controller performs the same functions as the DMA controller and is equipped with

16 programmable channels, as well as a RAM space to hold multiple configurations

for future transfers.

HPI is a parallel port through which a host processor can directly access the CPUs memory

space. The host device has easy access because it is the master of the interface. The host

and the CPU can exchange information via internal or external memory. In addition, the

host has direct access to memory-mapped peripherals.

Expansion bus is a replacement for the HPI, as well as an expansion of the EMIF. The

expansion provides two distinct areas of functionality (host port and I/O port) which can coexist in a system. The host port of the expansion bus can operate in either asynchronous

slave mode, similar to the HPI, or in synchronous master/slave mode. This allows

the device to interface to a variety of host bus protocols. Synchronous FIFOs and

asynchronous peripheral I/O devices may interface to the expansion bus.

* The two McASP interface modules each support one transmit and one receive clock zone.

There are eight serial data pins in each McASP, which can be individually allocated to any

of the two zones. The serial port supports time-division multiplexing on each pin from 2 to

Page 115

32 time slots. The C6713 has sufficient bandwidth to support all 16 serial data pins

transmitting a 192 kHz stereo signal. Serial data in each zone may be transmitted and

received on multiple serial data pins simultaneously and formatted in a multitude of

variations on the Philips inter-IC sound (I2S) format.

*

McBSP (multichannel buffered serial port) is based on the standard serial port interface

found on the TMS320C2000 and C5000 platform devices. In addition, the port can buffer

serial samples in memory automatically with the aid of the DMA/EDNA controller. It

also has multichannel capability compatible with the T1, E1, SCSA, and MVIP networking

standards.

* The two I2C ports on the TMS320C6713 allow the DSP to easily control peripheral devices,

boot from a serial EEPROM, and communicate with a host processor.

*

Timers in the C6713 devices are two 32-bit general-purpose timers used for these functions:

*

Time events

Count events

Generate pulses

signaling mode that can be loaded by an internal or internal source. The timers inherit an

input pin and output pin, which can be configured for general purpose input and output

respectively. The input and output pins (T INP, TOUT) can function in timer clock input and

clock output.

*

Power-down logic allows reduced clocking to reduce power consumption. Most of the

operating power of CMOS logic dissipates during circuit switching from one logic state to

another. By preventing some or all of the chips logic from switching, you can realize

significant power savings without losing any data or operational context.

Page 116

1.5

There are two general-purpose register files (A and B) in the C6713 data paths. Each of

these files contains sixteen 32-bit registers (A0-A15 for file A and B0- B15 for file B). The

general-purpose registers can be used for data, data address pointers or condition registers.

The C6713 general-purpose register files support data ranging in size from packed 16-bit data

through 40-bit fixed-point and 64-bit floating point data.

Values larger than 32 bits, such as 40-bit long and 64-bit float quantities are stored in

register pairs. In these the 32 LSBs of data are placed in an even-numbered register and the

remaining 8 or 32 MSBs in the next upper register (which is always an odd- numbered

register). The C64x register file extends this by additionally supporting packed 8-bit types

and 64-bit fixed-point data types. The packed data types store either four 8-bit values or two

16-bit values in a single 32-bit register, or four 16-bit values in a 64-bit register pair. There are

16 valid register pairs for 40-bit and 64-bit data in the C6713 cores, and 32 valid register pairs

for 40-bit and 64-bit data in the C64x core, as shown in Table. In assembly language syntax, a

colon between the register names denotes the register pairs, and the odd-numbered register is

specified first.

Register Files

A

Applicable Devices

B

A1:A0

A3:A2

A5:A4

A7:A6

A9:A8

A11:A10

A13:A12

A15:A14

B1:B0

B3:B2

B5:B4

B7:B6

B9:B8

B11:B10

B13:B12

B15:B14

A17:A16

A19:A18

A21:A20

A23:A22

A25:A24

A27:A26

A29:A28

A31:A30

B17:B16

B19:B18

B21:B20

B23:B22

B25:B24

B27:B26

B29:B28

B31:B30

C62x/C64x/C67x

C64x ONLY

Figure 1-2 illustrates the register storage scheme for 40-bit long data. Operations requiring a

Page 117

long input ignore the 24 MSBs of the odd-numbered register. Operations producing a long result

zero-fill the 24 MSBs of the odd-numbered register. The even- numbered register is encoded in

the opcode.

31

ODD REGISTER

31

EVEN REGISTER 0

IGNORED

READ FROM

REGISTERS

39

32

31

0

40 - BIT DATA

WRITE TO

REGISTERS

ODD REGISTER

39

32

ZERO-FILLED

31 EVEN REGISTER 0

40 - BIT DATA

1.6

FUNCTIONAL UNITS

The eight functional units in the C6713 data paths can be divided into two groups of four; each

functional unit in one data path is almost identical to the corresponding unit in the other data

path. The functional units are described in Table 1-2.

Page 118

Functiona

l Unit

.L unit

(.L1,L2)

Fixed-Point Operations

32-bit logical operations

Leftmost 1 or 0 counting for 32 bits normalization

count for 32 and 40 bits

Byte shifts

Data packing/unpacking

5-bit constant generation

Dual 16-bit arithmetic operations Quad 8-bit

arithmetic operations Dual 16-bit min/max operations

Quad 8-bit min/max operations

.S unit

32-bit arithmetic operations

(.S1,.S2)

32/40 bit shifts and 32-bit bit-field operations

32-bit logical operations branches constant generation

Register transfers to from control register file (.S2

only)

Byte Shifts, Data packing/unpacking

Dual 16-bit compare operations

Quad 8-bit compare operations

Dual 16-bit saturated arithmetic operations

8-bit

saturated

arithmetic operations

.M unit (.M1, Quad

16x16

multiply

operations

.M2)

16x32 multiply operations

.D unit (.D1,

.D2)

operations Dual16x16 multiply with add/subtract

operations

Quad 8x8 multiply with add operation

Bit expansion

FloatingPoint

Operation

Arithmetic operations

s

DP6Sp, INT6DP,

INT6SP conversion

operations

Compare Reciprocal

and reciprocal squareroot operations

Absolute value

operations S P 6D P

conversion

operations

op e r a ti ons floatingpoint multiply

operations

operations Rotation

Galois Field Multiply

32-bit add, subtract linear and circular address

calculation

Loads

and

stores with 5-bit constant offset Load double word

Loads and stores with 15-bit constant offset (D2 with 5-bit constant

offset

only)

Loads and store double words with 5-bit constant

Load and store non-aligned words and double words

5-bit constant generation

32-bit logical operations

Page 119

Most data lines in the CPU support 32-bit operands, and some support long (40-bit) and

double word (64-bit) operands. Each functional unit incorporates its own 32-bit write port into a

general-purpose register file (Refer to Figure 2-3). T he units ending in 1 (for example, .L1)

write to register file A, and all units ending in 2 write to register file B. Each functional unit has

two 32-bit read ports for source operands src1 and src2. An extra 8-bit-wide port for 40-bit long

writes, as well as an 8-bit input for 40-bit long reads are available in Four units( L1, L2, S1,

and S2). In view of the fact that there is a 32-bit write port in each unit, when performing 32-bit

operations all eight units can be used in parallel every cycle.

1.7

One unit (.S2) can read from and write to the control register file, as shown in this section.

Table 1.3 lists the control registers contained in the control register file and describes each. If

more information is available on a control register, the table lists where to look for that

information. Each control register is accessed by the MVC instruction.

Additionally, some of the control register bits are specially accessed in other ways. For example,

arrival of a maskable interrupt on an external interrupt pin, INTm, triggers the setting of flag

bit IFRm. Subsequently, when that interrupt is processed, this triggers the clearing of IFRm

and the clearing of the global interrupt enable bit, GIE. Finally, when

that

interrupt

processing is complete, the B IRP instruction in the interrupt service routine restores the

pre-interrupt value of the GIE. Similarly, saturating instructions like SADD set the SAT

(saturation) bit in the CSR (Control Status Register).

Abbreviation

AMR

Register Name

Addressing mode

register

Description

Specifies whether to use linear or circular

addressing for each of eight registers also contains

sizes for circular addressing.

CSR

control bits and other miscellaneous control and

status bits.

IFR

ISR

ICR

IER

Interrupt enable

register

ISTP

Interrupt service table

pointer

IRP

Points to the beginning of the interrupt service

table.

Contains the address to be used to return from a

Page 120

Interrupt return pointer

NRP

Nonmaskable interrupt

return pointer

PCE1

maskable interrupt

Contains the address to be used to return from a

nonmaskable interrupt

Contains the address of the fetch packet that is in

the E1 pipel line stage.

Program counter, EI

phase

1.8

*

Fetch

Decode

Execute

All instructions in the C67x instruction set flow through the fetch, decode, and execute

stages of the pipeline. The fetch stage of the pipeline has four phases for all instructions, and

the decode stage has two phases for all instructions. The execute stage of the pipeline

requires a varying number of phases, depending on the type of instruction. The stages of the

C67x pipeline are shown in Figure 1-3.

1.8.1 Fetch

The fetch phases of the pipeline are:

PG

PS

PW

PR

:

:

:

:

Program address send

Program access ready wait

Program fetch packet receive

The C6713 uses a fetch packet (FP) of eight instructions. All eight of the instructions proceed

through fetch processing together, through the PG, PS, PW, and PR phases. Figure 1-4(a) shows

the fetch phases in sequential order from left to right. Figure 1- 4(b) shows a functional diagram

of the flow of instructions through the fetch phases. During the PG phase, the program address is

generated in the CPU. In the PS phase, the program address is sent to memory. In the PW

phase, a memory read occurs. Finally, in the PR phase, the fetch packet is received at the CPU.

Figure 1-4(c) shows fetch packets flowing through the phases of the fetch stage of the pipeline.

Page 121

In Figure 1-4(c), the first fetch packet (in PR) is made up of four execute packets, and the second

and third fetch packets (in PW and PS) contain two execute packets each. The last fetch packet

(in PG) contains a single execute packet of eight single-cycle instructions.

CPU

PG PS PW PR

(a)

Functional

Units

(b)

PR

Registers

PS

Memory

PG

(c)

PW

256

Fetch

LDW LDW

SHR

LDW LDW

LDW LDW

MVKLH

LDW LDW

MVK

SHR

SMPYH SMPHY

MV SMPYH

ADD

SHL

SADD

SMPY

LDW

MV

NOP

PG

MVK PS

MVK PW

LDW MVK PR

Decode

1.8.2 Decode

The decode phases of the pipeline are:

DP

DC

:

:

Instruction dispatch

Instruction decode

In the DP phase of the pipeline, the fetch packets are split into execute packets. Execute

packets consist of one instruction or from two to eight parallel instructions. During the DP

phase, the instructions in an execute packet are assigned to the appropriate functional

units. In the DC phase, the source registers, destination registers, and associated paths are

decoded for the execution of the instructions in the functional units. Figure 1-5(a) shows the

decode phases in sequential order from left to right. Figure 1- 5(b) shows a fetch packet that

contains two execute packets as they are p rocessed through the decode stage of the pipeline.

The last six instructions of the fetch packet(FP) are parallel and form an execute packet (EP).

This EP is in the dispatch phase (DP) of the decode stage. The arrows indicate each

Page 122

instructions assigned functional unit for execution during the same cycle.

The NOP instruction in the eighth slot of the FP is not dispatched to a functional unit because

there is no execution associated with it. The first two slots of the fetch packet represent an

execute packet of two parallel instructions that were dispatched on the previous cycle. This

execute packet contains two MPY instructions that are now in decode (DC) one cycle before

execution. There are no instructions decoded for the .L, .S, and .D functional units for the

situation illustrated.

(a)

DP DC

(b)

Decode

32

32

32

32

32

ADD ADD STW

MPYH

L1

S1

M1

32

32

32

STW ADDK NOP1 DP

MPYH

DC

D1

Functional D2

units

M2

S2

L2

1.8.3 Execute

The execute portion of the floating-point pipeline is subdivided into ten phases (E1- E10), as

compared to the fixed-point pipelines five phases.

require different numbers of these phases to complete their execution. These phases of the

pipeline play an important role in your understanding the device state at CPU cycle

boundaries.

Pipeline Execution of Instruction Types.

Figure 1-6(a) shows the execute phases of the pipeline in sequential order from left to

right. Figure 1-6(b) shows the portion of the functional block diagram in which execution

occurs.

Page 123

(a)

E1 E2 E3 E4 E5 E6 E7 E8 E9 E10

(b)

Execute

E1

SADO

L1

B

S1

SMPY

M1

STH

D1

STH

D2

SMPYH

M2

SUB

S2

SADD

L2

32

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Register file A

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

32

Data 1

Data 2

Register file B

32

32

32

16

0

16

16

16

6

Data address 1

Data address 2

(byte addressable)

Figure 1-6 Execute Phases of the Pipeline and Functional Block Diagram of the TMS320C6713

Example Program

Write an Arithmetic Logic Program for the below mentioned equation, by using 6713 instruction set and

functional units. (Addressing modes)

40

a

n1

xn

an = First input array, xn = Second input array

A5++

Memory

Data

80001000

a0

A6++ 80001100

X0

80001004

a1

80001104

x1

8000109C an

8000119C

xn

PROGRAM

Page 124

Page 125

MVK .S1

40, A2

MVK .S1

0, A4

MVK .S1

0x80001000, *A5

; an Input values

MVK .S1

0x80001100, *A6

; xn Input values

*A5++, A0

; A0 = a(n)

LDH .D1

*A6++, A1

; A1 = x(n)

MPY .M1

A0, A1, A3

; A3 = a(n) * x(n)

ADD .L1

A3, A4, A4

; Y = Y + A3

SUB

.L1

A2, 1, A2

.S1

loop

; if A2 = 0, branch

.D1

A4, *A7

; *A7 = Y

[A2] B

STH

Page 126

STEPS:

1. Initially load N (40) value to Register A2, use .S1 (see Table 3) and get input values (an, xn)

from memory address to register A5, A6.

2. Then get two input values from Register A5 to A0 and A6 to A1 and use the .D1 functional

unit.

3. Next multiply the values using .M functional unit.

4. Then add the multiplied value into passed multiplied value and Use the .L1 functional unit.

5. Then loop operation is used to execute the program in N (40) number of times. Use .S1

functional unit.

6. Finally store the final output in register A7 (use .D1 function unit).

RESULT:

Thus the Study of various addressing modes of DSP(TMS320C6713 Processor) using simple programming

examples has been studied.

Page 127

Page 128

EX.NO: 18

DATE:

AIM:

To write a C program for the design & Implementation of FIR filters for the given cutoff frequency using

frequency sampling method.

APPARATUS REQUIRED

1.

TMS320C6713 Kit

2.

Vi Debugger (6713)

3.

CCS Software

THEORY

In this experiment the FIR filters are implemented by using the cutoff frequency, sampling frequency and

Order of the filter N. In FIR filter is finite no of order and its has four types of filters.

Filter Type & Equations

In FIR filter perform Low Pass, High Pass, Band Pass, Band Reject operation to the input

frequency. The filter type equations are given below

i) Low Pass Filter

The low pass filter equation is

2 Fc

Hd ( n )

sin(Wc n) / n

n 0

n/2 n n/2

The High pass filter equation is

1 2 Fc

Hd (n)

sin (Wc n) / n

n 0

n/2 n n/2

Page 129

The band Pass filter equation is

2( Fc2 Fc1)

Hd (n)

sin (Wc2 n) sin (Wc2 n) / n

n 0

n/2 n n/2

The band reject filter equation is

2( Fc1 Fc2)

Hd (n)

sin (Wc1 n) sin (Wc2 n) / n

n 0

n/2 n n/2

Fc1 = Fps / Fsamp

Fc2 = Fst / Fsamp

Wc = 2Fc

Wc1 = 2c1 & Wc2 =2Fc2

The filter coefficients are calculated using these formulas for n/2 to n/2 and the values are stored in

new memory with 0 up to n.

ALGORITHM:

1. First initialize header file, input, output and variables to the particular data type.

2. Assign Sampling frequency and N value. Set cutoff frequency for design low filter and high

filter, set band pass and band stop frequency for band pass filter & band stop filter (use various

cutoff frequency or Pass & stop band frequency values see the output variations).

3. Set the memory address which is used to store the input and output values.

4. Initially set the Soc value is used to start ADC operation. Then apply function generator input to

the ADC channel1, the values are stored in ADC channel1 memory address (0x90040008).

5. Then use filter formula to find filter coefficient, and store the filter coefficient value in the

memory address. The filter coefficient is calculated from N/2 to N/2. Memory addresses also

increment from N/2 to N/2. If use this method the memory start before initialize address

(Initialize address 0x80010000 but memory start form before N/2 value).

Page 130

6. So the filter coefficients transfer to another memory and the memory address start from 0 to N.

7. Then input signal get from function generator and apply to ADC. Set SocValue (address) to

SocRead, The SocRead function is used to start the ADC operation.

8. The converted (Analog to Digital output) output is stored to variable AdcOut, then apply

logical operation (AND & OR)..

AND It is used to take 2s complement of ADC output, its convert 16 bit value to

12 bit value.

OR It is used to offset the output value (+ve offset)

9. Then multiply filter coefficient with ADC output value.

10. Move multiplied value to DAC memory (output memory).

11. Then move the ADC value to next memory location or increment the memory location.

12. Led is used to identify if the program is running or not.

PROGRAM

LOW PASS FILTER

#include<fastmath67x.h>

#include<math.h>

#define PI 3.14

void main()

{

const float Fsamp = 10000;

int Fcut = 1000;

int N = 40;

float Fc = Fcut/Fsamp;

float Wc = 2 * PI * Fc;

int *SocValue,*AdcValue;

int SocRead,*AdcStore;

int *DacOut;

Page 131

short AdcOut;

int OutValue, Count,Inc;

float *Hd,*Hm;

float Val;

unsigned char *Led;

SocValue = (int *)0x9004000c;

AdcValue = (int *)0x90040008;

AdcStore = (int *)0x80000000;

Hd = (float *)0x80010000;

Hm = (float *)0x80030000;

DacOut = (int *)0x90040008;

Led = (unsigned char *)0x90040016;

for(Count = -2 * N; Count < 2 * N; Count++)

{

AdcStore[ Count ] = 0;

Hd[ Count ] = 0;

Hm[ Count ] = 0;

}

for(Count = -N/2; Count < N/2; Count++)

{

if(Count == 0)

Hd[Count] = 2 * Fc;

else

{

Page 132

Val = sin(Wc * Count);

Hd[Count] = Val / (Count * PI);

}

}

Inc=0;

for(Count = -N/2; Count < N/2; Count++)

{

Hm[Inc] = Hd[Count];

Inc++;

}

while(1)

{

SocRead = *SocValue;

AdcOut = *AdcValue;

AdcOut &= 0x0fff;

AdcOut ^= 0x0800;

*AdcStore = AdcOut;

OutValue = 0;

for(Count = 0; Count < N; Count++)

OutValue += (*(AdcStore + Count) * *(Hm + Count));

for(Count = (N-1); Count >= 0; Count--)

*(AdcStore + Count + 1) = *(AdcStore + Count);

*DacOut = OutValue;

*Led = 1;

Page 133

}

}

PROGRAM - HIGH PASS FILTER

#include<fastmath67x.h>

#include<math.h>

#define PI 3.14

void main()

{

const float Fsamp = 10000;

int Fcut = 2000;

int N = 35;

float Fc = Fcut/Fsamp;

float Wc = 2 * PI * Fc;

int *SocValue,*AdcValue;

int SocRead,*AdcStore;

int *DacOut;

short AdcOut;

int OutValue, Count,Inc;

float *Hd,*Hm;

float Val;

unsigned char *Led;

SocValue = (int *)0x9004000c;

AdcValue = (int *)0x90040008;

Page 134

AdcStore = (int *)0x80000000;

Hd = (float *)0x80010000;

Hm = (float *)0x80030000;

DacOut = (int *)0x90040008;

Led = (unsigned char *)0x90040016;

for(Count = -2 * N; Count < 2 * N; Count++)

{

AdcStore[ Count ] = 0;

Hd[ Count ] = 0;

Hm[ Count ] = 0;

}

For (Count = -N/2; Count < N/2; Count++)

{

if(Count == 0)

Hd[Count] = 1 - (2 * Fc);

else

{

Val = (-1) * sin(Wc * Count);

Hd[Count] = Val / (Count * PI);

}

}

Inc=0;

for(Count = -N/2; Count < N/2; Count++)

{

Page 135

Hm[Inc] = Hd[Count];

Inc++;

}

while(1)

{

SocRead = *SocValue;

AdcOut = *AdcValue;

AdcOut &= 0x0fff;

AdcOut ^= 0x0800;

*AdcStore = AdcOut;

OutValue = 0;

for(Count = 0; Count < N; Count++)

OutValue += (*(AdcStore + Count) * *(Hm + Count));

for(Count = (N-1); Count >= 0; Count--)

*(AdcStore + Count + 1) = *(AdcStore + Count);

OutValue += 0x0800;

*DacOut = OutValue;

*Led = 1;

}

}

PROGRAM BAND PASS FILTER

#include<fastmath67x.h>

#include<math.h>

#define PI 3.14

Page 136

void main()

{

const float Fsamp = 12000;

int Fps = 1500;

int Fst = 2500;

int N = 30;

float Fc1 = Fps/Fsamp;

float Fc2 = Fst/Fsamp;

float Wc1 = 2 * PI * Fc1;

float Wc2 = 2 * PI * Fc2;

int *SocValue,*AdcValue;

int SocRead,*AdcStore;

int *DacOut;

short AdcOut;

int OutValue,Count,Inc;

float *Hd,*Hm;

float Val;

unsigned char *Led;

SocValue = (int *)0x9004000c;

AdcValue = (int *)0x90040008;

AdcStore = (int *)0x80000000;

Hd = (float *)0x80010000;

Hm = (float *)0x80030000;

Page 137

DacOut = (int *)0x90040008;

Led = (unsigned char *)0x90040016;

for(Count = -2 * N; Count < 2 * N; Count++)

{

AdcStore[ Count ] = 0;

Hd[ Count ] = 0;

Hm[ Count ] = 0;

}

for(Count = -N/2; Count < N/2; Count++)

{

if(Count == 0)

Hd[Count] = 2 * (Fc2 - Fc1);

else

{

Val = sin(Wc2 * Count) - sin(Wc1 * Count);

Hd[Count] = Val / (Count * PI);

}

}

Inc=0;

for(Count = -N/2; Count < N/2; Count++)

{

Hm[Inc] = Hd[Count];

Inc++;

}

Page 138

while(1)

{

SocRead = *SocValue;

AdcOut = *AdcValue;

AdcOut ^= 0x0800;

*AdcStore = AdcOut;

OutValue = 0;

for(Count = 0; Count < N; Count++)

OutValue += (*(AdcStore + Count) * *(Hm + Count));

for(Count = (N-1); Count >= 0; Count--)

*(AdcStore + Count + 1) = *(AdcStore + Count);

OutValue +=0x0800;

*DacOut = OutValue;

*Led = 1;

}

}

PROGRAM BAND STOP FILTER

#include<fastmath67x.h>

#include<math.h>

#define PI 3.14

void main()

{

Page 139

const float Fsamp = 11000;

int Fps = 500;

int Fst = 2000;

int N = 35;

float Fc1 = Fps/Fsamp;

float Fc2 = Fst/Fsamp;

float Wc1 = 2 * PI * Fc1;

float Wc2 = 2 * PI * Fc2;

int *SocValue,*AdcValue;

int SocRead,*AdcStore;

int *DacOut;

short AdcOut;

int OutValue,Count,Inc;

float *Hd,*Hm;

float Val;

unsigned char *Led;

SocValue = (int *)0x9004000c;

AdcValue = (int *)0x90040008;

AdcStore = (int *)0x80000000;

Hd = (float *)0x80010000;

Hm = (float *)0x80030000;

DacOut = (int *)0x90040008;

Led = (unsigned char *)0x90040016;

for(Count = -2 * N; Count < 2 * N; Count++)

Page 140

{

AdcStore[ Count ] = 0;

Hd[ Count ] = 0;

Hm[ Count ] = 0;

}

For (Count = -N/2; Count < N/2; Count++)

{

if(Count == 0)

Hd[Count] = 1 - (2 * (Fc2 - Fc1));

else

{

Val = sin(Wc1 * Count) - sin(Wc2 * Count);

Hd[Count] = Val / (Count * PI);

}

}

Inc=0;

for(Count = -N/2; Count < N/2; Count++)

{

Hm[Inc] = Hd[Count];

Inc++;

}

while(1)

{

SocRead = *SocValue;

Page 141

AdcOut = *AdcValue;

AdcOut &= 0x0fff;

AdcOut ^= 0x0800;

*AdcStore = AdcOut;

OutValue = 0;

for(Count = 0; Count < N; Count++)

OutValue += (*(AdcStore + Count) * *(Hm + Count));

for(Count = (N-1); Count >= 0; Count--)

*(AdcStore + Count + 1) = *(AdcStore + Count);

*DacOut = OutValue;

*Led = 1;

}

}

Page 142

RESULT

Thus the design & Implementation of FIR Filter (LPF, HPF, BPF, BSF) for the given cut off frequency C

program was performed.

Page 143

DSP Mini-Project:

An Automatic Speaker Recognition System

http://www.ifp.uiuc.edu/~minhdo/teaching/speaker_recognition

Overview

Speaker recognition is the process of automatically recognizing who is speaking on the basis of

individual information included in speech waves. This technique makes it possible to use the speaker's

voice to verify their identity and control access to services such as voice dialing, banking by telephone,

telephone shopping, database access services, information services, voice mail, security control for

confidential information areas, and remote access to computers.

This document describes how to build a simple, yet complete and representative automatic speaker

recognition system. Such a speaker recognition system has potential in many security applications. For

example, users have to speak a PIN (Personal Identification Number) in order to gain access to the

laboratory door, or users have to speak their credit card number over the telephone line to verify their

identity. By checking the voice characteristics of the input utterance, using an automatic speaker

recognition system similar to the one that we will describe, the system is able to add an extra level of

security.

Speaker recognition can be classified into identification and verification. Speaker identification is the

process of determining which registered speaker provides a given utterance. Speaker verification, on the

other hand, is the process of accepting or rejecting the identity claim of a speaker. Figure 1 shows the basic

structures of speaker identification and verification systems. The system that we will describe is classified

as text-independent speaker identification system since its task is to identify the person who speaks

regardless of what is saying.

At the highest level, all speaker recognition systems contain two main modules (refer to Figure 1):

feature extraction and feature matching. Feature extraction is the process that extracts a small amount of

data from the voice signal that can later be used to represent each speaker. Feature matching involves the

actual procedure to identify the unknown speaker by comparing extracted features from his/her voice input

with the ones from a set of known speakers. We will discuss each module in detail in later sections.

Page 144

Similarity

Input

speech

Feature

extraction

Reference

model

(Speaker #1)

Maximum

selection

Identification

result

(Speaker ID)

Similarity

Reference

model

(Speaker #N)

Input

speech

Speaker ID

(#M)

Feature

extraction

Similarity

Reference

model

(Speaker #M)

Decision

Verification

result

(Accept/Reject)

Threshold

Figure 1. Basic structures of speaker recognition systems

All speaker recognition systems have to serve two distinguished phases. The first one is referred to the

enrolment or training phase, while the second one is referred to as the operational or testing phase. In the

training phase, each registered speaker has to provide samples of their speech so that the system can build

or train a reference model for that speaker. In case of speaker verification systems, in addition, a speakerspecific threshold is also computed from the training samples. In the testing phase, the input speech is

matched with stored reference model(s) and a recognition decision is made.

Speaker recognition is a difficult task. Automatic speaker recognition works based on the premise that

a persons speech exhibits characteristics that are unique to the speaker. However this task has been

challenged by the highly variant of input speech signals. The principle source of variance is the speaker

himself/herself. Speech signals in training and testing sessions can be greatly different due to many facts

such as people voice change with time, health conditions (e.g. the speaker has a cold), speaking rates, and

so on. There are also other factors, beyond speaker variability, that present a challenge to speaker

recognition technology. Examples of these are acoustical noise and variations in recording environments

(e.g. speaker uses different telephone handsets).

Page 145

Speech Feature Extraction

Introduction

The purpose of this module is to convert the speech waveform, using digital signal processing (DSP)

tools, to a set of features (at a considerably lower information rate) for further analysis. This is often

referred as the signal-processing front end.

The speech signal is a slowly timed varying signal (it is called quasi-stationary). An example of

speech signal is shown in Figure 2. When examined over a sufficiently short period of time (between 5 and

100 msec), its characteristics are fairly stationary. However, over long periods of time (on the order of 1/5

seconds or more) the signal characteristic change to reflect the different speech sounds being spoken.

Therefore, short-time spectral analysis is the most common way to characterize the speech signal.

0.5

0.4

0.3

0.2

0.1

-0.1

-0.2

-0.3

-0.4

-0.5

0.002

0.004

0.006

0.008

0.01

0.012

0.014

0.016

0.018

Time (second)

A wide range of possibilities exist for parametrically representing the speech signal for the speaker

recognition task, such as Linear Prediction Coding (LPC), Mel-Frequency Cepstrum Coefficients (MFCC),

and others. MFCC is perhaps the best known and most popular, and will be described in this paper.

MFCCs are based on the known variation of the human ears critical bandwidths with frequency,

filters spaced linearly at low frequencies and logarithmically at high frequencies have been used to capture

the phonetically important characteristics of speech. This is expressed in the mel-frequency scale, which is

a linear frequency spacing below 1000 Hz and a logarithmic spacing above 1000 Hz. The process of

computing MFCCs is described in more detail next.

Page 146

A block diagram of the structure of an MFCC processor is given in Figure 3. The speech input is

typically recorded at a sampling rate above 10000 Hz. This sampling frequency was chosen to minimize

the effects of aliasing in the analog-to-digital conversion. These sampled signals can capture all

frequencies up to 5 kHz, which cover most energy of sounds that are generated by humans. As been

discussed previously, the main purpose of the MFCC processor is to mimic the behavior of the human ears.

In addition, rather than the speech waveforms themselves, MFFCs are shown to be less susceptible to

mentioned variations.

continuous

speech

Frame

Blocking

mel

cepstrum

frame

Cepstrum

Windowing

mel

spectrum

FFT

spectrum

Mel-frequency

Wrapping

Frame Blocking

In this step the continuous speech signal is blocked into frames of N samples, with adjacent frames

being separated by M (M < N). The first frame consists of the first N samples. The second frame begins M

samples after the first frame, and overlaps it by N - M samples and so on. This process continues until all

the speech is accounted for within one or more frames. Typical values for N and M are N = 256 (which is

equivalent to ~ 30 msec windowing and facilitate the fast radix-2 FFT) and M = 100.

Windowing

The next step in the processing is to window each individual frame so as to minimize the signal

discontinuities at the beginning and end of each frame. The concept here is to minimize the spectral

distortion by using the window to taper the signal to zero at the beginning and end of each frame. If we

define the window as w(n), 0 n N 1, where N is the number of samples in each frame, then the result

of windowing is the signal

yl (n) xl (n)w(n), 0 n N 1

2n

w(n) 0.54 0.46 cos

, 0 n N 1

N 1

Page 147

The next processing step is the Fast Fourier Transform, which converts each frame of N samples from

the time domain into the frequency domain. The FFT is a fast algorithm to implement the Discrete Fourier

Transform (DFT), which is defined on the set of N samples {xn}, as follow:

N 1

X k xn e j 2kn / N ,

k 0,1,2,..., N 1

n 0

In general Xks are complex numbers and we only consider their absolute values (frequency

magnitudes). The resulting sequence {Xk} is interpreted as follow: positive frequencies 0 f Fs / 2

correspond to values 0 n N / 2 1 , while negative frequencies Fs / 2 f 0 correspond to

N / 2 1 n N 1. Here, Fs denotes the sampling frequency.

The result after this step is often referred to as spectrum or periodogram.

Mel-frequency Wrapping

As mentioned above, psychophysical studies have shown that human perception of the frequency

contents of sounds for speech signals does not follow a linear scale. Thus for each tone with an actual

frequency, f, measured in Hz, a subjective pitch is measured on a scale called the mel scale. The melfrequency scale is a linear frequency spacing below 1000 Hz and a logarithmic spacing above 1000 Hz.

Mel-spaced filterbank

2

1.8

1.6

1.4

1.2

1

0.8

0.6

0.4

0.2

0

0

1000

2000

3000

4000

Frequency (Hz)

5000

6000

7000

Page 148

One approach to simulating the subjective spectrum is to use a filter bank, spaced uniformly on the

mel-scale (see Figure 4). That filter bank has a triangular bandpass frequency response, and the spacing as

well as the bandwidth is determined by a constant mel frequency interval. The number of mel spectrum

coefficients, K, is typically chosen as 20. Note that this filter bank is applied in the frequency domain, thus

it simply amounts to applying the triangle-shape windows as in the Figure 4 to the spectrum. A useful way

of thinking about this mel-wrapping filter bank is to view each filter as a histogram bin (where bins have

overlap) in the frequency domain.

Cepstrum

In this final step, we convert the log mel spectrum back to time. The result is called the mel frequency

cepstrum coefficients (MFCC). The cepstral representation of the speech spectrum provides a good

representation of the local spectral properties of the signal for the given frame analysis. Because the mel

spectrum coefficients (and so their logarithm) are real numbers, we can convert them to the time domain

using the Discrete Cosine Transform (DCT). Therefore if we denote those mel power spectrum

~

coefficients that are the result of the last step are S0 , k 0,2,..., K 1 , we can calculate the MFCC's, c~n , as

K

1

~

~c

(log

S

)

cos

n

k

n

k

k 1

2 K

n 0,1,..., K-1

Note that we exclude the first component, c~0 , from the DCT since it represents the mean value of the

input signal, which carried little speaker specific information.

Summary

By applying the procedure described above, for each speech frame of around 30msec with overlap, a

set of mel-frequency cepstrum coefficients is computed. These are result of a cosine transform of the

logarithm of the short-term power spectrum expressed on a mel-frequency scale. This set of coefficients is

called an acoustic vector. Therefore each input utterance is transformed into a sequence of acoustic

vectors. In the next section we will see how those acoustic vectors can be used to represent and recognize

the voice characteristic of the speaker.

Feature Matching

Overview

The problem of speaker recognition belongs to a much broader topic in scientific and engineering so

called pattern recognition. The goal of pattern recognition is to classify objects of interest into one of a

number of categories or classes. The objects of interest are generically called patterns and in our case are

sequences of acoustic vectors that are extracted from an input speech using the techniques described in the

previous section. The classes here refer to individual speakers. Since the classification procedure in our

case is applied on extracted features, it can be also referred to as feature matching.

Furthermore, if there exists some set of patterns that the individual classes of which are already known,

then one has a problem in supervised pattern recognition. These patterns comprise the training set and are

Page 149

used to derive a classification algorithm. The remaining patterns are then used to test the classification

algorithm; these patterns are collectively referred to as the test set. If the correct classes of the individual

patterns in the test set are also known, then one can evaluate the performance of the algorithm.

The state-of-the-art in feature matching techniques used in speaker recognition include Dynamic Time

Warping (DTW), Hidden Markov Modeling (HMM), and Vector Quantization (VQ). In this project, the

VQ approach will be used, due to ease of implementation and high accuracy. VQ is a process of mapping

vectors from a large vector space to a finite number of regions in that space. Each region is called a cluster

and can be represented by its center called a codeword. The collection of all codewords is called a

codebook.

Figure 5 shows a conceptual diagram to illustrate this recognition process. In the figure, only two

speakers and two dimensions of the acoustic space are shown. The circles refer to the acoustic vectors

from the speaker 1 while the triangles are from the speaker 2. In the training phase, using the clustering

algorithm described in Section 4.2, a speaker-specific VQ codebook is generated for each known speaker

by clustering his/her training acoustic vectors. The result codewords (centroids) are shown in Figure 5 by

black circles and black triangles for speaker 1 and 2, respectively. The distance from a vector to the closest

codeword of a codebook is called a VQ-distortion. In the recognition phase, an input utterance of an

unknown voice is vector-quantized using each trained codebook and the total VQ distortion is computed.

The speaker corresponding to the VQ codebook with smallest total distortion is identified as the speaker of

the input utterance.

Speaker 1

Speaker 1

centroid

sample

Speaker 2

VQ distortion

Speaker 2

centroid

sample

One speaker can be discriminated from another based of the location of centroids.

(Adapted from Song et al., 1987)

After the enrolment session, the acoustic vectors extracted from input speech of each speaker provide a

set of training vectors for that speaker. As described above, the next important step is to build a speakerspecific VQ codebook for each speaker using those training vectors. There is a well-know algorithm,

namely LBG algorithm [Linde, Buzo and Gray, 1980], for clustering a set of L training vectors into a set of

M codebook vectors. The algorithm is formally implemented by the following recursive procedure:

Page 150

1. Design a 1-vector codebook; this is the centroid of the entire set of training vectors (hence, no iteration

is required here).

2. Double the size of the codebook by splitting each current codebook yn according to the rule

yn yn (1 )

yn yn (1 )

where n varies from 1 to the current size of the codebook, and is a splitting parameter (we choose

=0.01).

3. Nearest-Neighbor Search: for each training vector, find the codeword in the current codebook that is

closest (in terms of similarity measurement), and assign that vector to the corresponding cell

(associated with the closest codeword).

4. Centroid Update: update the codeword in each cell using the centroid of the training vectors assigned to

that cell.

5. Iteration 1: repeat steps 3 and 4 until the average distance falls below a preset threshold

6. Iteration 2: repeat steps 2, 3 and 4 until a codebook size of M is designed.

Intuitively, the LBG algorithm designs an M-vector codebook in stages. It starts first by designing a 1vector codebook, then uses a splitting technique on the codewords to initialize the search for a 2-vector

codebook, and continues the splitting process until the desired M-vector codebook is obtained.

Figure 6 shows, in a flow diagram, the detailed steps of the LBG algorithm. Cluster vectors is the

nearest-neighbor search procedure which assigns each training vector to a cluster associated with the

closest codeword. Find centroids is the centroid update procedure. Compute D (distortion) sums the

distances of all training vectors in the nearest-neighbor search so as to determine whether the procedure has

converged.

Page 151

Find

centroid

Yes

m<M

No

Stop

Split each

centroid

m = 2*m

Cluster

vectors

Find

centroids

Compute D

(distortion)

D = D

No

D ' D

Yes

Figure 6. Flow diagram of the LBG algorithm (Adapted from Rabiner and Juang, 1993)

Project

As stated before, in this project we will experiment with the building and testing of an automatic

speaker recognition system. In order to build such a system, one have to go through the steps that were

described in previous sections. The most convenient platform for this is the Matlab environment since

many of the above tasks were already implemented in Matlab. The project Web page given at the

beginning provides a test database and several helper functions to ease the development process. We

supplied you with two utility functions: melfb and disteu; and two main functions: train and test.

Download all of these files from the project Web page into your working folder. The first two files can be

treated as a black box, but the later two needs to be thoroughly understood. In fact, your tasks are to write

two missing functions: mfcc and vqlbg, which will be called from the given main functions. In order to

accomplish that, follow each step in this section carefully and check your understanding by answering all

the questions.

Speech Data

Down load the ZIP file of the speech database from the project Web page. After unzipping the file

correctly, you will find two folders, TRAIN and TEST, each contains 8 files, named: S1.WAV, S2.WAV,

, S8.WAV; each is labeled after the ID of the speaker. These files were recorded in Microsoft WAV

format. In Windows systems, you can listen to the recorded sounds by double clicking into the files.

Page 152

Our goal is to train a voice model (or more specific, a VQ codebook in the MFCC vector space) for

each speaker S1 - S8 using the corresponding sound file in the TRAIN folder. After this training step, the

system would have knowledge of the voice characteristic of each (known) speaker. Next, in the testing

phase, the system will be able to identify the (assumed unknown) speaker of each sound file in the TEST

folder.

Question 1: Play each sound file in the TRAIN folder. Can you distinguish the voices of the eight

speakers in the database? Now play each sound in the TEST folder in a random order without looking at

the file name (pretending that you do not known the speaker) and try to identify the speaker using your

knowledge of their voices that you just learned from the TRAIN folder. This is exactly what the computer

will do in our system. What is your (human performance) recognition rate? Record this result so that it

could be later on compared against the computer performance of our system.

Speech Processing

In this phase you are required to write a Matlab function that reads a sound file and turns it into a

sequence of MFCC (acoustic vectors) using the speech processing steps described previously. Many of

those tasks are already provided by either standard or our supplied Matlab functions. The Matlab functions

that you would need are: wavread, hamming, fft, dct and melfb (supplied function). Type help

function_name at the Matlab prompt for more information about these functions.

Question 2: Read a sound file into Matlab. Check it by playing the sound file in Matlab using the function:

sound. What is the sampling rate? What is the highest frequency that the recorded sound can capture

with fidelity? With that sampling rate, how many msecs of actual speech are contained in a block of 256

samples?

Plot the signal to view it in the time domain. It should be obvious that the raw data in the time domain

has a very high amount of data and it is difficult for analyzing the voice characteristic. So the motivation

for this step (speech feature extraction) should be clear now!

Now cut the speech signal (a vector) into frames with overlap (refer to the frame section in the theory

part). The result is a matrix where each column is a frame of N samples from original speech signal.

Applying the steps Windowing and FFT to transform the signal into the frequency domain. This

process is used in many different applications and is referred in literature as Windowed Fourier Transform

(WFT) or Short-Time Fourier Transform (STFT). The result is often called as the spectrum or

periodogram.

Question 3: After successfully running the preceding process, what is the interpretation of the result?

Compute the power spectrum and plot it out using the imagesc command. Note that it is better to view

the power spectrum on the log scale. Locate the region in the plot that contains most of the energy.

Translate this location into the actual ranges in time (msec) and frequency (in Hz) of the input speech

signal.

Question 4: Compute and plot the power spectrum of a speech file using different frame size: for

example N = 128, 256 and 512. In each case, set the frame increment M to be about N/3. Can you

describe and explain the differences among those spectra?

The last step in speech processing is converting the power spectrum into mel-frequency cepstrum

coefficients. The supplied function melfb facilitates this task.

Page 153

Question 5: Type help melfb at the Matlab prompt for more information about this function.

Follow the guidelines to plot out the mel-spaced filter bank. What is the behavior of this filter bank?

Compare it with the theoretical part.

Question 6: Compute and plot the spectrum of a speech file before and after the mel-frequency

wrapping step. Describe and explain the impact of the melfb program.

Finally, complete the Cepstrum step and put all pieces together into a single Matlab function, mfcc,

which performs the MFCC processing.

Vector Quantization

The result of the last section is that we transform speech signals into vectors in an acoustic space. In

this section, we will apply the VQ-based pattern recognition technique to build speaker reference models

from those vectors in the training phase and then can identify any sequences of acoustic vectors uttered by

unknown speakers.

Question 7: To inspect the acoustic space (MFCC vectors) we can pick any two dimensions (say the 5 th

and the 6th) and plot the data points in a 2D plane. Use acoustic vectors of two different speakers and plot

data points in two different colors. Do the data regions from the two speakers overlap each other? Are

they in clusters?

Now write a Matlab function, vqlbg that trains a VQ codebook using the LGB algorithm described

before. Use the supplied utility function disteu to compute the pairwise Euclidean distances between the

codewords and training vectors in the iterative process.

Question 8: Plot the resulting VQ codewords after function vqlbg using the same two dimensions

over the plot of the previous question. Compare the result with Figure 5.

Now is the final part! Use the two supplied programs: train and test (which require two functions

mfcc and vqlbg that you just complete) to simulate the training and testing procedure in speaker

recognition system, respectively.

Question 9: What is recognition rate our system can perform? Compare this with the human

performance. For the cases that the system makes errors, re-listen to the speech files and try to come up

with some explanations.

Question 10: You can also test the system with your own speech files. Use the Windows program

Sound Recorder to record more voices from yourself and your friends. Each new speaker needs to provide

one speech file for training and one for testing. Can the system recognize your voice? Enjoy!

their IP video surveillance cameras

Page 154

The eight new IP cameras for video surveillance in HD incorporate Samsung Techwin DSP

WISENET III chipset developed by the company, offering innovative features and demands by

installers and users.

the demand for installers and users with the development of chipset DSP WISENET III, now installed in its

eight new IP HD cameras, for this technology to automatically become the preferred choice when a new

video surveillance system is specified or when an existing one is updated, offering new features demanded

by installers and users.

Techwin IP cameras offer innovative features like face detection, both frontally and in profile, or the cut of

the same scene (multi-cropping) areas, which optimizes the use of network and bandwidth, since the cut

scene only areas of interest to the user views.

Another of the most innovative technological features is P-Iris, providing greater depth of field,

contrast and clarity, as well as better control of the iris.

Advanced motion detection with improved anti-noise system for masking certain areas and 'ignore'

those objects that do not meet the size specified by the client, for example, objects smaller than a cat or

larger than a truck, so as feature lights, clear images for more heavy rain, fog or smoke, are other

innovations.

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