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IECONOI : The 27th Annual Conference of the IEEE Industrial Electronics Society

A Generalized Framework for Sampled-Data Model analysis of ClosedLoop PWM DC-DC Converter System
Muhammad Mansoor Khan

Wu Zhi-Ming

Department of Automation
Shanghai Jiaotong University
Shanghai 200030,
P.R. China
mkhancn@yahoo. corn

Department of Automation
Shanghai Jiaotong University
Shanghai 200030,

Abstract - In spite of the facct that, sampled-data models of
PWM dc converter systems (PDCS) are more accurate and
natural, little effort has been made to use sampled-data
techniques for stability analysis and synthesis of closed-loop
PDCS. Instead, averaged models are typically used for control
loop design, while detailed simulations are used for validating
closed-loop performances. Recent developments in sampleddata control have resulted in new powerful tools for analysis
and synthesis of periodic-system. Time lifting of continuous
time signalshystems is one of such tools. In this paper, we will
introduce a generalized framework for sampled-data analysis of
dc-dc converter system based on continuous time lifting of
signalkystem. This framework will provide an adequate ground
to tackle the hybrid nature of these systems. It has been shown
that the general discrete-time model of a PDCS is equivalent to
a time-lifted model for this class of systems and closed loop
PDCS local stability problem can be described by an equivalent
time-lifted system, which is finite rank linear discrete-time
problem. Hence well-established analysis techniques in
sampled-data control can instantly be applied for analysis of
these systems. A system composed of two parallel buckconverters has been analyzed to demonstrate the proposed

I. Introduction
Averaged models are continuous time, simple in their
representation and well describe the systems low frequency
characteristics [1,2]; consequently these models are typically
used for control-loop design. Sampled-data models of
converters are accepted to be more accurate than their
averaged counterpart; hence they are employed for detailed
simulation of a closed-loop converter system [3-61. This can
be important especially in studying dynamical behavior that
averaging is known not to capture well [2,7,8]. However
these models were not considered suitable for design and
analysis purpose in the past because of their hybrid nature.
Recent progress in sampled-data control system has resulted
in development of various mathematical tools to handle
periodic system. One such tool is the lifting technique for
continuous time signals [9-121, which transform a time
periodic system to a LTI system, mapping between two
Hilbert spaces. As DC-DC converters are also quasi-periodic
systems, time lifting technique can provide a better way of
representing these systems.
In this paper, we will introduce a unified framework for
modeling closed-loop PDCS using time lifting technique.

Unlike past approaches (e.g. Verghese, et a1 [5] and Fang,
Chieh and Abid [6]) where, controller is taken as a part of
power stage in modeling the closed loop system, we propose
a more flexible framework, where each unit has been
modeled independently and are later integrated to obtain
closed loop system model. It has been shown that under
some mild conditions, the power-stage of converter system
can conveniently be represented by an operator in Hilbert
space. A small signal model for analysis and design purpose
can be obtained by linearizing this system at operating point.
Closed-loop system model can readily be obtained by
combining the power stage. Later necessary and sufficient
condition for local stability has been given. An example has
been given to elaborate the usehlness of the proposed

II. Closed-loop system modeling
In this section, we will introduce a more systematic way to
obtain sampled-data model for closed-loop system. In
contrast to former approaches, each system module will be
modeled separately and will be integrated later to obtain
closed-loop system. Let 1' 1 I p I- represents a set of
real-valued sequences in Banach space. The usual signal
space and extended signal space in continuous time will be
represented by Lp w ] and L:
-1 respectively.


~ ~ p [ O , h represents

a sequence in Banach space such that,

each of its element is a continuous signal in LPIO,h].
Consider a PDCS fulfilling the following three assumptions:
1) the switching is regular. That is the switch turns on only
once in a cycle according to some predefined control law. 2)
It is operating at fixed frequency. 3) All circuit topologies,
the system assumes are linear. Let system's duty-ratio at time
t and its time period be represented by d(t)' and h
respectively.. Next we define the lifting of continuous time
signal as given in [lo]. For further details refer to [9-121

' In this paper we will consider all signals vector valued. In
reference [IS] authors have devised a method to model power stage
of multi-converter system operating at same frequency. In that case
vector-valued duty-cycle is required.

0-7803-7 108-9/01/$10.00(C)200 1 IEEE



can be considered as special cases of generalized model. (assumption 3) we can write above equations as2 We will call the above model (3) as generalized model of single PDDC power-stage. the duty cycle input can be represented by a sequence in Banach space 1' as dk = d(kT). constant.IECON'O1: The 27th Annual Conference of the IEEE Industrial Electronics Society so: Definition 1. Let U.p[O. The fundamental difference in present notation and the former notation [3-61 is that. Following above definition and [ 1 11 we have where the latter is equipped with norm where Now we will briefly describe the system model for each stage. + {P}. -1 and l. this mapping gives a norm-preserving isomorphism between Lp[0.U(kh + e). As a consequence of assumption 3. 0 I 0 < h The kth element represents. we consider U. U(kh+ e).d(kh)). For instance. vector-valued signals have been transformed to signals.{dk}. Now we will introduce the Fourier bases for all infinite dimensional operators in above equation. Furthermore considering variation in xk .. Under these conditions.V E L:[O. to a function-space valued sequence (9)k>y=O 3 W. d(kh)). discrete state-space system. Let the system state at the end of each cycle be represented by the sequence Let F represent an operator. all the signals were either discrete or continuous. we have following model for systems power stage Considering the dependency of the system on its statevariables and input to be + B.. Discrete models developed in past. W. which take on values in a general Banach space as opposed to finite-dimensional space.-] represent the input and output voltages respectively.=~ ~ ( 0:=) q(kh +e). Time-Lifted Model for + 8. As the PWM converter (assumption 2) is operating at fixed frequency. the output of converter during each cycle can be determined by the system state at the end of previous cycle and system input during the be negligibly small. Above equation represents a general model for power-stage. is defined to be a lifting-operator if it maps a f i c t i o n 9 on [O.-] V(kh+ e) = F(xk.001 . represents state evolution operator and 0 I 8 < h . finite dimensional vector-valued function of time. I < p < 00. := v. When considered over Lp[O. by assumption 1. Here for simplicity of notation. in the former notation.00 (C)200 1 IEEE 82 1 .. A. This model covers almost all sort of basic PDDC. 0-7803-7108-9/01/$ 10. The purpose of this subsection is to introduce a more generalized sampled-data model of power-stage. discreteaveraged model of power-stage used in [4-71 can be obtained from the above model by restricting the signals space in (3).h] ' where G. in general.. In contrast to finite dimensional sampled-data model. which maps xk . we can * Application of operator should not be confused with multiplication in the following operator equations. Sampled-data model can readily be obtained by lifting the signals in above system. whereas in present notation. cycle to the system output in the same cycle. [3-61 notational model developed in this section will describe the power-stage of a converter as infinite dimensional vectorvalued input/output. an intersample signal at the kth step. and system input in the k'. E 1'. k = 1. x((k + 1)h) = G(xk.

S1: x:+~ = AoxL + Bod:. Let the continuous-time representation for the controller be given by following set of state equations 0-7803-7108-9/01/$10. Time-lified Model for Controller. gain of pulsewidth-modulator and input signal respectively. (8) 0 Where a. which samples the output of the controller once at the start of each cycle and its output is proportional to the controller output-value at sampling instant.). the linearized model of PWM converter S 1. d' and y' are variations in output and output respectively. ~ ( 7 -k T ) d ' ~ k 2 0 . controller CO and pulse width modulator P1 in cascade is equivalent to a closed-loop system. The output in (4) can be rewritten as where 111. It is obvious that the response of overall feedback system at instant t = kh formed by closing the loop among. ~ ( t are ) the impulse function. In this section we will integrate the subsystems models obtained in previous sections to obtain overall system model. where t PO : z(t)= g J ~ ( T ) . formed by S 2 and C3 (see figure 1.IECON'O1: The 27th Annual Conference of the IEEE Industrial Electronics Society linearize (3) around an operating point x . To complete this section 822 . (4) Lifting of above equations results in the following timelifted model for the controller [ 1I]. To this point we can write the output of pulse-width modulator as. we will call the generalized sample-hold in cascade with controller and pulse width modulator as discretized controller. Time lifted equivalent for pulse width modulator is given by Without loss of generality. note that both systems possess same state variable. u which . we will take g equal to one. pulse-width-modulator connected at its output can be considered as a sampling device. C.Width Modulator. ~ . rk+Dc Pk(O1 Absorbing E (8) (6) into the controller input results in the following discrete time controller Modeling Pulse. Cascading pulse width modulator (10) at the output of the controller in (1 1) results in the following overall controller system At this point.00(C)2001 IEEE To be consistent with existing literature [9-121. Considering the ripple at the output of controller very small. results in the following local system model. we define discrete-time system. Furthermore. Closed-loop system Modeling and Stability Analysis. (7) zk =cc B. g.

. Consequently first harmonic component effect to the overall system response turns out to be more insignificant. 2)Construct the time lifted model of the linear controller in cascade with pulse width modulator (equation (3. . R=33mR.... It can be shown that higher order unmodeled dynamics in PDCS can be described as perturbation in controller model.. V..... This framework is also suitable for discrete time controller analysis and synthesis....~ k . By internal stability... (s + 8.. 4)Apply general LTI stability test to check system stability. The scope of present framework is not limited to the stability analysis of closed loop system.. is a .... . All simulations have been done using Matlab.. Nonlinear simulation of system in example (stable system) 823 . we have taken zero order and first order approximation of the converter power stage. Fourier components taken in case of first order approximation are average. For comparison.6Q C = 126 p F ..... V........IECON'O1: The 27th Annual Conference of the IEEE Industrial Electronics Society . = 224..0 1 2 3 4 (b)Time in Seconds 5 7 6 la-' Figure 2..... R .... as a result the components of matrix G corresponding to the first harmonic have smaller norm (second and third column of matrix G in A5). The system is composed of two identical buck converters in parallel with the following parameters L=l13pH.....low pass system with a gain at 160khz... Here we will only mention system parameters.9 x 10-3k..... = 140V.... R.07 and kz=l in both cases are given in Table 1.... Now to demonstrate the application of proposed framework. and PO (equations (l). / (/8380 s + I).. For details on obtaining the system model see [15]. Observe that the maximum of the norms ratio of row of CO(equation A4) corresponding to the first harmonic component to the average component has very small values (approximately .. QntinuDu rirnc CO*k 44 Example.... we mean that the state of the system is exponentially convergent to zero given any initial condition... 23dB less than at 10 kHz..011). The voltage loop controller C.. its utilization is not limited to continuous system alone.. It is operating in master-slave configuration with current sharing compensator equal to Dicntind chdmlh C.00 (C)2001 IEEE C" (s)= 3. Hence this shortcoming does not impose a serious limitation. As controller is modeled independent of the power-stage of converter. for voltage-loop/current-loop instability.. = 17... 3) Obtain overall system model as indicated in theorem 1. 139l 0 1 2 3 4 5 Z I 7 6 (a) Time in Secods io3 l\j E2 .. Closed-loop time-lifted system...25pS. we will take the following bench mark problem of parallel buck-converter system described by Rajagoplan et a1 [14] as an example.. The following theorem states the stability of overall system. Linearized system matrices at the operating point are given in appendix A.. we now address the issue of over all system internal stability... (s)= 4 0 ~ 1 0 .. and k2 are tuning parameter. Table 2 gives the roots of A.......9R and has time-period h = 6.. Exact system trajectory between switching instant can also be included by incorporating a detailed model of pulse-width modulator... and the voltage loop compensator assumes the following value. Hence in case of unstable controller more accurate model of PDCS is required.. = 0..... 2 9 ~1O5Xs + 2 . To summarize the results of this paper. Theorem 1..... 0-7803-7108-9/01/$10... Figure 1... 1)Construct a time lifted model for PDCS power stage with output approximation as described in section 11. and (10) respectively) is locally stable if and only if the equivalent discretized controller of the form C3 (13) stabilizes the discrete system S2 (7).5 x 1O3 1s + 4... Because of their poor performance in presence of system non-linearity and noise.. 4 3 ~ 1 0 ~ ) 1.. (8).. sine and cosine coefficients matrices..4)). Where k.... appropriate algorithm for controller synthesis can also be developed in this framework. The eigenvalues of Af (for stable closed loop system) for kl=0... Proof: see Theorem 4.. here we give a brief algorithm to obtain closed loop model of PDCS... As a result closed-loop system matrix Ay also remains almost unaltered....43 x 10" s(s + 5 ... It will result in an LTI system model. unstable controllers are less likely to be used in practical application of PDCS.. CO. The hybrid closed loop system formed by closing the loop among the systems SO... [ 131. Further. .

0423 0. New approach to sampled-data systems: A hnction space method. Y.E. IEEE Transactions on Automatic Contro1.820-83.0375.0480 modeling and analysis of closed-loop PWM DC-DC converters. 1994. vol. Iwens. 0. pp.0.~ Figure 3.9932 f i 0.1902. 1976. K. 0. 0. vol. pp. Abed.2183. Francis and T.2184. “Generalized computer-aided discrete time-domain modeling and analysis of DC-DC converters” IEEE Transactions on Industrial Electronics and Control Instrumentation. 76.0. 17. Lehman and R.IECON’O1: The 27th Annual Conference of the IEEE Industrial Electronics Society Table1 -L 1405 Eigenvalues of stable closed-loop system.1258.9485. [7] J.. Sampled-data modelling of switching regulators. 39 pp. 0. : Proceedings. kl=0.1891. Middlebrook.79-88. Bamieh. Brown and R. 0.Lee. 0. 0. 0. A. Verghese. [5] G.. Pearson. “Chaos in a current-mode controlled boost DC-DC converter” IEEE Transactions on Circuits and Systems-I: Fundamental Theory and Applications. Toivonen. no.2 165.9484 0.C.. R. J. Middlebrook and S. Tannenbaum. A. 0. 1996. 0. A lifting technique for linear periodic systems with applications to sampled-data control. [4] A.0378. Cuk.0558. no.. Kassakian.B. 0. References [ l ] R.. 0.2189. 1.110-115. 0. optimality criterion. 1986. 1. It has been shown that under some mild assumptions. “A general approach to sample-data modeling for power electronic circuits” IEEE Transactions on Power Electronics.9900. pp. Bass.0000 f 0. Stability theory for linear time-invariant plants with periodic digital control. IECI-26. and J. vol. no.0366.45-54. M. pp. 1992. Deane. Utilization of this frame for controller synthesis will be reported in fitture. [8]C. Automatica. pp.0362. 89-98. 824 . pp. 1988.” in IEEE Power Electronics Specialists Conference Record. Elbuluk. IEEE International Symposium on Circuits and Systems. 1979. Tse. B. ISCAS 1999. Eyad H. 11.21 55. 28. pp.H.=0. Chung-Chieh.985 1 f i 0. [14] Rajagopalan. 0.9866. [3]F.9847 system 05 1 15 2 25 (a) Time in Seconds 3 35 I 4 0.” IEEE Transactions on Circuits and Systems-I: Fundamental Theory and Applications. 1994. pp. Nonlinear simulation of system in example (currentloop instability) Closed-loop poles in case of unstable system. Systems and Control Letters. IEEE Transactions on Automatic Control. [9] H.0378. 0. 39.0.09741.0.0368. Georgiou.” IEEE Transactions on Power Electronics. B. Triner.9629. 2. 41. 18-34. IEEE Power Electronics Specialists Conference Record..0423 I ” order. Discussion Notion of continuous time lifting has been introduced to model PWM dc-dc converters.AC-33 pp.703-713. An example has been given to demonstrate the proposed algorithm. A generalized framework for analysis of PWM dc-dc converter closed-loop system has been developed. Sampled-data 0-7803-7108-9/01/$10. 680-683.07 & kz=l (D 140 L1 2 1395 -931 0 0. vol. Guo.K. 1990. Sampled-data control of continuoustime systems with an H .0.0. 1991. [ 111 B.9929 f i 0.Y. 0. This framework provides a unified approach to analyze various phenomena in dc-dc converter with different levels of complexity.R.89. V. F. without harmonics c3 -g O- - 0 U 05 1 2 25 (b) Time in seconds 15 3 35 4 Table 2 10.0476. 349-369.00 (C)21DO 1 IEEE 1 Voltage-loop instability k.9861 f i 0. 1\2.D.T.985 l’h i 0. [12] Yamamoto Y. pp. J. 1981. CDC. pp. vol.2155. 0. 0.D.1882-1887. [ 101 Y.9900. A Function Space Approach to Sampled-Data Control Systems and Tracking Problems. [2] B. Francis. 16-23.81& k2= Current-loop instability k1=007&k ~ 1 2 I I I 0. no. “Flip bifurcation and chaos in three-state boost switching regulators. in proceedings of 29th.M. 1.2175. R.0. and A.0534.Yamamoto.9866.G.9484. A.9887 f i 0. [I31 B. 0. v 5 pp. 58-439. 0.C. and J. 8. T.0.P. Yuan Yu. Xing. power stage of PWM dc-dc converter can be modeled as a nonlinear time-lifted system. “Switching frequency dependent averaged models for PWM DC-DC converters.2 189. Lee.C. [6] Fang.1281. 1992. “A general unified approach to modelling switching-converter power stages.

Modeling And Dynamic Analysis Of Paralleled DCDC Converters With Master-Slave Current Sharing Control.0120 0.0256 0. Appendix A.1145 12.0543 .2320 -0.0.0767 0.0007 0. Bruce. 0 4 3 9 ~10.0.0273 1 0. M.0012 12.0003 0.6150 i - D~a~eroged (b) First order approximationof power stage 4 sin 0.0003 .9961 -0. [15] Khan M.0543 0.1145 0. aB/ad.2350 0.9667 -0. r (a) In the case of zero order approximation and for system parameters given in example 2. Large Signal Modeling of Distributed PWM DC-DC Converters System.0264 4.9667 0-7803-7 108-9/01/$10.0004 4.0273 0. pp.0078 . following are the linearized converters-system matrices.9833 Do = [aQ/dd.' .9983 -0.0 . aD/ad.9833 .6168 -0.0 .0239 0.0767 0.0007 0.0007 0.00421 .0.0 . = [aB/adl aB/ad*] 0.9833 -0.0123 0.2320 0.0042 12.] = -0.6168 .00 (C)2001 IEEE Dll 4 825 = 0. 1 3 6 4 ~10-3 .0.0215 .0021 4.2609 12. considering dutycycles as input and averaged inductors currents and capacitor voltage.9667 -0.0078 .0.0273 .0.0120 0. 0 4 3 9 ~l o 3 . .0123 0.0244 0.0007 . to be appear in PCIM 2001 Conference proceedings.9974 output 0.0244 1 Do = DVcm A. APEC'96.0.2609 =[ 0. = -0.0003 0. ] = 1 0.678-6841996.0004 0.9667 B.0256 0. and Zhi-Ming Wu.2350 -0.0273 .9833 0.0012 -0.IECON'Ol: The 27th Annual Conference of the IEEE Industrial Electronics Society Manners.0264 -0.0008 .0543 0.0239 - Bo= [aB/ad.0.0215 0.0. Part 2.0.9989 0.0003 ' .