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The University of Toledo Section __________


EECS:3400 Electronics I
Dr. Anthony D. Johnson Student Name __________________________________________

Electronics I
Final Examination

Problems Points

1. _____ 10

2. _____ 12

3. _____ 14

Total _____ 36

Was the exam fair ?

yes

no
The University of Toledo s05fs - 2
EECS:3400 Electronics I
Dr. Anthony D. Johnson Student Name _______________________________________

Problem 1 10 points
Given is a nonlinear circuit with two ideal diodeshown in Figure 1.1. Determine the values of two

R1 D2 R2

+ + VM= 8V R1=2kΩ
VM V1 D1 V2 VN
VN=7V R2=1kΩ

Figure 1.1 A circuit with ideal diodes.

indicated voltages V1 and V2, and of the currents through the diodes.
Hint #1 For full credit, give answers to all questions, prepare all required circuit diagrams, write
all equations for which the space is left, and show all symbolic and numerical expressions
whose evaluation produces shown numerical results.
An explicit demonstration of understanding the following solution steps is expected.
1 1.1 Make an educated guess as to the bias conditions of the two diodes in the circuit of Figure 3.1, and
show your guess by checking the conditions on all four lines below,
true false not
applicable
x __ __ the diode D1 is forward biased,
__ x __ the diode D1 is reverse biased,
__ x __ the diode D2 is forward biased,
x __ __ the diode D2 is reverse biased.
1.2 Construct the linear circuit which results when the ideal diodes in the circuit of Figure 1.1 are
2 replaced by their models for the biasing condition guessed in Section 1.1. Show the electrical
model of the constructed circuit in the space reserved for Figure 1.2.

Substituting the ideal diodes D1 and D2 by their equivalent circuits for the states guessed in Section 1.1,
gives the circuit of Figure 1.2 (by the definition of an ideal diode, a forward biased diode has an internal
resistance of zero Ohms, and the internal resistance of a reverse biased diode is infinite).
R1 R2
A2 C2

ID1
+ V1 A1
V2 +
VM VN
C1

Figure 1.2 The circuit with ideal diodes replaced by their models for the states guessed in Section 3.1.
The University of Toledo s05fs - 3
EECS:3400 Electronics I
Dr. Anthony D. Johnson Student Name _______________________________________

1.3 To check the validity of the guesses made in Section 1.1, perform an analysis of the circuit of
3 Figure 1.2 to determine the voltage across the diodes which were guessed reverse biased, and to
determine the current through the diodes which were guessed forward biased.
Hint #2 For a meaningful process of performing the analysis, the positive reference directions of
these voltages/currents must be shown in the circuit of Figure 1.2. Failure to show those
positive reference directions reduces the credit for this part to 0.1.
Since no current flows through the resistance R2 in the circuit of Figure 1.2, the voltage V2 at cathode
C2 is equal to the emf of the ideal voltage source VN. At the same time, the voltage V1 across the forward
biased diode D1 is equal to 0V.

VC2 = V2 = VN= 7V (1.3-1)

VA2= VA1 = VD1= 0V (1.3-2)


VD2= VA2 - VC2 = 0 -7 = -7V (1.3-3)
Which shows that the potential at A2 is 7V below the potential of C2, confirming that diode D2 is reverse
biased in the circuit of Figure 1.2.
To formally check the guess about the bias condition of diode D1, one ought to determine the direction
of the current flowing through D1 in the circuit of Figure 1.2. If the current of D1 is in the positive
reference direction (anode to cathode), then D1 is forward biased; otherwise, the guess was wrong.
Writing the KVL equation for the loop containing VM, R1, and D1, by summing the voltage rises in the
positive reference direction of the current ID1 one obtains,

VM - ID1 R1 - V1 = 0 (1.3-4)

when solved for ID1, equation (3.2-2) gives

VM - V1 8-0
ID1 = = = 4mA (1.3-5)
R1 2⋅103

The obtained positive value of the current ID1 means that the current flows through D1 in the positive
reference direction of ID1, which confirms that diode D1 is forward biased in the circuit of Figure 1.2.

1.4 To make a conclusion as to whether the bias conditions of both diodes were guessed correctly or
1 not, compare the result of the analysis performed in Section 1.3 with the guesses made in Section
1.1, Indicate your conclusion by appropriate checks on both lines below,
true false not
applicable
x __ __ the biasing condition of both diodes has been guessed correctly,
__ x __ the biasing condition of one, or more diodes has been guessed incorrectly.
If the biasing condition of at least one diode was guessed incorrectly, repeat the steps of Sections 1.1
through 1.4 using the free space on the opposite page.
The University of Toledo s05fs - 4
EECS:3400 Electronics I
Dr. Anthony D. Johnson Student Name _______________________________________

1.5 When the biasing conditions of all diodes have been guessed correctly, determine and write into
2 the space reserved below the values of the voltages V1 and V2 which are indicated in the circuit
of Figure 1.1.

Since now both guesses which led to the equivalent circuit of Figure 1.2 have been found correct, the
results of the analysis performed on the circuit in Figure 1.2 are valid for the circuit of Figure 1.1.
Consequently, by equations (1.3-1) and (1.3-2),
V1 = 0V V2 = 7V

1.6 When the biasing conditions of all diodes have been guessed correctly, determine and write into
1 the space reserved below the values of the currents flowing through diodes D1 and D2 in the circuit
of Figure 1.1.

Since the ideal diode D2 is reverse biased, it does not conduct any current, so ID2=0A. The current
through diode D1 has been determined by equation (1.3-5). Hence, the two current values,

ID1 = 4mA ID2 = 0A

Problem 2 12 points
Given is the electrical model of a BJT inverter circuit, shown in Fig.2.1
VCC

RC
vO
RB
vI Q1

Fig.2.1 Electrical model of the BJT inverter circuit.

and given are the following inverter parameter values,


a) transistor b) other circuit elements
- IS=2.10-16A - rb= 0 - base resistor RB = 12 kΩ
- βF=100 - re= 0 - collector resistor RC = 2 kΩ
- βR=1 - rc= 5.5 - power supply voltage VCC= 5V
- vBES=0.8V - vCES=0.2V
- vBEon= 0.7V
For the given BJT inverter prepare:
(a) the value of the voltage VOH(2), the "high" value of output voltage vO when the inverter is
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EECS:3400 Electronics I
Dr. Anthony D. Johnson Student Name _______________________________________

driving (is loaded by) the inputs of two identical inverters,


(b) the value of the voltage VOH(5), the "high" value of output voltage vO when the inverter is
driving (is loaded by) the inputs of five identical inverters.

Hint #1 For full credit, give answers to all questions, prepare all required circuit diagrams, write
all equations for which the space is left, and show all symbolic and numerical expressions
whose evaluation produces shown numerical results.
In your solution, show explicitly the following steps.
2 2.1 In the space reserved for Figure 2.2(a) prepare a drawing of the electrical model of the circuit in
which the given inverter is driving (is loaded by) two inverters identical to itself.

VCC VCC

RC RC RC RC

RB RC
vO RB
B2 C2
Q2
RB + +V
RC C1 VBES CES
RB
Q1 VOH(2) B1 VOH(2)
C3
+ E1 RB B3
VCES
vI RB
+
Q3 VBES+ VCES

(a) (b)

Fig.2.2 Electrical model of a BJT inverter loaded by two identical inverters

2.2 In the space reserved for Figure 2.2(b), prepare a drawing of the electrical model of the circuit in
2 Figure 2.2(a) when the value of the input voltage vI is "low", i.e. vI=VCES. In the electrical model
of Figure 2.2(b), replace transistors which are driven into their cut-off/saturation region of
operation by their piecewise linear models for the corresponding region of operation.

2
2.3 Using the circuit model from Figure 2.2(b) as a reference, prepare the expression of the voltage
VOH(2) in terms of the circuit parameters. Show the process and the prepared expression in the
The University of Toledo s05fs - 6
EECS:3400 Electronics I
Dr. Anthony D. Johnson Student Name _______________________________________

space reserved for formula (2-1).


RB
2 RC
VOH(2) = VCC + VBES
RB RB
+ RC + RC
2 2

RB 2RC (2-1)
VOH(2) = VCC + VBES
RB + 2RC RB + 2RC

1
2.4 Calculate the value of the voltage VOH(2) using the given circuit parameter values, Show the
calculation and the result in the space reserved for equation (2-2)
RB 2RC 12 2⋅2
VOH(2) = VCC + VBES = 5+ 0.8 = 3.95V (2-2)
RB + 2RC RB + 2RC 12 + 2⋅2 12 + 2⋅2

2
2.5 Based on the derived formula (2-1), derive the formula in terms of circuit parameters for VOH(5),
the "high" output voltage when the inverter from Figure 2.1 is loaded by five identical inverters.
Show the process, and the prepared expression, in the space reserved for formula (2-3)

RB 5RC
VOH(5) = VCC + VBES (2-3)
RB + 5RC RB + 5RC

1
2.6 Calculate the value of the voltage VOH(5) using the given circuit parameter values, and show the
calculation and the result in the space reserved for equation (2-4).

RB 5RC 12 5⋅2
VOH(5) = VCC + VBES = 5+ 0.8 = 3.95V (2-4)
RB + 5RC RB + 5RC 12 + 5⋅2 12 + 5⋅2

VOH(2) = 4V VOH(5) = 3.1V


The University of Toledo s05fs - 7
EECS:3400 Electronics I
Dr. Anthony D. Johnson Student Name _______________________________________

Problem 3 14 points 3

Given is an astable multivibrator circuit shown in Fig.3.1(a). The circuit has been manufactured using
contemporary CMOS VLSI technology which yields minimum size inverter gates characterized by the
following parameter values,
- highest input voltage recognized as V(0), VIL = 1.5V - lowest output voltage, VOL=0V
- lowest input voltage recognized as V(1), VIH = 1.8V - highest output voltage, VOH= VDD
- propagation delay time, τPD= ? - power supply voltage VDD = 3.3V.

In order to determine the propagation delay time of the inverter gate, the waveform of the voltage v1,
shown in Figure 3.1(b), has been captured by a digital storage oscilloscope, and following the capture
the time interval measurement function of the oscilloscope has been applied to obtain the duration of the
time interval (0,t1) = t1 = 80ns.

v1
VDD

v1 v5 t
0 t1
(b)
(a)
v5
VDD

t
0 t1
(c)

Fig.3.1 A multivibrator circuit. (a)Electric circuit model of the multivibrator. (b)Waveform of the multivibrator’s voltage v1.
(c)Space reserved for the waveform of the multivibrator’s voltage v5.

Based on this measured value of t1, determine the propagation delay time of the inverter gate τPD and
some other parameters of the multivibrator circuit in Figure 3.1(a), and provide solution to subproblems
3.5 and 3.6.

Hint #1 For full credit, give answers to all questions, prepare all required circuit diagrams, write
all equations for which the space is left, and show all symbolic and numerical expressions
whose evaluation produces shown numerical results.
Solution 3
An explicit demonstration of understanding the following solution steps is expected.

3.1Determine the period of oscillations T of the given multivibrator circuit, and write the result in the
3 space reserved for equation (3-1).
The University of Toledo s05fs - 8
EECS:3400 Electronics I
Dr. Anthony D. Johnson Student Name _______________________________________

As determined by the captured voltage waveform in Figure 3.1(b), time period (0,t1) spans exactly four
periods of oscillation of the multivibrator circuit. Consequently,
t1 80
T= = = = 20ns (3-1)
4 4
3.2 Determine the frequency of oscillation f1 of the multivibrator circuit in Figure 3.1(a), and write
1 the result in the space reserved for equation (3-2).
1 1
f= = = 50MHz (3-2)
T 20⋅10-9

3.3 Determine the propagation delay time τPD of the inverter gates in Figure 3.1(a), and write the
3
result in the space reserved for equation (3-3).

Since the period of oscillations of the multivibrator circuit from Figure 3.1(a) is related to the
propagation delay time of the inverters by the equality (3-3),
T = 2nτPD
where n is the number of inverters, solving equation (3-3) for τPD gives,
T 20
τPD = = = = 2ns (3-3)
2n 2⋅5
3.4 Determine the frequency of oscillations f2 of the multivibrator circuit which is derived from the
2
circuit of Figure 3.1(a) by doubling the number of inverter gatess in the circuit of Figure 3.1(a);
write the result in the space reserved for equation (3-4)..
Since the multivibrator circuit of Figure 3.1(a) contains five cascaded inverters, doubling the number of
inverters would result in a cascade connection of ten inverters. As ring oscillators of this type must
contain an odd number of inverters in their loop, the circuit with ten inverters would not oscillate at all.
The frequency of oscillations of the derived circuit would, therefore, be equal to zero.
f2 = 0 Hz (3-4)

3.5 Prepare a sketch of the waveform of the multivibrator’s voltage v5, which is indicated in Figure
3
3.1(a); show the prepared waveform in the space reserved for Figure 3.1(c).

3.6 From the prepared sketch in Figure 3.1(c) observe the value of the voltage v5(t1), and write the
2
result in the space reserved for equation (3-5).

Voltage v5 lags the voltage v1 by four propagation delay times of the inverter gate. One half of the period
of oscilations of the multivibrator is equal to 5τPD; hence,

v5(t1) = v1(t1 - 4τPD) = 0 V (3-5)

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