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Chapter Leaders
Dave Monk

Mike Young

Marcel Dierselhuis
Micro Montage

Henne van Heeren
On Stream

Thomas Griego
Surfect Technologies

Owen Bishop
Alcon Laboratories



Introduction and Background .....................398
Die Level.....................................................403
Bonding and Packaging ..............................405
Device Level ...............................................406
Reliability and Media Compatibility ..........407
System Level...............................................421
Standardization of Interfaces ......................422
Packaging Strategy and Trends...................423
Packaging Types .........................................433
Conferences and Symposia .........................434
Packaging and Assembly Services..............434

Weijie Yun
Everest Technologies

Doug Elerath
Djinco LLC

Dave Feicht
TechSearch International, Inc.

Mike Chapman


Executive Summary
There are many references by MEMS experts as to the high percentage of the product cost
attributed to the “Back end” (i.e., package and test). This percentage has been cited as high as
70% of the total cost. Packaging has not until recently received the research and development
attention it deserves as a key enabler for microsystems commercialization. Packaging has often
been referred to as the “Achilles Heel of MEMS Manufacturing” and a key “Bottleneck” in the
process of MEMS commercialization.
A significant amount of attention is now being directed at packaging concerns. Packaging
was an afterthought for most MEMS designers and manufacturers only a few years ago. Now it
is part of the initial design process as mentioned by many notables such as Dr. Steven Senturia
(see the Design, Simulation, and Modeling chapter for further insight). It is this second question
that will dominate packaging and assembly over the next 5 years in order to make the majority of
MEMS devices cost-effective and more ubiquitous in the marketplace. Therefore, a chapter in
this MST Roadmap has been dedicated to the challenges of packaging.
Assembly of MEMS devices utilizes many engineering and design tools and supporting
infrastructure for microsystems. There is a trend for MEMS specific packaging and assembly
tools from EVG, Karl Suss, Micro Montage, TNO and many others. But, to date, many MEMS
devices are developed using equipment not specifically MEMS-oriented, but more likely
standard semiconductor industry equipment that has been modified somewhat (“Force-fit
Prototyping” see the Introduction chapter). As discussed in both the IC and Non-IC related
chapters, there are many application specific processes in MEMS. Nowhere is this more
apparent than in MEMS packaging. More often than not, this application specific approach leads
to a trial-and-error approach to packaging design and implementation.
There is a trend toward the “Product Family” concept in microsystems. This occurs when the
same core MEMS device is utilized in several applications causing the manufacturer to package
the device in several different ways, depending on the environment where the device will finally
be used. For example, in vivo, bioMEMS devices have to be encapsulated so that they are truly
non-invasive. MEMS devices used in engine performance sensing must be temperature resistant,
while other MEMS devices used in space applications will have to be radiation hardened. Thus,
since there are so many different types of MEMS devices being developed for use in nearly


every conceivable market, there are at least double the amounts of packaging methods that have
to be considered.
Often, the MEMS industry is likened to the semiconductor industry in its nascent days. At
that time, the semiconductor industry faced many of the same issues with packaging ICs because
the expensive packaging was often considered an afterthought. Over time, the semiconductor
industry separated into two completely different fields with very little overlap: front-end and
back-end (packaging). It is quite possible that the MEMS industry can learn lessons from their
semiconductor counterparts and design-in manufacturability and packaging concerns starting
with the early prototype concepts.
This chapter focuses on the recent developments in MEMS packaging, as well as discusses
the future of this sub-industry. One of the more promising approaches to MEMS packaging
appears to be the “Supply Chain Method” and this process is discussed.


1.0 Introduction and Background
Packaging remains a major obstacle to the commercialization of MEMS devices. Other than
the few fully commercialized device types (e.g., air bag triggers, ink-jet print-heads, pressure
sensors, and a few medical devices), packaging constitutes the single largest element of cost and
a major limitation to the miniaturization potential. This chapter will address both the design and
materials aspects and the methods and procedures used.
Robust Packaging is at once an obstacle and an opportunity in the Microsystems and Top
Down Nanosystems arena. We explain this point by point in the next several paragraphs and
throughout the chapter. Fir instance there are:
1) No standards: Major limitations include the lack of standards and standardized
methodologies. This is due in part to a common assumption that more conventional methods and
standards used for integrated circuits are “Sufficient,” in part to the need to adapt these methods
and standards to develop the required infrastructure for the commercialization of microsystems,
and in part to the greater roles, degree of integration, and interfacing of microsystems with their
2) Lack of trained personnel (and lack of MEMS assembly curriculum): Packaging has been
a critical but less glamorous and less valued aspect of microsystems development. Much of the
current limitation is also attributed to the trade off between company trade secrets and the need
for development of the microsystems industry. Packaging relies on systems engineering, and is
severely under populated. According to sources at the IPACK 2001 conference, the total annual
need for systems engineers is 1500 – 2000 in the U.S. and 20,000 globally. The current annual
production is less than 200 in the U.S., and 500 worldwide. This gap is widening, and the
amount of expected new jobs will reach six times the annual number of graduates by 2002.
Further, there is a widening of a skills gap in this arena. This skills gap occurs not only for all
trained technological professionals but also for the manager’s needed for trained professional
personnel in management levels.
This skills gap is being actively met by academia. There is an increasing interest in
universities trying to meet this need. The number of universities that now offer curriculums in
this area has increased from less than 10 to nearly 50 worldwide in the last 15 years. Schools


of Hong Kong. KAIST. control charts. etc.g. Osaka in the Far East and Franhofer Berlin – TU and Helsinki in Europe have all taken up the challenge.) • Lot-to-lot variability of materials properties • Coupling of packaging modeling with reliability (and media compatibility) modeling We must strive to remember that Packaging is both a noun and a verb (we often use “Assembly” as the verb).. Cornell and Albany State. This concept captures the invasiveness of the value and issues in Micro and Top Down Nano packaging. 399 . validation of models • Measurement techniques for materials parametrics (e. It also includes the assembly methods and procedures used to prepare the device for its intended application. • Lack of modeling: materials properties for package materials. protect and interface the MEMS device. etc. City Univ. Oregon State. The two limitations above are compounded by many others including but not limited to: • Being a small customer for several materials. Lehigh.such as Arkansas. As with any measurement device.. Otherwise similar devices may be applied in vastly different environments. in North America. Stanford. a piezoelectric pressure device may be used to measure cryogenics or plasmas-extremely different environments. package modeling tools. equipment. University of California Berkeley. incoming/outgoing inspection. For example. Packaging includes the materials and design used to encapsulate. dynamic range is a critical parameter.

reliability. and continue into the integration stage. 400 . Production Flow Schema for Microsystems A general schema for production flow of microsystems is shown in Figure 1. and accuracy. Trends are shown in Figure 2.Product Integration Packaging Assembly Fabrication Design Production Flow Figure 1. We illustrate the evolutionary role of packaging and assembly as the level of complexity and integration has been advanced. Packaging and assembly options are determined in the design stage. Modularity is an important trend. Critical factors include cost. Packaging and assembly often begin at the wafer level.

thus outside the scope of the road mapping effort.Reliability Accuracy $3-complex Modularity Critical Dimension $2-medium complexity $1-simple 98 00 02 05 Year Figure 2. analogous to methods used for integrated circuits. This chapter addresses the first three of these levels for MEMS/MST. A Four Level Approach to Packaging Integrated Circuit Chip/Module Card Board System MEMS Die Device Subsystem System Accuracy must be comparable to existing macroproducts. as described in Table 1. Trends in Critical Dimensions A four level approach is used to describe current thinking. Reliability must be high. The important trends shown are for cost (as a percentage of product prices) and 401 . and is essentially a flat line. Table 1. The system level is considered more conventional and application-specific. and has shown slow and steady improvement with added operating experience.

field of view) • Thermal (operating and storage temperatures. mechanical..g.g. Microsystems consist generally of MEMS devices. For some very simple devices. stints and accelerometers). energy conversion. RFI and nuclear sources). actuation. Costs for complex devices (“$3”) have shown more dramatic decreases in part due to the increasing trend in modularity. 402 . Other more complex devices (e. chemical and biological analysis systems. Think. and is described more fully in this works introduction found in Chapter 1. and/or fluids (pneumatic. thermal shock) • Chemical (design for intended environment. Costs for “Simple” devices (“$1”) and those of medium complexity (“$2”) have shown comparable decreases. compression and deflection) • Mechanical (including shock and vibration) • Electrical (includes static. Microsystems may provide sensing. current for power and signal) • Optical (intended wavelengths. optical. protect against others) • Radiation (including EMC/EMI. Because MEMS is used often in sensor or actuator products. and many require communications with the “Outside World.” Some types simply provide structural strength in critical roles. shear. They must be provided with power. Input/output parameters may include electrical. voltage. or combinations of these functions. signal conditioning and packaging. Communicate. Others provide increasingly complex functions and logical sets of functions. particularly in vivo systems) present extremely complex packaging requirements. performance requirements allow a high degree of isolation from the environment (e. Act. except in the case of passive devices. hydraulic or other fluids)..modularity. and (get) Self-Power.” This is described in Table 2. This gives rise to taxonomy to classify devices according to their abilities to “Sense. which may be in direct conflict with the desire to isolate the electronics for improved reliability performance. Packaging serves several important roles. such as a stint used to reinforce a weakened artery wall. it must interact with the environment. including: • Structural (including tension. Packaging is used to protect and enable the system.

Taxonomy of MEMS/Microsystems Type 1 2 3 4 5 6 7 Sense Think Act Communicate Power Example Stint Temperature Regulator Remote Monitor Alarm Drug Dispenser Lab on Chip The types vary in complexity and the required degree of integration from Type 1. and sawing (for detailed descriptions of these terms please see the glossary).g. Current versions of “Lab on a Chip” are principally used in-vitro. bonding.0 Die Level Four steps are commonly performed at the die level as: passivation. 2. but in-vivo products are also being developed. isolation.Environment Communication Transducer Transducer CPU ASIC. through the “Lab on a Chip” used to collect and analyze samples and to report results. Output Driver Sensor Memory Actuator Power Table 2. to reinforce a weakened section of artery wall). These are intended to provide protection in handling and in use.. The self-sufficiency required for this latter application adds significantly to the complexity and reliability requirements. Conventional separation of the die from the wafer involves sawing with a high-speed diamond blade while spraying the wafer surface with highpurity water. which provides structural strength only (e. Signal Conversion ASIC. This method developed for integrated circuits was effective because the critical 403 .

Anodic bonding is commonly used to bond silicon to glass. These may include protection against mechanical. PSG. Overlays. A base die and a “Cap” die are used. Bonding methods include anodic. poor conductivity. epoxies. Passivation includes the use of a protective layer. Protection from these must be decided in the design stage. optic and/or fluid channels through the encapsulated structure. Coatings. and radiation embrittlement. isolation provides the required exposure to the intended environment while masking or shielding all unintended environmental characteristics. generally made of plastics. dry and harden. Other alternatives include the choice of ceramic or metal cans. depending on the application. An alternative to bonding the cap to the substrate is the application of a gel coating. Knowledge of the intended application environment (parameters to be sensed as well as environmental threats) supports the choice of methods and materials. particularly under temperature extremes.components on the die are protected from silicon dust and water by surface coatings. Eutectic solder bonds also provide reliable bonds and may be used for hermetic sealing. typically a silicon-based gel product. solder. or both. also limiting effective life in many applications. lack of shielding. fusion. and silicon-based compounds. The internal atmosphere may be a vacuum or an inert gas. chemical. Interface with the “Outside World” is then accomplished using electrical. It provides a reliable bond and may be used to form a hermetic seal. Ideally. etc. cavities. The use of cavities in silicon die is common practice. The MEMS device is bonded to the base die. MEMS have more complex structures. thermal. These compounds often require treatment of the MEMS device with a very thin (atoms thick) layer of a noble coating to prevent damage or destruction 404 . moving parts. a coating or an overlay. glass-frit. Plastic encapsulated microdevice structures (“PEMS”) are less common in MEMS applications due to their limited strength. are more effective in many applications but are more expensive to use and often take more space. (sometimes polymide). Protective layers of 2 – 3 microns of organic materials are effective except that they stiffen with age. and radiation environments where these are not parameters to be measured by the device. and a more complex 3D geometry that are easily damaged or destroyed by water. Die-level passivation materials are most often inorganic: PECVD silicon nitride/oxynitride. dust. and the cap is then bonded over the device to form a sealed cavity. silicon dioxide.

aluminum 6061 – T6. processed at these temperatures reverts to a form with ~ 20% of its previously rated strength in tension and in shear. a common form used for its structural strength. and thus compatible with aluminum. For example. RTV.22] Si-Si Si-Si Glass-Si Si-Si Glass-glass Au Oxide - 370 >150 >250 >850 <400 [1. etc. Ranges of techniques that are available are listed in Table 3. Silastic. this was a problem for fusion bonding which used temperatures above 10000C. The downside to these is that they have no strength in tension and are subject to environmental aging. and provide protection from shock and vibration.27] [1. Epoxy bonding is popular where materials can tolerate the resins and adhesives used.26. 3. The higher temperatures required in this process leads to a tradeoff between the allowed temperature and the type of solder used.31] 405 . Caution is needed in the manufacturing process to prevent loss of these properties by changing the form of the aluminum.28.23. do not require elevated temperatures in curing. 1.23. 1. and have cost advantages. glass bonding Eutectic bonding Fusion bonding Anodic bonding Substrate Si-Si.25] [1.30. more recent developments have brought the bonding temperature down to below 4000C. However. Glass-Si Glass-glass Si-Si Intermediate layer Spin-on adhesives Temperature [0C] Room temp Reference Boron glass 450 [1. For many years. the permitted temperature is extremely limited due to the presence of aluminum.from the soldering process. 1. Bonding can occur at both the wafer and die level (flip chip etc..1. Aluminum is available in many forms having different mechanical properties. and generally requires much lower temperatures. 1. Some Examples of Bonding Techniques Bonding method Gluing Low temp. If bonding is to be performed at the end of the processing.29.g.). In these applications it is important that the bond is mechanically strong and the seal is maintained. The downside to these is the loss of strength with aging and the potential for caustic damage to the materials themselves both in manufacture and in use. Silicon-based adhesives (e. 1. Table 3. These techniques are further illustrated in Figure 3.24.) are simpler to use.1.0 Bonding and Packaging In many applications sealed cavity or protection against excessive movement is required.

Power inputs are either electrical or fluidic. French) 406 . optical and/or fluidic inputs.4. Figure 3. and thermal protection requirements are similar to microelectronic product requirements. and outputs as (“Data”).0 Device Level The device level is normally comprised of the MEMS device. This is an area where modular design is promoting increased performance while reducing size and costs. and the lack of standardization and standard products has impeded commercialization. Five Examples of Bonding Technqiues (Courtesy of P. Each of these commonly requires compensation for its environment to reliably perform within the device’s operating range. MEMS interfaces are more complex and comprehensive than microelectronics. Figure 4 shows an example of “Conventional” packaging in a metal can. and mechanical and electrical interfaces to the system. pressure sensor ports and other physical and energy domain ports as (“Control”). “Signal” interfaces include electrical. power and signal conditioning and compensation.

hydraulic/pneumatic and wiring attachments to be reliable throughout the specified environmental range. ultrasonic thermosonic.Figure 4. a packaged. piezo-resistive pressure sensor has the following metallic regions prone to corrosion: Al lines under passivation. thermal fusion. In most of those environments.0 Reliability and Media Compatibility There are considerable opportunities for low-cost MEMS sensors that can withstand longterm exposure in the environments listed above. and thermal environments is called media compatibility. electrical. For example. mechanical. Au wires. This ability of a sensor to perform its specified electromechanical function over an intended lifetime in the chemical. and thermocompression methods. even “Specified Environmental Range” has not been commonly defined by application. the metallic regions of a sensor would quickly corrode resulting in catastrophic failures and in less drastic cases in electrical output alteration. 5. vapor deposition (physical or chemical). 407 . mechanical. It is evident that MEMS devices could not operate in the environments listed above without some form of passivation or protection. Bonding methods include epoxies and other adhesives. Conventional Packaging Approach (courtesy SNL) Bonding includes structural. and Au-plated lead frame. Al bond pads. bulk micromachined.

or in the case of the devices that are by design made to be displacement sensitive.1. reduction of stresses caused by time dependent deformation mechanisms. 408 . The task is especially difficult for devices that are designed to measure “Sense” the change in force or displacement (piezoresistive or capacitive pressure sensor). Motorola) 5.Leadframe Wirebond Silicone Gel Diaphragm Unibody Package Die Attach Silicon Die Figure 5. such as some of the capacitive inertial sensors. Photograph of the Motorola Pressure Sensor in “Unibody” Package (left). and prevention of mechanical failure of the package during service. piezoresistive force sensors. a Closer View of the Pressure Sensor Die (right) and Schematic Cross-section of the Motorola Bulk Micro-machined Pressure Sensor in “Unibody” Package. such as pressure sensors. for the assembly of stress sensitive devices. and considerable effort has been devoted to the optimization of the package designs and packaging materials to alleviate these problems. Mechanical considerations for MEMS packages fall into one or more of the following four categories: minimization of residual stresses induced during the fabrication of the package.1. However. or capacitive accelerometers. 5. (Courtesy Dave Monk. The reduction of package-induced stresses to the level that will not affect the output is of utmost importance for the performance of MEMS sensors.1. The last issue is of concern for all varieties of semiconductor devices. minimization of stresses induced by external loads. Thermo-Mechanical Effects Mechanical consideration There are many mechanical considerations for evaluating the design of a MEMS or semiconductor device. the first three considerations frequently drive the design of the sensor package.

In the case of surface mount packages. Vibration The sensor package must provide efficient transmission of the inertial forces to the sensing device. and so is the adequate isolation from the outside effects. may affect the sensor response by causing a shift in offset and/or sensitivity. 5. below an already very fine resolution of the sensing element. This requirement might direct the selection of packaging materials and specifics of package geometry (such as leads length and dimensions).1. important to avoid the resonance effect. The operating frequency range for an accelerometer is proportional to the fundamental natural frequency of the sensing structure. the properties and thickness of solder require due consideration. Reduction of the residual stresses is usually accomplished by adequate material selection and certain processing requirements. To a package designer. The high sensitivity of these devices is a much-desired property. however. it is often not enough to provide isolation of the die from the deformations caused by changes in temperature and outside forces. Stress change Minimization of the residual stresses in the package and device is an important requirement. These time-dependent deformations. Consequently.The MEMS sensors are usually designed to detect extremely small changes of stress or displacement. therefore. Moreover. This is why packaging MEMS sensors is a very challenging task: the deformation level usually allowed in most semiconductor packages has to be significantly reduced. 409 . acceleration transmission must be provided for the full range of operating frequencies. therefore. the high sensitivity imposes very serious requirements regarding the stress isolation of the die.2. The die must also be protected from the changes in mechanical equilibrium due to the time dependent deformation mechanisms that can take place within the package in the absence of the change in outside stimuli. may compromise the sensor performance and reliability. The magnitude of these stresses is not of a big concern because the parts are trimmed after manufacturing and offset and sensitivity is adjusted relative to the stress state. and. 5. In the case of an inertial sensor. The real problem is a change of stress. although very small. the fundamental frequency of the package and the whole system represented by the package attached to the printed circuit board should lie outside the intended operating frequency range of the system. It is.1.3.

The trend of the computed strain is almost identical to the trend of the measured offset (Figure 7c). on electrical output. exerted from the package to the sensing die. Also. Figure 6. However. which in turn. Because of that.). resulted in the displacements of sensing trampoline structure and a consequent change in capacitance. Motorola). 410 . The applied load caused deformations of the die. the lead frame flag and die attach are used for placing the die at the desired location. Geometrical considerations primarily include the die placement.The effect of stress change on the electrical output of a MEMS device is explained here using the example of a Motorola medium g z-axis accelerometer (Figure 6. the voltage offset was recorded. In all three cases. Different counter-measures are usually taken to reduce the stress. The 1lb force was applied in a vertical direction at three different locations on the sensing die. for post molded plastic package usage it would be ideal for a MEMS die to be embedded in a thermoset material and in that way constantly exposed to an almost hydrostatic stress state. These examples illustrate that these changes will be detected by the sensing element and causes a shift in electrical output. The changes in the mechanical equilibrium of the package are transferred to the die. The output of a mechanical analysis shows strains on the substrate where the sensing element was anchored (Figure 7b). The same experiment was carried out numerically (Figure 7a). Motorola Medium g z-axis Accelerometer (Courtesy Dave Monk. An experiment was conducted to simulate the effect of a stress change. It is generally beneficial that the die is placed closer to the package neutral axis and/or closer to the axis of symmetry. this is not feasible from the processing standpoint. These counter-measures are often focused on changes in geometry of the package as well as on the use of alternative package materials.

humidity.00E+00 3 5 4 Force location Figure 7b 411 .00E-05 2. The change in mechanical equilibrium in the package in the absence of outside forces can be caused by different mechanisms.00E-05 0. Delamination and separation of interfaces are complex processes influenced by the residual stresses.Protection from the time dependent deformation mechanisms is a very delicate task. temperature. Substrate strain due the 1lb for Figure 7 (a) 7. and temperature. The extent of the creep effects is a result of material properties. The two most common ones are: creep of materials. and delamination (or separation) of interfaces.00E-05 4. and the environment.00E-05 1. These mechanisms and their evolution are a function of many different parameters.00E-05 5.00E-05 6.00E-05 3. residual stresses. and chemical preparation of interfaces.

2 0. The gap is designed to remain open over the operating temperature range of the device. in the case of the Motorola medium g accelerometer. the problem of device shift due to die coat creep. The gap size varies with temperature. this is unacceptable. which means a failure for a MEMS device. The modeling results of the processing steps involved are illustrated in Figure 8. It is a property difficult to characterize and adequately model. Relaxation is a function of many parameters. (a) The Finite Element Model (the die coat and a portion of the mold compound were removed as it was done in the experiment) (b) Substrate Strain (numerical result). a gap is created between the die coat and the mold compound. but can often undergo creep (relaxation) over time. Sometimes Chip Coatings used to Alleviate the Bending Introduce Additional Unknowns into the System. different remedies have to be utilized to overcome this problem. For sensors that provide safety functions such as airbag sensors in vehicles. Consequently.1 0 3 5 4 Force Location Figure 7C Figure 7. Creep of package materials can cause drift in electrical output. Result of a 1 lb Force Applied at Different Locations on the Sensing Die. For example. 412 . Materials with visco-elastic properties are often used in MEMS packaging. (c) Offset Shift (test result) Elements Introduce Bending in the System.3 0.Offset shi due to the 1 force (Volt 0. At a given temperature the gap size is a function of the coefficients of thermal expansions of the materials in the package as well as of the length of the die and the thickness of the die coat. was resolved in the following way. During processing of the post molded plastic package.4 0. Because of their low stiffness these materials enable isolation for the die from the comparatively stiff mold compound and lead frame. intrinsic to material as well as extrinsic (temperature and stress).

Thermomechanical parameters that are of the highest importance are: coefficient of thermal expansion (CTE). the selected die coat material should have the glass transition temperature that falls outside the device operating temperature range as was successfully reported. For materials that undergo a phase change.4. in a two chip plastic package inter-chip wires are partly covered by the die coat while the remainder of the wire is in the mold compound. the stress reduction is usually accomplished by selecting materials with similar CTE’s. A sudden change in phase (i.e. For example. a glass transition temperature can be a very important parameter to consider. For this reason. Since the temperature change is an outside stimulus important for MEMS packaging. and relaxation properties.. A sudden change in the die coat state from rubber to glass (these are the formal names for the polymeric phases) can cause breakage of the inter-chip wires at the mold compound-die coat interface. Material selection A very important part of the package development is the selection of materials.5. glass transition temperature. filler content. elastic moduli.1. Step 1: The Die Attach Process Step 2: Dispensing and Curing of the Die Coat: T = 150C Step 3: Cooling Back to Room Temperature: T= 25C Step 4: Curing of Mold Compound: T = 160C 413 . material stiffness) can compromise both the performance and the reliability of the package.

Deformed Configurations of the Part at Different Stages of the Manufacturing Process.1. This is particularly true in the case 414 . and (3) obtaining experimental results is much faster than developing theoretical models. (Modelling results: colors represent vertical displacements. numerical. Although useful.5. The most noticeable one is the absence of theoretical models that would provide better understanding and more comprehensive modeling treatment of certain phenomena. (2) doing destructive tests is fairly cheap. experimental results are of a limiting value. Process Steps. it is convenient to conduct tests since they can be done on the real size samples. A Two-chip Post Molded Plastic MEMS Package. depending on type and complexity of the problem. since the electronic parts are inexpensive. It should be noted that MEMS packaging faces similar problems as standard electronic packaging. Development of theoretical models is a necessity for both a meaningful advance in the electronic packaging field and improvements in cycle time. Experimental. 5. Methods Design processes for MEMS packages incorporate standard tools and methods used in the design of IC packages. displacements are exaggerated for clarity). Experimental techniques on the other hand are largely in use. Die coat Mold Compound IC die Sensing device die Lead frame Figure 9. and analytical methods are utilized. Their prevalence is a result of several factors: (1) in the electronic packaging field.Step 5: Finished Product: T = 25C Figure 8.

A typical automotive specification includes a mixture of iso-octane and toluene (Fuel C or carburant) often with ethanol or methanol and corrosive water added to it. noncorrosive gas environments. battery acid (H2SO4) vapors. washing machine). is applied by overmolding on a fully assembled device onto a lead frame. some automotive specifications call for an exposure to salt water and/or strong acids. and medical markets. The bias voltage typically used is 5 V and this will enable very high corrosion rates in most of the environments listed above. silicon pressure sensors have been specified for dry. the transmission of the 415 .1. The use of this type of sensor along with the flow or chemical sensors could dramatically increase in the automotive. The corrosion mechanism on an unprotected device can be general corrosion induced by bias voltage. a thermosetting polymer. 5. the encapsulation material must allow a direct contact with the environment. die attach failure. For example.2.2. For example. A sensor exposure to pH of 11 solution of NaOH/NaHCO3 is an example of an industrial application in water pumps. engine oil. gasoline. and housing material failure.of MEMS packaging with its specific and delicate requirements for higher precision and lower uncertainty level in package performance. Chemical Environment Applications The ability of the MEMS devices to operate in potentially corrosive environments will be of critical importance in the introduction of these devices into new markets. In addition. White-goods applications most often require exposure to alkaline aqueous solutions (e. galvanic corrosion silicon etching. 5. In the early days of MEMS sensors. In a typical IC encapsulation. However. windshield washing fluid. the most common MEMS sensor is the piezoresistive pressure sensor. in the case of pressure sensors. industrial..g. etc. engine protection additives. This kind of protection is relatively simple to apply and it provides reliable protection from corrosive chemicals. transmission oil. Medical applications often call for exposure to bodily fluids. for example. However. interconnect failure. diluted HNO3. automotive “Under-the-hood” applications. require the operation in different fluids in the temperature range from –50°C to 150°C. such as an epoxy. Traditionally. There has been a significant body of primarily patent literature on the media compatible sensor design. media compatibility solutions were sought that were analogous with the traditional IC industry.

Bulk Micro.pressure signal to the diaphragm and the over-molding process cannot be used. which would selectively protect metallic areas of the device. increase in the final package size. pressure sensor) or through use of a “Cap” wafer. This uniqueness of MEMS devices had led to a plethora of specific methods for achieving media compatibility.. These gels are dispensed in thick coatings (on the order of millimeters) and can be dispensed to completely 416 . When mixed together the gel components cure under a specified regime. 5. such as polymeric diaphragms.” Numerous possibilities exist for the selection of the right barrier coating for the particular application. and limited temperature range. Other diaphragms.2.or two-part siloxanes that are used to fill the packaging cavity and protect the silicon die and metallic parts of the assembly from the corrosive environment.2. One part usually comprises a base polymer and a catalyst and the second part contains a crosslinker. but the most common ones are silicone gels and conformal coatings. The critical disadvantages using this approach are high cost. Barrier coatings The simplest way to provide protection for a MEMS sensor in a corrosive environment is to use “Barrier Coatings. Several other somewhat elaborate packaging means have been cited in the patent literature. Silicone gels are one. Schematic Diagram of the Stainless Steel Diaphragm for Piezoresistive. The most successful media compatible solutions for MEMS pressure sensors include use of a stainless steel diaphragm and a silicone oil pressure transmission fluid to isolate the silicon (Figure 10).g. Another technique for developing a media compatible pressure sensor is to use silicon through either a backside exposure (e.machined Pressure Sensors. have also been used to isolate the sensor from the corrosive media. Diaphragm Silicone Oil Figure 10.

conformal coatings.3.fill the sensor package cavity or they can also be selectively dispensed to critical areas (Figure 11). gases) transport or diffusion through the coating. have found a widespread use for protection of electronic devices from humidity (Figure 12). The most common failure mechanism is corrosion under the coating. the features that allow output adjustment based on modeling. The Device is protected with a Conformal Coating such as Parylene C. A Schematic Diagram of the Motorola Pressure Sensor in “Unibody” Package. in most cases. They have. each with a slightly different formulation. 5. Figure 12. Failure mechanism Despite their advantages. Several vendors provide these materials. The advantage of using Parylene was found in its thickness uniformity and repeatability. have very little effect on the device’s electrical performance.2. and because of that. delamination of the 417 . Even in these thicknesses the materials can affect the device performance because of their relatively high modulus. SiC or SiNxHx. barrier coatings do not provide ideal protection in many environments. such as Parylene C. Silicone Gel Figure 11. ions. A Schematic Diagram of the Motorola Pressure Sensor in “Unibody” Package. Thin. The Device is protected with Silicone Gel. charge transfer at the interface in an electrochemical reaction. very low modulus. These coatings are usually deposited in a chemical vapor deposition process in thicknesses on the order of several microns. The main steps in the overall process are the reactant (water.

the reasons for device failure are very difficult to analyze as they stay unresolved and preclude any process improvements. 418 .coating at the cathodic site. One of the reasons for this is the lack of reliable testing techniques for rapid screening of coating candidates and processes and early detection of corrosion failures under barrier coatings. Very few analytical techniques exist for quantifying the media compatibility of a given device. the realization of media compatibility for MEMS sensors remains elusive or hitched to very specific applications without widespread importance. Ions. REACTANTS (Water. Despite numerous efforts over the years. some of the methods and fabrication processes developed to address the challenges for MEMS based devices will be described. 5. and ions is essential for this process to occur. The development of the reliability engineering techniques specifically for MEMS sensors will be one of the key conditions for the further advancements or breakthroughs in media compatibility solutions. but the diffusion of oxygen. Wafer Level Packaging In the fabrication of sensors using MEMS technology. Any defects in the coating accelerate this process. Some of these methods have been derived from basic electrochemical techniques and used to test the reliability of pressure sensor devices. Gases) COATING M INTERFACE M+ SUBSTRATE Figure 13. A Schematic Diagram of the Failure Mechanism under the Coating Showing the Electrochemical Anodic (metal dissolution) and Cathodic Sites. efforts have been made to alleviate some of the packaging challenges in the device design and fabrication process itself. and finally. water. In this section.3. In many cases. general corrosion or dissolution of metal at the anodic site (Figure 13). This diffusion of the reaction components can occur through the bulk material or through the coating interface with the device as a result of insufficient adhesion strength.

In some processes. As a specific example. and small footprint.A MEMS device. This cap is formed at the wafer level using either a planar integrated fabrication process or by an additional wafer made of silicon. This method. after the completion of the processing. or quartz. manufacturability. The photoresist is then removed in oxygen plasma and the device is finally released. the released sensor is protected by a cap or cover. low cost. LPCVD polysilicon can also be used to form the integrated cap. The planar cap is formed by using deposited layers such as polysilicon. Therefore. silicon nitride. has to be protected from the environment not only during the entire process of fabrication. at the wafer level. which is a surface micromachined resonator. In addition. This problem is addressed in design by using stiff suspensions systems or in processing by using low surface tension films such as self-assembled monolayers or teflon-like polymers. is susceptible to particulate contamination. where adhesion forces are developed during the release process. these devices are susceptible to the effects of the subsequent processes of sawing and assembly.g. Because the sensors. However. in many cases. after being released from the substrate. 419 . There are a number of techniques that have been developed to address this issue. The wafers with the dried resist are then sawed and the device is then placed in a package. The specific method followed depends on the technology used to fabricate the sensor. the problem of stiction. In this case. In a number of processes. while being functional. but also in the application environment. can also cause catastrophic failure. Silicon-rich silicon nitride is typically used since it has low tensile stress and is capable of being deposited to a thickness of 1micrometer without cracking. an additional layer of sacrificial material is deposited on top of the sensor structure followed by the structural material of the cap. phosphosilicate glass) is deposited on top of the sensor structure. vertically or laterally. convenient lead transfer. is again immersed in a readily etched polymer such as photoresist. an additional sacrificial layer (e. The issue of protecting the suspended sensor from the saw and assembly operations is typically addressed by a combination of design and process.. In addition. Some of the requirements for a cap structure are a highly hermetic seal. etc. such as an inertial sensor. glass. The integrated cap structure is then formed using LPCVD silicon nitride anchored to the substrate. the sensor. the sensor package is covered with a hermetic lid made of metal or ceramic. respond dynamically to the sensing environment. Next. they are suspended from the substrate and are capable of motion.

It also enhances the mechanical strength and resistivity to crack propagation in the final glass bond. the composite wafer is ready for probe. The two wafers are bonded at temperatures greater than 500°C and under an appropriate bond pressure. The wafers are then diced through the open cavity where the bond pads are exposed using a saw and assembled using the bonded wafer as the package. compression bond. based on selectivity of the etch chemical to structural and isolation layers. the etch holes or ports must be sealed. A schematic representation of the capping process is shown in Figure 14. metal eutectic bond. a refractory filler. and glass frit bond. The cap wafer is then aligned to the device wafer and bonded by applying thermocompression to form a hermetic seal. A silicon wafer that is bonded to the device wafer is another method used to form the cap structure. a silicon cap is bonded using a glass frit process. A number of methods for bonding the cap wafer have been developed: anodic bond. It is also important that the CTE of the frit glass closely matches that of the silicon. Once the device is released by the sacrificial layer etch. Therefore. The frit glass contains a base glass. 420 . The use of silicon for the cap wafer minimizes the difference between the thermal coefficients of expansion (CTE). and a “Vehicle. A screen-printing process is used for glass paste application. the effect of ambient pressure on the protective cap also needs to be considered. The cap wafer is produced by patterning and wet etching the silicon substrate to create cavities on the wafer. An adhesion layer is used to establish permanent bond between the two wafers and to act as a spacer. the etch ports are placed at the periphery of the cap or shell. In addition. In the development of the Motorola z-axis accelerometer. The cavities allow access to metal bond pads for probe testing.” The filler is added to decrease the base glass CTE.additional etch holes used to enable the removal of the entire sacrificial layer must be incorporated in the cap layer. The “Vehicle” provides fluidity and gives strength to the pre-fired glass body. The frit glass wafer bonding technique involves bonding of a micromachined silicon device wafer to a bulk micromachined silicon cap wafer. When the bond process is completed. The wafer is allowed to dry and then glazed at a high temperature to burn off the organic binder and sinter the glass. will determine the size of the device. The maximum distance that can be released using the sacrificial etch process.

mechanical. shock. packaging is simple and is well handled using inexpensive batch processes. Some 421 . Gravity. complexity. In the first case.Cavity Etched Wafer Device wafer Bond Aligner Screen print glass paste Align device and cap wafer Wafer Bonder Bond wafers Clear glass Figure 14. Modeling and simulation are important tools used to supplement traditional finite element analyses. such as accelerometers used for air bag triggers. There is a wide range of application-dependent constraints. Primary differences lie in the number. to industrial process sensors that may be exposed to severe thermal. and types of interfaces with the application environment and in the size and constraints on handling fixtures and equipment. These are essential elements of the infrastructure that must be borrowed or adapted from the microelectronics industry or developed specifically for Microsystems. the product function is dependent on controlled exposure to the environment it must sense and interact with while requiring protection from many aspects of the environment that can readily defeat such functionality. the major force in macrosystems. Tolerances are significant at these scales. In the more complex cases cited. has much less effect at these scales and other forces must be understood and accounted for in the assembly and packaging process. pressure. MST users must define the environment as well as other conditions required for device utility in order for a systems approach to be taken and then the designers. Another important aspect is the period of performance. to in-vivo devices that must survive conditions within the body.0 System Level Packaging and assembly at the systems level converges with that required for microelectronics devices for many types of products. 6. manufacturers and packagers of a Micro or top down Nano device must work together to provide solutions rather than components. to deep space applications with wide variations in temperature. These range from hermetically sealed “Simple” devices. vibration. and orientation problems may arise. and radiation environments. Schematic of the Glass Frit Silicon Cap Wafer Bond Process. and radiation environments.

the latter is more appropriate for many emergent applications. These factors and reliability requirements challenge the state of the art. aluminum or gold wiring to standardized connector pairs suitable to the rated loads and the application environment. and will probably continue to be adequate for most common applications.0 Standardization of Interfaces Key issues include standardization of all interfaces. proper grounding is also required to prevent the catastrophic effects of static charge buildup and transients. pressure. flow and chemical toxicity and/or causticity of the materials. Many applications will require fine filtering with self-cleaning features to prevent improper functioning or early failures.). Recall that the list of fluids included gasses and liquids. These are not generally emerging from the IC world. Signals connectivity may follow similarly or may rely on fiber optics for wireless methods. and that applications must consider fluid type. many space-based applications.. 7. Others are required to survive and perform reliably for many years (e. some medical diagnostics). certainly. MST device users are steadily demanding more standards for their utilization of top down Nano or Microsystems solutions (see chapter 13 for further discussion on standards). Meeting these at a competitive cost has truly delayed commercialization for many applications. Power connections follow copper.g. Power and signals connectivity with the “Outside World” generally follows standards established for the IC industry.g. temperature. These include all of the “I/O” described above. and radio frequency interference (RFI) in the design and implementation of microsystems that require communications as a key feature. Fluids I/O also require the development of standardized connectors.products are required to perform only once and are then disposed of (e. This raises the issues of electromagnetic compatibility (EMC). Some MST user communities such as all MST device users internal to Alcatel already have agreed upon standards for their internal local utility. Flow channels may require internal isolation from the remainder of the 422 . Increased integration at the wafer level has great advantages where production volumes support the nonrecurring engineering costs. etc.. particularly for in-vivo applications. As with all microelectronics devices. except for some larger chips that use coolant plumbing. electromagnetic interference (EMI). industrial controls.

The question often asked ten or more years ago was “Can we package this device now that we have created it?” This question has often been replaced by “Can we design in a packaging solution that can substantially decrease MEMS packaging costs?” It is this second question that will dominate packaging and assembly over the next five years in order to make the majority of MEMS devices cost-effective and more ubiquitous in the marketplace. 8. Mounting methods are also needed for many applications. 423 . It is commonly recalled that some early ICs were so sensitive to electrostatic discharge that they were destroyed in the act of removing them from their shipping materials. and be adequately isolated from all other parameters that could cause interference or damage. Now it is part of the initial design process (see the Design. Reduce the time to qualify new packaging concepts. It then often requires protection from thermal. the microsystem must have a well-defined interface with the measured or controlled parameter(s) in its environment. Improve system robustness. Today inputs to packaging strategy for MEMS devices can be summarized with the following list: 1) 2) 3) 4) Reduce the overall system cost. Simulation and Modeling chapter for further insight).0 Packaging Strategy and Trends A significant amount of attention is now being directed at packaging concerns for the MEMS community. shock. and will require special attention to proper shielding design. Standardized connectors and “Piping” must be developed for a range of application parameters. Some MEMS applications are in high-powered RF and laser equipment. Shielding from threats within the application environment is a primary requirement in the packaging design and materials selection. Recall. and vibration in its environment. a common practice on the macro scale requiring design practices and packaging and assembly methods not common on the micro and nano scale.microsystem. The microsystem must be securely attached with the proper orientation to function in its intended environment. Provide differentiated package solutions. Packaging was an afterthought for most MEMS designers and manufacturers only a few years ago.

Our contributors see this “Convergence” as a matter of degree. Editor. This is an important trend dependent on advances in several supporting technological advances. Henne van Heeren noted in COMS 2000 that a “Supply Chain” approach is needed for costeffective packaging and assembly. design. The process should involve project definition (i. foundry work.. and suppliers. performance specifications development). except for the few very high volume applications that could develop their own optimized designs and supporting infrastructure. These include: 1) 2) 3) 4) 5) Chip Scale Packaging (CSP) Flip Chips mounting Multichip Modules (MCM) “Bumped” interconnections Stack modularity Packaging approaches have followed the IC industry trends. variations on Ball Grid Arrays. and supporting methods for thermal management and assembly automation. stacking of multichip modules. Advanced Packaging. including specialized machines to increasingly optimize assembly steps. July 2001) that the year 2001 marked the convergence of wafer fabrication with packaging processes. Demmin. Recent trends reported include: increased integration of modular designs.5) Maintain and execute a component packaging roadmap with key customer inputs. packaging on the wafer. chip scale packaging. 6) MEMS device and package design must be concurrent activities 7) MEMS users and manufactures must understand the key cost role that MEMS packaging adds to MEMS devices. He advised 424 . These are becoming more important in this MEMS generation of packaging solutions and our contributors see these trends as the dominant forces in providing the next generation of MEMS packaging solutions. There are trends occurring in MEMS packaging that will continue for the foreseeable future.e. “IndentReflow-Sealing (“IRS”)”. These are discussed briefly in the following paragraphs. The culmination will be increased performance at lower costs and improved reliability for a growing range of products that reach commercialization. It has been claimed (Jeffrey C. “Bumping”.

surrounding 1 van Heeren. H. The trend is to assemble at the wafer scale with a high thermo-cycle bump that can endure subsequent re-flow cycles as a packaged device is exposed to multiple assembly reflows during integration into a system. then provides the connection from the die to the exterior of the package. After the die is soldered. Multichip modules (MCM) are emerging as the level of integration supports increased functional performance. Flip chip’s origin was not a package type (like BGA). COMS 2000.. Under fill is an epoxy that fills the area between the die and the carrier. September. an under bump metalization pattern defines the bump array which receives printed-on solder paste or electrodeposited solder. ICs) and fluids. typically eutectic (63%Sn. The package carrier. One major thrust for MSTs has been for development of assembly process devices to support the IC industry’s continued automation. XXXX. The solder bumped die is attached to a substrate by a solder re-flow process. 2000. under fill is added between the die and the substrate.“Forward Integration. In "Wire Bonded" packaging. Single chip modules (SCM) are sufficient for many applications. The die is attached to the carrier face up.g. and then bonded to the carrier. An important advantage is the ability to provide greater isolation between more sensitive components (e.” This provides silicon “Real Estate” on both sides of the chip and increases the area for interconnections.1 There continues to be a lot of talk about “Self-assembling. 37%Pb) compositions. and then a gold wire is bonded first to the die.” but little to show for it. NM 425 . with the bumps aligned to the carrier package or PWB substrate. The interconnection between the die and carrier is made through the conductive solder bump that is placed directly on the die surface. either substrate or lead frame.. “Wafer Bumping” is another emergent trend. Flip chip describes the method of electrically connecting the die to the package carrier. After redistribution. A popular practice for increasing functional density with minimized volume is the “Flip Chip. (presentation 92). The bump modified die is then "Flipped Over" and placed face down.” describing this as performing steps as early in the process as can effectively be done. the substrate forms the protective barrier with controlled penetrations to preserve the isolation. The most common packaging interconnect is solder. the interconnection between the die and the carrier is made using gold wire. Santa Fe.

the under fill absorbs the stress. The “MEMS Supplier Kit” categorizes four classes of “Integration Elements” that have been developed by Grosser. These benefits accrue in production quantities that must be sufficient to offset the increased costs to develop the production capabilities. Germany 426 . February 1..the solder bumps. M. In a wafer scale package the under fill also provides hermeticity. The full-custom designed system which is especially developed for a low volume application cannot be a sufficient solution. H. It is designed to distribute the stress in the solder joints.. micro fluidic and micro optical components in mainstream applications … requires a new type of micro system.”2 This quote leads an article describing results and current status of a German program sponsored by the German Ministry for Education and Research and supervised by the German Machinery and Plant Manufacturers Association (VDMA). 2 Grosser. V.1. “The trend to higher integration in microelectronics and the integration of micro mechanical. H. Reichl. There are MEMS application kits available and modularity of MEMS packaging solutions to meet environmental and sensing application needs. and Schuenemann.. Hybrid microsystems are still the dominant packaging solutions for most microsystems applications. reducing the strain on the solder bumps. The trend is towards increased integration at the wafer level. reducing costs and size while increasing yield. Solder bumps are used to provide controlled separation between layers. Modular Packaging and Assembly Monolithic integration has been touted as the “Holy Grail” for packaging but has not been achieved for many complex devices (see the Integration chapter for an in-depth discussion on this point). Kergel. the package assembly surrounding the die can take many forms and can utilize existing IC manufacturing processes and package formats along with MEMS specific interconnects that must accommodate gas and liquid flow conduits as well as optic ports to provide a true single step mount in the assembly hierarchy. 2000. greatly increasing the life of the finished package. It is a trend that some of our contributors see as the wave of the future while others see this as unrealistic. The chip attach and under fill steps are the basics of flip chip interconnect.” mst news. “A Fabrication Framework for Modular Microsystems. After wafer bumping. Teltow. A catalog of modules has been developed. 8. Once cured. V.

8. Ball Grid Array .80.00 or 1.9). introduced with CSP for cellular telephones in 1996. Wafer level packaging activities by Sandia National Laboratories are shown in Figure 15.65. portable devices. reduced pitch packaging. More compact designs are using finer pitch including 0.Reichl. Electrical interconnections are provided by closely spaced arrays of hemispherical or conic metallic conductors protruding from the surface of the device. and Schuenemann (see MST News February.27 mm pitch. Fine-pitch BGA employs BGA for high performance. 427 . H.BGA Micro Ball Grid Array (uBGA). DSBGA. Wafer-Level Packaging Example (Courtesy of Sandia National Laboratory) (a) Showing Sensor with Prepackaging Silicon Wall Structure on TO Header (b) With Silicone Gel Covering Wire Bonds (c) Wafer of Prepackaged Sensors.2.050 or 0. Kergel. H.. Most of these trends have been driven by the IC industry to support more compact. . is now a mature technology (APmag July 2001. Within the package.” These provide a higher “Pin Out” density while relieving the tedious steps involved in attaching conventional peripheral leads to Chip Sized Packages (CSPs) using bonded leads or “Pinthrough-hole” (“PTH”) methods. p. This is a packaging solution that many of our contributors see as a technology base that can add value to microsystems solutions. 0. Conventional “Motherboard” ICs use 1. 2000). the BGA may present different “Pins” to different layers in multilayered devices.. Figure 15. These interface with concave metallic arrays leading to conventional leads to interconnect the device to the “Outside World.40 mm pitch. energy-efficient.

3. Standard Flip Chip Bump Interconnections Courtesy (EV Group (a) Installed Array of Eutectic Sn/Pb Solder Bumps (b) SEM Image of Sn/Ag/Cu Alloy (lead free) Solder Bumps 428 . Bumped Interconnections A standard bumped interconnection array for a flip chip is shown in Figure 16(a). There are no applicable standards for these parameters. Figure 16. and a leadfree lot of bumps are shown in Figure 16(b). Underbump metallurgy (UBM) is a critical factor for WLP. and must be tooled for the specific die size and geometry (square or rectangular) and aspect ratio. 8. provide the minimum packaging size.DSLBGA – Die-Sized BGA/Die-Sized Land BGA. The standard solder bumps range from 75 – 130 um. and have been employed primarily on flip chips and wafer level packaging (WLP). see Figure 17.

Figure 18. SiP .Figure 17. We provide a bump design by Motorola in Figure 18.System in a Package The automotive and appliance industries are driving this mass-production multipurpose device concept. and even springs introduced by major players. posts. “Bump” Post Design (Motorola) 8. SiPs are packages with multichip or few-chip packages with “Passives” 429 .4. Wafer Level Packaging Wafer Bumping Process Flow (Courtesy of EV Group) Emerging technologies include a variety of columns.

the requirements have exceeded the capabilities of the available infrastructure. An example of such a complex system is the micro chem. RF. There are four or five technologies that dominate MEMS MCM packaging platforms. so we find ourselves still in the mode of adapting existing tools and techniques and adapting designs and processes to use these existing tools. MCM-L or MCM Laminate Technology MCM-C or MCM Ceramic Technology MCM-D or MCM Deposited Technology MCM-S or MCM Silicon Technology Mechatronics packaging Technology Increased Complexity and Functional Density The needs to demonstrate system level performances for complex tasks reliably and economically has been a substantial barrier to the commercialization of MEMS in many markets.6. lab illustrated in Figure 19.5. Many of the techniques and capabilities described in this section have been developed for IC needs and are appropriate for many MEMS applications. and may employ proprietary embedded software to customize the performance from use of SiP devices. 430 . They are: 1) 2) 3) 4) 5) 8. In Optical. Different applications interface the functions selected. MCM provides a MEMS solution that: 1) 2) 3) 4) Increases flexibility for MEMS device application Provides a potential for a higher pin count to the outside providing more I/O MCM can drastically reduce the size of mini and macro systems Reduces the interconnect inefficiencies as compared to macro and mini solutions thereby increasing speed and reducing power consumption 5) Reduces the overall connection count when compared to a macro system 6) Reduces electronic noise by reducing the length of interconnects when compared to macro and mini systems. Multichip Module (MCM) Assembly Some form of Multichip Module (MCM) assembly has been the leading way to systematize MEMS devices since its origin. Either a manufacturer uses an integrated or monolithic technique or they will use MCM to integrate the MEMS sensors and actuators with the electronic required performing MEMS based solution.contained within the package. Biotechnology and Biomedical markets. 8.

Micro Chem Lab (Courtesy of Sandia National Laboratories) 8. Continuous processing requires dedicated production lines. A parallel market trend is the development and production of the equipment customized for particular clients who prefer to own their production capabilities. standardization. Special “Carriers” are used to transport devices between machines and to stage and process them through batch operations.Figure 19. Another important trend is to outsource product manufacturing. Micro*montage offers the latter in a system they call Advanced Micro Assembly Systems – “AMAS. environmental requirements. and micro manufacturing requires rare expertise. expert systems. materials. The cells are themselves customized for specific assembly operations. and is thus restricted to large build quantities. This may be “Buildto-print.7.” AMAS is both a technical and an organizational machine concept to provide flexible assembly of hybrid microsystems. AMAS uses modular assembly cells and modular design concepts emphasizing “Standardized. and production flow. Batch processes apply to small-to-medium lot quantities. and components. Production flow includes both batch and individual processes. Key concepts include modularity. Advanced Micro Assembly Systems (AMAS) Commercialization dictates a transition from laboratory-scale and prototype development and engineering (in which anything can be done once or twice by a superior team) to a production capability. 431 . processes. Manufacturing engineering is the essential discipline.” but more often requires manufacturing engineering to develop the “Optimized” design for existing or adapted tools. These tasks may be performed by a single contract facility or in cooperation with a selected group. Commercial-off-the-shelf” components wherever possible.

g. and determination of disease and pathogen pathway studies. Given strong similarity between product lines.) require removal from the carriers. and steps are expected to also be similar. Each cell has buffer zones for input and output staging. The built-in flexibility allows more efficient utilization of resources and supports parallel production for similar processes. realizing both the needs for economies of scale (optimized processes) and the need to minimize setup and retooling costs to shift operations from one product line to another.Individual operations (e. orientation and alignment requirements with tolerances greater than one micron. This is less expensive and more efficient than requiring clean rooms and is sufficient for many products. For those with sub-micron requirements. The AMAS manufacturer offers technical expertise to assist the client in the design and development of the modular cells. Modularity and standardization were cited as key issues. heat treating/curing. Customized control software modules called the Manufacturing Execution System are used for production flow planning and execution. drug development.8. with a minimum requirement for retooling. AMAS attempts to maintain a balance between these.” wire bonding.). coating. Modular Assembly for Total Chem Lab Systems (M chem lab) Micro chem labs represent a very high level of capability essential for chemical and biological processes. “Clean Enough” standards must be established and enforced to prevent undesirable exposure of products between cells.g.. Most differences are in the control software. The design concept is to support minimized recurring costs in “Large” production runs while affording the flexibility to minimize nonrecurring costs to configure for new requirements. This expert service element is essential at this stage of the infrastructure development. Micro chem labs have been employed in human genome research and extensively in biotechnology applications including DNA research. and the control software for specified applications. where they are replaced for subsequent batch operations (e. 8. inertial dampers are required for all affected cells. “Pick and Place. materials. Vibration is usually not a problem for placement. this can usually be accommodated in the design of the carriers and in the “Good Practices” required in production areas. etc. etc. the processes. processes.. These offer the potential for greater 432 . sizes. Environmental controls employ machine-level air and water quality management.

9. There are military and public safety interests as well in the rapid detection of biological warfare.speed and accuracy. Using in-vivo sensors and rugged. while reducing time to market for advanced life-saving pharmaceuticals. 40% of the U. Packaging Types Forecast Type 1999 2004 Trend CC 6 3 50% decrease QFP 18 17 5% decrease PGA 1 1 - BGA 7 14 100% increase CSP 2 13 650% increase 433 . population will have medical conditions that require physician monitoring. Most notable in this forecast is the decrease in four of the seven types that comprised 91% of the market in 1999.S. and the attendant economies. Data shown in the columns is the market share (in percentage). namely SO and DIP. is beyond the current state of the industry. but sets the standard for infrastructure and standards for the industry including MEMS. increased automation. even for the few applications that have broad application in terms of production potential. Market share data. reduced sample volumes. environmental toxins. is dropping. Monolithic integration. within ten years. reducing the common practice of over prescribing antibiotics. two of these substantially. A final note of interest involves remote patient monitoring. Concurrent trends are pursuing Point of Care (POC) systems to enable “Real-time” diagnoses in the doctors’ offices and clinics. compact systems. It has been reported that. patients may conduct normal lifestyles with “24 X 7” automatic monitoring and alerting capabilities.0 Packaging Types Table 4 shows the forecast for more than doubling the number of packages delivered between 1999 and 2004. this is for ICs. and epidemics. Table 4. These systems will require very hardy packaging and robust communications capabilities. There is a substantial tradeoff between the level of wafer level integration (Level 0) and hybrid systems.

000 units to 4. published October 1999 (ISBN 0-8194-3494-9). Microsound.0 Packaging and Assembly Services Roger Grace.000 units in this period (4X actual growth)). 11. comprising almost 25% of the 1999 market) are essentially “Flat Line” in total packaging products delivered while the market leader (SO.) 10. a noted authority in the field.900. with 50% of the 1999 market) shows growth slower than the market. and CSP from 280.” He then noted. “A Number of New MEMS/MST Packaging Companies have Recently Entered the Market – ACSI. 27-29 October 1999.000.000 units (~13X actual growth)! (These data are from David Bergman as reported in SMC. 1) Micromontage 2) ACSI 434 . “Packaging Technology … Greatly lags Device Development. With the market forecast to “Better than Double” in this period. Australia. July 2001.” In a companion work. Several sources are identified below. Queensland. Microassembly Technologies.000 units to 3. notes. The proceedings are available as SPIE 3893. this is a dramatic shift in the packaging market. for an actual growth from almost 1.758 M 115% increase Given market inertia to continue production of existing products and product lines. The “Packaging and Assembly of Microelectronics and MEMS” conference was conducted as part of the “International Symposium on Microelectronics and Micro Electro Mechanical Systems” at the Royal Pines Resort.200. There are also trends to provide outsourced (subcontracted) packaging services and/or development of specialized assembly equipment.0 Conferences and Symposia There has been a major SPIE-sponsored conference on MEMS packaging. he noted that two of these (Teledyne and Microassembly Technologies) have created high-volume/low-cost advanced packaging foundries. The obvious winners are BGA packaging (with a market share doubling.997 M 29. two of these (CC and DIP.DIP 17 9 50% decrease SO 50 43 14% decrease Total 13. and Teledyne.

now Kymata. and IMT) 8) IMAPS Sensor Division 9) C2V 10) Karl Suss 11) ASEK 12) Many others 435 . LAAS and CEA-LETI) 6) Sensonor (with Delta. SinTef and ACREO) 7) CSEM (with TMP.3) Amkor 4) Bosch & HL Planar 5) Tronic’s (with MEMSCAP.