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32

Why Use Differential Amplifiers?

Single-ended detection using a variable resistor


1. need to consider DC level ... sets VBIAS
2. junk pickup (antenna) on possibly long interconnection -->
appears at the amplifier input

VDD
iSUP

vjunk

R
VBIAS

vO

- +
R(P)

R(P) represents a pressure-sensitive resistor


R(P) = R + R where R P
another example: a temperature-sensitive resistor = thermistor

EECS 105 Fall 1998


Lecture 32

Differential Interface Circuit

Use Wheatstone bridge: voltage on one side goes up with pressure; voltage on
the other side goes down
R +(P) = R + R and R -(P) = R + R
Use a differential amplifier as the input stage
VDD
RD
R-(P)

R+(P)
- +

R+(P)

R-(P)

RD

+ vo _

vjunk
- +
vjunk

IBIAS

Interfering voltage vjunk is common to both inputs of the differential pair:

R + R
R R
v ID = V DD -------------------------------------- + v junk V DD ----------------------------------------- + v junk
R R + R R
R + R + R R

R
2R
v id = V DD ----------- = V DD -------
R
2R
Note that vjunk is common to both inputs and is rejected by the CMRR of the
amplifier

EECS 105 Fall 1998


Lecture 32

Differential Amplifier with Single-Ended Outputs

An output voltage referenced to ground is important in some applications


Simple approach: take the output from one side
V+

RC

RC

+
vo

Q1
vi 1

Q2

IBIAS

vi 2

rob

Purely differential input voltage --> vo2 = -vod/2 = -(1/2)adm vid


gm RC
vo
1
------- = --- ( g m R C ) = -------------2
v
2
id

Sign change (since v2 = - vid/2) and a loss of 50% of gain

EECS 105 Fall 1998


Lecture 32

Differential Amplifier with Current Supplies

Boost gain by using current supplies adjusted to IBIAS/2 instead of RC


V+
IBIAS

IBIAS

M1
vi1

+
vo1

+
vo2

M2

vi 2

IBIAS

adm = -gm(ro||roc) for this differential amplifier


Drawbacks:
Bias stability is not possible without a feedback circuit
Taking the output from one side still reduces the gain by 50%

EECS 105 Fall 1998


Lecture 32

Differential Amplifier with Current Mirror Supply

By substituting a current mirror (diode voltage source biasing a current source


transistor), this amplifier has a stable bias
V+
IBIAS
2

+gmvgs1

M3

vi1

M1
vgs1

iD 2 =

I
iD1 = BIAS +gmvgs1
2
+

IBIAS

M4

IBIAS

M2

IBIAS

vgs 2

+ gmvgs1

io = iD2 iD1 = gm(vgs 2 vgs1)

+ gmvgs2

+
vo

+
+

vi 2

rob

The output node should be held at a constant DC potential


VOUT = V+ - VSG3
so that the amplifier is balanced and the output is a small-signal short-circuit

Note that this amplifier is not symmetrical and that half circuits do not apply

EECS 105 Fall 1998


Lecture 32

Short-Circuit Transconductance Gmd

Approximate circuit analysis:


I BIAS
i D1 = I D1 + g m1 v gs1 = ------------- + g m v gs1
2
I BIAS
i D2 = I D2 + g m2 v gs2 = ------------- + g m v gs2
2
Current mirror forces the drain current -iD4 = -iD3 = iD1
Kirchhoffs current law at the output states that
i O = i D2 ( i D4 ) = i D2 i D1
I BIAS
I BIAS
i O = ------------- + g m v gs2 ------------- + g m v gs1 = g m ( v gs2 v gs1 )
2
2

Kirchhoffs voltage law at the input states that vgs2 - vgs1 = vi2 - vi1 = -vid

i o = g m ( v id ) -->

io
G md = ------- = g m
v id

No factor of two in converting differential input into a single-ended current!

EECS 105 Fall 1998


Lecture 32

Output Resistance Rod

The current-mirror circuit is not symmetrical, so the procedure must be applied


to the entire amplifier

ro3

gm3vsg3

vsg3

vsg4

io3

io4

io1

io2

+
vgs1

ro4

gm4vsg4

it
+

vt
+

gm1vgs1

ro1

ro2

gm2vgs2

vx

vgs2

rob

Complicated analysis (see Section 11.5), but a simple result


R od = r o2 r o4

EECS 105 Fall 1998


Lecture 32

Two-Port Differential Model:


Current-Mirror Supply

The output port is referenced to ground, in contrast to the earlier model of the
symmetrical amplifier with vo = vod
Rod
+
vd

+
Gmdvd

Rod

vd

avdvd

(a)

(b)

EECS 105 Fall 1998


Lecture 32

Input Common-Mode Voltage Range

The range of DC common-mode inputs over which the differential amplifier can
function is an important practical specification (see op amp spec. sheets)

V+

RC

RC

VIC

+
V
+ IN

+
VO1

+
VO2

VX

+
VIN +
VIC

IBIAS

3
V

Upper limit to VIC


devices 1 and 2 leave their constant-current regions
Lower limit to VIC
bias current device 3 leaves its constant-current region

EECS 105 Fall 1998


Lecture 32

All-Bipolar Differential Amplifier VIC Range

Maximum common-mode input voltage:


VO1 = V+ - (IBIAS/2)RC
Q1 enters saturation when VBC1 = VBE1 - VCE(sat)1 = 0.7 V - 0.1 V = 0.6 V
I BIAS
+
V IC(max) = V O1 + 0.6 V = V ------------- R C + 0.6 V
2

Minimum common-mode input voltage:


VX = VIC - VBE1 = VIC - 0.7 V
Q3 enters saturation when VX - V - = VCE(sat)3 = 0.1 V

V IC(min) = V X + V BE1 = V + V CE(sat)3 + V BE1 = V + 0.8 V

EECS 105 Fall 1998


Lecture 32