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The amplifier circuit shown below uses what is commonly called "Voltage
Divider Biasing".
Biasing is very important in amplifier design as it establishes the correct
operating point of the amplifier ready to receive signals, thereby reducing
any distortion to the input signal. This type of biasing arrangement is
commonly used in the design of bipolar transistor amplifier circuits and
which greatly reduces the effects of varying Beta, (β) by holding the Base
bias at a constant steady voltage allowing for best stability. The quiescent
Base voltage (VB) is determined by the potential divider network formed
by the two resistors, R1 and R2 and the power supply voltage VCC.

NOTE: The emitter resistance performs 2 functions: RE1 influences the AC

voltage gain and RE1+RE2 controls the DC bias. Remember that RE2 in the
circuit will not be considered during AC analysis as it gets bypassed by CE.

1. Draw the schematic as shown above and run a Transient analysis for
500us. Refer to below calculations
DC ANALYSIS- Replace the capacitors with open circuits.
RE = 600+600 = 1.2K, Take β = 180 for calculation

• = 7.33K

• = 4V
• = 14.69uA
• = 2.64mA

• = 4.08V

Coupling Capacitors

In common emitter amplifier circuits, capacitors C1 and C2 are used as

Coupling Capacitors to separate the AC signals from the DC bias. This
ensures that the bias condition set up for the circuit to operate correctly is
not effected by any additional amplifier stages, as the capacitors will only
pass AC signals and block any DC component. The output AC signal is
then superimposed on the biasing of the following stages. Also a bypass
capacitor, CE is included in the Emitter leg circuit. This capacitor is an
open circuit component for DC bias meaning that the biasing currents and
voltages are not affected by the addition of the capacitor maintaining a
good Q-point stability. However, this bypass capacitor short circuits the
Emitter resistor RE2 at high frequency signals increasing the voltage gain
to its maximum. Generally, the value of the bypass capacitor, CE is
chosen to provide a reactance of at most, 1/10th the value of RE at the
lowest operating signal frequency.


• Re or the AC emitter resistance is given by 26mV/IE where IE as

calculated earlier as approx 2.64mA. So Re = 9.84Ω
• With minimal loading (RL=100K), Voltage gain = - RC/(RE1 + Re) =
You can Increase the gain by choosing a smaller RE1 such as 300 ohms.
The gain should increase to -1800 / 300 = -6.But don’t run a simulation
yet! Maintain the same bias condition by increasing RE2 to 900 ohms so
that RE1 + RE2 = 1200 ohms. Run a new simulation. You will obtain the
below output waveform

The below waveform we will observe

The output voltage swing is the maximum peak voltage that the output
can produce before it starts clipping. This voltage is dependent on the
voltage supplied to the op amp - the higher the supply voltage the higher
the output voltage swing.
• When an ac signal is applied to the base of the transistor, IC and
VCE will both vary around their Q-point values.
• When the Q-point is centered, IC and VCE can both make the
maximum possible transitions above and below their initial dc
• When the Q-point is above the center on the load line, the input
signal may cause the transistor to saturate. When this happens, a
part of the output signal will be clipped off.
• When the Q-point is below midpoint on the load line, the input
signal may cause the transistor to cutoff. This can also cause a
portion of the output signal to be clipped.