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Small signal transistor amplifiers

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Transistor Amplifiers

On completion of this chapter you should be able to predict the behaviour of given transistor

amplifier circuits by using equations and/or equivalent circuits that represent the transistors

a.c. parameters.

The gains of an amplifier circuit may be obtained by drawing the load

lines on the plotted output characteristics. However, for a number of

reasons, this is not a truly practical method.

(a) Manufacturers do not provide graphs or data to enable the

characteristics to be plotted.

(b) Even if such data were available, the process would be very time

consuming.

(c) Obtaining results from plotted graphs is not always very

accuratemuch depends upon the skill and interpretation of the

individual concerned.

For these reasons an alternative method, which involves the use of

equations and/or simple network analysis, is preferred. This method

involves the use of the transistor parameters, the data for which is

provided by manufacturers. This information is most commonly

obtained from component catalogues produced by suppliers such as

Radio Spares and Maplin Electronics.

2 BJT Parameters

You should already be familiar with the d.c. parameters such as input

resistance (RIN), output resistance (ROUT), and current gain (hFE), and

their relationship to the transistors output characteristics. In addition,

an a.c. amplifier circuit may be redrawn in terms of the appearance of

the circuit to a.c. signals. This is illustrated in Fig. 1.

67

68

VCC

C

C

RC

RB

RS

b

RS

b

RC

RL

RB Vbe

RL

Vce

VS

Vce

VS

Vbe

RL

(b) a.c. equivalent

(a) circuit

Fig. 1

The a.c. equivalent circuit of Fig. 1(b) is useful in that the current flow

paths of the a.c. signal and the effective a.c. load can be appreciated,

but in order to analyse the complete amplifier circuit the load lines

would still need to be drawn on the characteristics. What is required is

a simple network representation of the transistor itself, which can then

be inserted into Fig. l(b) in place of the transistor symbol.

There are a variety of transistor parameters that may be used in

this way. Amongst these are Z-parameters, Y-parameters, hybrid

parameters, and h-parameters. For the analysis of small-signal audio

frequency amplifiers the use of h-parameters is the most convenient,

and will be the method adopted here.

Provided that the transistor is correctly biased and the input signal is

sufficiently small so as to cause excursions of currents and voltages

that remain within the linear portions of the characteristics, then the

transistor itself may be considered as a simple four-terminal network as

shown in Fig. 2.

i2

i1

1

Linear

network

Fig. 2

be expressed by a number of equations, two of which are:

1 Ai1 B 2 ..................[1]

i2 C i1 D2 ..................[2]

must be an impedance (ohm), B and C are dimensionless (ratios), and

D must be an admittance (siemen). Since there is a mixture or hybrid

of units involved, they are known as the hybrid or h-parameters, having

the following symbols:

A hi ohm;

B hr ;

C hf ;

D ho siemen

equations would be written as follows

1 hie i1 hre 2

i2 h fe i1 hoe 2

If the transistor is connected in common base configuration then the

parameters would be hib, hrb, hfb and hob respectively.

The h-parameters are defined as follows:

hi: is the input impedance with the output short-circuited to a.c.

Thus, hi

1

ohm

i1

hr: is the reverse voltage feedback ratio with the input open-circuited

to a.c.

Thus, hr

1

2

Thus, h0

i2

siemen

v2

hf: is the forward current gain with the output short-circuited to a.c.

Thus, h f

i2

i1

Notes:

1 In modern transistors hr is very small (104) so this parameter

will be ignored.

2 Just as conductance G 1/R siemen, so admittance, Y 1/Z siemen.

3 The h-parameters will vary with temperature, ageing and frequency.

For the analysis at this level we shall consider that they remain

constant.

4 Since the transistor is a current-operated device it is convenient

to represent its collector circuit as a current generator with its

internal impedance (1/ho) in parallel.

69

70

equivalent circuit would be as shown in Fig. 3.

c

b

i1

hie

RS

i2

hfei1

RB

1/hoe

RL

Fig. 3

have the same numerical values as their d.c. counterparts

i.e. hi RIN ;

h f hF ;

1 / ho ROUT

3 h-parameter Equations

Ignoring hr the original two equations may be written as:

1 hi i1...........[1]

i2 h f i1 ho 2 [2]

and using these equations the following results can be obtained.

Amplifier current gain, Ai

hf

(1)

1 ho RL

h f RL

hi (1 ho RL )

Ai RL

hi

(2)

of amplifier gains can simply be obtained by either using the above

equations or by simple network analysis using the h-parameter

equivalent circuit.

Worked Example 1

Q

For the amplifier circuit of Fig. 4, (a) sketch the h-parameter equivalent circuit and, (b) determine the

amplifier current and voltage gains using (i) network analysis, and (ii) h-parameter equations.

The h-parameters are hie 1.5 k; hfe 90; hoe 50 S

VCC 12 V

RC

2.2 k

RB

68 k

RS

VS

RL

600

10 k

100 mV

rms

Fig. 4

A

hie 1.5 k; hfe 90; hoe 50 106 S

(a) The h-parameter circuit will be as shown in Fig. 5.

iS

i2

i1

iL

90i

RS

600

1

1/hoe

20 k

RB

hie

68 k 1.5 k

RC

2.2 k

0.1 V

rms

Rin

RL

Fig. 5

(i)

1/hoe

RC RL

2.2 10

106

20 k; RL

ohm

k 1.8 k

R

R

2.2 10

50

C

L

hie RB

68 1.5

1.47 k

hie RB

68 1.5

v1

Rin

1.47

v s volt

0.1 V

Rs Rin

1.47 0.6

v1 71 mV

i1

v1

71 103

amp 47.3 A

hie

1 .5 1 03

Using current divider technique:

i2

20

1 / hoe

90i1 amp

4.26

20 1.8

1 / hoe RL

i2 3.91 mA

RL

10 k

71

72

v2 7.2 V

(ii)

Ai

i2

3.91 103

82.7 Ans

i1

47.3 106

Av

v2

7.04

99 Ans

v1 71 103

Ai

90

hfe

1 hoe RL

1 (50 106 1800 )

Ai

90

82.6 Ans

1.09

Av

Ai RL

82.6 1.8

1.5

hie

Av 99 Ans

Thus, allowing for the cumulation of rounding errors in part (i), the results from

the equations agree with those from the network analysis.

The actual current that will flow in the load of the previous example

will not in fact be i2, but only a fraction of that, and is shown in Fig. 5

as iL. Thus the power delivered to the external load will be less than

the maximum possible. This problem may be minimised by the use of

a matching transformer connected between the load and the amplifier

circuit output terminals.

Worked Example 2

Q

The transistor used in the circuit of Fig. 6 has the following h-parameters hie 2 k; hoe 60 S;

hfe 100. Calculate (a) the amplifier current gain, (b) the actual power delivered to the external load,

and (c) the turns ratio required for a matching transformer in order to maximise the power delivered

to the load.

VCC

RC

4.7 k

R1

120 k

RS

600

R2

20 k

RE

1 k

VS

0.2 Vp-p

Fig. 6

A

hie 2 k; hoe 60 106 S; hfe 100

RL

5 k

i1

iS

i2

iL

100i1

Rs

600

R1

120 k

R2

20 k

hie

2 k

1/hoe

16.7 k

RC

4.7 k

S

0.2 Vp-p

Rin

RL

Fig. 7

Input circuit:

1

1

1

1

1

1

1

siemen

mS

Rin

R1

R2

hie

120 20 2

67

1

1 6 60

mS

Rin

120

120

v1

Rin

1.79

vs

200 mV pk-pk

Rs Rin

0.6 1.79

v1 150 mV pk-pk

i1

Output circuit: RL

v1

0.15

75 A pk-pk

amp

hie

2000

RC RL

4.7 5

k

RC RL

4.7 5

RL 2.42 k

100i1 7.5 mA pk-pk

i2

1 / hoe

16.7

100i1

7.5 mA pk-pk

1 / hoe RL

16.7 2.42

i2 6.55 mA pk-pk

Ai

i2

6.55 103

i1

75 106

Ai 87.3 Ans

Check: Ai

(b) iL

100

hfe

87.3

1 hoe RL

1 (60 106 2420 )

RC

4.7

i2

6.55 mA pk-pk

RC RL

9.7

iL 3.17 mA pk-pk

PL I L2RL watt, where I L is the r.m.s. value

so, I L

iL

3.17

mA 1.12 mA

2 2

2 2

RL

5 k

73

74

PL 6.3 mW Ans

(c) For maximum power transfer, RL must match the parallel combination of

1/hoe and Rccall this Rp.

Rp

Rp

so,

Np

Ns

Np

Ns

16.7 4.7

k 3.67 k

16 .7 4 .7

N p2

Ns

RL ohm

Rp

RL

3.67

5

0.856 : 1 Ans

Since a FET has an extremely high input impedance then its input

circuit may be represented simply as an open circuit. Also, being a

voltage operated device it is convenient to represent the output circuit

as a voltage source with the internal resistance (rds) in series with it.

The small-signal equivalent circuit will therefore be as shown in Fig. 8.

The FET parameters rds and gm should already be familiar to you.

From Fig. 8: Vo

RL

gm rdsVi volt

RL rds

Vo

g r R

A m ds L

Vi

RL rds

(3)

Vo

g r R

m ds L

Vi

rds

and, A gm RL

(4)

d D

rds

Vi gmrdsVi

V0

Fig. 8

RL

Worked Example 3

Q

The FET used in the amplifier circuit of Fig. 9 has parameter values of rds 80 k and gm 4 mS.

Calculate (a) the amplifier voltage gain, and (b) the effective input resistance of the amplifier circuit.

VDD

R1

56 k

RD

2 k

RG

1 M

Vi

RS

1 k

R2

4.6 k

V0

RL

3 k

Fig. 9

A

rds 80 103 ; gm 4 103 S; RL 3 k

RD RL

32

ohm

k

RD RL

5

RL 1.2 k

so, Av gmRL 4 103 1.2 103

Av 4.8 Ans

In order to check the validity of using the approximation of equation (4),

we can also calculate the gain using equation (3) and compare the two

answers.

Thus, Av

gmrds RL

4 103 80 103 1.2 103 384 000

03

81 200

rds R L

80 103 1.2 10

Note that a FET amplifier provides very much less voltage gain than a

comparable BJT amplifier.

(b) Looking in at the input terminals, for a.c. signals, the gate resistor

RG is in series with the parallel combination of R1 and R2, as shown

in Fig. 10.

Rin RG

R1 R2

56 4.7

ohm 106

R1 R2

60.7

75

76

G

RG

Rin

R1

R2

Fig. 10

Thus, the inherently high input resistance of the FET is preserved in the amplifier

circuit by the inclusion of RG.

5 Practical Implications

It should be borne in mind that when designing an amplifier circuit, the

results of the equations as shown in this chapter give only theoretical

answers. If an amplifier circuit thus analysed is then constructed and

tested, the actual gain figures achieved may well be different to those

predicted. There are a number of reasons for this: the resistors will

have actual values depending upon how close to tolerance they are,

and the transistor parameters cannot be guaranteed to be exactly those

quoted by the manufacturer. Indeed, manufacturers recognise this by

quoting minimum, maximum and typical values for such parameters

as hf. In calculations the typical value is normally used. Thus the

mathematical analysis should be considered as only the first step in the

design process, and component values will then need to be adjusted in

the light of practical tests.

Summary of Equations

BJT amplifier: Current gain, Ai

hf

1 ho RL

Ai RL

hi

Power gain, Ap Ai Av

Voltage gain, Av

or, more accurately, Av

gm rds RL

rds RL

Assignment Questions

1

circuit of Fig. 11 are hfe 250, hie 5 k, and

hoe 40 S.

VCC

3.9 k

56 k

and hence, or otherwise,

(b) calculate the amplifier current, voltage

and power gains.

0.2 V V

1

pk-pk

VCC

4.7 k

7.5 k

500

4.7 k

120 k

Fig. 13

V0

0.25 V V1

pk-pk

rds 85 k and gm 4.1 mS.

(a) calculate the amplifier voltage gain, and

(b) the power dissipated in the external 15 k

load.

Fig. 11

VDD 30 V

the transistor is connected in common base

configuration. If the common base parameters

hib and hob are 100 and 20 S respectively,

1.2 M

V1

and power gains.

3

10 k

56 k

source FET amplifier, where the transistor

parameters are gm 3 mS, and rds 75 k.

Calculate the amplifier voltage gain.

VDD

15 k

15 k

3V

pk-pk

4.7 k

4.7 k

Fig. 14

6

Figs. 15(a) and (b), sketch the amplifier circuits

that they represent, showing component

values, and also identify the values for the

transistor parameters in each case.

90 k

120 V1

20 k

5 k

V1

1.2 M

1 M

6.8 k

RS

(a)

i1

Fig. 12

600 82 k

10 k

in Fig. 13 has the following parameters:

hie 2.5 k, hfe 120, and hoe 100 S.

Sketch the equivalent circuit and determine

the amplifier current and voltage gains, and the

power dissipated in the external 7.5 k load.

50i1

3 k

V1

(b)

Fig. 15

25 k 4.7 k 10 k

77

78

Q

Calculate the minimum value of hfe required for the transistor in Fig. 16 in order that a power

of 3.5 mW is dissipated in the 10 k load resistor. The values for hie and hoe are 4 k and 50 S

respectively.

VCC

100 k

0.25 V

pk-pk

4.7 k

600

10 k

Fig.16

A

The h-parameter equivalent circuit is shown in Fig. 17. Since RB hie then the

shunting effect of RB will be negligible, and it has therefore been omitted from

the calculation.

hie 4000 ; hoe 50 106 S; Vi 0.25 V pk-pk; Po 3.5 103 W

i1

hfei1

VS

RB

V1 100 k

1/hoe

20 k

hie

4 k

V2

RC

4.7 k

0.25 V

pk-pk

Fig. 17

P0

V22

watt so V2 P0 RL volt 3.5 103 10 4

RL

V2 5.916 V

V1

4

hie

Vs volt pk-pk

0.25

4.6

hie Rs

V1 0.21 7V pk-pk

so, V1

0.217

7

76.8mV r.m.s.

2 2

V2

5.916

Voltage gain required, Av V 0.768

1

Av 77

RL

10 k

Av

so, hfe

1/hoe RL

47

hfe RL

where RL

3.2 k

1 / hoe RL

14.7

hie (1 hoe RL )

Av {hie (1 hoe RL )} 77{4(1 50 106 3.2 103 )}

3.2

RL

Q

The FET in the circuit of Fig. 18 has rds 50 k and gm 5 mS. Determine the value of the output

voltage, V2, and the power developed in the 25 k load.

A

rds 50 103 ; gm 5 103 S

VDD 40 V

39 k

100 k

V2

V1

4V

pk-pk

25 k

2 M

2.2 k

Fig. 18

RL

25 3.9

RD RL

ohm

15.2 k

RD RL

25 3.9

Now, since rds is NOT RL , then the approximate equation for voltage gain

should not be used, hence

Av

gmrds RL

1.5 103 50 103 15.2 103

rds RL

65.2

Av 17.48

Thus, V2 17.48 4 V pk-pk 70 V pk-pk

so, V2 24.75 V Ans

P0

V22

24.752

watt

RL

25 103

P0 0.2 mW Ans

Note that had the approximate equation Av gm RL been used in this case an

error of about 22% would have resulted in the value for Av. This would be an

unacceptably large error.

The approximate form of the equation should be used only when rds is at least

10 times larger than RL .

79

80

1

2

3

4

5

(b) Ai 0.91; Av 42.8; Ap 39

25.7

Ai 95.5; Av 98.1; Po 6.5 mW

Av 24.6; Po 45.4 mW

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