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IEEE SENSORS JOURNAL, VOL. 13, NO.

5, MAY 2013

1771

Thermal Sensor Using Poly-Si Thin-Film


Transistors With Self-Aligned and
Offset Gate Structures
Mutsumi Kimura, Senior Member, IEEE, Jun Taya, Akihiro Nakashima, and Yuki Sagawa

Abstract We propose a thermal sensor using poly-Si thin-film


transistors (TFTs) with self-aligned and offset gate structures.
First, the temperature dependences of the transistor characteristic are compared between the self-aligned and offset TFTs. It
is found that both the TFTs have the temperature dependence
of the off-leakage current, whereas the off-leakage current of
the self-aligned TFT is larger than that of the offset TFT. Next,
the self-aligned and offset TFTs are included in a cell circuit to
detect the temperature utilizing the off-leakage current, which is
composed of a pair of 1-transistor and 1-capacitor. It is found that
low and high temperatures can be detected using the self-aligned
and offset TFTs, respectively. We think that it is promising to
integrate this thermal sensor in certain applications using TFTs.
Index Terms Offset gate, off-leakage current, poly-Si,
self-aligned gate, thermal sensor, thin-film transistor (TFT),
temperature.

I. I NTRODUCTION

OLY-SI thin-film transistors (TFTs) [1] have widely been


applied to flat-panel displays (FPDs) [2], such as liquidcrystal displays (LCDs) [3] for not only computer monitors
and mobile displays but also light valves in data projectors
[4], organic light-emitting diode displays (OLEDs) [5], and
electronic papers [6]. Because display characteristics of the
liquid crystals [7], [8] or operational stability of the organic
light-emitting diodes [9] have temperature dependences, it is
required to compensate them by controlling driving conditions.
Actually, a discrete thermal sensor is prepared near the LCDs
for light valves, and the temperature dependence of the liquid
crystals is compensated. However, because the temperature
has spatial profiles on the FPDs, it is required to measure the

Manuscript received July 26, 2012; accepted January 15, 2013. Date of
publication January 22, 2013; date of current version April 2, 2013. This
work was supported in part by Collaborative Research with Epson, a research
project of the Joint Research Center for Science and Technology at Ryukoku
University, a grant from the High-Tech Research Center Program for private
universities from the Ministry of Education, Culture, Sports, Science and
Technology (MEXT), a grant for research facility equipment for private
universities from the MEXT, and a grant for special research facilities from
the Faculty of Science and Technology of Ryukoku University. The associate
editor coordinating the review of this paper and approving it for publication
was Prof. Istvan Barsony.
The authors are with the Department of Electronics and Informatics,
Ryukoku University, Otsu 520-2194, Japan, and also with the Joint Research
Center for Science and Technology, Ryukoku University, Otsu 520-2194,
Japan (e-mail: mutsu@rins.ryukoku.ac.jp; t080145@mail.ryukoku.ac.jp;
steed400_0603@yahoo.co.jp; t050147@mail.ryukoku.ac.jp).
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/JSEN.2013.2241952

temperature at several points and compensate the temperature


dependence locally point by point.
Therefore, we proposed a thermal sensor using poly-Si TFTs
to measure the temperature at several points [10] and also
reported a driving method to widen the detectable temperature
range [11]. However, it was needed to generate multiple pulses
and choose output voltages at the corresponding timings,
which makes the peripheral circuits more complicated.
In this research, we propose a thermal sensor using polySi TFTs with self-aligned and offset gate structures. First, the
temperature dependences of the transistor characteristic are
compared between the self-aligned and offset TFTs. Next, the
self-aligned and offset TFTs are included in a cell circuit to
detect the temperature utilizing the off-leakage current, which
is composed of a pair of 1-transistor and 1-capacitor. We
expect that low and high temperatures can be detected using
the self-aligned and offset TFTs without generating multiple
pulses and choosing output voltages at the corresponding
timings. We think that it is promising to integrate this thermal
sensor in some applications using TFTs. Moreover, particularly unlike the previous papers [10], [11], the poly-Si TFTs
are fabricated on a quartz substrate at high temperature, which
are the actual devices employed in LCDs for light valves.
II. T EMPERATURE D EPENDENCES OF T RANSISTOR
C HARACTERISTIC
The top-gate, coplanar, solid-phase crystallized (SPC),
n-type, self-aligned and offset TFTs are fabricated [12], [13].
An amorphous Si film is deposited on a quartz substrate using
low-pressure chemical vapor deposition (LPCVD) of SiH4 and
crystallized using furnace annealing in N2 ambient to form a
poly-Si film. A SiO2 film is grown using thermal oxidation in
O2 ambient, and another SiO2 film is stacked using chemical
vapor deposition (CVD) to form a gate insulator film. The
poly-Si film is upgraded using post annealing at 1000 C for
1 hr. Phosphorus ions are implanted, whose dose density is
2 10 15 cm2 , and activated using furnace annealing to form
source-drain regions. The edge locations of the gate electrode
and source-drain regions are self-aligned for the self-aligned
TFT, whereas they are a certain length distant for the offset
TFT. The poly-Si film thickness (ts ) and gate insulator film
thickness (ti ) are 54.0 nm and 33.7 nm, respectively. The
gate width (W ) and gate length (L) are 50 m and 4 m,

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IEEE SENSORS JOURNAL, VOL. 13, NO. 5, MAY 2013

1E-2

1E-2

Vds=5V

1E-2

Vds=5V

1E-3

On

1E-4

1E-5

1E-5

1E-6

1E-6

1E-6

1E-7

1E-7

1E-7

Off

1E-9

100C
50C
0C
-20C

1E-10
1E-11
1E-12

1E-4

On

1E-5

Ids (A)

1E-8

1E-8
1E-9

Off

1E-10

100C
50C
0C
-20C

1E-11
1E-12

1E-9

1E-12
1E-13

1E-14

1E-14

1E-15

1E-15

1E-15
-5

10

(c)

Self-aligned TFT
Vcell

Initializing

Holding

Offset TFT

Detecting

Initializing

Holding

Detecting

Vscan

Vsig
Vcell

Voltage

Vscan

Ccell

Voltage

Detecting

10

Vgs (V)

Temperature dependences of the transistor characteristic.

Offset TFT
Initializaing & Holding

Detecting

Initializaing & Holding

Ccell

-5

(b)

Fig. 1.

Vcell

10

Vgs (V)

(a)

Self-aligned TFT

100C
50C
0C
-20C

1E-11

1E-14
5
Vgs (V)

Off

1E-10

1E-13

On

1E-8

1E-13

-5

Vds=5V

1E-3

1E-4

Ids (A)

Ids (A)

1E-3

Vsig

Vcell

Vout
Vout

Vsig Vscan

Vout

Vout
V

Time

(a)

Time

(b)
Fig. 2.

Cell circuit and driving method.

respectively, and the offset length (L offset ) is 1.0 m and 1.5


m.
First, the temperature dependences of the transistor characteristic are compared between the self-aligned TFT and
offset TFTs with L offset = 1.0 m and 1.5 m. Fig 1 shows
the temperature dependences of the transistor characteristic.
The subthreshold swing (S), threshold voltage (Vth ), and field
effect mobility () of the self-aligned TFT are 0.279 Vdec1 ,
1.03 V, and 67.3 cm2 V1 s1 , respectively. It is found that
both the TFTs have the temperature dependence of the offleakage current. The off-leakage current of the self-aligned
TFT is larger than that of the offset TFT. This is because
the relaxation of the electric field occurs at the interfaces
between channel, offset, and drain regions of the offset TFT
[14], [15]. However, the off-leakage current of the offset
TFT with L offset = 1.0m is the same as that of the offset
TFT with L offset = 1.5m. This is because the relaxation
of the electric field does not depend on L offset . Although
it is known that the off-leakage current of the self-aligned
and offset TFTs is caused by multiple complicated mechanisms of carrier generation [16], such as Schockley-Read-Hall
generation (SRH) for low electric field [17], [18], phononassisted tunneling with Poole-Frenkel effect (PAT) for medium
electric field [19], and band-to-band tunneling (BBT) for high
electric field [20], and carrier transport over reverse-biased pn
junction at the interfaces between channel, offset, and drain
regions, it is preferable that the temperature dependences of the

off-leakage current are monotone changing, as shown in Fig. 1.


On the other hand, the on current of the offset TFT with
L offset = 1.0m is higher than that of the offset TFT with
L offset = 1.5m especially at low temperatures. Therefore, it
is preferable that the offset TFT with L offset = 1.0m is used
instead of the offset TFT with L offset = 1.5m.
III. T EMPERATURE D ETECTION U SING C ELL C IRCUIT
Next, the self-aligned and offset TFTs are included in a
cell circuit to detect the temperature utilizing the off-leakage
current, which is composed of a pair of 1-transistor and
1-capacitor. Fig 2 shows the cell circuit and driving method.
The cell capacitor (Ccell ) is charged during an initializing term
by applying scan voltage (Vscan ) and signal voltage (Vsig), cell
voltage (Vcell ) is discharged during a holding term, and the
dropped voltage (Vout ) is measured during a detecting term by
switching and connecting Vout to the voltage meter outside the
cell circuit. The temperature is detected because the discharge
current is subject to the temperature dependence of the offleakage current. Low and high temperatures can be detected
by using the self-aligned and offset TFTs. It should be noted
that the variation of Ccell with the temperature is negligible
and does not cause errors.
Finally, the actual behavior of the thermal sensor is confirmed using real experiments. Fig 3 shows the voltage waveforms of Vscan and Vcell . Here, the TFTs are the same as

KIMURA et al.: THERMAL SENSOR USING POLY-SI TFTs

1773

(a)

(b)
Voltage waveforms of Vscan and Vcell .

those written in the last section. The initializing and holding


terms are 200 s and 20 ms, respectively, Vscan and Vsig , are
applied as pulse voltages of 10 V and 5 V, respectively, and
Vcell is measured using a high-impedance FET probe. The
temperature is varied from 20 C to 100 C. Not only the
voltage waveforms for the offset TFT with L offset = 1.0m
but also those for the offset TFT with L offset = 1.5m are
shown as a reference, although they are roughly the same. The
repetitive pulses are applied on account of the measuremental
convenience, which is different from Fig. 2(b). It is found that,
in the case of the self-aligned TFT, the transient waveforms
of Vcell for low temperatures are separated, whereas those for
high temperatures are fully discharged and overlapped. On the
other hand, in the case of the offset TFT, the transient waveforms of Vcell for low temperatures are overlapped, whereas
those for high temperatures are separated. This is because the
off-leakage current of the self-aligned TFT is larger than that
of the offset TFT, as shown in the last section. Therefore, it
is impossible to detect all temperatures solely using the selfaligned or offset TFTs. Fig 4 shows the relationships between
the temperature and Vout . Not only the relationship for the
offset TFT with L offset = 1.0m but also those for the offset
TFT with L offset = 1.5m are again shown as a reference,
although they are roughly the same. It is found that the low
temperatures from 20 C to 60 C and high temperature from
20 C to 100 C can be detected by measuring Vout using
the self-aligned and offset TFTs, respectively. The combined
range of the detectable temperatures is sufficient to compensate
display devices.
The extraction method of the temperature from Vout is as
follows in detail. The off-leakage current is probably uneven
in a panel and between panels. Therefore, the relationship
between the temperature and Vout has to be measured and
memorized for each TFT in advance. The temperature can be
detected by comparing the measured Vout with the memorized
Vout . This compensation method is useful also for poly-Si
TFTs made using other fabrication process such as excimer
laser crystallization, whose off-leakage current is much more

20100C
4

Loffset=
1.0m
Vout (V)

Fig. 3.

(c)

Loffset=
1.5m

Selfaligned

-2060C

0
-50

Fig. 4.

50
T (C)

100

Relationships between the temperature and Vout .

uneven owing to the large grains and active grain boundaries,


although it is supposed to detect the temperature in LCDs
for light valves by integrating the thermal sensor and poly-Si
TFTs made using SPC are evaluated in this paper. The characteristic degradation of poly-Si TFTs is negligible because
the driving method is not severe and poly-Si TFTs are very
tolerant. Therefore, it is satisfying to measure and memory the
relationship between the temperature and Vout only once when
the panel is shipped from the factory.
IV. C ONCLUSION
We proposed a thermal sensor using poly-Si TFTs with
self-aligned and offset structures. First, the temperature dependences of the transistor characteristic were compared between
the self-aligned and offset TFTs. It was found that both the
TFTs have the temperature dependence of the off-leakage
current, whereas the off-leakage current of the self-aligned
TFT is larger than that of the offset TFT. Next, the selfaligned and offset TFTs were included in a cell circuit to
detect the temperature utilizing the off-leakage current, which
is composed of a pair of 1-transistor and 1-capacitor. It was
found that low and high temperatures can be detected using the

1774

IEEE SENSORS JOURNAL, VOL. 13, NO. 5, MAY 2013

self-aligned and offset TFTs, respectively. We think that it is


promising to integrate this thermal sensor in some applications
using TFTs.

[20] G. A. M. Hurkx, D. B. M. Klaassen, and M.P.G. Knuvers, A new


recombination model for device simulation including tunneling, IEEE
Trans. Electron Devices, vol. 39, no. 2, pp. 331338, Feb. 1992.

ACKNOWLEDGMENT
The authors would like to thank Y. Hiroshima and
M. Miyasaka, Seiko Epson, Seiko, Japan.
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Mutsumi Kimura (M10SM11) received the B.E.


and M.E. degrees in physical engineering from
Kyoto University, Kyoto, Japan, in 1989 and 1991,
respectively, and the Ph.D. degree in electrical and
electronic engineering from the Tokyo University of
Agriculture and Technology, Tokyo, Japan, in 2001.
He joined Matsushita Electric Industrial Co., Ltd.,
Osaka, Japan, in 1991, and Seiko Epson Corp.,
Nagano, Japan, in 1995. He has been with Ryukoku
University, Shiga, Japan, since 2003, and is currently
involved in research on TFT characteristic analysis,
TFT simulator development, TFT-OLED development, and their advanced
applications.
Dr. Kimura was a recipient of the Outstanding Poster Paper Award at Asia
Display/IDW01, the Best Paper Award at AM-LCD05, the Best Paper Award
at the 4th Thin Film Materials and Devices Meeting, the Outstanding Poster
Paper Award at IDW07, the Outstanding Poster Paper Award at IDW09, the
2010th Materials and Structures Laboratory Directors Award, the Outstanding
Poster Paper Award at IDW10, the IEEE EDS Kansai Chapter IMFEDK
Student Paper Award at 2012 IMFEDK, and the Presidential Citation Award
at SID12. He is a Senior Member of the Society for Information Display
and a Regular Member of the Japan Society of Applied Physics and the
Institute of Electronics, Information and Communication Engineers. He is
the Chair or a member on the Technical Committee of the IEEE Electron
Devices Society Kansai Chapter, the Executive, Steering, and Program Committees of AM-FPD, the Program Committee and the AMD Workshop of
IDW, and the Organizing Committee of Thin Film Materials and Devices
Meeting.

Jun Taya received the B.E. degree in electronics and


informatics from Ryukoku University, Shiga, Japan,
in 2012.
He was involved in research on research and
development of temperature sensors using thin-film
transistors.

Akihiro Nakashima received the B.E. and M.E.


degrees in electronics and informatics from Ryukoku
University, Shiga, Japan, in 2008 and 2011, respectively.
He was involved in research on research and
development of temperature sensors using thin-film
transistors.

Yuki Sagawa received the B.E. degree in electronics


and informatics from Ryukoku University, Shiga,
Japan, and the M.E. degree in materials science from
the Nara Institute of Science and Technology, Ikoma,
Japan, in 2009 and 2011, respectively.
He was involved in research on research and
development of temperature sensors using thin-film
transistors.