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VOLTAGE CONTROLLED CURRENT SOURCE INVERTERS.

Jose Espinoza

Geza Joos

Phoivos Ziogas

Concordia University
Department of Electrical & Computer Engineering
1455 de Maisonneuve Blvd. West
Montreal, H3G 1M8, Canada
Tel. (514) 848-3116
F a . (514) 848-2802

Abstract - Current controlled voltage source inverters (CC-VSI's)


are widely used in high peiformance applications because they
can provide fast and accurate line current control. Voltage
controlled current source inverters (VC-CSI's) are the duals of
CC-VSI's and as such they can also provide fast and accurate line
voltage control. Duality however implies one important difference
in favor of VC-CSI's. The load voltages (and consequently the
load currents with linear loads) are now sinusoidal. This feature
can offer important advantages in high performance applications
such variable speed ac drives. Potentia1 benefits include the
reduction of motor winding voltage stress, audio noise, and motor
losses associated with high frequency switching phenomena. This
paper presents a fully functional VC-CSI three-phase inverter
that can closely track a given voltage reference signal and also
provide the above mentioned performance improvements. A
detailed analysis and design procedure of the proposed variable
frequency power supply circuit is also included. Key
analysisldesign results and performance features are
subsequently verified on a 2 kVA experimental inverter-load
prototype system.

Hysteresis, Adaptive P W M and Predictive Voltage Control)


and Section I11 contains the design guidelines for the Adaptive
P W M Voltage Control. A design example is provided in
SectionIV. Finally, SectionV present the simulation and
experimental results.
11. DESCRIPTIONOF THE VC-CSI INVERTER

A. Principles of Operation

The general structure of the proposed VC-CSI and load


system is shown in Fig. 1. The Control block produces the
switching pattern based on the difference between the threephase sine voltage reference waveform y p and the threephase load voltage waveform y . This feedback scheme
ensures that the CSI pattern is m&ed on-line so as to force
the output voltage y to track the reference y p * . The
application of the switc$ung pattern to the dc bus current I d c
produces the required modulated three phase ac output
currents. The capacitive filter absorbs the high frequency
current harmonics, which results in sinusoidal output voltages
and currents (if the load is linear).

L INTRODUCTION
The main feature of current controlled voltage source
inverters (CC-VSI's) is that they can generate line currents that
closely track a given current reference signal [ 1).
The disadvantage with CC-VSI's however is the harsh
voltage switching environment they generate across the loads.
For some applications, this effect can be moderated by using
output filters (although the problem of audio noise associated
with magnetics still remains), in the case of variable speed ac
motor drive applications however (where output filters are not
used) the hard voltage switching environment can result in
considerably shorter motor lifetime.
Recent attempts to partially solve this problem through the
use of resonant subcircuits [2][3][4][5], have resulted in
increased circuit complexity, very sensitive (waveform
dependent) inverter switching schemes, and altogether new
integral cycle output voltage and current control schemes.
Although resonant-based soft switching technology will
undoubtedly find its way to specific applications, the authors
believe that the VC-CSI approach is generally a simpler
solution to the problem of soft load switching environment.
The contents of this paper are organized as follows:
Section I1 describes the power circuit, the control circuit and
three control block realization alternatives (specifically:
0-7803-0582-5 /92$3.0001992 IEEE

Control

Filter

Fig. 1 General structure of the proposed voltage controlled


current soufce inverter (VC-CSI).
B. Power Circuit Description

The complete power circuit is shown in Fig. 2. The inverter


uses unidirectional reverse blocking switches. The objective of
the CSI is to produce three phase PWM line currents (jo) with
the minimum possible harmonic distortion. The capacitive
filter has two objectives. The first is to absorb the current
harmonic generated by the CSI P W M action. The second is to
define the output voltage and therefore generate the required
error between the actual y and reference y p* voltage signals.
<1,7

J 1L

PWh4 pattern is obtained from the voltage error, ensuring


tracking and minimum phase and amplitude error, with a
constant switching frequency. The output harmonic spectrum is
well defined. Furthermore, the carrier can be kept free-running.
Finally, implementation of this carrier technique is simple.

Power

SUPPlY

CSI

Filter

Load

Fig. 2 Three phase power circuit VC-CSI.


C. Voltage and Current Relationships

Current and voltage relationships are established by


reducing the power circuit of Fig. 2 to the per phase equivalent
circuits and the phasor diagram of Fig. 3. The following
equations apply for an R-L load:

d
v ( t )= R . L l ( t ) + L . - - ( ! l ( t ) }
-P
dt

Equations (1) and (2) show that if the capacitor current i


is sinusoidal, the output voltage (y p ) and load current (i 1) are
also sinusoidal. From (3) and for the above conditions, the
fundamental component of the CSI output current (jo) is also
sinusoidal. The exact current i is a PWM waveform, however
it has no low order harmonics.
D. Control Block Realization Options
The main function of the Control block is the on-line
generation of the CSI switching pattern required to produce an
output current (j o) with minimum harmonic distortion, and
with an amplitude and phase such that y tracks y p * .
Feedback P W M pattern generators used in C6-VSI's can be
adapted to VC-CSI's [1][6], if the switch gating requirements
are met. Three possible control block options are:
Bang-Bang Hysteresis Voltage Controller
This is the simplest technique, conceptually and in terms of
implementation. It also ensures good tracking. However, the
frequency of operation varies with the magnitude of the
reference and the load, resulting in uncontrolled output
harmonic content and phase jittering.
Adaptive P W Voltage Controller
This alternative is similar to the traditional carrier
Sinusoidal P W M technique [6]. However, in this case, the

Fig. 3 Single phase model of the VC-CSI and load. a) Per phase
equivalent circuit. b) Complex impedance model. c) Phasor
diagram.

Predictive Voltage Regulator


The primary objective of this technique is to maintain the
output voltage space vector within a specific range for the
maximum possible length of time [7]. To achieve this, a
predictive algorithm modifies the inverter output current (j o)
only if the output voltage error increases beyond a predefined
error zone. The output current ( i o )is modified by the CSI
according to one of the 9 possible CSI states. The selection of
the next state is done by computing the state which produces an
output current (j o) that returns the output voltage
within
the error zone. This control technique can be optimized to yield
minimum switching frequency and very low steady state error
(between y and y *). However, the implementation is
complex ancfcan best done by means of a calculator @SP or
Microcomputer). It also requires a model of the load.

eP)

kk

E. Referred Solution
The proposed VC-CSI is implemented in this work with the
Adaptive P W M Voltage Controller. This controller is best
suited for the application since it has very good tracking
capability, constant switching frequency and a relatively
simple implementation. The complete control structures for

phase
voltage
references

PI

Phase
switching
fUnctions

line-line
switching

functions

dc

load

bus

curfents

output 1
fik4.s

load
phase

Fig. 4 Adaptive PWM voltage controller diagram.

this scheme is shown in Fig. 4. The error regulator is of the PI


type, the camer is of the triangular type.The bi-level patterns

vpk,l = hI,l ' I d ,

xc

'

produces, S I , S2 and S3 (line to neutral patterns) are


subtracted to produce the tri-level switching patterns (line to
line), Swl,Sw2 and Sw3,and, by application to the dc bus
current , the output current. The switch gating signals are
obtained from the combination of the switching patterns and
the required shorting pulses.

and the harmonic rms output phase voltage, assuming the load
impedance to be very high respect to the filter impedance at the
switching frequency,. is given approximately by
Vpk,n

IIL DESIGNGUIDELINES

5*

xc

hI,n ' I d c ' -

A. Design of the Output Capacitor

(6)

Using (4),( 5 ) and (6), the filter reactance is given by

This capacitor is designed to achieve a desired output


voltage quality. This is quantified by means of a specified total
harmonic distortion (THD,) defined as

THD,

- loo

with
k : phase a, b, c.
hl, 1 : normalized rms output current (see TABLEI).
:normalized dc input current.
X L : normalized load reactance (XL = 2?rf&).
X c : normalized filter reactance CX, = 1/(27~.~C9).
n : harmonic order.

Design of the inverter system requires the choice of the


output filter capacitor and the parameters of adaptive PWM
voltage controller (proportional and integral gains, amplitude
and frequency of the carrier). The voltage controller parameters
depend upon the output capacitor value.

THD,% =

(5)

J X C 2 4 . X C . X L +1

where F, (TABLE11) is given by

(4)

vPk,l
Assuming the adaptive P W M controller produces a SPWM
type pattern, the normdized rms output phase voltage is given
from Fig. 3(a) by

F, =

5 14

n=2
hI,l

z
+x&1

(7)

TABLEI
GENERALIZED
HARMONICS OF i FOR A LARGE
AND ODD N THAT
IS A MULTPLE
OF 3. hi,n = Iok,n 1Idc ARE TABULATED
AS A
FUNCTION
OF THE MODULATION
h E X (M), WHERE zokpnARE THE

To ensure safe operation under transient conditions a safety


margin of 2 is introduced and (1 1) becomes
( 1 - M ) * AA '0.5 = U k , N

RMS VALUES OF THE HARMONIC CURRENTS.

M=0.4

M=0.6

M=0.8

M=1.0

1
Nf2
Nf4
2.N f 1
2.N f 5
3.N f 2
3.N f 4
4.Nf 1
4.N f 5
4.N f 7

0.245
0.037

0.367
0.080

0.200

0.227

0.085
0.007
0.096

0.124
0.029
0.005
0.021

0.490
0.135
0.005
0.192
0.008
0.108
0.064
0.064
0.051
0.010

0.612
0.195
0.01 1
0.111
0.020
0.038
0.096
0.042
0.073
0.030

'fi

(12)

From (10) and (12), the triangular carrier amplitude is


given by
*

TABLEII
CONSTANT
F, FOR A LARGEAND ODDNTHAT
IS A MULTIPLE
OF 3.
F,. 100 ARE TABULATED
AS A FUNCTION
OF THE MODULATION
INDEX
(M),WHERE F,. IS DEFINED BY (8).

M=0.4
~~~~

21
27
33
39
45
51

From (4) and (7) the dc current (Idc) is given by

(9)

~~~~

3.111
2.418
1.977
1.673
1.449
1.279

M=0.6
~~~

M=0.8

M=1.0

2.488
1.851
1.512
1.278
1.107
0.976

2.311
1.788
1.460
1.233
1.068
0.942

2.679
2.080
1.700
1.438
1.246
1.099

B. Design of the Voltage Controller


In order to simplifl the design, the following assumptions
are made:
- The gain of the PI controller (Kp) is assumed equal to 1.
- The time constant of the PI controller is chosen so that the
integrator action occurs within approximately one switching
period. An integral time constant equal to one switching
period (llfd) was found to yield good tracking and good
transient response.
- The load is inductive (Fig. 3, $10).
The switching frequency can be defined by the switch
technology, the required dominant output harmonic or THD,,
or the desired output capacitor value. It is assumed to be N f o at
the design output frequency fo.
In order to find the triangular carrier amplitude (Ad), it is
assumed that in the feedback loop all the harmonics are
concentrated at the triangular carrier frequency ( N f o ) with an
equivalent amplitude given by
I

IV.DESIGNEXAMPLE
To illustrate the use of the design guidelines and equations
derived for the Adaptive PWM voltage controller, a design
example is presented.
The converter output specifications are:
S = 2 kVA, V = 220 V, f o = 60 Hz and cos (+) = 0.8
lagging
Base values are therefore:
Vbase = 127 v, ]base = 5.3 A, zbase= 24.2 fi and fbase=
60 Hz.
The converter operates at the nominal modulation index
( M ) of 0.8. With this value the control system is able to supply,
theoretically, a 20% current overload without loss of the
voltage source features. A normalized triangular carrier
frequency (N) equal to 27 is chosen, based on practical (switch
operation frequency) considerations. The following design
parameters can then be derived:

"

P = 1, T, = 0.037 pu = 0.62 ms, f d

= 27 pu = 1620 Hz.

From (7) and assuming a practical THDy= 5%

X c = 3.18 pu, therefore C = 35 pF

To ensure that the PI regulator output voltage (Uk, Fig. 4) is


lower than the triangular carrier amplitude and in order to
avoid loss of the constant frequency feature, the following
condition must be met
(l-M).A* 2 uk,N

*fi

from (9)
Idc= 1 . 7 3 p u = 9 A

and from (13)

(11)

A A = 0.56 PU = 71 V

where M is the nominal modulation index of the P W M pattern.


515

v.

SIMULATED AND EXPERIMENTAL


RESULTS

the CSI output current spectrum Fig. 5(d) and the phase
voltage spectrum, Fig. 5(e) are characterized by dominant
harmonics around the triangular carrier frequency (which is
typical in SPWM pattern generators).

A. Simulation Results
Proof of concept in terms of voltage controller operation and
output current and voltage waveforms is obtained through a
high level language computer simulation. The system
parameters are based on the above design example. The
simulated results, on a pu basis, are illustrated in Fig. 5.
Specifically, Fig. 5(a) shows the triangular carrier and the PI
output (U,), Fig. 5(b) the output phase voltage reference (v,,*),
output phase voltage (v ), and load current (;la), Fig. 5(c) the
CSI output current (i,,fand the line output voltage (vab), Fig.
5(d) the normalized spectrum of the CSI output current (io,),
finally, Fig. 5(e) the normalized spectrum of the output phase
voltage (v ,).
From k e simulated results it is possible to conclude that:
- the converter is operating with a modulation factor close to
0.8, Fig. 5(a)
the output voltage has a THD, equal to 5.1% , Fig. 5(b) and
5(e)
- the output phase voltage tracks the output phase voltage
reference with a minimum phase-shif? (approximately equal
to 3') and with a gain equal to 0.94 , Fig. 5(b) and Fig. 5(e)

B. Experimental Results
The proposed VC-CSI concept was implemented on an
experimental 2 kVA set-up to venfy the feasibility and confrm
the design procedure presented en Section 111. Key
experimental waveforms are shown in the Fig. 6. These results
were initially 'down-loaded' into a personal computer (PC) and
subsequently printed through the use of appropriate post
processing software. Specifically, Fig. 6(a) shows the
experimental output phase voltage (v,,) and load current (;la),
Fig. 6(b) the experimental CSI output current (io,) and the
line output voltage (vab), Fig. 6(c) the experimental spectrum
of the CSI output current (io,). These figures corroborate the
I. In
validity of key results predicted by eqn. (3,(6) and TABLE
particular they show that, as expected, the CSI output current
is PWM, i.e., with characteristic sideband harmonics around
the triangular carrier frequency. Finally, Fig. 6(d) shows the
spectrum of the experimental output phase voltage (v,,)
which, as predicted, is nearly free harmonics.

1.0

3.0

,"a

-1.0

Triangular Carrier

-3.0

Os

2.0

4ms

8ms

6ms

lOms

l2ms

14ms

16ms

c)

lr

fla

2ms

0.5A

vPa

-2.0 J

IkH

OH

WI

3kH

4L;H

SkH

6kH

7kH

d)
I
.
"

1 I

OH

lkH

ZkH

4kH

3kH

5kH

6kH

7kH

e)
Fig. 5 Simulation of the performance of the PWh4 VC-CSI with an adaptive controller (see Fig. 4). a) Triangular Carrier and PI output (U,). b)
Output phase voltage (v,)
reference phase voltage)',v(
and load current (ilu). c) CSI output line voltage (vub) and current (im). d)
Normalized CSI output current spectrum. e) Normalized output phase voltage spectrum.
516

250

-250

os

2ms

4ms

6ms

8ms

lomS

12ms

14ms

16ms

2ms

4ms

6ms

8ms

lOmS

12ms

14ms

16111s

350 ,

-350

os
7.5A

f*
160V

80V

d)

o v - !\ -

rd

Fig. 6 Experimental VC-CSI voltagdcurrent waveforms with an adaptive controller (Fig. 4). a) Output phase voltage ),v(
and load current
(ifa).b) CSI output line voltage (vab) and current (im). d) CSI output current spectrum. e) output phase voltage spectrum (fo = 60 Hz,
fd = 1620 Hz,cos(+) = 0.8 lagging).

[Z] D. M. Divan, "The resonant DC link converter - A new concept


in static power conversion", IEEE Tmns. Ind. Appl., vol. 25, no.
2, pp. 317-325, MarChlApril 1989.

VI. CONCLUSIONS
A fully functional voltage controlled current source inverter

(VC-CSI) has been proposed in this paper. The adaptive


SPWM control method has been used to force the output

[3] D. M. Divan and G. Skibinski, "Zerwwitching-loss inverters for


high-power applications", IEEE Tmns. Ind. Appl., vol. 25, no. 4,

voltage to track the respective sinusoidal reference signals.


This combination yields a general purpose three phase
balanced voltage supply with precise frequency and voltage
amplitude control. Moreover, has the inherent regeneration and
short circuit protection features associated with current source
inverters.

pp. 634-643, JuVAug 1989.


141 K. Bonhardt, "New possibilities for DC-side commutated inverter
circuits", in EPE Con$ Record, pp. 549-554,1989.

[SI K. Bonhardt, "Novel soft-switched GTO-inverter circuits", in


IEEE IAS Annual Meeting, pp. 1222-1227,1990.

REFERENCES

161
- _ G. Joos, P. D. Ziogas and D. Vincenti, "A Model Reference

Adaptive PWM Technique", IEEE Tmns. Power Electron., vol.


5 , no. 4, pp. 485494, Oct 1990.

[l] D. M. Brcd and D. W.Novotny, "Current Control of VSI-PWM


Inverters", IEEE Tmns. Ind. Appl., vol. 21, no. 4, pp. 562-570,

May/June 1985.

[7] G. Amler, "A PWM Current-Source Inverter for high Quality

Drives", in EPE Journal, pp. 21-32, July 1991.


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