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During the mid-1920s, several inventors attempted devices that were intended to
control current in solid-state diodes and convert them into triodes. Success did
not come until after WWII, during which the attempt to improve silicon and germ
anium crystals for use as radar detectors led to improvements in fabrication and
in the understanding of quantum mechanical states of carriers in semiconductors
. Then scientists who had been diverted to radar development returned to solid-s
tate device development. With the invention of transistors at Bell Labs in 1947,
the field of electronics shifted from vacuum tubes to solid-state devices.
With the small transistor at their hands, electrical engineers of the 1950s saw
the possibilities of constructing far more advanced circuits. As the complexity
of circuits grew, problems arose.[1]
One problem was the size of the circuit. A complex circuit, like a computer, was
dependent on speed. If the components of the computer were too large or the wir
es interconnecting them too long, the electric signals couldn't travel fast enou
gh through the circuit, thus making the computer too slow to be effective.[1]
Jack Kilby at Texas Instruments found a solution to this problem in 1958. Kilby'
s idea was to make all the components and the chip out of the same block (monoli
th) of semiconductor material. Kilby presented his idea to his superiors, and wa
s allowed to build a test version of his circuit. In September 1958, he had his
first integrated circuit ready.[1] Although the first integrated circuit was cru
de and had some problems, the idea was groundbreaking. By making all the parts o
ut of the same block of material and adding the metal needed to connect them as
a layer on top of it, there was no need for discrete components. No more wires a
nd components had to be assembled manually. The circuits could be made smaller,
and the manufacturing process could be automated. From here, the idea of integra
ting all components on a single silicon wafer came into existence, which led to
development in small-scale integration (SSI) in the early 1960s, medium-scale in
tegration (MSI) in the late 1960s, and then large-scale integration (LSI) as wel
l as VLSI in the 1970s and 1980s, with tens of thousands of transistors on a sin
gle chip (later hundreds of thousands, then millions, and now billions (109)).
The first semiconductor chips held two transistors each. Subsequent advances add
ed more transistors, and as a consequence, more individual functions or systems
were integrated over time. The first integrated circuits held only a few devices
, perhaps as many as ten diodes, transistors, resistors and capacitors, making i
t possible to fabricate one or more logic gates on a single device. Now known re
trospectively as small-scale integration (SSI), improvements in technique led to
devices with hundreds of logic gates, known as medium-scale integration (MSI).
Further improvements led to large-scale integration (LSI), i.e. systems with at
least a thousand logic gates. Current technology has moved far past this mark an
d today's microprocessors have many millions of gates and billions of individual
At one time, there was an effort to name and calibrate various levels of large-s
cale integration above VLSI. Terms like ultra-large-scale integration (ULSI) wer
e used. But the huge number of gates and transistors available on common devices
has rendered such fine distinctions moot. Terms suggesting greater than VLSI le
vels of integration are no longer in widespread use.
As of early 2008, billion-transistor processors are commercially available. This
became more commonplace as semiconductor fabrication advanced from the then-cur
rent generation of 65 nm processes. Current designs, unlike the earliest devices
, use extensive design automation and automated logic synthesis to lay out the t
ransistors, enabling higher levels of complexity in the resulting logic function
ality. Certain high-performance logic blocks like the SRAM (static random-access

ISB . (2010). p. Designers now must simulate across multiple fabrication process corners before a chip is cert ified ready for production. This has led to a rising interest in multicore and multiprocessor architectures. and Design for X. Boston: Pearson/Addison-Wesley. Neil H. 1174. Stricter design rules Due to lithography and etch issues with scaling. and wafer sizes go up ( due to lower manufacturing costs). Layout. which is tolerated because of the progress of Moore's Law. When introducing the hardware description language KARL in the mid' 1970s. with many design houses opting to swit ch to electronic design automation (EDA) tools to automate their design process. since an overall speedup can be obta ined by lowering the clock frequency and distributing processing. the number of dies per wafer increases. Jacob (2010). Third Edit Weste. Fourth Edition. Timing/design closure As clock frequencies tend to scale up. including design for manufac turing (DFM). The overhead for custo m design is now reaching a tipping point. and look ahead to post-silicon: Process variation As photolithography techniques tend closer to the fundamental laws of optics. and t he complexity of making suitable photomasks goes up rapidly. David M. microprocessor designers have encountered several challenges which force them to think beyond the design plane.[citation needed] Structured VLSI design had been popular in the early 1980s. p. CMOS VLSI Design: A Circuits and Systems Perspective. design ru les for layout have become increasingly stringent. and Harris. 840. A mask set for a mo dern technology can cost several million dollars. Several design philosophi es have been developed to aid this new design flow. Reiner Ha rtenstein coined the term "structured VLSI design" (originally as "structured LS I design"). and Simulation. This is obtained by repetitive arrangement of rectangular macro blocks which ca n be interconnected using wiring by abutment. echoing Edsger Dijkstra's structured programming approach by procedu re nesting to avoid chaotic spaghetti-structured program Challenges[edit] As microprocessors become more complex due to technology scaling. See also[edit] Application-specific integrated circuit Caltech Cosmic Cube Design rules checking Electronic design automation Polysilicon Mead & Conway revolution Further reading[edit] Baker. http://CMOSedu. This non-recurring expense det ers the old iterative philosophy involving several "spin-cycles" to find errors in silicon. An example is partitioning the lay out of an adder into a row of equal bit slices cells. ISBN 978-0-470-88132-3. but lost its popular ity later because of the advent of placement and routing tools wasting a lot of area by routing. achieving high accuracy in doping concentrations and etched wire s is becoming more difficult and prone to errors due to variation. and encourages first-pass silicon success. designers are findi ng it more difficult to distribute and maintain low clock skew between these hig h frequency clocks across the entire chip. VLSI technology may be moving toward further radical miniaturization with introducti on of NEMS technology.memory) cell. are still designed by hand to ensure the highest efficiency. E. Structured design[edit] Structured VLSI design is a modular methodology originated by Carver Mead and Ly nn Conway for saving microchip area by minimizing the interconnect fabrics area. Designers must keep ever more of these rules in mind while laying out custom circuits. design for test (DFT). R. In complex designs this st ructuring may be achieved by hierarchical nesting. First-pass success As die sizes shrink (due to scaling). Wiley-IEEE. CMOS: Circuit Design.

Retrieved 21 Apr 2 012. Chen. Nobelprize. . Introduction to VLSI References[edit] ^ Jump up to: a b c "The Tyranny of Numbers". Boston: A ddison-Wesley. Lynn (1980). and Conway. ISBN 0-201-04358-0.N 978-0-321-54774-3. Second Edition (Electrical Enginee ring Handbook). Mead. Wai-Kai (ed) (2006). ISBN 0-8493-4199-X. Boca Raton: CRC. The VLSI Handbook. Carver A.