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Single Phase Inverters

CONFERENCE PAPER JANUARY 2010

CITATIONS

READS

2,149

1 AUTHOR:

Ahmad Ale Ahmd

Babol Noshirvani University of Technology

14 PUBLICATIONS 59 CITATIONS

SEE PROFILE

Retrieved on: 20 January 2016

2010 3rd International Conference on Power Electronics and Intelligent Transportation System

of Single Phase Inverters

Ahmad Ale Ahmad, Student Member, IEEE, Adib Abrishamifar, Member, IEEE, Mohammad Farzi,

IRIEE.

switching frequency and its relation to the cut off

frequency of filter is not well considered. Also, none of

them were presented a straight forward method or

relation to calculate the L and C values.

This paper analyses the characteristics of the output LC

filter for PWM inverter. The cut off frequency of filter

and its relation to the modulation factor and switching

frequency are determined to meet the IEEE Std. 1547

requirements for attenuating the harmonics distortion.

Considering the switches current ripple, the inductance

and capacitance value are calculated. The

specifications and design criterias are illustrated in

this paper. This procedure is verified with simulation

results.

for output LC filter of single phase inverter. Two main

goals of the procedure are to meet the IEEE Std. 1547

requirements for attenuating of harmonics distortion and

to limit the high frequency current of switches in

acceptable value. The design steps and their

considerations are discussed comprehensively. This

procedure is verified with simulation results for a 220V,

5KVA inverter. The simulations run either linear or

nonlinear full loads.

Keyword- Inverter, LC filter, cut off frequency, THD,

inductor current ripple,

I. INTRODUCTION

application such as distributed generation, active filter,

stand-alone application based on renewable energy,

uninterruptible power supply (UPS) and dynamic

voltage restorers [1-3].

Two main duties of the output LC filter are to attenuate

the output voltage ripple and to limit the high

frequency ripple current of inverter switches. The

attenuation of switching frequency voltage at the

output node is depended on the cut off frequency of

filter. Also, bandwidth of inverter controller is limited

by the cut off frequency of the filter [3]. The cut off

frequency of the filter have to be selected small for

perfect voltage ripple attenuation, and the bandwidth of

the controller have to be wide for fast response to step

or nonlinear load. So, there is a trade off between the

bandwidth of the controller and filter attenuation.

After selecting the cut off frequency of filter,

determining the L and C values is very important issue,

because they affect on ripple current of inverter

switches, the inverter output impedance [4], efficiency

[4-5], transient response [3] and also the cost of the

inverter.

In [4-6], the cut off frequency of LC filter is designed

based on the Fourier series of the inverter output

voltage. Then by using the relation between the filter

capacitor and the system time constant, the capacitor

and inductor value are designed [4]. In [5], the L and C

are selected to minimize the filter reactive power.

Authors of [6] defined a cost function based on

reactive power where the reactive power of inductor is

weighted two times higher than the reactive power of

capacitor, then calculating the L and C value to

minimize this cost function. Other ones used the same

method too, but the ripple current of inductor,

very important issue. This filter should reduce the high

frequency distortion of output voltage and control the

switching current. The switching devices generate this

distortion. The IEEE Std. 1547 requirement for

maximum harmonic voltage distortion is shown in

table 1. For the medium power inverters whose PWM

frequency is higher than 3 KHz, the low frequency

harmonics (2nd, 3rd, 5th , and 7th) are usually rejected by

controller perfectly. So, the high frequency distortion is

only included switching or PWM frequency.

According to the standard this distortion should be

limited under 0.3%.

TABLE 1. IEEE STD. 1547 REQUIREMENTS FOR MAXIMUM HARMONIC

VOLTAGE DISTORTION

Individual

Harmonic

order

h<11

Total

Percent

(%)

4.0

35h Harmonic

Distortion

2.0

1.5

0.6

0.3

5.0

shown in Fig1. This filter consists of two unknown

components, L and C, and the load (RL) can be varied

from the minimum load (RL=) to maximum load

(RL= RLm). So, the filter should be studied in two

situations, minimum and maximum load. The transfer

function from Vi to Vo (Fig. 1), H(), is shown in (1):

X C ()||R L

Vo()

H()=

=

(1)

Vi() X C ()||R L +X L ()

Where XC() and XL() are impedance of capacitor

and inductor, respectively, and =2f, f is the input

voltage frequency.

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2010 3rd International Conference on Power Electronics and Intelligent Transportation System

3m

(7)

2000

If the inequality (7) is solved for m=0.95, the cut off

frequency of the LC filter (fr) must be less than fs/15 to

satisfy the standard limitation. So:

1

(8)

r s and k 15

k

Really, the attenuation due to the filter at the

fundamental frequency obtains as follow:

2

H NL (1 ) = 2 s 2

(9)

s -(k1 )

Fig 2 shows the |HNL(1)| as a function of fs and k

where the k factor and switching frequency have been

changed from 15 to 20 and 3KHz to 10KHz,

respectively. These curves reveal that our first

assumption about the attenuation of the filter at the

fundamental frequency is not far from our expectation.

H NL (s )

output voltage of the filter.

In minimum load condition (RL=), (1) can be

summarized as:

2

H NL ()= 2 r 2

(2)

r -

1

(3)

LC

where r=2fr and fr is the cut off frequency of the LC

filter. The amplitude of input voltage at the switching

frequency depends on DC input voltage and duty ratio

of PWM signal. It will be maximum when the duty

ratio is 50%. So:

4 V

(4)

Vi (s ) max = DC

2

where s=2fs and fs is the switching frequency. On the

other hand, the amplitude of input voltage at

fundamental frequency depends on DC voltage and

modulation factor. It can obtain as:

Vi (1 ) =mVDC

(5)

where 1=2f1 and f1 and m are fundamental frequency

and modulation factor, respectively. Because, at the

fundamental frequency, the voltage drop across the

filter can not be estimated before the L and C values

are specified, we neglect this voltage drop by the first

assumption. It means that the attenuation of the LC

filter at the fundamental frequency is approximately

0dB, so according to the standard limitation for output

voltage distortion, we can write:

Vo (s ) max

Vi (s ) max H NL (s )

2

0.3

=

H NL (s )

Vo (1 )

Vi (1 ) H NL (1 )

m

100

(6)

So to meet the IEEE Std. 1547 requirements, the

attenuation of the LC filter at the switching frequency

should satisfy following inequality:

2r =

load situation.

At the maximum load condition (RL= RLm) the filter

attenuation at the switching frequency is more than

minimum load condition. But the filter attenuation at

the fundamental frequency should be studied. The

transfer function of the LC filter at the maximum load

condition is:

2r

H FL ()=

(10)

2r -2 +j

R Lm C

Then:

2r

H FL () =

(11)

2

2

2 2

( r - ) +(

)

R Lm C

(11) shows that the attenuation amplitude depends on

the cut off frequency, load value and also capacitor or

inductor value. There are several methods to determine

the inductor and capacitor value. In the first approach,

we calculated the L and C value to minimize the filter

reactive power. This is suitable to increase the inverter

efficiency. The reactive power of filter at the

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2010 3rd International Conference on Power Electronics and Intelligent Transportation System

function of inductor value, cut off frequency of filter,

output voltage and the load, as follow:

L

3

Q= 21 - 12 + 1 4 VO2

(12)

R L Lr Lr

To minimize the filter reactive power at the maximum

load, the inductor value can be determined as follow:

Q=0

(13)

So:

R

L= Lm

2r 12

(14)

2r

If the r is at least 3 times larger than 1 then the

inductor value can be approximated by:

R

(15)

L Lm

r

Also, the reactive power at the minimum load is

calculated as:

Q(R L = ) PLm 1

(16)

r

where the PLm is the output power at the maximum

load. The equation (16) shows that to decrease the filter

reactive power at the minimum load, the cut off

frequency of filter should be selected as large as

possible (greater than the fundamental frequency of the

inverter).

Although, this approach improves the inverter

efficiency, it provides a very large inductor value. So,

it increases the cost and the size of filter. The large

inductor value increases the output impedance of

inverter too. It also causes a large over or under-shoot

voltage in the step load condition. All of these

evidences indicate that other criteria should be selected

to calculate the inductor value.

The main duty of inductor is the control of the

switching frequency of inverter ripple current. So, the

maximum acceptable ripple current and the switching

frequency of the inverter can determine the minimum

inductor value. The ripple can be estimated as:

V

(17)

I L = L t

L

According to Fig 1, when the inverter switches are on:

(18)

VL =VDC -Vo =VDC -Vomsin(1 t)

Where Vom is the amplitude of output voltage. When

the inverter switches are on, the t is obtained as

follow:

D m sin(1 t)

t= =

(19)

fs

fs

Where m is modulation index and 0<m<1. Replacing

(18) and (19) in (17), and dividing by inductor

fundamental current:

I L m1 VDC -Vomsin(1 t) sin(1 t)

=

IL

fs IL L1

(20)

m1 VDC -Vom sin(1 t) sin(1t)

fs VL (1 )

fundamental frequency, and it can be considered as a

fraction of output voltage:

VL (1 ) = Vo (1 )

(21)

Selection of depends on the switching frequency and

maximum acceptable ripple current. However, Fig 3

shows the ripple of inductor current in two conditions.

The maximum ripple occurs at 1t=n/2. Usually,

the ripple current between 20% to 40% is acceptable. If

equations (20) and (21) are solved for , the quantity of

is obtained for specified maximum ripple current at

different switching frequencies (Fig 4).

period.

maximum ripple current of 20% and 40%.

calculated. With KCL at the output node:

1

(22)

I L (1 )=IC (1 )+IO (1 )=(j1C

)Vo (1 )

RL

1

)Vo (1 )

(23)

RL

At the maximum load condition, by using (21) and

(25):

VL (1 )=j1LI L (1 )=j1 L(j1C

1

) Vo (1 ) (24)

R 2Lm

Now, the inductor and capacitor values are:

VL (1 ) = Vo (1 ) =1L (12 C2 +

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2010 3rd International Conference on Power Electronics and Intelligent Transportation System

L=

R Lm

1

2 -

14

4r

(25)

12

1

(26)

R Lm 2 r4 -14

To obtain real answer for the equations (25) and (26),

the following condition must be satisfied:

(27)

r > 1

or

k

(28)

fs >

f1

maximum load for fs =20KHz.

transfer function from Vi to Vo can be written as:

2r

H FL () =

(29)

2 2 4 4

2

2 2

( r - ) +( ) ( r -1 )

1

The LC filter of an inverter can be designed in the

following mentioned 4 steps:

1) Selecting the switching frequency.

High switching frequency aims to reduce the filter size,

but the maximum frequency of solid state switches and

their dynamic losses limit the switching frequency. It is

usually chosen between 3KHz to 15KHz for IGBT

based inverter and 10KHz to 100KHz for MOSFET

based inverter.

2) Selecting k factor.

The standard requirement will be meet, if k=15, but

lager k factor causes more attenuation at switching

frequency and little amplification at the fundamental

frequency. If the modulation factor is less than 0.95,

the minimum of k should be calculated by equations

(7) and (8).

3) Selecting factor.

completely depends on the switching frequency and

acceptable inductor ripple current. 20% to 40% is an

acceptable range for ripple current. So using the

equation (20) or Fig 4, this factor can be selected.

The inequalities (27) and (28) should be satisfied. If it

is not maintained, then the k and factor should be

renewed and selected again.

4) Now using equations (8), (25) and (26), the

necessary L and C can be calculated.

r

H FL (1 ) =

(30)

2

(1+ )r2 -212

Fig 6 and 7 show the |HFL(1)| as function of r and

for fs equal to 3KHz and 20KHz, respectively.

maximum load for fs =3KHz.

to 0.2, the maximum attenuation of filter will only be

3%. So, this aims to optimize the size of inductor and

capacitor . Another important result of these figures is

that, if the cut off frequency of the filter is decreased

below the 200Hz, the filter can amplify the

fundamental frequency. This is sometimes useful, but

the filter size will be increased. Also, the stability of

the system will be very critical, because the phase

margin of system decreases when the cut off frequency

is decreased.

To verify the algorithm, an LC filter is designed for an

inverter whose main characteristics are mentioned in

table 2.

TABLE 2. INVERTER CHARACTERISTICS.

VDC

VO

Sout

fs

f1

360V

220VRMS

5KVA

20KHz

50Hz

inverter, the 0.95 is appropriate for modulation factor,

so k=15. To limit the inductor ripple current below the

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PEITS2010

2010 3rd International Conference on Power Electronics and Intelligent Transportation System

This aims us the filter specification which is listed in

table3.

The fig 9 (a) and (b) show the output voltage and its

spectrum at maximum nonlinear load. The current crest

factor is 3. The THD is below the standard limitation.

L

C

fr

770H

18F

1330Hz

a)

main low frequency harmonics (2nd, 3rd, 5th, 7th) of

output voltage the bandwidth of control loop should be

at least 350Hz. The capacitor current loop is employed

to guarantee the stability of the inverter. Also, the inner

loop make the inverter to present a fast response to

nonlinear loads. Using the sliding mode control theory,

the gains of voltage and current loop are easily

obtained.

b)

output voltage in maximum nonlinear load with CF=3.

shows the ripple of inductor current in one-fourth of a

period. As we have designed, the ripple is below 40%

and the maximum ripple is occured about 45 degree.

simulated with Simulink Toolbox in MATLAB. Fig 8 a

and b show the output voltage and its spectrum at

maximum linear load, respectively. The THD of the

output voltage is below 0.5% and also the switching

frequency distortion is below 0.1%. So, it meets the

standard requirements for harmonics distortion.

a)

a)

b)

b)

output voltage in maximum linear load.

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2010 3rd International Conference on Power Electronics and Intelligent Transportation System

V. CONCLUSION

A complete algorithm to design output LC filter of a

single phase inverter is developed in this paper. To

meet the IEEE Std. 1547 requirements for attenuating

of harmonics distortion, a relation between cut off

frequency of the filter and switching frequency is

calculated. The inductor value is designed to limit the

high frequency ripple of switches current. This

algorithm is verified with simulation results for a

220V, 5KVA inverter. The THD of output voltage is

less than 0.4% and 1.1% at linear and nonlinear full

load, respectively. In both simulations, the HD of

switching frequency is lower than 0.15%.

VI. REFERENCES

[1] 1.

Patricio Corts, M., IEEE, Gabriel Ortiz, Juan I. Yuz,

Member, IEEE, Jos Rodrguez, Senior Member, IEEE, and M.

Sergio Vazquez, IEEE, and Leopoldo G. Franquelo, Fellow, IEEE,

Model Predictive Control of an Inverter With Output LC Filter for

UPS Applications. IEEE TRANSACTIONS ON INDUSTRIAL

ELECTRONICS, 2009. 56(6): p. 14.

[2] 2.

JOSEP M. GUERRERO, L.G.D.V., and JAVIER

UCEDA, Uninterruptible power supply systems provide protection.

IEEE Industrial Electronics Magazine, 2007. 1(1).

[3] 3.

Hyosung Kim , S.K.S., Analysis on Output LC Filter for

PWM Inveter. IPEMC2009, 2009: p. 6.

[4] 4.

J. Kim, S.M., IEEE, J. Choi, Member, IEEE, H. Hong,

Student Member, IEEE, Output LC Filter Design of Voltage Source

Inverter Considering the Performance of Controller. 2000: p. 6.

[5] 5.

Pekik A. Dahono, A.P., Qamaruzzaman, An LC Filter

Degign Method for single Phase PWM Inverter. 1995: p. 6.

[6] 6.

S. B. Dewan, P.D.Z., Optimum Filter Design for a Single

Phase Solid State UPS System. IEEE Transaction on Industrial

Application, 1975. IA-21(3): p. 6.

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