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# Chapter 4.

Digital Logic
Embedded Systems
This chapter introduces digital logic. We will first define what it means to be digital, and then introduce
logic, voltages, gates, flip flops, registers, adders and memory. This chapter is foundational, laying the ground work
for the remainder of the class.

Learning Objectives:
 Understand N-channel and P-channel MOS transistors.
 Learn digital logic as implemented on a computer.
 Know how to build simple logic from transistors.
 Learn how to construct the basic components of a computer from the logic gates.
 Know the terms: flip flop, register, binary adder and memory.

4.0. Binary Information Implemented with MOS transistors
Information is stored on the computer in binary form. A binary bit can exist in one of two possible states. In
positive logic, the presence of a voltage is called the ‘1’, true, asserted, or high state. The absence of a voltage is
called the ‘0’, false, not asserted, or low state. Figure 4.1 shows the output of a typical complementary metal oxide
semiconductor (CMOS) circuit. The left side shows the condition with a true bit, and the right side shows a false.
The output of each digital circuit consists of a p-type transistor “on top of” an n-type transistor. In digital circuits,
each transistor is essentially on or off. If the transistor is on, it is equivalent to a short circuit between its two output
pins. Conversely, if the transistor isoff, it is equivalent to an open circuit between its outputs pins.

Figure 4.1. A binary bit is true if a voltage is present and false if the voltage is 0.
Every family of digital logic is a little different, but on a Stellaris® microcontroller powered with 3.3 V
supply, a voltage between 2 and 5 V is considered high, and a voltage between 0 and 1.3 V is considered low, as
drawn in Figure 4.2. Separating the two regions by 0.7 V allows digital logic to operate reliably at very high speeds.
The design of transistor-level digital circuits is beyond the scope of this class. However, it is important to know that
digital data exist as binary bits and encoded as high and low voltages.

Checkpoint 4.1. What does binary mean?

Figure 4.2. Mapping between analog voltage and the corresponding digital meaning on the TM4C123.

we will give just a little taste of how the computer digital logic in the computer works. Assume the circuit in Figure 4.4. The 74HC04 is a high-speed CMOS NOT gate.3 represent characters. and is built by grouping eight binary bits into one object. a signed integer. CMOS implementation of a NOT gate. What is the smallest unsigned integer that can be represented? What is the largest unsigned integer that can be represented? Checkpoint 4.. Checkpoint 4. sounds. logical states. Another name for a collection of eight bits is octet (octo is Latin and Greek meaning 8. In general. A collection of 3 bits has 8 possible states (000.4. 101. 001. how many characters could it represent? 4. 10. What is the smallest unsigned integer that can be represented? What is the largest unsigned integer that can be represented? Checkpoint 4.3V means true or 1. a collection of n bits has 2n states. numbers.3 contains a signed 2’s complement integer. 110.3. the output voltage 3. A byte is comprised of 8 bits. Digital Logic In this section. text. Assume the circuit in Figure 4. as shown in Figure 4. What these 8 bits mean depends on how the computer software chooses to interpret them. Again. Figure 4. A collection of 2 bits has 4 possible states (00. What the bits mean depends on how the information is organized and more importantly how it is used. 01.1. For example. 100. and 111).) Information can take many forms. This figure shows one byte in the state representing the binary number 01100111.3 contains an unsigned integer.g. a byte contains eight bits.3. a part of a machine code. and the output voltage of 0V means false or 0. Figure 4. Possibilities include but are not limited to an unsigned integer.2. instructions. 011. as shown in Figure 4. and 11). in this case representing the binary number 01100111. or images. Transistors made with metal oxide semiconductors are called MOS. Circuits made with both p-type and n-type MOS transistors are called complementary metal oxide semiconductors or CMOS.3. In the digital world MOS transistors can be thought of as voltage controlled switches. If the data stored in Figure 4. . we use multiple bits.4. and a character. e.If the information we wish to store exists in more than two states. 010.

Figure 4. OR.3V). For a p-type transistor.3V). converting the signal ~(A&B) into the desired result of A&B. In this case.1. and no current will flow if the switch is open. If both inputs A and B are low. hence the name complementary metal oxide semiconductor. the signal labeled ~(A&B) will be low because the T3–T4 switch combination will short this signal to ground.4.5. both T1 and T2 will be active. we can assume no current flows into or out of the gate. EOR digital logic takes two inputs and produces one output. In general. We can understand the operation of the AND gate by observing the behavior of its six transistors. T2 switches will short this signal to +3. We can use the and operation to extract. T2 will be active and T4 off. If A is high. Therefore if either A is high or if B is high. the signal labeled ~(A|B) will be high because the T1–T2 switch combination will short this signal to +3. Therefore if either A is low or if B is low. A p-type transistor will be off (its switch is open) if its gate is high. An n-type transistor will be off (its switch is open) if its gate is low. If the input A is high (+3. T3 and T4 will be off. T4 will be active and T2 off. Furthermore. From a first approximation. the switch will be closed (transistor active) if its gate is high.There are just a few rules one needs to know for understanding how CMOS transistor-level circuits work. The gate on the n-type works in a complementary fashion. T1 will be active and T3 off. if B is high. We can understand the operation of the OR gate by observing the behavior of its six transistors. then p-type transistor is active and the n-type transistor is off. The closed switch across the source-drain of the p-type transistor will make the output high (+3. both T3 and T4 will be active. current can flow from source to drain across an active p-type transistor. then the p-type transistor is off and the n-type transistor is active. if A and B are both low. For an n-type transistor. If both inputs A and B are high. Two-input one-output logical operations. Similarly. T4 switches will . individual bits from a value. T1 and T2 will be off. or mask. T3 will be active and T1 off.1. Transistors T5 and T6 create a logical complement. Therefore. Furthermore. if A and B are both high. if A is low (0V). consider the two possibilities for the circuit in Figure 4. The closed switch across the source-drain of the n-type transistor will make the output low (0V).3V. If A is low. Each transistor acts like a switch between its source and drain pins. the signal labeled ~(A&B) will be high because one or both of the T1. if B is low. Conversely. see Figure 4. Similarly. the switch will be closed (transistor active) if its gate is low. Logical operations can be implemented with discrete transistors or digital gates.5 and Table 4. The AND.3V. A B 0 0 0 1 1 0 1 1 Symbol AND 0 0 0 1 A&B NAND 1 1 1 0 ~(A&B) OR 0 1 1 1 A|B NOR 1 0 0 0 ~(A|B) EOR 0 1 1 0 A^B Ex NOR 1 0 0 1 ~(A^B) Table 4. the signal labeled ~(A|B) will be low because one or both of the T3. In this case.

When writing software we will have two kinds of logic operations. The logic operation is applied independently on each bit. Although 1 is the standard value for a true. the OR operation is a NOR followed by a NOT. Similarly. the Boolean operator for OR is ||. any nonzero value is considered as true. A= B = A|B 01100111 11110000 11110111 In C.6. the Boolean operator for AND is&&. A= B = A||B 01100111 11110000 1 Other convenient logical operators are shown as digital gates in Figure 4. the condition false is represented by the value 0. the logic operator for AND is &. In other words. the operation is applied independently on each bit. When operating on numbers (collection of bits) we will perform logic operations bit by bit. In this case. if number A is 01100111 and number B is 11110000 then A= B= A&B 01100111 11110000 01100000 The other type of logic operation occurs when operating on Boolean values. E.5 and 4. Figure 4.g.6. For example. Other logical operations can also be implemented with MOS transistors..short this signal to ground. converting the signal ~(A|B) into the desired result of A|B. The NAND operation is defined by an AND followed by a NOT. it would be more precise to say AND is defined as a NAND followed by a NOT. The standard value for true is the value 1.6. and true is any nonzero value. In C. if the Boolean A is 01100111 and B is 11110000 then bothe A and B are true. In C. the logic operator for OR is |. In C. The exclusive NOR operation implements the bit-wise equals operation. Performing Boolean operation yields A= B= A&&B 01100111 11110000 1 In C. . If you compare the transistor-level circuits in Figures 4. Performing Boolean operation of true OR true yields true. Transistors T5 and T6 create a logical complement. We use the OR operation to set individual bits.

if the inputs are S*=1 and R*=0. In this class we will not use the plus sign to represent OR to avoid confusion with arithmetic addition. which are essential components used to make registers and memory. In this class we will not use the multiplication sign to represent AND to avoid confusion with arithmetic multiplication. One way to build a set-reset latch is shown on the left side of Figure 4. ~A A’ !A and ⌐A are five ways to represent NOT(A). then the Q output will be 1. precedence is used to determine the order of operation. Checkpoint 4. what is the relationship between A and B? Checkpoint 4.g. We make the signal S* go low. E. B. Now. This order can be altered using parentheses. and then OR. but rather are part of the name used to clarify its meaning.5. Usually NOT is evaluated first.7. How does this operation affect C? Checkpoint 4. then back high to set the latch. we leave both the S* and R* inputs high. Another symbolic rule is adding a special character (* n \) to a name to signify the signal is negative logic (0 means true and 1 means false).Boolean Algebra is the mathematical framework for digital logic. Enable* is a signal than means enable when the signal is zero.2. then the Q output will be 0. and consider the operation B=A&0x20.7. C either as Booleans or as individual bits of a logic operation. Flip-flops are used for storage While we’re introducing digital circuits. How does this operation affect D? When multiple operations occur in a single expression. The simplest storage device is the set-reset latch.2.8. Fundamental laws of Boolean Algebra. With these laws. A&B=B&A A|B=B|A (A & B) & C = A & (B & C) (A | B) | C = A | (B | C) (A | B) & C = (A & C) | (B & C) (A & B) | C = (A | C) & (B | C) A&0=0 A|0=A A&1=A A|1=1 A| A=A A | (~A) = 1 A& A=A A & (~A) = 0 ~(~A) = A ~(A | B) = (~A) & (~B) ~(A & B) = (~A) | (~B) Commutative Law Commutative Law Associative Law Associative Law Distributive Law Distributive Law Identity of 0 Identity of 0 Identity of 1 Identity of 1 Property of OR Property of OR Property of AND Property of AND Inverse De Morgan’s Theorem De Morgan’s Theorem Table 4. where A&0x20 is performed bit by bit. we consider A. we make the . Let C bit an 8-bit number. One can use the pipe symbol (|) or the plus sign to represent logical OR: A|B A+B. then AND. making Q=1..6. and consider the operation D=D|0x20. If the inputs are S*=0 and R*=1. Let A bit an 8-bit number. Let D bit an 8-bit number. Checkpoint 4. There are multiple ways to symbolically represent the digital logic functions. Let C be an 8-bit number and consider the operation C=C&0xDF. One can use the ampersand symbol (&) or a multiplication sign (* • × ) to represent logical AND: A&B A•B. Are these two operations the same or different? C=C&0xDF C=C&(~0x20) 4. Conversely. Normally.2. Some fundamental laws of Boolean Algebra are listed in Table 4. For example. we need digital storage devices. if we consider B as a Boolean value. Conversely. These symbols do not signify an operation.

then the latch is in its quiescent state. we make its G* high. making Q=1.3. the last value on the D input is remembered or latched when the W falls. we first place the digital value we wish to remember on the D input. and a control signal.8. If the gate (G) input on the 74HC374 is high. The front-end circuits take a data input. the value is available at the Q output. remembering the value on Q that was previously written. then back high to reset the latch. After the rising edge of the clock. For example. if W=0. meaning that changes in the output occur at the rising edge of the input clock. Furthermore. However. So. as shown in Table 4.3.3. which is high-speed memory inside the processor.7. The tristate driver provides a way to connect multiple outputs to the same signal. D. and it is also called HiZ or high impedance. The operation of a tristate driver is defined in Table 4. To activate the driver. Digital storage elements. Figure 4. If both S* and R* are 1. next we make W go high. if D=1 and W=1. the outputs will be high or low depending on the stored values on the flip-flop. its outputs will be HiZ (floating). The 74HC374 is an 8-bit D flip-flop. and if the gate is low. The tristate driver. The D flip-flop. can be used dynamically control signals within the computer. It is called tristate because there are three possible outputs: high. The HiZ output means the output is neither driven high nor low. The 74HC374 is similar in structure and operation to a register. In particular. such that all 8 bits are stored on the rising edge of a single clock. then S*=0 and R*=1. W. if W=1. making Q=0. Normally.7.7. and the D input is free to change. and produce the S* and R* commands for the set-reset latch. its output Y floats independent of A. After W goes low. . If the D input changes while W is high. The D flip-flops are edgetriggered. To deactivate the driver. D 0 1 0 1 0 1 W 0 0 1 1 ↓ ↓ Q Qold Qold 0 1 0 1 D 0 0 1 1 0 1 clock 0 1 0 1 ↑ ↑ Q Qold Qold Qold Qold 0 1 Table 4. The operation of the clocked D flip-flop is defined on the right side of Table 4. shown on the right of Figure 4. then the data input is stored into the latch. we can’t connect two digital outputs together.4. its output (Y) equals its input (A). We will also see this floating statewith the open collector logic. D flip-flops are the basic building block of RAM and registers on the computer. To save information. This causes the data value to be stored at Q. shown in Figure 4. The tristate driver is an essential component from which computers are built. The gated D latch is also shown in Figure 4. When the driver is active. to use the gated latch. When the driver is not active. making Q=0. and then give a rising edge to the clock input. Qold is the value of the D input at the time of fall of W or rise of clock. However. This latch enters an unpredictable mode when S* and R* are simultaneously low. and then we make W go low. The 74HC244 is an 8-bit tristate driver. as long as at most one of the gates is active at a time. The 74HC374 8-bit D flip-flop includes tristate drivers on its outputs. then the Q output will change correspondingly. we make its gate (G*) low. then S*=1 and R*=0. the value on Q will be remembered or stored. can also be used to store information. low. we first put the data on the D input. and HiZ. if D=0 and W=1.signal R* go low. the data does not need to exist at the D input anymore. such that all 8 bits are active or not active controlled by a single gate. D flip-flop operation.

then Y is HiZ). an LED. In general. a solenoid. whereas the 7406 has a maximum IOLof 40 mA.8. and T8 in series with the ground.. such that the output is not high or low. the 7405 has a maximum output low current (IOL) of 16 mA. then Y equals A. .9. and the output is low (0V). so the output Y equals the input A.4 describes how the tristate driver in Figure 4.8 works. both T5 and T8 will be on. drawn with the ‘×’. In particular. However. Since T5 is in series with the +3. the transistor is off. I. The output of an open collector gate. 74HC04 is high-speed CMOS and can only sink up to 4 mA when its output is low. If A is low (0V). the transistor is active. the circuit behaves like a cascade of two NOT gates.3V. we can use an open collector NOT gate to switch current on and off to a device. if G* is high. HiZ is the floating state. With T5 and T8 on. and the output is neither high nor low. it will float. The signal G* is negative logic. The 74HC05. such as a relay. Consider the operation of the transistor-level circuit for the 74HC05. has two states low (0V) and HiZ (floating) as shown in Figure 4.4. if the input G*=1. Tristate driver operation. transistors T3 and T4 create the complement of A. In this case. or a small motor. A 0 1 0 1 G* 0 0 1 1 T1 on on off off T2 off off on on T3 on off on off T4 off on off on T5 on on off off T6 off on off on T7 on off on off T8 on on off off Y 0 1 HiZ HiZ Table 4. the 7405.3V). both T5 and T8 will be off. A 1-bit tristate driver and an 8-bit tristate driver (if G* is low.e.Figure 4. Two transistor implementations of an open collector NOT gate. Table 4. and the 7406 are all open collector NOT gates. Since the 7405 and 7406 are transistor-transistor-logic (TTL) they can sink more current. the output Y will be neither high nor low. Figure 4.9. Similarly. Transistors T1 and T2 create the logical complement of G*. the 74LS05. An input of G*=0 causes the driver to be active. If A is high (+3.