You are on page 1of 22

DEPARTMENT OF TCE

APSCE

DK

OPERATIONAL AMPLIFIERS- MODULE 2 PART 2


Integrated circuit (IC) is a complete electronic circuit in which both active and
passive components are fabricated on an extremely tiny single chip of silicon. Active
components are those which produce gain i.e. transistors and FETs (Field Effect
Transistors). Passive components are those which do not produce gain i.e. resistors,
capacitors and inductors.
ICs are classified based on
(i) amount of circuit or component densitySSI, MSI, LSI, VLSI
(ii) method of constructionmonolithic, thick and thin film, hybrid or multi-chip.
(iii) their functionlinear, digital.
Small Scale Integration (SSI) consists of 3 to 30 gates per chip or maximum 100
transistors per chip. They are basically used to design logic gates and Flip-Flops.
Medium Scale Integration (MSI) consists of 30 to 300 gates per chip or 100 to
1000 transistors per chip. They are basically used to design counters, multiplexers
and adders.
Large Scale Integration (LSI) consists of 300 to 3000 gates per chip or 1000 to
20000 transistors per chip. They are basically used to design 8 bit microprocessors,
ROM and RAM.
Very Large Scale Integration (VLSI) consists of more than 3000 gates per chip or
20000 to 1000000 transistors per chip. They are basically used to design 16 or 32 bit
microprocessors etc.
Digital ICs mainly consist of digital circuits. These are used in the field of digital
logic levels and computer.
Linear ICs: Different i/p levels have different o/p levels and input and output
relationship is linear. These are mainly used in number of electronic applications such
as in the fields of audio and radio communication, medical electronics etc. These are
used in amplifiers, oscillators etc.
OPERATIONAL AMPLIFIER: It is a direct coupled high gain amplifier usually
consisting of one or more differential amplifiers and usually followed by a level

MODULE-2 PART-2

Page 1

DEPARTMENT OF TCE

APSCE

DK

translator and an output stage. The output stage is generally a push-pull or push-pull
complementary-symmetry pair.
It is a versatile device that can be used to amplify dc as well as ac input signals and
was originally designed for performing mathematical operations.
To this amplifier feedback is added to control its overall response characteristics.
Amplifying signals are of the frequency range from 0Hz to a little beyond 1MHz. It is
used to perform both linear and non-linear operations, and is often referred to as
basic linear integrated circuit. It offers small size, high reliability, reduced cost,
temperature tracking, and low offset voltage and current. It is used to perform
summation, subtraction, multiplication, differentiation and integration in analog
computers. It has a DC amplifier with a differential input and a single ended output.
USES: power regulator, active filters, function generator, instrumentation and
process control, A/D and D/A converter, adder, subtractor, voltage follower,
differentiator and integrator, phase shifter, V to I and I to V converter.

MODULE-2 PART-2

Page 2

DEPARTMENT OF TCE

APSCE

DK

Op-amp is also known as differential amplifier. It senses the difference between input
signals and amplifies the difference by an amount A (open loop gain).
vo=A(v1-v2)=Avd, where signals v1 and v2 are applied at non-inverting and inverting
input terminals respectively. Op-amp is a voltage controlled voltage source.
If the input at non-inverting terminal is zero, i.e. v 1=0, then output vo=-v2 is out of
phase with the input at the inverting terminal (v2).
If the input at inverting terminal is zero, i.e. v 2=0, then output vo=v1 is in phase with
the input at the non-inverting terminal (v1).
Since the gain is infinite, the output voltage is either at its positive saturation voltage
(+Vsat) or negative saturation voltage (-Vsat) as v 1>v2 or v1<v2 respectively. The
output assumes one of the two possible output states i.e. +Vsat or Vsat and the
amplifier acts as a switch only.
The output voltage cannot exceed the positive and negative saturation voltages.
These saturation voltages are specified by an output voltage swing rating of the opamp for given values of supply voltages. This means that the output voltage is
directly proportional to the input difference voltage only until it reaches the
saturation voltages and that thereafter output voltage remains constant.
The curve shown in the figure is called an ideal voltage transfer curve, ideal because
output offset voltage is assumed to be zero. VSAT VCC 2V i.e. if VCC=13V,
VSAT=13-2=11V, -VSAT=-13+2=-11V

MODULE-2 PART-2

Page 3

DEPARTMENT OF TCE

APSCE

DK

OP-AMP CHARACTERISTICS
An ideal op-amp draws no current from the
source and its response is independent of
temperature.
In a real op-amp current is taken into the
op-amp inputs from the source.
The

two

inputs

respond

differently

to

current and voltage due to mismatch in


transistors.
A real op-amp also shifts its operation with
temperature.

IDEAL OP-AMP CHARACTERISTICS


An ideal op-amp would exhibit the following electrical characteristics:
1. Infinite voltage gain A so that the voltage between inverting and non-inverting
terminals i.e. differential input voltage vd (=v1=v2) is zero for finite output voltage
vo.
2. Infinite input resistance Ri so that almost any signal source can drive it and there
is no loading of th preceding stage. It draws no current from the source i.e. no
current flows into the two input terminals (i1=i2=0).
3. Zero output resistance Ro so that the output can drive an infinite number of other
devices.
4. Zero output voltage when input voltage is zero.
5. Infinite bandwidth so that any frequency signals from 0 to

Hz can be amplified

without attenuation.
6. Infinite common mode rejection ratio so that output common mode noise voltage
is zero.
7. Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes.
8. Its response is independent of temperature.

MODULE-2 PART-2

Page 4

DEPARTMENT OF TCE

APSCE

DK

PARAMETERS OF OP-AMP ARE;


1. Input offset voltage (Vio): is the voltage that must be applied between the
two i/p terminals of an op-amp to null the o/p. The smaller the value of V io,
the better the terminals is matched.
2. Input offset current (Iio): is the algebraic difference between the currents
into the non-inverting and inverting input terminals, and should be small.
I io I B1 I B 2 . (Value for 741C op-Amp=200nA)

3. Input bias current (IB): is the average of currents flowing into the noninverting and inverting input terminals of the op-amp. I B

I B1 I B 2
. (Value
2

for 741C op-Amp=500nA)


4. Slew rate:
For small signals (peak o/p voltage Vm < 1V), time taken by the o/p to
respond to the changes in the input is given by rise time (time taken by the
o/p to change from 10% to 90% of the final value for a step i/p and is given
by (0.35/BW) where BW=bandwidth of the amplifier). For an ideal op-amp,
BW= , therefore rise time =0 i.e. o/p responds instantaneously to any
changes in the i/p.
For large signals (peak o/p voltage Vm > 1V), op-amp speed is limited by
slew rate. Op-amps with wide BW will have higher (better) slew-rate.
Slew rate is defined as the maximum rate of change of o/p voltage caused by
a step i/p voltage and is specified in V/s. 1 V/s means that o/p rises or
falls no faster than 1V every s. Ideally, slew-rate=

i.e. op-amps o/p

changes instantaneously in response to i/p step voltage.


{What causes slew rate? Capacitance within or outside an op-amp, require
time to charge or discharge to a certain voltage}
5. Output voltage swing: indicates the values of +ve and ve saturation
voltages of an op-amp and never exceeds +V CC or VEE supply voltages. It is
the maximum peak to peak output voltage which can be obtained without the
waveform being clipped when dc o/p is zero.
6. Output offset voltage: is caused by mismatch between two input terminals.
It is a dc voltage (+ve or ve) depending on potential difference between two
i/p terminals.

MODULE-2 PART-2

Page 5

DEPARTMENT OF TCE

APSCE

DK

7. Input voltage range: When same voltage is applied to both the i/p
terminals of op-amp, it is called common mode voltage V cm and the op-amp is
said to be operating in common mode configuration.
If i/p common mode voltage is 13V maximum, then Vcm can be between
+13V to -13V without disturbing proper functioning of op-amp. It is used to
test the degree of matching between both terminals.
8. Common mode rejection ratio CMRR: is the ability to reject common
mode signals. It is defined as the ratio of the differential voltage gain A d to
common mode voltage gain Acm. CMRR

Ad
Acm

Ad=large signal voltage gain A

Acm

Vocm o / p common mod e voltage

Vcm
i / p common mod e voltage

Vocm is very less. Therefore Acm is very less and Ad is very large, therefore,
CMRR is very large.
CMRR is expressed in decibels i.e CMRR 20 log

Ad
dB
Acm

Higher the value of CMRR, the better is the matching between two input
terminals and smaller is the output common mode voltage. (Value for 741C
op-Amp=90dB)
9. Large signal voltage gain A

o / p volatge(v o )
, as voltage
differenti al input voltage(v d )

gain is very large, output voltage is also very large.


10. Output Resistance R0: is the equivalent resistance that can be measured
between output terminals of op-amp and ground. (value for 741C opAmp=75)
INVERTING AMPLIFIER
The inverting amplifier gives an output, which
is 180 out of phase with the input.
The figure shows the circuit of an inverting
amplifier. Rf is the feedback resistor.

MODULE-2 PART-2

Page 6

DEPARTMENT OF TCE

APSCE

DK

The input voltage is fed to the inverting terminal of the amplifier. The non-inverting
terminal is grounded.
An op-amp has infinite input impedance. Therefore the current drawn by input
terminals of the op-amp is zero.
Hence, any current flowing through R1 at the point A, due to the applied input
voltage, flows through Rf.
The point A is called the summing junction, as, different currents add up at this point
because of several inputs applied.
The non-inverting terminal is at zero potential.
The differential potential or the voltage difference between the input terminals of the
op-amp is zero.
Thus, the inverting terminal at node A will also be at a zero potential. (Va=0)
The point A is called the virtual ground, because it is at a zero potential even though
it is not connected to the ground.
Current flowing through R1, i

v i v a vi 0 v i

R1
R1
R1

Current flowing through Rf, i

v a v0 0 v0 v 0

Rf
Rf
Rf

Since the op-amp does not draw any current, Current flowing through R1 = Current
flowing through Rf

vi
v0

R1
Rf
ACL

v0 R f

vi
R1

The closed loop voltage gain of the inverting amplifier is thus given by ACL

and the output voltage is given by v 0

Rf
R1

Rf
R1

vi

The negative sign indicates that the output is inverted or 180 out of phase with the
input. The gain can be adjusted by suitable selection of R1 and Rf.

MODULE-2 PART-2

Page 7

DEPARTMENT OF TCE

APSCE

DK

NON-INVERTING AMPLIFIER
The non-inverting amplifier gives an output,
which is in phase with the input.
The figure shows the circuit of a non-inverting
amplifier. Rf is the feedback resistor.
The input voltage is fed to the non-inverting
terminal of the amplifier.
An op-amp has infinite input impedance.
Therefore the current drawn by input terminals of the op-amp is zero.
Hence, any current flowing through R1 at the point A, flows through Rf.
The non-inverting terminal is at potential vi.
The differential potential or the voltage difference between the input terminals of the
op-amp is zero.
Thus, the inverting terminal at node A will also be at a potential vi. (Va=vi)
Current flowing through R1, i

0 v a 0 vi vi

R1
R1
R1

Current flowing through Rf, i

v a v 0 vi v 0

Rf
Rf

Since the op-amp does not draw any current, Current flowing through R1 = Current
flowing through Rf

vi vi v 0

R1
Rf
v0
v
v
1
1
i i vi (
)
Rf
Rf
R1
Rf
R1
ACL

Rf
v0
1
1
(
)R f 1
vi
Rf
R1
R1

The closed loop voltage gain of the inverting amplifier is thus given by

ACL

Rf
Rf
v0
1
)v i
and the output voltage is given by v 0 (1
vi
R1
R1

MODULE-2 PART-2

Page 8

DEPARTMENT OF TCE

APSCE

DK

There is no change in sign. This indicates that the output is in phase with the input.
The gain can be adjusted by suitable selection of R1 and Rf.

The non inverting amplifier circuit can also be as shown in the figure

VOLTAGE FOLLOWER
It is a special case of non-inverting amplifier, where
R 1=

short).

ACL

(so open circuit) and Rf=0 (so replace by a


Voltage

gain

is

given

by

Rf
v0
1
1 0 1
vi
R1

v 0 vi
Thus output follows the input and is hence referred to as voltage follower. It has a
unity closed loop gain, its output impedance is zero and its input impedance is
infinite, as an ideal op-amp is considered. It draws negligible current from source.
This is used as a unity gain buffer to avoid the loading effect on a source and provide
impedance matching between source and load (connects high impedance source to
low impedance load).
INTEGRATOR
The circuit performs the mathematical
operation of integration, that is, the
output waveform is the integral of the
input waveform.
RC is the time constant of integration.
For RC>>T, i.e. for a time constant

MODULE-2 PART-2

Page 9

DEPARTMENT OF TCE

APSCE

DK

very very greater than the time period of the input waveform, this circuit behaves as
an integration.
The non-inverting terminal is at zero potential. The differential potential or the
voltage difference between the input terminals of the op-amp is zero. Thus, the
inverting terminal at node A will also be at a zero potential. (Va=0)
The point A is called the virtual ground, because it is at a zero potential even though
it is not connected to the ground.
Current through capacitor i C

dV0
dt

Current through feedback resistor R is i

vi
R

Since the op-amp does not draw any current, Current flowing through C = Current
flowing through R.

dV0 vi

dt
R
dV
vi RC 0
dt
dV0
1
vi
RC
dt
1
v0
vi dt
RC

iC

The output is directly proportional to the integral of the input signal.


If the input is a square wave, the output will be a triangular wave.
(For designing an integrator, use RC> 10T)
DIFFERENTIATOR
One of the simplest op-amp
circuits that contain capacitor
is the differentiating amplifier
or differentiator. The circuit
performs

the

mathematical

MODULE-2 PART-2

Page 10

DEPARTMENT OF TCE

APSCE

DK

operation of differentiation, that is, the output waveform is the derivative of the input
waveform.
RC is the time constant of differentiator. For RC<<T, i.e. for a time constant very
very less than the time period of the input waveform, this circuit behaves as a
differentiator. The non-inverting terminal is at zero potential. The differential
potential or the voltage difference between the input terminals of the op-amp is zero.
Thus, the inverting terminal at node A will also be at a zero potential. (Va=0)
The point A is called the virtual ground, because it is at a zero potential even though
it is not connected to the ground.

Charge in the capacitor Q CV , i C


Current through capacitor i C

dV
dt

dVi
dt

Current through feedback resistor R is i

v0
R

Since the op-amp does not draw any current,


Current flowing through C = Current flowing
through R.

dVi v0

dt
R
dV
v0 RC i
dt

iC

The

output

is

directly

proportional

to

the

derivative of the input signal.


If the input is a square wave, the output will
consist of negative and positive spikes at the rising edge and falling edge of the input
respectively.
(For designing a differentiator, use RC< 10T)

MODULE-2 PART-2

Page 11

DEPARTMENT OF TCE

APSCE

DK

SUMMER
(I) INVERTING SUMMER AMPLIFIER
This is a development of inverting amplifier. If several inputs are applied at the
inverting terminal, the currents are added up at the summing junction. The sum of
all

these

through

currents
the

flow

feedback

resistor.
A

typical

summing

amplifier with three input


voltages Va, Vb, Vc, three
input resistors Ra, Rb, Rc,
and a feedback resistor Rf
is shown in the figure.
The non-inverting
terminal is at zero
potential. The differential potential or the voltage difference between the input
terminals of the op-amp is zero. Thus, the inverting terminal at node A will also be at
a zero potential. (Va=0)

ia ib ic i f
Va Vb Vc
V0

Ra Rb Rc
Rf
V0 R f (
V0 (

Rf
Ra

Va Vb Vc

)
Ra Rb Rc
Va

Rf
Rb

Vb

Rf
Rc

Vc )

Thus, the output is an inverted, weighted sum of the inputs.


In the special case, where Ra=Rb=Rc=Rf, V0 (Va Vb Vc ) in

which case output is

the inverted sum of the input signals.


If Ra=Rb=Rc=Rf3, V0

(Va Vb Vc )
Thus, the output is the average of the input
3

signals (inverted).

MODULE-2 PART-2

Page 12

DEPARTMENT OF TCE

APSCE

DK

(II) NON-INVERTING SUMMER AMPLIFIER


A summer that gives a non-inverted sum is the
non-inverting summing amplifier. Let the voltage at
non inverting terminal at point X be Va. The nodal
equation at node X is given by

V1 Va V2 Va

0 as the total current entering


R1
R2
the input terminals of op-amp is zero.

V1 Va V2 Va

0
R1
R2
V1 V2 Va Va
1
1

Va ( )
R1 R2 R1 R2
R1 R2
V1 V2

R1 R2
Va
1
1

R1 R2
The differential potential or the voltage difference between the input terminals of the
op-amp is zero.
Thus, the inverting terminal at node A will also be at a potential Va, same as that of
the non-inverting terminal.
Since the op-amp does not draw any current, Current flowing through R1 = Current
flowing through Rf
At node A,

Va V0 Va

R
Rf
Va Va
V

0
R Rf
Rf
Va (

V
1
1

) 0
R Rf
Rf

V1 V2

Rf
Rf
R1 R2
V0 Va (1
)
(1
)
1
1
R
R

R1 R2
Thus, the output is a non-inverted, weighted sum of the inputs.

MODULE-2 PART-2

Page 13

DEPARTMENT OF TCE

APSCE

DK

If R1=R2=R=Rf/2, V0 V1 V2

SUBTRACTOR
A basic differential amplifier can be used as a subtractor.
If all resistors are equal in value, then the output voltage
can be derived by using superposition principle.
When V2=0, Output due to V1 alone= V01.
The circuit becomes a non-inverting amplifier with
voltage at node X = iR

V1
V
R 1 , i.e. input to non2R
2

inverting amplifier is V1/2. Since the potential difference


between the two terminals of the op-amp is zero,
potential at node A = potential at node X = V1/2.

V A V01 V A

R
R
V01 2V A V1
When V1=0, Output due to V2 alone= V02.
Node A is at virtual ground as voltage at node X is
zero.

V02
V2

R
R
V02 V2
The o/p voltage V0 due to both the inputs can be
written as V0 V01 V02 V1 V2

Problems

MODULE-2 PART-2

Page 14

DEPARTMENT OF TCE

APSCE

DK

1. For an inverting amplifier Ri=100K and Rf=600K. What is the output voltage for
an input of -3V?
Soln:
Given: R1=100K
Rf=600K
Vi=-3V
VO =?
We have,
VO

Rf
R1

Vi

600 10 3
3
3
100 10

VO 18 V

2. Design an inverting amplifier for output voltage of -10V and an input voltage of 1V.
Soln:
Given: Vi =1 V
VO= -10V
We Have,
Rf
Vi ,
VO
R1
Rf
R1

10

Rf
1
10
R1

or R f 10 R1

Assu min g R1 1K we have


R f 10 K

3. For an inverting amplifier R1=10K and Vi =1V. Calculate i1and VO.


Soln:
Given: R1 = 10K, Rf=100K Vi =1 V
We have,
Rf
i2

MODULE-2 PART-2

Page 15

DEPARTMENT OF TCE

APSCE

DK

R1
V1

i1
VO

i1

Vi 0
1

0.1 mA
R1
10 10 3

Rf
VO
R1

100 10 3
1 10 V
3
10 10

Vi

4. Design an amplifier with a gain of +9 and Rf =12 K using an op-Amp


Soln:
Since the gain is positive:
Choose a non-inverting amplifier
Then we have,
Rf

VO 1
Vi
R1

Gain is,
1
Rf
R1

Rf
R1

R1

Rf

8
R1 1.5 K

12 10 3
8

5. In the figure shown if V1=+1V, V2=+3V and V3=+2V with R1=R2=R3=2K.


Determine the output voltage.

R1
Rf
V1

i1
If
R2

MODULE-2 PART-2

Page 16

DEPARTMENT OF TCE

APSCE

V2

i2

DK

G=0
VO

V3

R3

i3

Soln: We have ,
VO

VO

Rf

V1 V2 V3

3 10 3
1 3 2
2 10 3

VO 9 V

6. Design an Adder using Op-Amp to give the output voltage VO= -[2V1+3V2+5V3]
Soln:
Given VO 2V1 3V2 5V3 1
We Have,
V1 V2 V3

R1 R2 R3

VO R f

Rf

VO

R1

V1

Rf
R2

V2

V3 2
R3

Rf

Equating eqn 1 and 2 we get,


Rf
R1

Rf
R2

3 ;

Rf
R3

Assuming Rf =100K, We get,

MODULE-2 PART-2

Page 17

DEPARTMENT OF TCE

R1

R2

R3

Rf
2
Rf
3
Rf
5

APSCE

DK

R1 50 K

R2 33.33K

R3 20 K

Note: If designing is asked, after finding the values of Rf and R1 circuit diagram
should be written.
7. Design a summing amplifier to add three input voltages. The output of the amplifier
should be twice the negative sum of the inputs.
VO 2V1 V2 V3
we have VO

Rf
R

V1 V2 V3

Equating we get ,
Rf
R

2 R f 2R

Let R 10 K then R f 20 K

8. A 5 mV peak voltage, 1 KHz signal is applied to the input of an Op-Amp integrator


for which R=100K and C=1F. Find the output voltage.
Soln: Given R=100K
C=1F
Vm =5mV
F=1KHz
V0 =?
We have Vi Vm sin t Vm sin 2ft (5 sin 2000t )mV
For an integrator,

MODULE-2 PART-2

Page 18

DEPARTMENT OF TCE

APSCE

DK

1
Vi dt
RC
1
VO
5. sin 2ftdt
0.1
on solving ,
VO

1
cos 2f
.5.(
)
0.1
2f
1
VO
cos 2000t mV
40

VO

9.

The input to a differentiator is a sinusoidal voltage of peak value 5mV and


frequency 2KHz. Find the output if R = 100K and C=1F.
Given:

Vi 5 sin 4000t

mV

for differenti ator VO RC

dVi
dt

d (5 sin 4000t )
(0.1)(5)(4000 ) cos 4000t
dt
on solving VO 2000 cos 4000t mV
VO 0.1

REFER PROBLEMS DONE IN CLASS ALSO

MODULE-2 PART-2

Page 19

DEPARTMENT OF TCE

MODULE-2 PART-2

APSCE

DK

Page 20

DEPARTMENT OF TCE

MODULE-2 PART-2

APSCE

DK

Page 21

DEPARTMENT OF TCE

APSCE

DK

Q. Design a scaling adder circuit using an op-amp to give the output


V0=-(3V1+4V2+5V3), given the inputs V1, V2, V3.
ANS (circuit diagram, R1=Rf/3, R2=Rf/4, R3=Rf/5)

MODULE-2 PART-2

Page 22