# SWNT SPICE Model

The drain current (IDS) is modeled as:
IDS = IPFET + IAmbipolar + IMetallic
1. PFET current is modeled using square law model.
a) Cut-off Region (|VGS| < |VT|):
I PFET  0
b) Linear Region (|VDS| < |VGS|-|VT|):
V 
W

I PFET  K p    1  VDS    VGS  VT  DS *VDS
L
2

c) Saturation Region (|VDS| > |VGS|-|VT|):
2
VGS  VT 

W
I PFET  K p    1  VDS  
L
2
2. Ambipolar current is modeled as a voltage (VGS and VDS) dependent exponential
current source. The exponential term is expressed in terms of Taylor’s series and first
three terms are incorporated in the SPICE model.

V2
I ambipolar  K n   VGS  VG 0    1  Vx  x  L 
2

Where, Vx  Vthershold  VGS   VDS

3. Metallic tube current component is modeled as resistor connected between the drain
and the source terminal.
 W
I Metallic   Metallic    *VDS
 L
The metallic tube component will scale linearly with the width of the device. Also the
probability of finding a metallic tube would reduce as the channel length is increased.
Hence term (W/L) is used in the above expression
4. Source-Drain resistance: The effect of RS and RD is also taken into account such that
The Drain current is sum of 1-3

I DS  I PFET  I ambipolar  I Metallic

2 V and for a drain-source voltage of -2 V. SPICE model results . for VDS = -1 V and L = 100 μm (see Figure 2b).1 VT -0.45 β 3 3 KN 10e-9 10e-9 VG0 1 1 λ 0.45 0. and for a channel length of 10 μm. rather than logarithmic scale.4 PFET Current KP 40e-6 13e-6 RS 11e3 3e3 RD 11e3 3e3 Metallic Tube Current σmetallic 0 4e-7 Our SPICE model predicts the device characteristics for all bias conditions (V DS.4 -0. when measured at VDS = -0. Following graphs show the experimental vs.) In order to validate the claim that the SPICE model indeed predicts the significant increase in off-state current with drain-source voltage. please show the simulated and measured log-ID vs. VDS + P5 VDS2 Following table shows the model parameters used for W=200µm/L=100µm device and W=200µm/L=10µm device. it is impossible to compare the simulated and measured off-state currents in Figure 2c. In other words. and I am excited to see that the authors have implemented such a model for their carbon nanotube network transistors.1 0. We have taken into account the exponential increase in the OFF state current due to ambipolar conduction.Comment #4: “I agree that a reliable SPICE model is a critical component of an advanced integrated circuit technology. VGS curves for a drain-source voltage of -0. In SPICE model the equations are transformed into second order polynomial as I = P0 + P1 VGS + P2 VDS + P3 VGS 2 + P4 VGS. (The authors may argue that they are showing simulation and experiment for a range of drain-source voltages in Figure 2c. and that the off-state drain current of transistors with a channel length of 10 μm is four orders of magnitude larger than of transistors with a channel length of 100 μm (1 μA versus 100 pA.e.2 V)? Unfortunately. VGS) as well as for small/large channel lengths.” Our response to comment #4: The SPICE model developed is as explained above. We have also incorporated the contribution of metallic tubes in determining the OFF state current. i. Current Component Parameter W=200µm/L=100µm W=200µm/L=10µm Vthreshold -4 -4 Ambipolar Current α 0. I believe that the most important test for the new model is whether it correctly predicts the significant increase in off-state drain current with increasing drain-source voltage and with decreasing channel length. but since the drain current in Figure 2c is presented on a linear. We have modeled abmipolar conduction as a voltage dependent (VGS and VDS) exponential current source.2 V (100 nA versus 100 pA). does the model correctly predict that the offstate drain current of transistors with a channel length of 100 μm measured at VDS = -2 V is three orders of magnitude larger than at VDS = -0. the authors reveal the agreement between simulation and experiment only for one particular drain-source voltage and one particular channel length.

W = 200um L = 100um Experiment SPICE -5 -ID. [A] 10 VD = -5 -6 10 VD = -2.5 -7 10 -8 10 VD = -0.5 -2 -1 0 VG. [V] -1 0 . [V] 1 2 4 10 3 ON/OFF Ratio 10 2 10 1 10 0 10 -5 Experimental SPICE -4 -3 -2 VD.

5 0 . [A] 10 Experiment SPICE -5 10 VD = -0.5 1 10 0 10 -1.W = 200um L = 10um -4 -I D . [V] -0.15 -1 -0.5 Experimental SPICE -1 VD. [V] 0 0.9 4 10 3 O N /O FF R atio 10 2 10 VD = -1.5 VD = -0.5 VG.

Pull down device : 200um/100um (Assumed.88 Transistor Decoder Circuit: Time Domain Analysis Pull up device: 20um/100um. can be changed) Frequency = 10 KHz .

Zoomed-in view of first 8 outputs (Frequency is 10KHz) . In the paper. The output transitions are downwards (from 0 to -4V). output transitions are shown upwards. .