XESP: ISO 9001:2008 certified

Training Brochure
XESP
AQ 13/1, Sector-V, Salt Lake, Kolkata, 700091
Phone: 033-65006917
enquiry@xesp.in
www.xesp.in

Robotics & AI. To sign up for a class or to find out more please visit: http://www. We offer instructor-led theoretical & practical industrial training. XESP is proud to state that we have ready pool of thoroughly trained. Research & Development of these Technology. We are actively involved in academics. software & firmware based on Micro controller. high-quality training designed by experts in Embedded Systems. FPGA. FPGA – Xilinx & Altera. For IP core related prototyping.php 2 .xesp. highly qualified and experienced professionals for imparting the trainings.in/program. Our training comprises of Basic and Advanced Study of Embedded Systems Design. both in India & abroad. VLSI Design with EDA tools. Project. RTOS.OVERVIEW XESP Training— Training Solutions that Put You on the Fast Track to Success EMBEDDED SYSTEMS form a market that is already larger and growing more rapidly than that of general-purpose computers. XESP works in the field of Embedded Systems & VLSI Design like developing. Micro controller based Embedded Systems Design. XESP provides targeted. Hardware Description Languages such as VHDL & Verilog. About Us XESP is organized and managed by a group of talented &professional engineers. XESP also has a very specialized team working with Micro controllers. DSP. R & D centers and in the industries related to embedded systems & VLSI design. Digital Signal Processing. XESP develops the educational hardware. XESP mainly works with the FPGA based systems. customizing & testing the software (IP Cores) & Hardware related to the Embedded Systems.

INSTRUCTOR-LED TRAINING COURSES Learning Level DURATION Introduction to Embedded Systems with Advanced Analog & Digital Electronics using sensors & 1 1 MONTH 2 1 MONTH 2-3 1 MONTH 4 1 MONTH 2-3 1 MONTH 4-5 1. 4G (LTE) 3 .5 MONTHS 4 1 MONTH peripherals Embedded Systems Designing with 8051 Micro controller Micro Processor 8085 (optional) Embedded Systems Designing with 8051 Micro controller & Hardware Description Language Hardware Description Languages like VHDL/ Verilog SOC Designing with Processor Architecture CPU Designing Hardware Description Languages like VHDL/ Verilog FPGA: Xilinx VLSI Design: Module-IV CMOS Structure VLSI Designing with EDA Tools VLSI Design: CMOS & FPGA based design Module-V CMOS Structure VLSI Designing with EDA Tools Hardware Description Languages like VHDL/ Verilog FPGA: Xilinx DSP &Tele-Communication Module-VI Signals & Systems DSP based design using TI Kits Wireless System Architecture: including 3G (UMTS).

Working with Sensors. peripherals (Resistor. and Motors etc.Introduction to Embedded Systems with Advanced Analog & Digital Electronics using sensors & peripherals          Level: 2 Duration: 1 MONTH .5MONTHS Overview of Embedded Systems Issues related to Embedded Systems Design Role of Micro controller in Embedded Systems RISC Based & CISC Based Design Usage of Micro controllers : 8051 Architecture of 8051 Micro controller Pin Description of 8051 Micro controller Addressing Mode & Instruction Set of AT89C51 Assembly Level & Embedded C coding of 8051 Using Timer & Counter of 8051 Handling the Interrupt system Interfacing with 7 segment Display/LCD/Multiplexing Display/Keypad etc. Switch. Introduction to VHDL Behavioral Modeling Dataflow modeling Structural Modeling Delay Simulation Data Type Configuration & Package Example coding with combinatorial & sequential circuits Using HDL Simulators. Seven Segments. Introduction to Multisim & lab activities. Embedded Systems Designing with 8051 Micro controller: Module-I               Level: 1 Level: 2-3 Duration: 1. Embedded Systems Designing with 8051 Micro controller & Hardware Description Language: Module-II                      Duration: 1 MONTH Working with RC circuits. LEDs. Number Systems & Digital Logic Logic Gates and Applications Combinatorial Logic Circuit Design. LCD. Sequential Logic Circuit Design.Ipsum Overview of Embedded Systems Issues related to Embedded Systems Design Role of Micro controller in Embedded Systems RISC Based & CISC Based Design Usage of Micro controllers : 8051 Architecture of 8051 Micro controller Pin Description of 8051 Micro controller Addressing Mode & Instruction Set of AT89C51 Assembly Level & Embedded C coding of 8051 Using Timer & Counter of 8051 Handling the Interrupt system Interfacing with 7 segment Display/LCD/Multiplexing Display/Keypad etc. One Complimentary project Learning 8085 with theory & practical including PPI interfacing (optional).) BJT based circuit Design. 4 . Learning Operational Amplifiers & related applied circuits. ADC.

and timing constraints Implementation and Validation of design on FPGA 5 . design planning. and timing constraints Implementation and Validation of design on FPGA VLSI Design: Module-IV         Level: 4 Level: 4-5 Duration: 1. pin assignments.SOC Designing with Processor Architecture : Module-III                  Level: 2-3 Duration: 1 MONTH Overview of VLSI Systems Basic CMOS Structure CMOS Fabrication Process VLSI Process VLSI Design VLSI design Rules & System Layout Introduction of EDA Tools for VLSI Using EDA Tools for VLSI VLSI Design: CMOS & FPGA based design:Module-V                     Duration: 1 MONTH Design of Finite State Machines (FSM) Concepts of Register Transfer. implementation options.5MONTHS Overview of VLSI Systems Basic CMOS Structure CMOS Fabrication Process VLSI Process VLSI Design VLSI design Rules & System Layout Introduction of EDA Tools for VLSI Using EDA Tools for VLSI Introduction to VHDL Behavioral Modeling Dataflow modeling Structural Modeling Delay Simulation Data Type Configuration & Package Example coding with combinatorial & sequential circuits Using HDL Simulators. & Control Unit Design. RISC & CISC Processor Architecture. Xilinx Based FPGA Architecture Xilinx ISE Pack Wizard. design planning. implementation options. Memory Design Concepts of SOC & Design Flow Introduction to VHDL Behavioral Modeling Dataflow modeling Structural Modeling Delay Simulation Data Type Configuration & Package Example coding with combinatorial & sequential circuits Using HDL Simulators. pin assignments. Data Path Design. Xilinx Based FPGA Architecture Xilinx ISE Pack Wizard.

6 . Visualization Scripts & Functions Publishing MATLAB Reports Flow and Loop Control Introduction to Simulink Simple Model Building and Running Model Simulation Subsystems Creation Transfer Functions Modeling Modeling a System of Differential Equations Discrete Dynamical Systems Modeling Signal Processing Block-set Frequency Analysis of Signals Filter Designing and Implementation with Filter Visualization Tool OTHER TRAININGS (On Demand):     ARM based design with RTOS Learning PIC based Micro controller Design with MPLAB IDE and ccs C Compiler Learning AVR based Micro controller Design with AVR Studio Learning Verilog XESP provides excellent project guidance & assistance based on all above modules. NOTES: ………………………………………………………………………………………………………………………………………………………………..GSM System Architecture GSM Channel Structure GSM Call Flow (MTC & MOC) Network Planning Latest Telecom Techniques (UMTS/3G. LTE/4G) GSM Value Added Service (Optional) Module: Matlab                 Fundamentals of Matlab MATLAB to Solve Problems Data Importing and Extracting.DSP & Tele-Communication Module-VI            Level: 4 Duration: 1 MONTH Level: 2 Duration: 1 MONTH Signals & Systems with Matlab & Simulink Mathematics for DSP Introduction to TI Kits Working with TI Kits Introduction to Wireless network Telecom .

Xilinx ISE Foundation Pack. 5. DSP Development Platform : Code Composer Studio. Verification and Validation. 3. Implementation of DSP Algorithms using DSP Processors / FPGA 6. 5. Overview of Signals & Systems with Matlab & Simulink 2. Programmable Hardware & FPGA 1. Architecture and Programming of DSP Processors (Ti 54xx / 6000 Series). Matllab (DSP Tool Box). Simulink HDL Coder. 5. 2. Memory Design Concepts of SOC & Design Flow. Architecture of Microprocessors / Microcontrollers (8051 microcontrollers / AVR / PIC). Data Path Design. 2. 6. 5. 4. 6. CPLD. Physical Design Automation (placement. Basics of VLSI Design & Design Flow. Real-Time Embedded Systems C. 4. 6. Real-Time Embedded Systems 1. 7 . 5. Filter Design & Realization of Digital Filters.Certificate course on Embedded Systems & VLSI Design A. CMOS Technology: Lay out & Design Rules. 6. Testing. Learning VHDL. PLD. peripherals. Architecture of FPGAs. Digital Signal Processing (DSP) algorithms. Concepts of Programmable hardware and architecture of PLA. Programmable Hardware & FPGA E. FPGA Design Flow. 3. Concepts of Register Transfer. floor planning. & Control Unit Design. Design of Finite State Machines (FSM). 7. architecture and applications 1. Xilinx FPGA & Xilinx ISE Foundation Pack. 3. Concepts of CMOS. 3. VHDL / Verilog. architecture and applications D. 2. Interfacing the microprocessors / microcontrollers with memory. Programming in Assembly Language and in 'C'. routing). 4. Memory and System on Chip(SOC) Design B. Timing Analysis. Real Time Operating Systems (RTOS). FPGA based reconfigurable computing system design. Processor. 4. Mathematics of DSP and Physical Significance. VLSI Design Processor. RISC & CISC Processor Design. Embedded system Design. 3. Implementation and Validation of architecture on FPGA.EDA Tools for Analog and Digital VLSI Design. 7. Digital Signal Processing (DSP) algorithms. VLSI Design 1. 4. Memory and System on Chip (SOC) Design 1. 2.

WORKSHOP BENEFITS This workshop provides the opportunity to “Experience the Application” of concepts. The role played by every component is explained in detail.  Multisim  MPLAB IDE  KEIL IDE  Cross Compiler Keil  CCS C Compiler Workshop on VHDL with Xilinx FPGA Spartan 3E. During the process.OBJECTIVE The objective of the workshop is to provide the participants with the complete development experience of Hardware and Software interface. students are taken through a complete cycle of product development covering the view of looking at the schematic level of system design to make a complete circuit. Seven Segments. The participants will have hands-on sessions on the following  VHDL based system coding  FPGA Principle and Architecture  Experiments using Xilinx ISE Pack  Xilinx Spartan 3E Kit Usage  Synthesize  Design Implementation  User Constraints File Creation  Generating Bit Files  Downloading & Programming of FPGA Hardware  EDK tools for advanced students W o r k s h o p s & S e m i n a r s 8 . Students work through all the phases of design and end up with developing their first working gadget. Students learn & implement the key concepts in Embedded Hardware Design. and Buzzers etc. interfacing. Programming. Wireless Communication and Device Interface. Workshop-on designing PIC /8051 based project The participants will have hands-on sessions on the following  Power Supply Circuitry  Microcontroller based entire robotic circuit development  Motor Driver on breadboard  Programming for Motor Control  Sensor Interfacing  Peripherals like LCD.

W o r k s h o WORKSHOP/SYSTEM REQUIREMENTS  Computer: Student ratio should be 1:3  Hardware kit: Student ratio should be 1:3 (will be provided by XESP)  Required Software (will be provided by XESP)  Seminar Room with a capacity to accommodate the students  A Projector. White Board and Microphone-Speaker Arrangement  One Standard size table top for demonstrations p s & S e WHO SHOULD ATTEND B.Tech (ECE/EE/CSE/IN/IT) – 2nd Year. 3rd Year & Final Year students m i n a r s 9 . Large Screen.Tech/M.

XESP: ISO 9001:2008 certified AQ 13/1. Sector-V. Kolkata.in All rights reserved: XESP. Kolkata .xesp. Salt Lake.in www. 700091 Phone: 033-65006917 enquiry@xesp.