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You are on page 1of 8

1. Multiplexers

2. Combinational circuit implementation with multiplexers

3. Demultiplexers

4. Some examples

Multiplexer

A Multiplexer (see Figure 1) is a combinational circuit that selects one of the 2n input

signals (D0, D1, D2, ……, D2n-1) to be passed to the single output line Y.

Q. How to select the input line (out of the possible 2n input signals) to be passed to the

output line?

A. Selection of the particular input to be passed to the output is controlled by a set of n

input signals called “Select Inputs” (S0, S1, S2, ……., Sn-1).

Figure 1: Multiplexer

A 2x1 Mux has 2 input lines (D0 & D1) , one select input (S), and one output line (Y).

(see Figure 2)

IF S=0, then Y= D0

Else (S=1) Y= D1

D0

MUX Y

D1 S

Figure 2: A 2 X 1 Multiplexer

Y = S D0 + S D1

A 4x1 Mux has 4 input lines (D0, D1, D2, D3), two select inputs (S0 & S1), and one output

line Y. (see Figure 3)

IF S1S0=00, then Y= D0

IF S1S0=01, then Y= D1

IF S1S0=10, then Y= D2

IF S1S0=11, then Y= D3

Thus, the output signal Y can be expressed as:

m0 m1 m2 m3

Obviously, the input selected to be passed to the output depends on the minterm

expressions of the select inputs.

Figure 3: A 4 X 1 Multiplexer

In General,

For MUXes with n select inputs, the output Y is given by

Thus

2 n −1

Y = ∑ mi Di

i =0

Example 3: Quad 2X1 Mux

Given two 4-bit numbers A and B, design a multiplexer that selects one of these 2

numbers based on some select signal S. Obviously, the output (Y) is a 4-bit number.

A0

A1 Q uad 2-1

A2 MUX

Y0

A3

Y1

Y2

B0 Y3

B1

B2

B3

S

Figure 4: Quad 2 X 1 Multiplexer

Y = A IF S=0, otherwise Y = B

The circuit is implemented using four 2x1 Muxes, where the output of each of the Muxes

gives one of the outputs (Yi).

Problem Statement:

Given a function of n-variables, show how to use a MUX to implement this function.

This can be accomplished in one of 2 ways:

Using a Mux with n-select inputs

Using a Mux with n-1 select inputs

n variables need to be connected to n select inputs. For a MUX with n select inputs, the

output Y is given by:

Y = m0D0 + m1D1 + m2 D2 + ... + m2n-1D2n–1

Alternatively,

2 n −1

Y = ∑ mi Di

i =0

th

Where mi = i minterm of the Select Inputs

The MUX output expression is a SUM of minterms expression for all minterms (mi)

which have their corresponding inputs (Di) equal to 1.

Thus, it is possible to implement any function of n-variables using a MUX with n-select

inputs by proper assignment of the input values (Di ∈{0 , 1}).

Y(Sn-1 ….. S1S0) = ∑(minterms)

Since number of variables n = 3, this requires a Mux with 3 select inputs, i.e. an 8x1 Mux

The most significant variable A is connected to the most significant select input S2 while

the least significant variable C is connected to the least significant select input S0 , thus:

S2 = A, S1 = B, and S0 = C

For the MUX output expression (sum of minterms) to include minterm 1 we assign D1 =1

excluding minterms 0, 2, 4, and 7, the following input (Di) assignments are made

D1 = D3 = D5 = D6 = 1

D0 = D2 = D4 = D7 = 0

0 D0

1 D1

0 D2

1 D3

F ( A ,B , C ) =

0 D4 Y

∑ ( 1 ,3 ,5 ,6 )

1 D5

1 D6

S0

0 D7 S1

S2

A B C

Method 2: Using a Mux with (n-1) select inputs

Any n-variable logic function can be implemented using a Mux with only (n-1) select

inputs (e.g 4-to-1 mux to implement any 3 variable function)

Express function in canonical sum-of-minterms form.

Choose n-1 variables to be connected to the mux select lines.

Construct the truth table of the function, but grouping the n-1 select input variables

together (e.g. by making the n-1 select variables as most significant inputs).

The values of Di (mux input line) will be 0, or 1, or nth variable or complement of nth

variable of value of function F, as will be clarified by the following example.

This function can be implemented with a 4-to-1 line MUX.

A and B are applied to the select line, that is

A ⇒ S1, B ⇒ S0

The truth table of the function and the implementation are as shown:

Example 6: Consider the function F(A,B,C,D)=∑(1,3,4,11,12,13,14,15)

This function can be implemented with an 8-to-1 line MUX (see Figure 7)

A, B, and C are applied to the select inputs as follows:

A ⇒ S2 , B ⇒ S1, C ⇒ S0

The truth table and implementation are shown.

Demultiplexer

It is a digital function that performs inverse of the multiplexing operation.

It has one input line (E) and transmits it to one of 2n possible output lines (D0, D1, D2, …,

D2n-1). The selection of the specific output is controlled by the bit combination of n select

inputs.

D0

D1

Moving

D2 Arm

D3

E

D4

D5

D 2n-1

Figure 8: A demultiplexer

The input E is directed to one of the outputs, as specified by the two select lines S1 and

S0.

D0 = E if S1S0 = 00 ⇒ D0 = S1’ S0’ E

D1 = E if S1S0 = 01 ⇒ D1 = S1’ S0 E

D2 = E if S1S0 = 10 ⇒ D2 = S1 S0’ E

D3 = E if S1S0 = 11 ⇒ D3 = S1 S0 E

with enable input.

A1 A0

E

D0

D1

D2

D3

For the decoder, the inputs are A1 and A0, and the enable is input E. (see figure 9)

For demux, input E provides the data, while other inputs accept the selection variables.

Although the two circuits have different applications, their logic diagrams are exactly

the same.

Decimal Enable Inputs Outputs

value

E A1 A0 D0 D1 D2 D3

0 X X 0 0 0 0

0 1 0 0 1 0 0 0

1 1 0 1 0 1 0 0

2 1 1 0 0 0 1 0

3 1 1 1 0 0 0 1

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