Stanbury 2014

This article has been accepted for publication in a future issue of this journal, but has not been
fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPWRD.2014.2372794, IEEE Transactions on Power Delivery
TPWRD-00281-2014
The Impact of Current Transformer Saturation

on Transformer Differential Protection
Michael Stanbury, GradIEAust, Zarko Djekic, Ausgrid
Abstract Current Transformer (CT) saturation has a major
impact on the operation of differential protection schemes.
Transformer differential protection must maintain security
during CT saturation for external faults while preserving high
sensitivity and speed of operation for lower magnitude internal
faults. Relay manufacturers provide very little information or
direction for protection engineers to set relays adequately to
achieve these goals. If an engineer lacks a deep understanding of
relay behavior during CT saturation they could make setting
implementation mistakes that may lead to spurious trips or
failures to trip with catastrophic consequences. This work
investigated the impact of CT saturation on transformer
differential relays in order to provide guidance on scheme
behavior. It was discovered that harmonic blocking is triggered
by CT saturation a significant effect which is not described in
the literature or relay manuals. This effect was modeled and the
models accuracy was verified with CT simulations, relay
secondary injections and high current primary injections. It is
demonstrated that harmonic blocking provides effective security
against nuisance trips caused by CT saturation. It is also shown
that the traditional use of a high slope 2 is mostly redundant
wherever harmonic blocking is enabled.
Index Termsprotection; measurement; sensitivity; security;
simulation; current;
I. INTRODUCTION
Since the invention of differential schemes, current
transformer (CT) saturation has been one of the main
problems for differential transformer protection. CT saturation
leads to inaccurate measurement of primary currents that may
cause relay malfunction. Saturation also increases current
measurement error that creates a false differential current. It is
impossible to predict or even estimate this error due to the
unpredictable nature of CT saturation (many factors such as
fault level, fault inception angle, system configuration, CT
remanence etc. affect level of saturation and measurement
error). This false spill current may cause spurious relay
operation under through-faults.
Over the years, relay manufacturers have used various
methods to deal with this problem. Dual bias slopes are
commonly used to restrain relays from tripping under CT
saturation. Some studies on CT saturation effects on older
style relays were done in the past [1], [2], but very few on new
digital relays [3], [4]. These studies usually focus attention on
Manuscript received 13/3/2014. Materials and equipment used for this
work were supplied by Ausgrid.
Michael Stanbury is a protection engineer with Ausgrid, Sydney, NSW,
Australia (e-mail: michael.stanbury@gmail.com).
Zarko Djekic is a senior protection engineer with Ausgrid, Sydney, NSW,
Australia (e-mail: ZDjekic@ausgrid.com.au).
harmonics caused by transformer energization with few

comments and almost no details about CT saturation effects on
transformer differential relays. New digital differential relays
perform complex signal processing and decision logic that
make their behavior under CT saturation difficult to predict.
Some new relays use complicated algorithms to detect CT
saturation and prevent relay operation under such conditions.
These features are designed to provide security during
saturation but there also seems to be significant unintended
assistance from harmonic blocking, even though this feature is
intended to provide security during transformer inrush.
Although all these features together seem to be performing
the task (restraining relays from tripping under through-fault
conditions in the presence of CT saturation), they may also
reduce relay sensitivity and delay operation for some internal
faults (e.g. low current turn-to-turn faults under heavy loading
or through-fault conditions), especially if relays are set
inadequately. Without proper guidance and understanding of
relay behavior under CT saturation, protection engineers tend
to set relays to be more secure than required. This usually
sacrifices sensitivity and speed of operation for some internal
faults. Failure to trip for internal faults may lead to
catastrophic equipment failures, endanger public safety,
reduce reliability of supply and increase costs of equipment
replacement.
To investigate the behavior of new numerical relays under
CT saturation a large number of saturated waveforms were
generated. Due to the complexity and high cost of producing
these CT waveforms, established CT models were used to
quickly generate a large number of them. Transformer
protection relays were modeled to aid in the analysis of
results.
Extending previous work [5], two methods were developed
to model CT saturation phenomena and transformer
differential relay algorithms. The first method used the Simple
Step Model (SSM) of a CT and was implemented using the
Mathematica software package and Visual Basic for
Applications (VBA). The second method used EMTP-RV
software tools and a CT model based on nonlinear reactor
models. In the second method, ScopeView software was used
to model differential relay signal processing and algorithms.
Transformer differential relay modeling was based on relay
manuals and verified by secondary injection tests into three
modern numerical relays. The CT and relay models were
verified using saturated current waveforms recorded during
high current primary injection tests into various CTs. We
focused our attention on transient asymmetrical CT saturation
effects on relays because this is the way that transformer
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TPWRD-00281-2014
differential protection CTs saturate. In addition, new

numerical relays commonly use even harmonics (generated by
asymmetrical currents) to deal with inrush so these behaviors
between CT and relay can interact in surprising ways.
This paper is organized as follows. Section II provides a
description of the modeling methodology. Section III shows
how relay behavior was investigated. Section IV discusses
relay test results. The implications for transformer differential
schemes are discussed in Section V and concluding remarks
are given in Section VI.
II. MODELING
To simulate the transformer differential protection scheme,
three elements were modeled; the primary system, the
saturable CT, and the restrained differential relay element with
harmonic blocking. The following sections describe how these
three elements of the system were modeled.
A. Primary System Model
The primary system was modeled as several parallel twowinding star-star transformers with internal resistance and
inductance, variable tap changers, and supplied by an
equivalent network source from the high voltage side. Faults
were modeled as a resistive arc on the low voltage side of the
transformer. The importance of including multiple parallel
transformers is explained in Discussion section B.
HV : LV
HV CT
LV CT
Zs
HV CT
HV CT
Maximum remanence is typically 80% of the saturation flux

density for solid core CTs [6]. The two CT models are called
the Simple Step Model (SSM) and the EMTP model. Details
of these models are presented in Appendix section A.
In both models, CTs were connected in star as modern
relays perform phase compensation internally. Modern
numerical relays also have negligible impedance in the CT
terminals so this was excluded from the models. It was
assumed that only the low-side CTs saturate for low side faults
as they see higher fault currents. For the relay injection tests,
two CT specifications were modeled: a low specification
550:1 0.01PX200R1, and a high specification 2000:1
0.15PX1100R11 with anti-remanence gaps.
C. Restrained Differential Relay Model
Lastly, the relay was modeled with the following signal
processing steps:
1) CT current waveforms were acquired from the CT
model.
2) Fundamental and second harmonic phasors were found
for each transformer winding over 1 cycle via Fourier
series.
3) Restraint values were found using the combination of
fundamental harmonic phasor magnitudes according to
equations in relay manuals [8]-[10].
4) Operate values were found by vector combination for
both fundamental and second harmonic phasors
according to equations in relay manuals.
LV CT
5) Second harmonic blocking was made active whenever

the second harmonic operate value divided by the
fundamental operate value was greater than the second
harmonic blocking relay setting (typically ~15%).
LV CT
6) The restrained differential element issued a trip if the

fault point went above the dual slope characteristic
AND harmonic blocking was not active at the time.
Rf
In-zone
Fault
Fig. 1. Primary system model showing an in-zone fault with three parallel
transformers.
7) For each of these relay models, three implementations

were created in Mathematica, EMTP ScopeView and
VBA.
III. METHOD
This primary system model produces fault waveforms

which are sinusoidal with an exponentially decaying DC
offset. The larger the arc resistance Rf, the faster the DC offset
decays, meaning the CTs saturate less heavily. The worst case
is when the arc resistance is zero. This can occur if a breaker
is accidentally closed onto an earthed busbar. For our
verification tests the modeled primary system included three
parallel 132/11 kV transformers with an X/R of 50 on the low
side.
B. Saturating CT Model
The CT was simulated using two models which were
compared. Different levels of CT saturation were simulated
and used to check relay operation under such conditions. To
simulate worst case saturation, maximum DC offset and
remanence pointing in the same direction were used.
A. Relay Testing
To observe relay behavior, secondary fault current
waveforms were generated using the described primary system
and CT models. Various fault types were simulated including
3 phase, 2 phase and line to ground faults. Both in-zone and
through-faults on the low side of the transformer were
simulated. For each type of fault, several levels of CT
saturation were simulated by varying the remanence. The level
of saturation varied from no saturation to maximum possible
saturation. A total of 46 faults were injected into each of the
three relays.
The three relays chosen were modern numerical transformer
differential relays (here called Black6, Blue4 and Blue7).
They were each set for 132/11 kV, YNyn transformers. Slope
1 was set to the manufacturers recommended values. Slope 2
TPWRD-00281-2014
was set very low - about the same as slope 1 - to test whether
harmonic blocking would provide security during throughfaults with CT saturation. (On Black6, a low slope 2 was
achieved by setting breakpoint 2 to its maximum value of 30
per unit.)
Both the recorded and simulated secondary current
waveforms were injected into the three relays using the
Omicron CMC 356 test set. The relays were wired in series so
the same injected current flowed through each simultaneously.
Oscillographic fault records were downloaded from each relay
for analysis.
Using the fault records, relay state values were observed,
paying particular attention to the time just after saturation
begins (when it is most severe). This is the most difficult time
for the relay to distinguish in-zone and through-faults. Relay
state values for each fault were compared to the state values in
the EMTP and VBA relay models for verification.
B. Degree of Saturation
In order to accurately characterize harmonic blocking
behavior under CT saturation, it was necessary to develop a
way to quantify the level of saturation. Here we define the
degree of saturation (1) which was used to investigate relay
blocking behavior for different levels of saturation. It provides
a way to compare the results of different CT models
objectively, and to characterize the blocking behavior of
relays. The degree of saturation is defined as a value between
zero and one such that zero means no saturation, and one
means the CT outputs nothing for one full cycle.
Degree of Saturation = 1

is enough to enable harmonic blocking, even though the

saturation is light.
When the degree of saturation is ~15%, the maximum ratio
of 2nd harmonic to fundamental occurs due to the shape of the
saturated spill current waveform (see peak of Fig. 14).
When saturation is heavy (degree of saturation = 20-80%),
the spill current is large with significant spikes which have
large second harmonics. This will cause harmonic blocking to
be active during this time. It was found that harmonic blocking
is very sensitive to CT saturation and will block the relay for
any degree of saturation from light to heavy saturation.
When saturation is extreme (Degree of Saturation > 80%), it
is possible that the saturated CT will output practically zero
current for almost a full cycle. During this time the spill
current will be close to sinusoidal so it is possible that
harmonic blocking will be deactivated during the heaviest part
of saturation (see far right of Fig. 14). Fig. 2 shows the spill
current seen by the relay during through-faults with light,
medium and heavy saturation of the low side CTs. Harmonic
blocking regions are shaded gray.
(1)
Where I2sat is the one-cycle RMS of the saturated waveform,

and I2ideal is the one-cycle RMS of the ideal secondary current,
including DC offset. Both values are evaluated for the cycle
just after saturation begins.
IV. RESULTS
A. Relay Testing Results
This section shows how harmonic blocking responds to
different levels of CT saturation. It is demonstrated that
harmonic blocking is very sensitive and can provide excellent
security during CT saturation.
The way the relay blocks for CT saturation is a natural
consequence of the way CTs saturate and the signal processing
that the relay performs.
During through-faults with extremely light CT saturation
(i.e. degree of saturation less than a few percent), the 2nd
harmonic content of the spill current is small because the
waveform has a low magnitude and is close to sinusoidal.
Relays do not block under these conditions but this is not a
security issue because the spill current is too low to trip.
Under light saturation the distortion in the current
waveform is only just noticeable to the eye (i.e. degree of
saturation equal to a few percent). This creates comparably
high spikes in an otherwise small magnitude spill current (see
top plot of Fig. 2). The 2nd harmonic content of this waveform
Fig. 2. Three different through-fault spill currents over time at different

levels of saturation (tests E3, E6 and E13 3Ph). The Black6 relay blocked
during the gray shaded regions.
In Fig. 2 the shaded regions show that when a fault occurs,

harmonic blocking is first activated for a short time (~15 ms).
This is caused by the sudden transient onset of the fault which
contains second harmonics. This will occur for all faults,
regardless of whether CT saturation occurs. If CT saturation
occurs (as it does in the three plots of Fig. 2), more blocking
will occur until the level of saturation has decreased below the
threshold of the harmonic blocking setting. The heavier the
saturation, the longer blocking persists (see lower plot of Fig.
2).
It is theoretically possible to set a traditional slope 2 to
TPWRD-00281-2014
provide security during CT saturation, but it is very difficult to

calculate the optimal slope and break point for a given CT.
Harmonic blocking is a much simpler way to provide security
because a standard setting of 15% can be used in a very wide
variety of situations.
B. Relay Modelling Results
It was found that the relay models described above were
highly accurate when compared to the 46 injection tests into
the three relays. Appendix section B shows our verification of
these models.
V. DISCUSSION
Operate [pu]
These proven models can be used to improve relay settings.

Fig. 3 uses the SSM to produce a visual representation of the
differential protection of a real transformer on Ausgrids
network, protected by the Black6 relay. The thin upper curves
show in-zone faults on the low side of the transformer when
there are two transformers in parallel. The thin lower curves
show through-faults. The dash-dot line in between shows low
side, in-zone faults when this transformer is not paralleled
with any others. The thin solid vertical sections show the
relays response to CT saturation when the transformer is on
highest tap (highest VHV/VLV) and the thin dashed vertical
sections show lowest tap. Gray shaded sections show faults for
which harmonic blocking is active. The thick solid line shows
the relays dual slope characteristic (including Black6s cubic
spline between slope 1 and 2) [8]. The thick dashed line shows
the unrestrained pickup setting.
Black6 Response to Low Side Faults
4.5
4
Faults with
Faults where
saturation
3.5
saturation
cannot occur
3
2.5
2
1.5
1
0.5
0
0
0.5
1
1.5
2
2.5
Restraint [pu]
Harmonic Blocking (Lowest Tap)
In-Zone Faults (Lowest Tap)
Through-Faults (Highest Tap)
In-zone Fault - 11 Tx
Transformer
Unrestrained
Through-Faults (Lowest Tap)

Harmonic Blocking (Highest Tap)
In-Zone Faults (Highest Tap)
Black6
Characteristic
T60 Characteristic
modifying relay settings on an existing protection scheme.

A. Harmonic Blocking During Through-Faults
Traditionally, slope 2 has been used to provide security
during through-faults with CT saturation. Fig. 3 shows that the
high slope 2 section is not needed because harmonic blocking
(shaded regions) provides security for almost all throughfaults with CT saturation. This allows protection engineers to
set slope 2 much lower than traditional values, only slightly
higher than slope 1. This would greatly improve sensitivity to
relatively low level in-zone faults during heavy load, or
through-faults which evolve into in-zone faults.
To demonstrate that harmonic blocking provides excellent
security during through-faults with saturation, 30 throughfaults were simulated of various fault types and levels of CT
saturation. These current waveforms were injected into the
three relays. The following figures show selected results. The
simulated transformers were set to highest tap so the voltage
transformation ratio was 13.2. (The ratio would be 12 on
nominal tap.) Extreme taps are a more onerous test for the
security of harmonic blocking because they increase
fundamental spill current, making the relay less likely to
block. On taps closer to nominal, the 2nd harmonic as a
proportion of fundamental is higher so the relays block earlier
and for longer when saturation occurs.
Fig. 4 shows a typical relay response to heavy CT saturation
during through-fault. The Black6 fault record is shown but
Blue4 and Blue7 showed very similar behavior. The saturated
secondary current (top plot) creates large second harmonic as
a proportion of fundamental in the spill (center plot). The
bottom plot shows differential current divided by restraint
current, which can be compared with slope values. The
differential element operates when the bottom curve is higher
than the relevant slope value, however this entire high region
is blocked so the spurious trip is prevented.
When the center plot goes above 15% the relay blocks the
restrained differential element (shown by shaded regions).
This ensures that the relay blocks until the CT is completely
out of saturation, 14 cycles later. The relays harmonic
blocking feature blocks for the entire time that saturation
causes a large spill (see lower plot).
Had harmonic blocking been disabled, the relay would have
needed a very high slope 2 to prevent a spurious trip. The
lower plot shows that slope 2 would need to be set to at least
90%1 to provide security. This example shows that many
utilities are probably unknowingly relying on harmonic
blocking for security during saturation because slope 2 is not
set high enough to cover all cases.
Fig. 3. Operate vs restraint plot using the SSM for a 132/11 kV transformer,
protected by a Black6 relay.
Fig. 3 shows that the SSM makes it trivial to choose

breakpoints, slope 1 and slope 2 to achieve effective
sensitivity and security, taking account of CT saturation and
the details of the primary system. It can also be used to easily
test the effect of different CT specifications such as changing
the knee point voltage or CT ratio. This analysis could be done
to assist in planning a new installation, changing CTs or
1
This is true for relays with a slope 2 that passes through the origin (e.g.
Black6 and Blue4). For relays where slope 2 meets slope 1 at the breakpoint
(e.g. Blue7), slope 2 would need to be well over 100%, the break point would
need to be very low, and even then it may not be possible to prevent nuisance
trips without harmonic blocking or harmonic restraint elements being active.
TPWRD-00281-2014
5
Similar behavior was seen when current waveforms from
real CTs undergoing primary injections were used. Fig. 6
shows a situation very similar to Fig. 5, except that the
saturated waveform was recorded from a real CT, rather than a
simulation. The recorded secondary waveform was then
injected into the relays. The blocking behavior is very similar
to Fig. 5, verifying our CT models for this purpose. The
Black6 fault record is shown but Blue7 was similar. Blue4 was
not tested.
Fig. 4. Single phase to earth through-fault with severe CT saturation, injected

into Black6 (test E12). Blocked regions shaded gray.
Fig. 5 shows a single phase to earth through-fault with light

saturation. The Black6 relays fault record is shown but Blue4
and Blue7 showed very similar behavior. The saturation is too
light to cause a spurious trip but blocking is still activated for
two cycles. Setting slope 2 to the same value as slope 1 would
in this case adequately prevent a nuisance trip even if blocking
was not active. This is a prime example of the effectiveness of
harmonic blocking to provide security during CT saturation on
through-fault. Blocking activates even for light saturation.
Fig. 6. Single phase to earth external fault with light saturation, recorded by
Black6. Secondary currents recorded during high current primary injection
test.
Fig. 7 shows an intriguing example with extremely light

saturation. The current waveform looks almost perfect to the
eye but the relay detects the saturation and blocks for about
one cycle. The saturation in Fig. 7 is so light that there was no
danger of a spurious trip but the relay blocked anyway. If the
transformer had been closer to nominal tap it would have
blocked for an even longer period of time (due to the lower
fundamental steady state spill current near nominal tap).
Black6 fault record shown. Blue4 and Blue7 showed similar
behavior.
Fig. 5. Single phase to earth external fault with light saturation, as recorded
by Black6 (test E3). Blocked regions shaded gray.
TPWRD-00281-2014
Fig. 7. Single phase to earth through-fault with extremely light saturation, as

recorded by Black6 (test E2c).
Fig. 8. Three phase through-fault with spurious trip as recorded by Black6

(test E13 3ph). Blocked regions are shaded gray.
It is important to note that harmonic blocking only provides

good security if CTs are specified appropriately. If the knee
point voltage is too low or the burden too high, the CT can
saturate so heavily that blocking is disabled (see far right of
Fig. 14). Fig. 8 shows such an example. In this 3 phase
external fault example the CTs are underspecified. The Aphase CT saturates in just 7.5 ms and the C-phase CT saturates
after 15.6 ms (B-phase does not saturate due to negligible DC
offset in that phase). Fig. 8 has a gap in the shaded region
which shows that blocking on phase A deactivated briefly
during extreme saturation, resulting in a spurious trip. To
prevent the relay from operating in this situation, Slope 2
would need to be set very high (>60%, see lower plot of Fig.
8) with break points set very low. This would at the same time
make the relay very insensitive to some internal faults,
especially if connected in a radial network configuration.
Another way to prevent a trip in this situation would be to use
cross-blocking, addressed in Discussion section E. If the CTs
had been specified with a longer time to saturation (e.g. 2
cycles) this spurious trip would never occur because the CTs
could not saturate so heavily. Black6 fault record shown.
Blue4 and Blue7 showed very similar behavior. B and C
phases not shown.
B. Harmonic Blocking During In-zone Faults

Whilst blocking is an excellent method to provide security
during through-fault, some readers may be concerned that
blocking could occur during in-zone faults and delay tripping.
Indeed this is possible but this risk is very low if appropriate
CTs are installed. Harmonic blocking does not negatively
affect protection if the minimum time to saturation of the CTs
is sufficient for the relay to detect the fault and issue a trip
before the CTs saturate. This time depends on the relays
processing algorithms but for the three relays tested, 2 cycles
of unsaturated time provided excellent protection against inzone faults.
Fig. 9 shows an in-zone fault where the CT saturates just
1.3 cycles (26 ms) after fault inception. The relay successfully
trips in the brief gap where blocking is deactivated (trip shown
by vertical line at 0.121 s). If CTs are specified adequately,
this gap in the blocking will be present, and the relay will trip
very quickly (1 to 2 cycles after fault inception).
TPWRD-00281-2014
7
for any differential protection scheme with harmonic blocking
enabled.
Fig. 9. Single phase to earth in-zone fault on low side of transformer, as

recorded by Black6 (test I1). Relay trips 26 ms after fault inception.
Fig. 9 is an in-zone fault and it can be seen that blocking

ends whilst the CT is still in saturation (see top plot). This is
typical blocking behavior during in-zone faults. Contrast this
with Fig. 4 (top plot), which showed that during through-faults
blocking persists until the CT is fully out of saturation. During
in-zone faults, the relay will only block whilst there is a
significant degree of saturation (e.g. >15%), whereas during
through-faults the relay blocks for a much smaller degree of
saturation (e.g. >5%). The end result is that during in-zone
faults, CTs need to be more heavily saturated for blocking to
occur, when compared to through-faults. Also, the blocking
for internal faults ends sooner than for through-faults. These
effects are explained by the fact that in-zone faults have a
much larger fundamental component in the spill, so the second
harmonic as a proportion of fundamental is significantly
lower, leading to a lower likelihood of blocking, and a shorter
duration of blocking. This fact helps to reduce the risk of
blocking during in-zone fault. Note that having adequately
specified CTs can remove this risk altogether. The SSM can
predict the different degrees of saturation which cause
blocking for in-zone and through-faults, given a CT
specification and primary system.
Fig. 10 shows another in-zone fault, but now the CTs are
extremely underspecified for the application. Saturation occurs
a quarter of a cycle after fault inception. This test was
performed to demonstrate how harmonic blocking can behave
if saturation begins almost immediately. The trip is delayed by
harmonic blocking and occurs almost nine cycles after fault
inception (trip shown by vertical line at 0.197 s). Note that this
is not just a limitation of our method it could occur in any
existing installation where harmonic blocking is enabled and
where CTs are extremely underspecified. This figure
emphasises the importance of appropriate CT specifications
Fig. 10. Single phase to earth, in-zone fault with extremely poor CTs, as
recorded by Black6.
To ensure CTs are specified adequately, the minimum

unsaturated time must be calculated for the worst fault case.
This is why it is important to model several transformers in
parallel, where network topology allows such an operation.
Fig. 1 shows an in-zone fault with three parallel transformers.
This causes the LV CT on the faulted transformer to see
double the fault current as shown by the arrows in Fig. 1. This
larger fault current causes the LV CT to saturate earlier than in
the through-fault case. Due to this back-feeding behavior, the
minimum unsaturated time must be calculated for the
maximum in-zone fault current, which usually occurs when
the maximum number of transformers are paralleled.
Care should be taken with circuit breaker fail settings to
ensure that if blocking occurs during in-zone faults, this does
not reset the breaker fail timer. The initiating signal should be
sealed in to ensure reliable breaker fail operation, despite
possible harmonic blocking.
C. Setting the Unrestrained Pickup
Simulation results like Fig. 3 are also useful for setting the
unrestrained pickup. The unrestrained element is not blocked
by harmonics so it must be set above maximum through-fault
spill current with maximum CT saturation. It must also be set
above maximum inrush spill current during energisation.
Graphs like Fig. 3 allow the engineer to set the unrestrained
pickup to its optimal level. If inrush permits, the unrestrained
pickup can be set just above the through-fault with the worst
TPWRD-00281-2014
saturation. This occurs on lowest transformer tap (lowest ratio
of VHV/VLV). If large enough CTs are used, the unrestrained
element may be able to detect even medium current in-zone
faults (e.g. low side faults without back-feed), allowing very
fast tripping. To determine whether the existing CTs are large
enough, our VBA code can be used. It produces graphs like
Fig. 3 which allow the engineer to visually choose an
unrestrained pickup that maximizes sensitivity without
compromising security during CT saturation. In cases where
CTs are poor, there is a much smaller gap between the in-zone
and external faults on the restraint-operate plane so it will not
be possible to put the horizontal unrestrained line between
them for all transformer taps. Even if the unrestrained pickup
cannot see the majority of low side in-zone faults, setting it in
this way allows it to see many of them. This provides some
redundancy in case the protection engineer sets the restrained
differential incorrectly. A reduced unrestrained pickup may
produce faster tripping for faults during energization when the
restrained element is blocked by large second harmonic
content from inrush currents. Inrush can last for a long period
(seconds) and prevent the relay from tripping even for
maximum faults on the low side of the transformer.
D. Checking the Performance of Existing CTs
The previous sections explained the effect of CT saturation
on modern relay algorithms, and can be used to improve
protection settings with the existing CTs. However, this
method should only be used where the existing CTs have a
certain minimum performance level. This section will describe
how to check whether existing CTs are good enough for the
harmonic blocking method presented here to function as
intended.
Harmonic blocking or harmonic restraint must be enabled to
prevent nuisance trips due to inrush. Simulations and tests
presented here have shown that harmonic blocking is also
activated during CT saturation. If slope 2 is lowered and
harmonic blocking is relied upon to provide security, then
harmonic blocking becomes a constraint on the minimum
performance of differential CTs. In order for this to work
effectively, CTs must not saturate so heavily that blocking is
deactivated during through-faults (see far right of Fig. 14), and
they must not saturate so quickly that they block the restrained
element for in-zone faults before the relay issues a trip
command. It is difficult to directly relate these requirements to
a particular CT specification but the following two rules of
thumb were found to work for our primary system and the
three relays tested:
1) The minimum time to saturation should be longer than
the time for the DC offset to decay to 80% of its
maximum level. This helps to ensure that CTs do not
saturate too heavily.
2) The minimum time to saturation for the highest inzone fault (with the maximum number of transformers
in parallel), must be longer than the time that the relay
needs to trip.
The time to saturation in the above points should be
8
calculated for the worst case. This means the fault has
maximum expected X/R, maximum DC offset and worst case
remanence in the same direction as the DC offset. For our
primary system with a maximum X/R of 50, two cycles of
unsaturated time was found to provide excellent sensitivity
and security, even when slope 2 was set the same as slope 1.
Note that if the existing CTs do not meet the two rules of
thumb above, it is likely that they will perform very poorly in
all transformer differential schemes, not just the method
presented here.
E. Cross Blocking
Many relays provide the option that when one phase blocks
due to harmonics, the other phases are blocked also. This cross
blocking behavior can provide greater security during inrush
and through-faults with CT saturation, however it could create
a great risk during in-zone faults. If the differential CTs have
very poor performance (i.e. if they do not adhere to the two
rules of thumb in section D), it is possible that a CT on one
phase could saturate very quickly and all three restrained
elements are blocked before the relay trips. All restrained
differential elements remain blocked until the last CT comes
out of saturation. On the other hand, if independent blocking is
used, the other two phases can still trip even if the first phase
CT saturates and blocks very quickly. For this reason cross
blocking should not be used where CT performance is poor
(e.g. if time to saturation is less than half a cycle).
VI. CONCLUSION
Traditional wisdom has dictated that a high slope 2 provides
security during through-faults with saturation. This work has
shown that, when enabled, it is actually harmonic blocking
which is providing security and the high slope 2 probably does
not contribute at all because the relay is blocked whenever
saturation occurs. In addition, the high slope 2 may be
reducing sensitivity to some in-zone faults. Slope 2 will only
provide security during saturation if it is set correctly but there
is very little guidance in relay manuals for how to set slope 2
and the break point. The nonlinear nature of CT saturation
makes setting slope 2 and the break point a very challenging
problem, whereas setting harmonic blocking is trivial because
standard settings can be used.
Results have been presented which demonstrate how
modern transformer differential relays behave when CT
saturation occurs by injecting 46 simulated faults into three
relays. A model has been presented which accurately predicts
the blocking and restraint behavior of these relays during
saturation. The results suggest that a high slope 2 may not be
necessary to provide security during through-faults with CT
saturation if harmonic blocking is enabled. This allows slope 2
to be lowered significantly, leading to greater sensitivity for
some internal, turn-to-turn faults. We have introduced the
novel suggestion that many utilities may be unknowingly
relying on harmonic blocking for security whilst thinking that
a high slope 2 was effectively set. These settings would have
suboptimal sensitivity due to the unnecessarily high slope 2. It
is suggested that many utilities could safely lower slope 2 if
TPWRD-00281-2014
they are using harmonic blocking because these results apply
very generally.
Besides improving sensitivity, utilities could simplify their
protection setting calculations by relying on harmonic
blocking rather than slope 2 for security. Rather than
performing complex calculations for slope 2 and the break
points, standard values could be used along with a standard
setting for harmonic blocking (typically ~15%). Such
standardization can reduce human error and save time by
allowing standard test shots to be used by technicians. Our
testing indicates that in many cases, slope 2 does not provide
adequate security on its own and harmonic blocking is
required to deal with CT saturation. In some instances where
poor performance CTs are installed, it may not even be
possible to provide adequate security using slope
characteristics alone. Harmonic blocking or harmonic restraint
can be used to achieve this.
Although this research focused on harmonic blocking,
harmonic restraint was also investigated and showed similar
behavior. The harmonic restraint element significantly
contributes to security during external faults with
asymmetrical CT saturation. Harmonic restraint also allows a
significant reduction in slope 2 settings, allowing improved
sensitivity. It seems that the harmonic restraint element may
also delay a trip for internal faults if CTs do not adhere to the
two rules of thumb in Discussion section D. Harmonic
restraint could be an area of further research to verify these
preliminary findings.
Two rules of thumb have been presented which help to
decide whether existing CTs perform well enough to rely on
harmonic blocking for security. This blocking effect has not
been traditionally used to specify CTs but since underspecified
CTs could potentially saturate and block a relay during an inzone fault, this should be a primary consideration for utilities
when specifying a transformer differential CT.
For some relays like Blue4, a high slope 2 does not
necessarily reduce sensitivity because it adaptively changes
between slope 1 and 2 depending whether it has determined
that the fault is inside or out of the zone of protection.
However, even for this relay it seems that slope 2 could be set
quite low because harmonic blocking alone is highly effective
at providing security during through-fault.
In an informal survey we found that very few protection
engineers were aware that asymmetrical CT saturation
activates harmonic blocking in transformer differential relays.
This is unsurprising, given that there is very little reference to
this behavior in relay manuals or the literature. This could be a
missed opportunity to increase sensitivity by lowering slope 2.
Furthermore, it could be potentially dangerous if CTs are
specified incorrectly and early blocking occurs during in-zone
faults. It is hoped that this paper and subsequent research will
convey this important message to the wider protection
community.
9
REFERENCES
[1]
J. E. Waldron and S. E. Zocholl, Design Considerations for a New

Solid-State Transformer Differential Relay With Harmonic Restraint,
5th Annual Western Protective Relay Conference, Sacramento, CA, Oct.
1978.
[2] E. C. Wentz and W. K. Sonnemann, Current Transformers and Relays
for High-Speed Differential Protection With Particular Reference to
Offset Transient Currents, AIEE Transactions, vol. 59, pp. 481488,
Aug. 1940,.
[3] F. Mekic, Z. Gajic, S. Ganesan Adaptive Features on Numerical
Differential Relays, 29th Annual Western Protective Relay Conference,
Spokane, WA, Oct. 2002.
[4] K. Behrendt, N. Fischer, C. Labuschagne, Considerations for Using
Harmonic Blocking and Harmonic Restraint Techniques on Transformer
Differential Relays, SEL Oct. 2006.
[5] M. Stanbury, Modelling of Current Transformer Saturation for Power
System Protection Applications, South East Asia Protection &
Automation Conference (SEAPAC), Brisbane, Queensland, Mar. 2013.
[6] O. Iwanusiw, Remanent flux in current transformers, Ontario Hydro
Research Quarterly, pp. 18-21, third quarter, 1970.
[7] A. Wright, Current Transformers: Their Transient and Steady State
Performance. London, Chapman and Hall Ltd, 1968.
[8] GE Multilin, T60 Transformer Protection System UR Series Instruction
Manual, T60 Revision 5.9x, Markham, Ontario, pp. 5-171 to 5-174,
2011.
[9] SEL, SEL-487E Relay Current Differential and Voltage Protection
Instruction Manual, Schweitzer Engineering Laboratories Inc., pp. 4.2 to
4.24, 2011.
[10] SEL, SEL-787 Transformer Protection Relay, Schweitzer Engineering
Laboratories Inc., pp. 1-3, 2013.
[11] M. Kezunovi, C. W. Fromen, F. Phillips, Experimental evaluation of
EMTP-based current transformer models for protective relay transient
study IEEE Trans. Power Del., vol. 9, No. 1, pp. 405413, Jan. 1994.
APPENDIX
A. CT Model Details
This section presents the two CT models used to produce
the simulated saturated waveforms. The Simple Step Model
(SSM) [7] acts as an ideal CT until the flux density reaches the
saturation flux level. At this point, the secondary current
instantly drops to zero. A chopped waveform is produced. An
equivalent circuit is shown in Fig. 11.
Fig. 11. Equivalent circuit of the Simple Step Model.
Switch S in Fig. 11 begins in the open state and the flux

density B begins at the remanent flux density level. Switch S is
controlled by the state equations (2) and (3):
= !' "# $%$

&
(2)
TPWRD-00281-2014
open, /0& < < +/0&
,
closed,
+/0& 89: "; > 0
*
( = closed, /0& 89: "; < 0 (3)
+ open, + 89: " 0
/0&
;
*
) open, /0& 89: "; 0
Where i1 and i2 are the primary and secondary currents, N1

and N2 are the primary and secondary turn numbers, RCT is the
DC resistance of the CTs secondary winding, Rlead is the total
resistance of the leads between the CT and relay, R2 = RCT +
Rlead, A is the cross sectional area of the CT core, B(t) is the
core flux density at time t, and Bsat is the saturation flux
density (typically ~1.7 Tesla for Grain Oriented Silicon Steel
cores).
The second, EMTP based CT model used a nonlinear
reactor model based on a piecewise linear representation of the
flux-current relationship of the inductor in the CT magnetizing
branch. EMTPs Nonlinear Inductance Data Calculation
device was used to convert from a measured RMS voltagecurrent curve to the -i curve adjusted for EMTP. This method
creates the equivalent of a nonhysteretic B-H curve with a
gentle roll-off into saturation. Fig. 12 shows the equivalent
circuit and Fig. 13 shows the flux-current curve of the
nonlinear magnetizing inductance.
Fig. 12. Equivalent circuit of the EMTP nonlinear reactor model.
10
Secondary current waveforms were recorded and used to
verify CT models. More detailed verification of EMTP CT
models has been conducted previously [11]. The two CT
models (SSM and EMTP) were also compared to each other.
B. Relay Model Verification
To ensure that our relay model was accurate, we compared
the outputs of the models to the fault records downloaded
from the relays. Fault waveforms were simulated from light to
extreme saturation and injected into the three relays. The fault
waveforms were downloaded to observe the behavior of
harmonic blocking. The predictions of the SSM and relay
models were compared to the downloaded fault records. Note
that the injections into the relays were produced by a different
CT model (nonlinear reactor model) and a different
implementation (EMTP) to the predictor implementation
(SSM and VBA).
Fig. 14 shows how the relays measure the level of second
harmonic in the spill which is used to decide whether to block.
The solid line shows the predictions of the SSM and the data
points are individual through-faults as measured by the three
relays (Black6, Blue4 and Blue7). The dashed line at 15%
shows a typical harmonic blocking relay setting. Values above
the dashed line activate harmonic blocking. Different degrees
of saturation were generated by varying the arc resistance Rf.
Lower arc resistance produces more significant CT saturation
primarily due to the higher X/R ratio of the fault. This plot is
for the worst case of extreme transformer tap. On central taps
the curve is skewed even further to the left so the relay blocks
for even lower degrees of saturation. There is good agreement
between the SSM and all relay fault records. The only
functionally important aspect is whether the relay blocks
(above the dashed line) or not (below the dashed line).
Peak 2nd Harmonic / Fundamental [%]
Second Harmonic Proportion for Through-Faults

100%
80%
60%
40%
20%
0%
0
787
Blue7
SSM
Fig. 13. Flux vs magnetizing current of the nonlinear reactor model

implemented in EMTP. Note: flux values may not be physically meaningful;
they should be interpreted only as parameters of the EMTP model.
To verify these CT models, primary injection tests were

performed at Ausgrids high current testing facility at Lane
Cove, Sydney. Fault currents in the kiloamp range with DC
offset were injected into the primaries of various CTs.
0.2
0.4
0.6
Degree of Saturation
Blue4
487E
Relay Setting
0.8
1
T60
Black6
Fig. 14. Second harmonic as a proportion of fundamental in the spill, for

various levels of CT saturation calculated by (1). Three relays shown.
Fig. 14 shows that harmonic blocking elements in all three

relays are very sensitive to even small levels of CT saturation
during through-faults. Just 5% saturation causes all three
relays to block instantly. Note that at the right of Fig. 14 the
CT can saturate so heavily that blocking is deactivated causing
TPWRD-00281-2014
11
Blue4 & Blue7 Response to Through-Faults

1.2
1
Operate [pu]
a nuisance trip on through-fault. This is an extreme case and is

not a concern if CTs are specified adequately (see Discussion
section D).
It was found that the blocking behavior of the relays did not
depend on the CT model used. Although the waveform shapes
produced by various CT models were different, the times
when blocking began and ended were practically identical.
The different CT models produced different peak levels of
second harmonic in the spill, but the times when it passed the
15% relay setting were the same. This suggests that even
simplistic models like the SSM produce useful results for low
impedance differential protection applications.
It was found that the models correctly predicted the operate
vs restraint behavior of the relays. Fig. 15 and Fig. 16 show a
good match between predictions and fault record data for the
three relays. The operate vs restraint characteristic is important
because it is used by the relay to make trip decisions. If a data
point is above the relays dual slope characteristic and
harmonic blocking is not active, the relay will trip. In Fig. 15
the solid line shows the predictions of the SSM and relay
model. Crosses show several fault records downloaded from
the Black6 relay. The low slope section shows low differential
value faults with no CT saturation and the vertical section
shows where CT saturation occurs. It can be seen that there is
good agreement between the SSM predictions and Black6s
behavior. All data points were taken from the cycle just after
saturation begins because this is the time when saturation is
heaviest.
0.8
0.6
0.4
0.2
0
0.5
1.5
Restraint [pu]
Blue4
Simple Step Model
SEL-487E
Black6 Response to Through-Faults
Operate [pu]
1.5
1
0.5
0
0.5
1.5
Restraint [pu]
Simple Step Model
2.5
Blue7
SEL-787
Fig. 16. Operate vs restraint for Blue4 (circles) and Blue7 (diamonds).
2.5
Black6
GE T60
Fig. 15. Operate vs restraint for Black6 during through-faults.
Fig. 16 is similar to Fig. 15 with the same fault waveforms

but for different relays: Blue4 and Blue7. Good agreement is
seen between prediction (solid line) and experiment (circles
and diamonds). Note that the shape of the curve is different to
Fig. 15 due to the different ways that the Black and Blue
relays calculate restraint.

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This article has been accepted for publication in a future issue of this journal, but has not been

The Impact of Current Transformer Saturation

harmonics caused by transformer energization with few

differential protection CTs saturate. In addition, new

Maximum remanence is typically 80% of the saturation flux

5) Second harmonic blocking was made active whenever

6) The restrained differential element issued a trip if the

7) For each of these relay models, three implementations

This primary system model produces fault waveforms

Degree of Saturation = 1   

is enough to enable harmonic blocking, even though the

Where I2sat is the one-cycle RMS of the saturated waveform,

Fig. 2. Three different through-fault spill currents over time at different

In Fig. 2 the shaded regions show that when a fault occurs,

provide security during CT saturation, but it is very difficult to

These proven models can be used to improve relay settings.

Through-Faults (Lowest Tap)

modifying relay settings on an existing protection scheme.

Fig. 3 shows that the SSM makes it trivial to choose

Fig. 4. Single phase to earth through-fault with severe CT saturation, injected

Fig. 5 shows a single phase to earth through-fault with light

Fig. 7 shows an intriguing example with extremely light

Fig. 7. Single phase to earth through-fault with extremely light saturation, as

Fig. 8. Three phase through-fault with spurious trip as recorded by Black6

It is important to note that harmonic blocking only provides

B. Harmonic Blocking During In-zone Faults

Fig. 9. Single phase to earth in-zone fault on low side of transformer, as

Fig. 9 is an in-zone fault and it can be seen that blocking

To ensure CTs are specified adequately, the minimum

J. E. Waldron and S. E. Zocholl, Design Considerations for a New

Fig. 11. Equivalent circuit of the Simple Step Model.

Switch S in Fig. 11 begins in the open state and the flux

 =   !' "# $%$

Where i1 and i2 are the primary and secondary currents, N1

Fig. 12. Equivalent circuit of the EMTP nonlinear reactor model.

Second Harmonic Proportion for Through-Faults

Fig. 13. Flux vs magnetizing current of the nonlinear reactor model

To verify these CT models, primary injection tests were

Fig. 14. Second harmonic as a proportion of fundamental in the spill, for

Fig. 14 shows that harmonic blocking elements in all three

Blue4 & Blue7 Response to Through-Faults

a nuisance trip on through-fault. This is an extreme case and is

Black6 Response to Through-Faults

Fig. 15. Operate vs restraint for Black6 during through-faults.

Fig. 16 is similar to Fig. 15 with the same fault waveforms

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Degree of Saturation = 1

= !' "# $%$