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Tutorial

How to access cadence from our PC ?


Install X ming and Moba x term on your pc.

Now open moba x term.


The following appears on screen.

Click on Start Local Terminal


Enter

ssh (login id) ex : ssh mukesh@172.16.30.2

Enter Password.
Now screen looks like this

Now access the particular folder by using cd , ls and incase if you want to
create new file use mkdir.
After accessing the particular folder , type load_module cadenceold
And then type icfb &
Now screen looks as follows:

Now you will observe cadence popping up.

Introduction
1) What is ESD?
Electrostatic discharge (ESD) is the sudden discharge of static charge when two
differently charged surfaces come into contact. When these charged surfaces come
into contact with CMOS devices, a very large current flows in a short span of time.
These electrostatic charges can even create a potential difference of 8kv and
current over 13 A. This damages the CMOS devices.

2) Why ESD protection?


While most of the ESD events are harmless, but extreme ESD events can
damage electronic devices. Although devices can withstand small ESD
events, large events can be produced even by human touch. Hence ESD
protection is essential for electronic circuits. In our case, we design ESD
protection for LNA block.

3) ESD Testing.
To check the reliability and effectiveness of ESD protection circuits ESD
testing is conducted. Out of the few available models Human Body
Model(HBM) is widely used.
The HBM test consists of a charged capacitance of 100 pF that is
discharged through a 1.5k resistor, connected to the device under test
(DUT), resulting in a 150-ns double-exponential pulse. The standard level of
ESD protection is 2 kV and refers to the ability of the on-chip ESD protection
to conduct 1.34 A during an ESD event.

4) Low Noise Amplifier (LNA)


It is an amplifier used in the receiver side to amplify weak signals received
by antenna. A simple amplifier amplifies both signal and noise power.
Whereas, LNA amplifies the signal having very low power without degrading
Signal to Noise Ratio. LNAs are designed to minimize its own noise.

LNA Design:
Let us consider a simple cascade amplifier:

We need to match input impedance with the LNA impedance in order to


transfer maximum power.

Now, let us calculate Zin.


Equivalent circuit for the above circuit is:

Here, we ignore Cgd , RD , and 1/gm


For calculating Zin, we assume a voltage source Vx is applied and current ix
flows through the source.
Vx/ix gives Zin.
Equations
1 V gs =

i x1
jw C gs

2 V x =i x jw L1 +

i x1
+ ( i + g V )jw Ls
jw C gs x m gs

Substitute eq 1 in eq 2.
We get,
V x =i xjw L1+

i x1
g mi x1
+ ix +
jw L s
jw C gs
jw C gs

Vx
g L
1
= jw L1+
+ jw Ls + m s
ix
jw C gs
C gs
Z =

g mL s
1
+ jw( L1 + Ls )+
C gs
jw C gs

We must equate this impedance to 50.


Implies, real part = 50
Imaginary part = 0.
By equating imaginary part to zero, we get
Resonant frequency

And ,

g mLs
C gs = 50.

wR=

1
(L1 + Ls )C gs

ESD Circuit Design:


1) LC based ESD
The following diagram shows LC based ESD Circuit with LNA.
ESD event frequency spectrum is limited to 1 GHz only.
RF signal now received has 2 paths. L path and gate input path.
When signal frequency is greater than1 GHz, L path becomes high
impedance path. Hence signal chooses gate input path.
In other case, signal chooses L path which provides Low Impedance. (As of
now, we can ignore parasitic path).

Effective Circuit:

Now let us calculate Zeff in order to match with input impedance.

Effective Resistance =
LESD S

||

1
+ ( L 1+ LG ) S+WtL
+
C ESDS
C GSS

On solving we get,
Real part = 0.
Imaginary part = j*LESD*w
Under Assumption,
L1+LG > LESD

Reason for not choosing this is, real part becomes zero. Hence, we can never
achieve input matching by using the above ESD circuit.

2) Diode based ESD:


There are 2 types of diode based ESD.
Type 1: In this, we place diodes at the RF input and away from the gate of
the MOSFET.
The schematic diagram of above ESD simulated in cadence is as follows:

Working:
As ESD event occurs, in case of +ve spike, peak spike voltage is much
greater than supply voltage. Hence, upper diode gets forward biased and all
the current is discharged through the upper diode.
In case of ve spike, lower diode gets forward biased and current discharges
through lower diode.

Reason for not choosing this circuit:


When matching part is concerned, we need smaller capacitance at the RF
input. Hence , we require diodes with smaller area. But, we cannot sink all
the ESD current with smaller diodes.
Bigger diodes are required. Bigger diodes come with larger capacitance. So it
becomes difficult to tune.

Type 2: In this, we place diodes at the gate of the MOSFET and away from
the RF input.
The schematic diagram of above ESD simulated in cadence is as follows:

The capacitor placed in front of the ESD circuit is MIM capacitor which can
withstand a potential difference of 75V and is a part of matching circuit.
This ESD also works in the same way mention for the above ESD.
Advantages:
Very easy to tune.
Provides efficient ESD isolation protection.