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TC1303A/TC1303B

/
TC1303C/TC1304
500 mA Synchronous Buck Regulator,
+ 300 mA LDO with Power-Good Output
Features

Description

• Dual-Output Regulator (500 mA Buck Regulator
and 300 mA Low-Dropout Regulator)
• Power-Good Output with 300 ms Delay
• Total Device Quiescent Current = 65 µA, Typ.
• Independent Shutdown for Buck and LDO
Outputs (TC1303)
• Both Outputs Internally Compensated
• Synchronous Buck Regulator:
- Over 90% Typical Efficiency
- 2.0 MHz Fixed-Frequency PWM
(Heavy Load)
- Low Output Noise
- Automatic PWM to PFM mode transition
- Adjustable (0.8V to 4.5V) and Standard
Fixed-Output Voltages (0.8V, 1.2V, 1.5V,
1.8V, 2.5V, 3.3V)
• Low-Dropout Regulator:
- Low-Dropout Voltage = 137 mV Typ. @
200 mA
- Standard Fixed-Output Voltages
(1.5V, 1.8V, 2.5V, 3.3V)
• Power-Good Function:
- Monitors Buck Output Function (TC1303A)
- Monitors LDO Output Function (TC1303B)
- Monitors Both Buck and LDO Output Functions (TC1303C and TC1304)
- 300 ms Delay Used for Processor Reset
• Sequenced Startup and Shutdown (TC1304)
• Small 10-pin 3X3 DFN or MSOP Package
Options
• Operating Junction Temperature Range:
- -40°C to +125°C
• Undervoltage Lockout (UVLO)
• Output Short Circuit Protection
• Overtemperature Protection

The TC1303/TC1304 combines a 500 mA synchronous buck regulator and 300 mA Low-Dropout Regulator (LDO) with a power-good monitor to provide a highly
integrated solution for devices that require multiple
supply voltages. The unique combination of an
integrated buck switching regulator and low-dropout
linear regulator provides the lowest system cost for
dual-output voltage applications that require one lower
processor core voltage and one higher bias voltage.
The 500 mA synchronous buck regulator switches at a
fixed frequency of 2.0 MHz when the load is heavy,
providing a low noise, small-size solution. When the
load on the buck output is reduced to light levels, it
changes operation to a Pulse Frequency Modulation
(PFM) mode to minimize quiescent current draw from
the battery. No intervention is necessary for smooth
transition from one mode to another.
The LDO provides a 300 mA auxiliary output that
requires a single 1 µF ceramic output capacitor,
minimizing board area and cost. The typical dropout
voltage for the LDO output is 137 mV for a 200 mA
load.
For the TC1303/TC1304, the power-good output is
based on the regulation of the buck regulator output, the
LDO output or the combination of both. The TC1304
features start-up and shutdown output sequencing.
The TC1303/TC1304 is available in either the 10-pin
DFN or MSOP package.
Additional protection features include: UVLO,
overtemperature and overcurrent protection on both
outputs.
For a complete listing of TC1303/TC1304 standard
parts, consult your Microchip representative.

Applications




Cellular Phones
Portable Computers
USB-Powered Devices
Handheld Medical Instruments
Organizers and PDAs

© 2005 Microchip Technology Inc.

DS21949B-page 1

TC1303A/TC1303B/TC1303C/TC1304
Package Types

TC1303A,B,C
10-Lead DFN
SHDN2 1
VIN2 2
VOUT2 3
PG 4
AGND 5

10-Lead MSOP
SHDN2 1

10 PGND

VIN2 2

9 LX

VOUT2 3

8 VIN1

PG 4

7 SHDN1

AGND 5

6 VFB1/VOUT1

10 PGND
9 LX
VIN1

8

7 SHDN1
6 VFB1/VOUT1

TC1304
10-Lead DFN
SHDN 1
VIN2 2
VOUT2 3
PG 4
AGND 5

DS21949B-page 2

10 PGND
9 LX
8 VIN1
7 AGND
6 VFB1/VOUT1

10-Lead MSOP
SHDN 1
VIN2 2
VOUT2 3
PG 4
AGND 5

10 PGND
9 LX
8

VIN1

7 AGND
6 VFB1/VOUT1

© 2005 Microchip Technology Inc.

TC1303A/TC1303B/TC1303C/TC1304
Functional Block Diagram – TC1303

UVLO

Undervoltage Lockout
(UVLO)

VREF

Synchronous Buck Regulator
VIN1

PDRV

VIN2

LX
SHDN1

Driver

Control

NDRV
PGND

PGND
AGND

PGND

Sense Switcher for A,C

VOUT1/VFB1

PG
TC1303A(1),B(2),C(1) options
PG Generator with Delay
VREF
Sense LDO for B,C

UVLO
VOUT2
LDO
SHDN2

AGND

Note 1: PG open-drain for A,C options
2: PG push-pull output for B option

© 2005 Microchip Technology Inc.

DS21949B-page 3

AGND VREF UVLO VOUT2 LDO AGND Note: PG open-drain for TC1304 DS21949B-page 4 © 2005 Microchip Technology Inc. .TC1303A/TC1303B/TC1303C/TC1304 Functional Block Diagram – TC1304 UVLO Undervoltage Lockout (UVLO) VREF Synchronous Buck Regulator VIN1 PDRV VIN2 LX Driver Control SHDN NDRV PGND PGND PGND AGND VOUT1/VFB1 PG TC1304(Note) PG Generator with Delay Output Voltage Sequencer ckt.

7 µF VOUT1 1.7 µF 200 kΩ VOUT2 3 1 µF 5 (Note) 3.2V 8 4.7 µH VIN 2.7V to 4.2V 8 4.7 µH VIN 2. DS21949B-page 5 .5V @ 500 mA 9 6 3 VOUT2 1 µF 5 2.7 µF 1.3V @ 300 mA 4.7 µF LX 9 2 VIN2 7 AGND VOUT1 6 SHDN VOUT2 3 1 RPULLUP VIN1 4 PG PGND 10 AGND 5 4.7 µH Input Voltage 4.7V to 4.TC1303A/TC1303B/TC1303C/TC1304 Typical Application Circuits TC1303A Fixed-Output Application 10-Lead MSOP 4. TC1304 Fixed-Output Application 10-Lead MSOP 4.7 µF PGND 10 VOUT1 AGND VOUT1 1.5V @ 300 mA Processor RESET © 2005 Microchip Technology Inc.2V @ 500 mA VOUT2 1 µF 2.0 µF 8 VIN1 2 VIN2 LX 7 SHDN1 PGND 10 VOUT1 6 1 SHDN2 VOUT2 4 PG AGND Processor RESET VOUT1 9 4.5V *Optional Capacitor VIN2 4.5V @ 300 mA Processor RESET TC1303B Adjustable-Output Application 10-Lead DFN 4.99 kΩ 2.5V to 5.7 µF RPULLUP 2 VIN1 VIN2 LX 7 SHDN1 1 SHDN2 VOUT2 4 PG 4.1V @ 500 mA 33 pF 121 kΩ Note: Connect DFN package exposed pad to AGND.

..7V to 5. 3 kV DC CHARACTERISTICS Electrical Characteristics: VIN1 =VIN2 = SHDN1........1 mA to the maximum specified output current..SHDN2........... SHDN (TC1304) Logic Input Voltage Low VIL — — 15 %VIN VIN1 =VIN2 = 2........3V) to (VIN + 0.. Boldface specifications apply over the TA range of -40°C to +85°C...7 — 5.... Parameters Sym Min Typ Max Units Conditions Input/Output Characteristics Input Voltage VIN 2.. The integrated MOSFET switches have an integral diode from the LX pin to VIN.. Absolute Maximum Ratings † VIN .TC1303A/TC1303B/TC1303C/TC1304 1.0 µA VIN1 =VIN2 = 2............ SHDN (TC1304) Logic Input Voltage High VIH 45 — — %VIN VIN1 =VIN2 = 2.1 mA TA = +25°C. SHDN2 = GND LDO IQ — 46 — µA SHDN1 = GND.... SHDN (TC1304) Input Leakage Current IIN -1.. COUT1 = CIN = 4.. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Thermal protection is not able to limit the junction temperature for these cases.3V to (VIN + 0.....2 = 3.......Internally Limited Storage temperature ....3V) LX to PGND .....7 µF...-65°C to +150°C Ambient Temp....5V SHDNX = GND SHDNY = VIN Note 6.. θJA).................. TC1304 Operating IQ IQ IQ — 65..0 ELECTRICAL CHARACTERISTICS † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device.SHDN2... VRX = VR1 or VR2...5V SHDN1.7 µH.. Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its nominal value measured at a 1V differential..... Note 7 Thermal Shutdown Thermal Shutdown Hysteresis Undervoltage Lockout (VOUT1 and VOUT2) Undervoltage Lockout Hysteresis Note 1: 2: 3: 4: 5: 6: 7: 8: TSHD — 165 — °C TSHD-HYS — 10 — °C UVLO 2...... TA.. The maximum allowable power dissipation is a function of ambient temperature..8V..............4 2............AGND .. the package power dissipation limits must be adhered to. VIN1 and VIN2 are supplied by the same input source......... L = 4....SHDN2....... .......7V to 5... and from LX to PGND........55 2.....7 V UVLO-HYS — 200 — mV VIN1 Falling The Minimum VIN has to meet two conditions: VIN ≥ 2..... VOUT1 (ADJ) = 1.......... IOUT2 = 0 mA Synchronous Buck IQ — 38 — µA SHDN1 = VIN......... -0..... TCVOUT2 = ((VOUT2max – VOUT2min) * 106)/(VOUT2 * DT)...7V and VIN ≥ VRX + VDROPOUT.............. VRX is the regulator output voltage setting................3V to +0........5V SHDN1.. -0.... Exceeding the maximum allowable power dissipation causes the device to initiate thermal shutdown. IOUT1 = 100 ma.......7V to 5....... IOUT2 = 0...3V Output Short Circuit Current .....6V.-40°C to +85°C Operating Junction Temperature.1 110 110 µA SHDN1 = SHDN2 = VIN2 IOUT1 = 0 mA. the maximum allowable junction temperature and the thermal resistance from junction to air.0.....B Operating IQ TC1303C....01 1..5 V Maximum Output Current IOUT1_MAX 500 — — mA Note 1 Maximum Output Current IOUT2_MAX 300 — — mA Note 1 Shutdown Current Combined VIN1 and VIN2 Current IIN_SHDN — 0.0 70... Note 2. (i.... Load regulation is tested over a load range from 0....... with Power Applied. Exposure to maximum rating conditions for extended periods may affect device reliability..... Note 8 Shutdown/UVLO/Thermal Shutdown Characteristics SHDN1.. DS21949B-page 6 © 2005 Microchip Technology Inc..... In cases where these diodes are forward-biased....e.....-40°C to +125°C ESD protection on all pins (HBM) ..... TJ.......6...........0 ±0.05 1 µA SHDN1 = SHDN2 = GND TC1303A.......3V) PGND to AGND.................. Regulation is measured at a constant junction temperature using low duty-cycle pulse testing..... COUT2 = 1µF...... SHDN2 = VIN2 Note 1... Continuous Power Dissipation (Note 7) ..0V All Other I/O . (AGND ................

IOUT1 = 100 ma.7 µF.1 mA TA = +25°C. Load regulation is tested over a load range from 0.2 — % Dropout Voltage VOUT1 VIN – VOUT1 — 280 — mV FOSC 1. Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its nominal value measured at a 1V differential. In cases where these diodes are forward-biased.3 +2.5V VIN – VOUT2 — 137 205 300 500 mV IOUT2 = 200 mA (Note 5) IOUT2 = 300 mA PSRR — 62 — dB f ≤ 100 Hz. Boldface specifications apply over the TA range of -40°C to +85°C.8V. Exceeding the maximum allowable power dissipation causes the device to initiate thermal shutdown. VOUT2 < 2.5V ΔVOUT2/ IOUT2 -0.7V and VIN ≥ VRX + VDROPOUT. θJA).08 +0. VOUT1 = 3.0 μA SHDN = 0V. VOUT2 ≥ 2. Thermal protection is not able to limit the junction temperature for these cases. VRX is the regulator output voltage setting.8 0.7 µH. TJ. © 2005 Microchip Technology Inc. LX = 5. LX = 0V.5V +ILX(MAX) — 700 — mA Internal Oscillator Frequency Start Up Time LX Pin Leakage Current Positive Current Limit Threshold Note 2 VIN =VR+1V to 5. ILOAD = 100 mA VIN = VR + 1.02 +0. CIN = 0 µF eN — 1.82 V Feedback Input Bias Current (IFB1) IVFB1 — -1.5 % Note 2 Temperature Coefficient TCVOUT — 25 — ppm/°C Note 3 Line Regulation ΔVOUT2/ ΔVIN -0.8 — µV/(Hz)½ IOUTsc2 — 240 — mA Power Supply Rejection Ratio Output Noise Output Short Circuit Current (Average) Note 1: 2: 3: 4: 5: 6: 7: 8: (VR+1V) ≤ VIN ≤ 5.9 -0.2 ±0.1 mA to 300 mA (Note 4) Dropout Voltage VOUT2 > 2.18 +0.3 +2. COUT1 = CIN = 4. Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. The maximum allowable power dissipation is a function of ambient temperature.2 — %/V Load Regulation (VOUT1) VLOAD-REG — 0.5 V Adjustable Reference Feedback Voltage (VFB1) VFB1 0.01 1. TA.9 % IOUT2 = 0. L = 4.1 mA to the maximum specified output current.5V. COUT2 = 1µF.0 2. The integrated MOSFET switches have an integral diode from the LX pin to VIN.5 — ms TR = 10% to 90% RDSon P-Channel RDSon-P — 450 650 mΩ IP=100 mA RDSon N-Channel RDSon-N — 450 650 mΩ IN=100 mA ILX -1. (i. IOUT1 = IOUT2 = 50 mA. and from LX to PGND.5V f ≤ 1 kHz. SHDN1 = GND RLOAD2 ≤ 1Ω The Minimum VIN has to meet two conditions: VIN ≥ 2.5V.5V ΔVOUT2/ IOUT2 -0.5V.6V. IOUT2 = 0.0 ±0.3V (Note 5) LDO Output (VOUT2) Output Voltage Tolerance (VOUT2) VOUT2 -2.8 — 4.TC1303A/TC1303B/TC1303C/TC1304 DC CHARACTERISTICS (CONTINUED) Electrical Characteristics: VIN1 =VIN2 = SHDN1.75 -0.5 ±0. IOUT2 = 50 mA. VIN1 and VIN2 are supplied by the same input source.5 ±0. Parameters Sym Min Typ Max Units Conditions Synchronous Buck Regulator (VOUT1) Adjustable Output Voltage Range VOUT1 0.e. the maximum allowable junction temperature and the thermal resistance from junction to air.4 MHz TSS — 0.6 2.75 % IOUT2 = 0.78 0. the package power dissipation limits must be adhered to.2 %/V Load Regulation. DS21949B-page 7 .1 mA to 300 mA (Note 4) Load Regulation. TCVOUT2 = ((VOUT2max – VOUT2min) * 106)/(VOUT2 * DT). ILOAD = 100 mA to 500 mA (Note 1) IOUT1 = 500 mA.2 = 3. VIN = 5.5 — nA Output Voltage Tolerance Fixed (VOUT1) VOUT1 -2.5 % Line Regulation (VOUT1) VLINE-REG — 0. VOUT1 (ADJ) = 1. VRX = VR1 or VR2.

0V < VIN2 < 2. IPG= 1. COUT2 = 1µF. IPG = . Parameters Sym Min Typ Max Units tWK — 31 100 µs IOUT1 = IOUT2 = 50 mA tS — 100 — µs IOUT1 = IOUT2 = 50 mA Voltage Range PG VPG 1.500 µA VOUT2 < 1.2 V VOUT1 or VOUT2 = VTH . IOUT1 = 100 ma. ISINK = 1.9* VOUT2 — — V VOUT1 or VOUT2 = VTH + 100 mV VOUT2 ≥ 1.0 1.8V.IPG = . VOUT1 (ADJ) = 1. (VOUT2) Conditions Power-Good (PG) Note 1: 2: 3: 4: 5: 6: 7: 8: The Minimum VIN has to meet two conditions: VIN ≥ 2. Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. L = 4. the package power dissipation limits must be adhered to.7V IPG = 100 µA.300 µA Wake-Up Time (From SHDN2 mode). Boldface specifications apply over the TA range of -40°C to +85°C.8V.1 mA TA = +25°C.5 5.100 mV) PG Active Time-out Period tRPU 140 262 560 ms VOUT1 or VOUT2 = VTH . TA.7V PG Output Voltage High (TC1303B only) PG_VOH 0. COUT1 = CIN = 4. . and from LX to PGND. VRX is the regulator output voltage setting. TJ. IOUT2 = 0. VIN1 and VIN2 are supplied by the same input source.5 V TA = 0°C to +70°C TA = -40°C to +85°C VIN ≤ 2. Load regulation is tested over a load range from 0. DS21949B-page 8 © 2005 Microchip Technology Inc.7 µH.1 mA to the maximum specified output current. The maximum allowable power dissipation is a function of ambient temperature. TCVOUT2 = ((VOUT2max – VOUT2min) * 106)/(VOUT2 * DT). In cases where these diodes are forward-biased.2 = 3. Exceeding the maximum allowable power dissipation causes the device to initiate thermal shutdown.2 — 5.2 mA PG Output Voltage Low PG_VOL — — 0. Thermal protection is not able to limit the junction temperature for these cases.e. (VOUT2) Settling Time (From SHDN2 mode).7 ISINK = 100 µA PG Threshold High (VOUT1 or VOUT2) VTH_H — 94 96 % of VOUTX On Rising VOUT1 or VOUT2 VOUTX = VOUT1 or VOUT2 PG Threshold Low (VOUT1 or VOUT2) VTH_L 89 92 — % of VOUTX On Falling VOUT1 or VOUT2 VOUTX = VOUT1 or VOUT2 PG Threshold Hysteresis (VOUT1 and VOUT2) VTH_HYS — 2 — % of VOUTX VOUTX = VOUT1 or VOUT2 PG Threshold Tempco ΔVTH/ΔT — 30 — ppm/°C PG Delay tRPD — 165 — µs VOUT1 or VOUT2 = (VTH + 100 mV) to (VTH .2 mA VIN2 > 2. The integrated MOSFET switches have an integral diode from the LX pin to VIN.8V.6V. 1. Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its nominal value measured at a 1V differential.100 mV.7V and VIN ≥ VRX + VDROPOUT. θJA). the maximum allowable junction temperature and the thermal resistance from junction to air.100 mV to VTH + 100 mV. VRX = VR1 or VR2.TC1303A/TC1303B/TC1303C/TC1304 DC CHARACTERISTICS (CONTINUED) Electrical Characteristics: VIN1 =VIN2 = SHDN1. (i.7 µF.

10L-MSOP θJA — 113 — °C/W Typical 4-layer Board with Internal Ground Plane Temperature Ranges Steady state Transient Thermal Package Resistances © 2005 Microchip Technology Inc. DS21949B-page 9 . 10L-DFN θJA — 41 — °C/W Typical 4-layer Board with Internal Ground Plane and 2 Vias in Thermal Pad Thermal Resistance. all limits are specified for: VIN = +2.5V Parameters Sym Min Typ Max Units Conditions Operating Junction Temperature Range TJ -40 — +125 °C Storage Temperature Range TA -65 — +150 °C Maximum Junction Temperature TJ — — +150 °C Thermal Resistance.7V to +5.TC1303A/TC1303B/TC1303C/TC1304 TEMPERATURE SPECIFICATIONS Electrical Specifications: Unless otherwise indicated.

Note: Unless otherwise indicated.5V IOUT2 = 0 mA 50 IQ LDO (µA) IQ Switcher and LDO (µA) 80 SHDN1 = VIN2 SHDN2 = AGND 95 90 85 80 VIN1 = 3.401 0.6V 35 30 -40 -25 -10 5 20 35 50 65 80 95 110 125 Ambient Temperature (°C) FIGURE 2-3: IQ Switcher Current vs.6V 60 SHDN1 = AGND SHDN2 = VIN2 30 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 Ambient Temperature (°C) FIGURE 2-1: IQ Switcher and LDO Current vs.7 20 35 50 65 80 95 110 125 IQ LDO Current vs. VIN = 5. DS21949B-page 10 4. Adjustable.5V VIN = 4.4 IOUT1 = 0 mA 50 45 40 VIN = 4.8 5.2V 75 70 0. TA = +25°C. © 2005 Microchip Technology Inc.302 0.5V 72 VIN = 4. 20 35 50 65 80 95 110 125 Ambient Temperature (°C) VOUT1 Efficiency (%) IQ Switcher and LDO (µA) 78 VIN = 5. VIN1 = VIN2 = SHDN1.0V 0. Ambient Temperature (TC1303C. Ambient Temperature (TC1303A.2V). The performance characteristics listed herein are not tested or guaranteed.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. .005 VIN1 = 3.2V VIN = 3. Ambient Ambient Temperature (°C) FIGURE 2-2: IQ Switcher and LDO Current vs.15 5.2V 72 VIN = 3.5 IOUT1 (A) FIGURE 2-6: VOUT1 Output Efficiency vs. VOUT1 (ADJ) = 1. In some graphs or tables. IOUT1 = IOUT2 = 0 mA 76 VIN = 5. 100 SHDN1 = VIN2 SHDN2 = AGND VIN = 5. TC1304). Boldface specifications apply over the TA range of -40°C to +85°C.6V VIN1 = 4. L = 4. Input Voltage (VOUT1 = 1. Ambient Temperature.7 µH.104 0.2V).6V 70 68 66 -40 -25 -10 5 5 100 95 90 85 80 75 70 65 60 55 50 IOUT1 = 250 mA IOUT1 = 500 mA 3. COUT1 = CIN = 4.2V VIN = 3.5 FIGURE 2-5: VOUT1 Output Efficiency vs. COUT2 = 1 µF. 76 SHDN1 = VIN2 SHDN2 = VIN2 74 FIGURE 2-4: Temperature.6V 40 35 VIN = 3.g.1 4.2V 68 64 55 SHDN1 = VIN2 SHDN2 = VIN2 45 VIN = 4. TA = +25°C.5V 3. the data presented may be outside the specified operating range (e.203 0. IOUT1 (VOUT1 = 1.7 µF.05 3.6V.B)..TC1303A/TC1303B/TC1303C/TC1304 2. outside specified power supply range) and therefore outside the warranted range.8V.or fixedoutput voltage options can be used to generate the Typical Performance Characteristics.2 = 3.45 4.75 Input Voltage (V) VOUT1 Efficiency(%) IQ Switcher (µA) 55 SHDN1 = VIN2 SHDN2 = AGND IOUT1 = 100 mA 2.

19 0.005 © 2005 Microchip Technology Inc. L = 4.5 75 VIN1 = 5.8V). 92 0.815 VOUT1 (V) VOUT1 Efficiency (%) 100 80 3.92 4.TC1303A/TC1303B/TC1303C/TC1304 Note: Unless otherwise indicated. COUT2 = 1 µF.6V 95 1. TA = +25°C.8 5.7 µF.87 5. 0.104 FIGURE 2-7: VOUT1 Output Efficiency vs. IOUT1 DS21949B-page 11 .401 0. VIN1 = VIN2 = SHDN1. 1. Input Voltage (VOUT1 = 3.45 4. COUT1 = CIN = 4.or fixedoutput voltage options can be used to generate the Typical Performance Characteristics.8V).6V 0.302 0. IOUT1 (VOUT1 = 1.82 SHDN1 = VIN2 SHDN2 = AGND IOUT1 = 100 mA IOUT1 = 250 mA 88 IOUT1 = 500 mA 84 VOUT1 vs.6V 1.302 0.2V 5.401 SHDN1 = VIN2 SHDN2 = AGND 1.0V VIN = 4.5 0. SHDN1 = VIN2 SHDN2 = AGND VIN1 = 3.8V). IOUT1 FIGURE 2-11: (VOUT1 = 1.194 VIN = 3.302 FIGURE 2-10: VOUT1 Output Efficiency vs.5V 70 65 0.75 4.805 1. Adjustable.55 4.203 0.203 0. 0.18 5.79 0.6V 1.15 90 85 VIN1 = 4.1 4. 100 75 0.2V).50 1.5 IOUT1 (A) Input Voltage (V) FIGURE 2-9: VOUT1 Output Efficiency vs.104 FIGURE 2-12: (VOUT1 = 1.81 1.198 1.5 1.203 IOUT1 (A) Input Voltage (V) 95 SHDN1 = VIN2 SHDN2 = AGND 80 60 0. Boldface specifications apply over the TA range of -40°C to +85°C.795 3.206 VOUT1 (V) VOUT1 Efficiency(%) SHDN1 = VIN2 SHDN2 = AGND 90 96 0.401 VIN1 = 3.23 4.8V.60 0.202 1.005 0. 100 100 SHDN1 = VIN2 SHDN2 = AGND IOUT1 = 100 mA VOUT1 Efficiency (%) VOUT1 Efficiency(%) 95 90 IOUT1 = 250 mA 85 80 IOUT1 = 500 mA 75 70 65 3.7 VIN1 = 3.4 3.3V).005 60 2.7 µH. VOUT1 (ADJ) = 1.2 = 3.2V 85 80 0.401 0.21 VIN = 3. Input Voltage (VOUT1 = 1.005 0.302 0.203 IOUT1 (A) FIGURE 2-8: VOUT1 Output Efficiency vs. IOUT1 (VOUT1 = 3.5 1.05 3.3V).104 IOUT1 (A) 0.104 0.8 1. TA = +25°C. VOUT1 vs.6V.

7 4.6V 0. Ambient Temperature.28 3.005 -40 VOUT1 (V) 3.90 3. 50 0.2 0.3 5.32 3.5 N-Channel 0.92 125 110 95 80 65 50 35 5 20 -10 -25 1. COUT1 = CIN = 4. Input Voltage.203 -10 0.96 1. VOUT1 Switch Resistance FIGURE 2-17: vs.7 µF.4 VIN1 = 4.36 VOUT1 FB Voltage (V) SHDN1 = VIN2 SHDN2 = AGND 0. VOUT1 (ADJ) = 1.302 5 0.24 SHDN1 = VIN2 SHDN2 = AGND 0.90 -40 125 P-Channel 0.9 4.45 5.7 µH.1 4.4 Input Voltage (V) SHDN1 = VIN2 SHDN2 = AGND DS21949B-page 12 110 0.15 2.8V.2V 3. COUT2 = 1 µF. Input Voltage. Ambient Temperature. 80 FIGURE 2-16: VOUT1 Adjustable Feedback Voltage vs.5 3. TA = +25°C.5 3.7 65 Ambient Temperature (°C) VOUT1 Switch Resistance (" ) FIGURE 2-13: (VOUT1 = 3. 0. Boldface specifications apply over the TA range of -40°C to +85°C.810 0.7 3.3 3.00 SHDN1 = VIN2 SHDN2 = AGND 0.401 20 0. Ambient Temperature.65 VIN1 = 3.805 0.1 5.800 0.98 1. VOUT1 Switch Resistance (" ) VOUT1 Frequency (MHz) 95 N-Channel 0.1 0.790 3. L = 4.1 3.4 0.7 5.35 1.10 2.45 0.6 0.95 1.5 Ambient Temperature (°C) FIGURE 2-15: VOUT1 Switching Frequency vs. © 2005 Microchip Technology Inc.55 TA = 25 °C 0.05 2.3V).2 = 3.00 1.6 0.5 35 0.20 2.3 3.3 4. VOUT1 vs.5 Input Voltage (V) FIGURE 2-14: vs.TC1303A/TC1303B/TC1303C/TC1304 Note: Unless otherwise indicated.5 4.9 5.104 -25 0. TA = +25°C. Adjustable.820 3.3 -40 -25 -10 5 20 35 50 65 80 95 110 125 Ambient Temperature (°C) FIGURE 2-18: VOUT1 Switch Resistance vs. .55 SHDN1 = VIN2 SHDN2 = AGND P-Channel 0.3 4.5 VOUT1 Switching Frequency 2.9 4.6V 0. VIN1 = VIN2 = SHDN1.795 IOUT1 (A) VOUT1 Frequency (MHz) SHDN1 = VIN2 SHDN2 = AGND 2. IOUT1 2.815 VIN1 = 3.94 1.6V.35 0.or fixedoutput voltage options can be used to generate the Typical Performance Characteristics.

506 2.1 4.8 5.4 0.488 TA = + 25°C SHDN1 = AGND SHDN2 = VIN2 1. TA = +25°C.8V.802 IOUT2 = 150 mA 1. Boldface specifications apply over the TA range of -40°C to +85°C. L = 4.TC1303A/TC1303B/TC1303C/TC1304 Note: Unless otherwise indicated.502 TA = + 85°C TA = + 25°C 2. Input Voltage (VOUT2 = 1. Adjustable.796 TA = .3 0.3 5. VIN1 = VIN2 = SHDN1.508 SHDN1 = AGND SHDN2 = VIN2 IOUT2 = 150 mA 2.5 Input Voltage (V) FIGURE 2-21: VOUT1 and VOUT2 Light Load Switching Waveforms vs. Input Voltage (VOUT2 = 1. Input Voltage (VOUT2 = 2.3V IOUT1 = 500 mA 0. DS21949B-page 13 . VOUT1 (ADJ) = 1. FIGURE 2-23: VOUT2 Output Voltage vs. Time.794 1.5 3.15 1. Time.798 TA = + 25°C 1.496 3.75 4.5 Input Voltage (V) FIGURE 2-22: VOUT2 Output Voltage vs.792 2. IOUT2 = 150 mA 1.7 4.800 SHDN1 = AGND SHDN2 = VIN2 TA = + 85°C 1. COUT1 = CIN = 4.6V.45 4.9 5.40°C 1. VOUT2 Output Voltage (V) 2. 3.2 VOUT1 = 3.1 5. COUT2 = 1 µF.3 4.7 3.35 VOUT2 Output Voltage(V) VOUT1 Dropout Voltage (V) 0.486 TA = .40°C 2.or fixedoutput voltage options can be used to generate the Typical Performance Characteristics. VOUT2 Output Voltage (V) 1. © 2005 Microchip Technology Inc.1 TA = + 85°C 1. TA = +25°C.49 2.5V).1 4.5V). FIGURE 2-24: VOUT2 Output Voltage vs.15 5.75 4.05 3.7 µH.4 3.5 Input Voltage (V) FIGURE 2-20: VOUT1 and VOUT2 Heavy Load Switching Waveforms vs.1 4.8 5.9 4.498 TA = .5 4.7 3.05 3.500 2.15 5.2 = 3. Ambient Temperature.484 1.8V).504 2.40°C 1.3 3.25 0.7 3.4 Ambient Temperature (°C) FIGURE 2-19: VOUT1 Dropout Voltage vs.482 125 95 110 80 65 50 35 5 20 -10 -25 -40 0.7 µF.492 SHDN1 = VIN2 SHDN2 = AGND 0.45 4.

Adjustable.3V 0.6V SHDN1 = AGND SHDN2 = VIN2 VOUT2 = 3.025 VOUT2 = 1.1 -0.2 IOUT2 = 300 mA 0.035 5.20 IOUT2 = 200 mA 0.005 5 VOUT2 Output Voltage (V) 3. 0.18 0.TC1303A/TC1303B/TC1303C/TC1304 Note: Unless otherwise indicated. L = 4. VOUT1 (ADJ) = 1.3V).8V.292 3. COUT1 = CIN = 4. © 2005 Microchip Technology Inc.3 SHDN1 = AGND SHDN2 = VIN2 0.1 IOUT2 = 200 mA 125 110 95 80 65 50 35 Ambient Temperature (°C) FIGURE 2-29: VOUT2 Load Regulation vs. TA = +25°C. Ambient Temperature.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 Ambient Temperature (°C) FIGURE 2-27: VOUT2 Dropout Voltage vs.4 Ambient Temperature (°C) VOUT2 Dropout Voltage (V) 20 35 50 65 80 95 110 125 FIGURE 2-28: VOUT2 Line Regulation vs.5V). SHDN1 = AGND SHDN2 = VIN2 IOUT2 = 150 mA 3.7 µF. TA = +25°C.5V -0.297 VOUT2 Line Regulation (%/V) TA = + 85°C 3. Input Voltage (VOUT2 = 3.294 TA = . VIN1 = VIN2 = SHDN1.298 350 VIN = 3. PG Active Delay Time (ms) FIGURE 2-26: VOUT2 Dropout Voltage vs.1 VIN2 = 3.55 4.295 TA = + 25°C 3.6V 325 SHDN1 = VIN2 SHDN2 = VIN2 300 275 250 225 200 0.6V VOUT2 = 1. .87 5.60 3.2 VOUT2 = 2.296 3.15 0.020 -0.005 VOUT2 = 3.40°C 3.015 -0. Ambient Temperature (VOUT2 = 2. Boldface specifications apply over the TA range of -40°C to +85°C. Ambient Temperature. 20 -10 -25 -40 125 110 95 80 65 50 35 5 20 -10 -25 -40 -0.2 = 3. DS21949B-page 14 -40 -25 -10 5 20 35 50 65 80 95 110 125 Ambient temperature (°C) FIGURE 2-30: PG Active Delay Time-out vs.7 µH. COUT2 = 1 µF. Ambient Temperature.3 0.030 -0.3V).92 4.30 SHDN1 = AGND SHDN2 = VIN2 -0.3V 0.5V -0. Ambient Temperature (VOUT2 = 3.5V -0.or fixedoutput voltage options can be used to generate the Typical Performance Characteristics.25 5 Ambient Temperature (°C) FIGURE 2-25: VOUT2 Output Voltage vs.293 3.50 -40 -25 -10 Input Voltage (V) IOUT2 = 300 mA 0.23 4.05 0. VOUT2 Load Regulation (%) VOUT2 Dropout Voltage (V) SHDN1 = AGND SHDN2 = VIN2 0.000 IOUT2 = 100 µA -0.10 0.010 VOUT2 = 2.0 -0.6V.

5V 2. 1 10 100 1000 10000 Frequency (kHz) FIGURE 2-35: VOUT2 Noise vs.5V IOUT2 = 30 mA CIN = 0 µF -40 -50 COUT2 = 4. Adjustable.1 Ambient Temperature (°C) FIGURE 2-32: PG Output Voltage Level Low vs. PG Threshold Hi 94 93 92 PG Threshold Low 91 -20 -30 SHDN1 = GND VOUT2 = 1.02 0.1 1 10 100 FIGURE 2-31: PG Threshold Voltage vs. Ambient Temperature.01 -40 1000 Frequency (kHz) Ambient Temperature (°C) PG VOL (V) COUT2 = 1.5V 1.5 PG VOH (V) VOUT2 = 2.6V 95 -10 VOUT2 PSRR (dB) PG Threshold (% of V OUT2) Note: Unless otherwise indicated. TA = +25°C.5V IOUT2 = 50 mA 0. © 2005 Microchip Technology Inc. COUT1 = CIN = 4.0 2.or fixedoutput voltage options can be used to generate the Typical Performance Characteristics.6V IOH = 500 µA SHDN1 = VIN2 SHDN2 = VIN2 0.TC1303A/TC1303B/TC1303C/TC1304 96 0 SHDN1 = VIN2 SHDN2 = VIN2 VIN = 3. L = 4. Boldface specifications apply over the TA range of -40°C to +85°C.01 0.0 µF SHDN1 = AGND SHDN2 = VIN2 1 0. Ambient Temperature. Time. Frequency.1 VIN = 3.7 µF -60 -70 -80 0.014 0. VIN1 = VIN2 = SHDN1.6V.5 VIN = 3.8V 3. FIGURE 2-34: VOUT2 Power Supply Ripple Rejection vs. Ambient Temperature.6V IOL = 1. VOUT1 (ADJ) = 1.2 = 3.2 mA 0.012 125 95 110 80 65 50 35 20 5 -10 -25 0.01 0.6V VOUT2 = 2. TA = +25°C.0 1.7 µF. COUT2 = 1 µF.7 µH.8V.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 Ambient Temperature (°C) FIGURE 2-33: PG Output Voltage Level High vs. Frequency.018 0. 10 0. VOUT1 Load Step Response VOUT2 = 2. DS21949B-page 15 . FIGURE 2-36: vs.016 VOUT2 Noise (μV/—Hz) SHDN1 = VIN2 SHDN2 = VIN2 VIN = 3.0 0.5 VOUT2 = 1.01 90 -40 -25 -10 5 20 35 50 65 80 95 110 125 0.

COUT2 = 1 µF.or fixedoutput voltage options can be used to generate the Typical Performance Characteristics. VIN1 = VIN2 = SHDN1. FIGURE 2-39: Waveforms.7 µH. TA = +25°C. VOUT2 Load Step Response FIGURE 2-40: Waveforms. COUT1 = CIN = 4. FIGURE 2-41: Power-Good Output Timing. VOUT1 (ADJ) = 1. Start-up Waveforms FIGURE 2-37: vs. .2 = 3. Time.TC1303A/TC1303B/TC1303C/TC1304 Note: Unless otherwise indicated. TA = +25°C. FIGURE 2-42: (TC1304). DS21949B-page 16 VOUT1 and VOUT2 Start-up © 2005 Microchip Technology Inc. L = 4.8V. VOUT1 and VOUT2 Shutdown FIGURE 2-38: VOUT1 and VOUT2 Line Step Response vs. Time.7 µF.6V. Boldface specifications apply over the TA range of -40°C to +85°C. Adjustable.

DS21949B-page 17 . COUT1 = CIN = 4.6V. VOUT1 (ADJ) = 1. COUT2 = 1 µF.2 = 3.or fixedoutput voltage options can be used to generate the Typical Performance Characteristics. Adjustable. FIGURE 2-43: (TC1304). VIN1 = VIN2 = SHDN1.8V.TC1303A/TC1303B/TC1303C/TC1304 Note: Unless otherwise indicated.7 µH. Shutdown Waveforms © 2005 Microchip Technology Inc. Boldface specifications apply over the TA range of -40°C to +85°C. TA = +25°C. L = 4.7 µF. TA = +25°C.

2 TC1304 Shutdown Input Pin (SHDN) SHDN is a logic-level input used to initiate the sequencing of the LDO output. DS21949B-page 18 3. Tie AGND to the analog portion of the ground plane (AGND). Connect a 1 µF or larger capacitor to VOUT2 and AGND for proper operation.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. Electrically this pad is at ground potential and should be connected to AGND TC1303 LDO Shutdown Input Pin (SHDN2) SHDN2 is a logic-level input used to turn the LDO Regulator on and off. See the physical layout information in Section 5. will enable the regulator output. A logic-low (< 15% of VIN) will ensure that the output is turned off. TC1303 Name TC1304 Name 1 SHDN2 — 1 — SHDN 2 VIN2 VIN2 3 VOUT2 VOUT2 LDO Output Voltage Pin 4 PG PG Power-Good Output Pin 5 AGND AGND 6 VFB/VOUT1 7 SHDN1 — 7 — AGND Analog Ground Pin 8 VIN1 VIN1 Buck Regulator Input Voltage Pin 9 LX LX 10 PGND PGND EP Exposed Pad Exposed Pad 3. The PG output is configured as a push-pull for the TC1303B and open-drain output for the TC1303A.6 Analog Ground Pin (AGND) AGND is the analog ground connection. For fixed-output voltage options. A logic-low (< 15% of VIN) will ensure that the output is turned off. A logic-low (< 15% of VIN) will ensure that the outputs are turned off. will enable the regulator output. 3. 3. 3. A logic-high (> 45% of VIN).0 “Application Circuits/Issues” for grounding recommendations.5 Power-Good Output Pin (PG) PG is an output level indicating that VOUT2 (LDO) is within 94% of regulation. the center exposed pad is a thermal path to remove heat from the device.7 Buck Regulator Output Sense Pin (VFB/VOUT1) For VOUT1 adjustable-output voltage options. 3. 3. An additional capacitor can be added to lower the LDO regulator input ripple voltage. will enable the regulator outputs. then the buck regulator output. Initiates sequencing up and down Analog Input Supply Voltage Pin Analog Ground Pin VFB/VOUT1 Buck Feedback Voltage (Adjustable Version) / Buck Output Voltage (Fixed Version) Pin Active Low Shutdown Input for Buck Regulator Output Pin Buck Inductor Output Pin Power Ground Pin For the DFN package. TC1303C and TC1304. Connect VIN1 and VIN2 together with board traces as short as possible. connect the center of the output voltage divider to the VFB pin. TABLE 3-1: PIN FUNCTION TABLE Pin No.8 Buck Regulator Shutdown Input Pin (SHDN1) SHDN1 is a logic-level input used to turn the buck regulator on and off. . A logic-high (> 45% of VIN).1 Function Active Low Shutdown Input for LDO Output Pin Active Low Shutdown Input both Buck Regulator Output and LDO Output. Connect variable input voltage source to VIN2.TC1303A/TC1303B/TC1303C/TC1304 3. A logic-high (> 45% of VIN). VIN2 provides the input voltage for the LDO. © 2005 Microchip Technology Inc. 3.4 LDO Output Voltage Pin (VOUT2) VOUT2 is a regulated LDO output voltage pin. connect the output of the buck regulator to this pin (VOUT1).3 LDO Input Voltage Pin (VIN2) VIN2 is a LDO power input supply pin.

12 Exposed Pad (EP) For the DFN package.TC1303A/TC1303B/TC1303C/TC1304 3. all connections should be made as short as possible. DS21949B-page 19 .0 “Application Circuits/Issues” for grounding recommendations.10 Buck Inductor Output Pin (LX) Connect LX directly to the buck inductor. with vias into the AGND plane. These large-signal. © 2005 Microchip Technology Inc.9 Buck Regulator Input Voltage Pin (VIN1) VIN1 is the buck regulator power input supply pin. level ground traces should have a small loop area and length to prevent coupling of switching noise to sensitive traces. Please see the physical layout information supplied in Section 5. connect the EP to AGND. 3. Connect VIN1 and VIN2 together with board traces as short as possible. This pin carries large signal-level current.11 Power Ground Pin (PGND) Connect all large-signal level ground returns to PGND. Connect a variable input voltage source to VIN1. 3. 3.

3 Low Drop Out Regulator (LDO) The LDO output is a 300 mA low-dropout linear regulator that provides a regulated output voltage with a single 1 µF external capacitor.0 MHz frequency. short circuit and overtemperature. © 2005 Microchip Technology Inc. the feedback divider and control loop compensation components are integrated. 4. The transition from PWM to PFM mode occurs when discontinuous inductor current is sensed or the peak inductor current is less than 60 mA (typ. minimizing the power loss internal to the LDO pass transistor.3V. This is typically used for the lower-voltage. The buck regulator is capable of operating at 100% duty cycle. the TC1303/TC1304 buck regulator switches at a fixed. minimizing the necessary voltage differential needed for the LDO output to maintain regulation. While shut down. automatically selecting the most efficient mode of operation. This minimizes the quiescent current draw on the battery. with a typical dropout voltage of 137 mV at 200 mA. overcurrent and overtemperature shutdown. the synchronous buck N-channel and P-channel switches are off. the LDO quiescent current will increase. DS21949B-page 20 4. Additional features include independent shutdown inputs (TC1303). the converter enters the PFM mode automatically and begins to skip pulses to minimize unnecessary quiescent current draw by reducing the number of switching cycles per second. fixed frequency (2.TC1303A/TC1303B/TC1303C/TC1304 4.2. For low input-to-output differential voltages. The buck regulator can deliver highoutput current over a wide range of input-to-output voltage ratios while maintaining high efficiency. PFM-to-PWM mode transition is initiated for any of the following conditions: • Continuous inductor current is sensed • Inductor peak current exceeds 100 mA • The buck regulator output voltage has dropped out of regulation (step load has occurred) The typical PFM-to-PWM threshold is 80 mA. For standby or light load applications. batterypowered applications. indicating that the buck regulator output. The quiescent current consumed by the LDO output is typically less than 40 µA. ranging from 1. The typical LDO dropout voltage (137 mV @ 200 mA) allows the use of very low input-to-output LDO differential voltages. A power-good output is provided.1 Device Overview The TC1303/TC1304 combines a 500 mA synchronous buck regulator with a 300 mA LDO and a powergood output.). eliminating the need for external components. The LDO is stable using ceramic output capacitors that inherently provide lower output noise and reduce the size and cost of the regulator solution. . This minimizes output ripple and noise (less than 8 mV peak-to-peak ripple) while maintaining high efficiency (typically > 90%). The buck regulator output is protected against overcurrent. the buck regulator will automatically switch to a power-saving Pulse Frequency Modulation (PFM) mode. For fixed-output voltage applications.2 PFM MODE PFM mode is entered when the output load on the buck regulator is very light. 2. The regulator operates in three different modes. During heavy load conditions. The LDO is a minimal parts-count solution (single-output capacitor). maintaining low output noise and high conversion efficiency.8V (min) to 4. output voltage sequencing (TC1304). The typical buck PFM mode current is 38 µA.2 Synchronous Buck Regulator The synchronous buck regulator is capable of supplying a 500 mA continuous output current over a wide range of input and output voltages. Once detected. the LDO output or both outputs are in regulation. providing a regulated voltage for an auxiliary rail. the TC1303/TC1304 buck converter operates at a high.0 MHz) using current mode control.5V to 3. UVLO. The output voltage range is from 0. 4. 4. The typical quiescent current for the switching regulator is less than 35 µA. low-cost solution for applications that require two or more voltage rails. high-current processor core. the PWM-to-PFM mode threshold can be low due to the lack of ripple current.5V (max). It is recommended that VIN1 be one volt greater than VOUT1 for PWM-to-PFM transitions. This unique combination provides a small. The output voltage is available in fixed options only. while keeping the buck output voltage in regulation. The LDO output is protected against overcurrent and overtemperature conditions.0 DETAILED DESCRIPTION 4. While operating in Dropout mode. The typical PWM to PFM mode threshold is 30 mA. minimizing the voltage drop from input-to-output for wide input.1 FIXED-FREQUENCY PWM MODE While operating in Pulse Width Modulation (PWM) mode.2. The PWM mode is suited for higher load current operation. so the LX pin is in a high-impedance state (this allows for connecting a source on the output of the buck regulator as long as its voltage does not exceed the input voltage).

DS21949B-page 21 . Only if both VOUT1 and VOUT2 are within the PG voltage threshold limits will the PG output be high. both the buck regulator output voltage and LDO output voltage are monitored. A fixed delay time of approximately 262 ms is generated once the monitored output voltage is above the power-good threshold (typically 94% of VOUTX).3V).C and TC1304. The power-good circuitry has a 165 µs delay when detecting a falling output voltage. only the LDO output voltage (VOUT2) is monitored. VTH_H VOUT1 or VOUT2 tRPU VOH PG FIGURE 4-1: tRPD Power Good Output Options There are three monitoring options for the TC1303 family. the falling PG threshold is typically 92% of the output voltage.4 Power-Good 4.TC1303A/TC1303B/TC1303C/TC1304 4. the PG output pin is open drain and can be pulled up to any level within the given absolute maximum ratings (AGND .0. The typical quiescent current draw for power-good circuitry is less than 10 µA. the power-good output will transition to the Low state. The PG output signal depends only on VOUT1. For the TC1303A. The PG output signal depends only on VOUT2. If either one of the outputs fall out of regulation. the LDO output voltage (VOUT2) or the combination of both outputs. The PG output signal is pulled up to the output voltage.5 A Power-Good (PG) output signal is generated based off of the buck regulator output voltage (VOUT1). For the TC1303A. the PG will be low. avoiding false triggering of the PG signal during line and load transients. TABLE 4-1: PG AVAILABLE OPTIONS Part Number PG Output Buck (VOUT1) PG Output LDO (VOUT2) PG Output Type TC1303A Yes No Open-Drain TC1303B No Yes Push-Pull (VOUT2) TC1303C Yes Yes Open-Drain TC1304 Yes Yes Open-Drain VOL Power-Good Timing. As the monitored output voltage falls out of regulation. © 2005 Microchip Technology Inc. For the TC1303C and TC1304. indicating that power is good and pulled low. This helps to increase the noise immunity of the power-good output. If the monitored output voltage falls below the powergood threshold. only the buck regulator output voltage (VOUT1) is monitored. For the TC1303B.3V) to (VIN + 0. indicating that the output is out of regulation.

If the overtemperature threshold is reached. Less than 1% of VOUT1 or VOUT2 overshoot is observed during start-up from VIN rising above the UVLO voltage or either SHDN1 or SHDN2 being enabled. (Pin1). A sequencing circuit using only the SHDN input.6 TC1304 Sequencing The TC1304 device features an integrated sequencing option. the soft start is reset so that. Power Good FIGURE 4-3: from SHDN. DS21949B-page 22 TC1304 Power-up Timing © 2005 Microchip Technology Inc. + VOUT2 Enable SHDN 160 µs Delay* To PG Delay CKT.8 SHDN 500 µs VOUT1 tWK + tS VOUT2 300ms Soft Start Overtemperature Protection The TC1303/TC1304 has an integrated overtemperature protection circuit that monitors the device junction temperature and shuts the device off if the junction temperature exceeds the typical 165°C threshold. . 4. the device will automatically restart.TC1303A/TC1303B/TC1303C/TC1304 4. 4. – 92% of VOUT2 + VOUT1 Enable 160 µs Delay* – 92% of VOUT1 * 160 µs delay on trailing edge FIGURE 4-2: TC1304 Sequencing Circuit. the sequencing circuit will turn off the Buck Regulator output prior to turning off LDO output. will turn on the LDO output (VOUT2) and delay the turn on of the Buck Regulator output (VOUT1) until the LDO output is in regulation. once the junction temperature cools to approximately 155°C.7 TC1304 Power Up Timing From SHDN VIN1/VIN2 Both outputs of the TC1303/TC1304 are controlled during start-up. During power-down.

Low ESR electrolytic or ceramic can be used for the buck regulator output capacitor. Ceramic materials X7R and X5R have low temperature coefficients and are well within the acceptable ESR range required.3 Adjustable Output Application A typical VOUT1 adjustable output application is also shown in “Typical Application Circuits”. a minimum of 4. DS21949B-page 23 . This places a burden on the TC1303/TC1304 input filter capacitor.2 Fixed Output Application A typical VOUT1 fixed-output voltage application is shown in “Typical Application Circuits”. ceramic is recommended because of its physical attributes and cost.5V at 300 mA. 1.8V RBOT = 200 kΩ x (0.7 µF VIN1 ceramic input capacitor.99 kΩ CCOMP = 33 pF © 2005 Microchip Technology Inc. an additional R-C compensation is necessary for the buck regulator control loop stability. Larger capacitors (up to 22 µF) can be used. For most portable electronic applications. For adjustable-output voltages. This additional capacitor (1 µF on page 5) is not necessary for typical applications. For most applications. the input current is pulled from the source in pulses. POSCAP.7 µF is recommended. Refer to Table 5-1 for recommended values. No external dividers or compensation components are necessary. three-cell NiMH or NiCd applications and 3V to 5V regulated input applications. For this application.7 µF 1 µF max none none 22 µF 10 µF Example: RTOP = 200 kΩ VOUT1 = 2. it is recommended that the top resistor divider value be 200 kΩ. For this application. while VOUT2 = 2.7V to 5. or have long leads.8V)) RBOT = 123 kΩ (Standard Value = 121 kΩ) For adjustable-output applications. The 10-pin MSOP and 3X3 DFN packages provide a small footprint with minimal external components. There are some advantages in load step performance when using larger value capacitors. In applications that have high source impedance.1 Typical Applications The TC1303/TC1304 500 mA buck regulator + 300 mA LDO with power-good operates over a wide input voltage range (2. USB-powered applications.7 µF is recommended on VIN1 (buck regulator input voltage pin). (10 inches) connecting to the input source.TC1303A/TC1303B/TC1303C/TC1304 5.4 As with all buck-derived dc-dc switching regulators. 5. For applications that require very low noise on the LDO output. Again. an additional capacitor (typically 1 µF) can be added to the VIN2 pin (LDO input voltage pin).7 µF VOUT1 ceramic capacitor.8V/(2. 5. The bottom resistor divider can be calculated using the following formula: An additional VIN2 capacitor can be added to reduce high-frequency noise on the LDO input voltage pin (VIN2).7 µH inductor make up the entire external component solution for this dual-output application.1V VFB = 0.0 µF ceramic VOUT2 capacitor and 4. Recommended values are: RCOMP = 4. A 4. In most applications. VOUT1 = 1. additional capacitance should be used. 4. 5. TC1303C.1V – 0. the input voltage range is 2.7 µF none 4.2V. tantalum. OSCON) or ceramic.7V to 4. the buck regulator output voltage is adjustable by using two external resistors as a voltage divider. TC1304 RECOMMENDED CAPACITOR VALUES C(VIN1) C(VIN2) COUT1 COUT2 min 4. TABLE 5-1: EQUATION 5-1: R BOT V FB = R TOP × ⎛ --------------------------------⎞ ⎝ VOUT1 – V FB⎠ Input and Output Capacitor Selection TC1303A. TC1303B.5V) and is ideal for single-cell LiIon battery-powered applications.0 APPLICATION CIRCUITS/ISSUES 5. The capacitor type can be electrolytic (aluminum. ceramic capacitors are preferred due to their small size and low cost. a 4.5V at 500 mA.

TC1303C. Coiltronics V OUT DutyCycle = ------------V IN Duty cycle represents the percentage of switch-on time.6 5. 5.8.7 0.075 1.2. 5.7 0. EQUATION 5-3: 1 T ON = DutyCycle × ---------F SW Where: FSW = Switching Frequency.2.116 0. The difference is internal power dissipation.0. 1. 5. The second term is equal to the delivered power.0 1812PS 4. SD12 4.TC1303A/TC1303B/TC1303C/TC1304 5.3 0. 1008PS 4. 1. 5. With a typical 2.15 5.3 0.80 5.74 max. 1. a 4.4. Toroid and shielded ferrite pot cores will have low radiated energy.2. There are many different magnetic core materials and package options to select from.2. Overall efficiency will be improved by using lower DC resistance inductors. That decision is based on size.0 “Typical Performance Curves”). POUT/PIN = Efficiency).0 max. but tend to be larger and higher is cost. Given the measured efficiency (Section 2. 3.2.2 0.24 5. EQUATION 5-2: TABLE 5-2: Part Number TC1303A. 1.6.7 0. By calculating the power dissipation and applying the package thermal resistance. 5.2 max. 3.0 max. 1.× Δt L Sumida Corporation ® CMD411 2.950 4. DS21949B-page 24 OUT1 × I OUT1⎞ ⎛V ------------------------------------⎝ Efficiency ⎠ – ( V OUT1 × IOUT1 ) = PDissipation The first term is equal to the input power (definition of efficiency.8.2 max.35 5.2. A rating of less than 200 mΩ is recommended. TC1304 RECOMMENDED INDUCTOR VALUES Value (µH) DCR MAX Ω IDC (A) (MAX) Size WxLxH (mm) Coiltronics® SD10 2.091 1. 1.04 5.154 1. 1. (θJA). cost and acceptable radiated energy levels.35 1.81 max ® Coilcraft 5.2.2.0 max.2. .104 1. plus one half of the peak-to-peak inductor ripple current (1/2 * ΔIL). 5.7 0.2 max. 2. 5. The maximum continuous junction temperature rating for the TC1303/TC1304 is +125°C.108 1. CMD411 4. SD12 3.8.2 max.5 Inductor Selection For most applications. There is some percentage of power lost in the buck inductor. 1. SD10 3.0 MHz switching frequency. 5. TC1303B. the junction temperature is estimated.750 4.216 0.118 1. SD10 4. an empirical calculation using measured efficiency can be used.2.7 0.2 max.2. Thermal Calculations BUCK REGULATOR OUTPUT (VOUT1) The TC1303/TC1304 is available in two different 10-pin packages (MSOP and 3X3 DFN).2. This is an estimate assuming that most of the power lost is internal to the TC1303B.4. To quickly estimate the internal power dissipation for the switching buck regulator. SD12 2.2 0.7 µH inductor is recommended to minimize noise. the inductor ripple current can be calculated based on the following formulas. 5. CMD411 3. with very little loss in the input and output capacitors.2 max. the internal power dissipation is estimated below: EQUATION 5-6: When considering inductor ratings.9.4.11 1. The inductor ac ripple current can be calculated using the following relationship: EQUATION 5-4: ΔI L V L = L × -------Δt Where: VL = voltage across the inductor (VIN – VOUT) Δt = on-time of P-channel MOSFET Solving for ΔIL = yields: EQUATION 5-5: VL ΔI L = -----.174 0. 1.2 0. © 2005 Microchip Technology Inc.29 5.1 3.42 5. the maximum DC current rating of the inductor should be at least equal to the maximum buck regulator load current (IOUT1).770 4.8.3 0. 5. The inductor DC resistance can add to the buck converter I2R losses.8.

The CIN1 and COUT1 capacitor returns are connected closely together at the PGND plane. feedback in the adjustable-output case) should be referenced to AGND and have the AGND plane underneath them.Via AGND to PGND EQUATION 5-7: PLDO = ( V IN ( MAX ) ) – V OUT2 ( MIN ) ) × I OUT2 ( MAX ) ) +VOUT1 * CIN2 Optional Where: = LDO Pass device internal power dissipation PLDO VIN(MAX) = Maximum input voltage VOUT(MIN) = LDO minimum output voltage The maximum power dissipation capability for a package can be calculated given the junction-toambient thermal resistance and the maximum ambient temperature for the application. it is possible to minimize the switching frequency noise on the LDO output. identified as AGND (analog ground) and PGND (power ground). All three of these © 2005 Microchip Technology Inc. There will be some difference in layout for the 10-pin DFN package due to the thermal pad.7 PCB Layout Information Some basic design guidelines should be used when physically placing the TC1303/TC1304 on a Printed Circuit Board (PCB).TC1303A/TC1303B/TC1303C/TC1304 As an example.3V) x 300 mA PLDO = 684. 1. For the DFN layout. for a 3. the efficiency taken from Figure 2-8 is approximately 84%. DS21949B-page 25 . The following equation can be used to determine the package’s maximum internal power dissipation. while placing external components on the board.8 mW CIN2 1 COUT2 2 3 4 5 +VIN2 5.6.6. +VOUT2 AGND 10 9 8 7 6 PGND CIN1 +VIN1 TC1303B PGND Plane AGND Plane FIGURE 5-2: Component Placement. Fixed 10-Pin DFN.975 x 3. Fixed 10-Pin MSOP. is the input capacitor (CIN1). A typical fixedoutput DFN layout is shown below. output voltage and output current.Via +VOUT1 AGND to PGND * CIN2 Optional Internal Power Dissipation PLDO(MAX) = (VIN(MAX) – VOUT2(MIN)) x IOUT2(MAX) CIN1 AGND VOUT = 3. The internal power dissipation is approximately 137 mW. the VIN1 to VIN2 connection is routed on the bottom of the board around the TC1303/TC1304 thermal pad. The first priority. 5. The LDO optional input capacitor (CIN2) and LDO output capacitor COUT2 are returned to the AGND plane. The analog ground plane and power ground plane are connected at one point (shown near L1). The next priority would be the buck regulator output capacitor (COUT1) and inductor (L1).3V IOUT = 300 mA COUT1 L1 COUT1 AGND L1 PGND PLDO = (5. . Wiring should be short and wide.2 LDO OUTPUT (VOUT2) The internal power dissipation within the TC1303/TC1304 LDO is a function of input voltage.3 LDO POWER DISSIPATION EXAMPLE Input Voltage VIN = 5V±10% LDO Output Voltage and Current AGND PGND CIN2 1 10 +VIN2 2 9 +VOUT2 3 8 COUT2 4 7 5 TC1303B 6 +VIN1 PGND Plane AGND Plane FIGURE 5-1: Component Placement. All other signals (SHDN1. components are placed near their respective pins to minimize trace length. SHDN2. .5V – 0. Equation 5-7 can be used to calculate the internal power dissipation for the LDO. The TC1303/TC1304 has two ground pins.8V output with a load of 400 mA. the input current for the TC1303/TC1304 can be as high as 800 mA.6V input. By separating grounds. 5.

8°C Max.7µH Calculate PWM mode inductor ripple current Nominal Duty Cycle = 2.0V @ 500 mA VOUT2 = 3. Ambient Temperature = 89.0V/5.8°C Max.40 x 1/(2 MHz) = 200 ns VL = (VIN-VOUT1) = 3V ΔIL = (VL/L) x TON = 128 mA Peak inductor current: IL(PK) = IOUT1+1/2ΔIL = 564 mA Switcher power loss: Use efficiency estimate for 1. PDISS1 = 190 mW Resistor Divider: RTOP = 200 kΩ RBOT = 133 kΩ LDO Output: PDISS2 = (VIN(MAX) – VOUT2(MIN)) x IOUT2(MAX) PDISS2 = (5. ambient temperature.3°C 10-Pin DFN RθJA = 41° C/Watt (4-Layer Board with internal planes and 2 vias) Junction Temp.8V from Figure 2-8 Efficiency = 84%.3V) x 300 mA PDISS2 = 684.8 mW Total Dissipation = 190 mW + 685 mW = 874 mW Junction Temp Rise and Maximum Ambient Operating Temperature Calculations 10-Pin MSOP (4-Layer Board with internal Planes) RθJA = 113° C/Watt Junction Temp. . Ambient Temperature = 125°C .98.975) x 3.TC1303A/TC1303B/TC1303C/TC1304 5. Rise = 874 mW x 113° C/Watt = 98. Rise = 874 mW x 41° C/Watt = 35.5V – (0.0V = 40% P-channel Switch-on time = 0.35.3V @ 300 mA VIN = 5V±10% L = 4.2°C This is above the +85°C max. DS21949B-page 26 © 2005 Microchip Technology Inc. Ambient Temperature = 125°C .8°C Max.8°C Max. Ambient Temperature = 26.8 Design Example VOUT1 = 2.

3V D 3.0V G 2.9V N 2.3V J 2.1V L 2.6V VOUT2 — 0 = Default 11H0/E 520256 * The MSOP package for this device has not been qualified at the time of this publication.0V W 1.9V Code H 2. VOUT1 Code A 3..8V Y — H 2.0V M 2. Contact your Microchip sales office for availability. it will be carried over to the next line.3V B Example: XXXX YYWW NNN 11H0 0520 256 Third letter represents VOUT2 configuration: Second letter represents VOUT1 configuration: Code 10-Lead DFN VOUT2 Code VOUT1 Code VOUT2 A 3.2V K 2.9V X — G 2.6V Fourth letter represents +50 mV Increments: Code Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free.2V K 2.4V S 1.7V Z — I 2.375V VOUT1 — H = 2.5V R 1.4V C 3.5V 3.4V S 1.5V B 3.X Y YY WW NNN e3 * Note: VOUT1 Code F 2.0 PACKAGING INFORMATION 6.1 Package Marking Information 10-Lead MSOP* Example: XXXXXX YWWNNN — 1 = TC1303B — 2 = TC1303A — 3 = TC1303C — 4 = TC1304 — 1 = 1.1V V — E 2.. In the event the full Microchip part number cannot be marked on one line.7V P 1.7V P 1. thus limiting the number of available characters for customer-specific information. © 2005 Microchip Technology Inc.6V Q 1.3V T 1.375V 1 +50 mV to V1 3 +50 mV to V1 and V2 Legend: XX.8V Y 0.1V F 2.1V L 2.1V V 1. DS21949B-page 27 .9V N 2.6V 1 1. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package.TC1303A/TC1303B/TC1303C/TC1304 6.2V E 2.5V R 1.7V Z Adj 0 Default 2 +50 mV to V2 I 2.6V Q 1.0V M 2.2V U 1.3V T — C 3.2V U — D 3.0V W — VOUT1 Code J 2.8V O 1.9V X 1.8V O 1.

020 MILLIMETERS* NOM 10 0.00 1.008 REF. 3.80 0.30 0.18 0.90 0.010 .50 *Controlling Parameter Notes: 1. C04-063 DS21949B-page 28 Revised 05/24/04 © 2005 Microchip Technology Inc.124 .039 .001 .008 . but must be located within the hatched area.15 1.015 .000 . 4.031 .40 MIN MAX 1.9 mm Body (DFN) – Saw Singulated p b E n L D PIN 1 ID INDEX AREA (NOTE 2) D2 EXPOSED METAL PAD 2 1 E2 TOP VIEW BOTTOM VIEW A A3 EXPOSED TIE BAR (NOTE 1) A1 Number of Pins Pitch Overall Height Standoff Lead Thickness Overall Length Exposed Pad Length Overall Width Exposed Pad Width Lead Width Lead Length Units Dimension Limits n e (Note 3) (Note 3) A A1 A3 E E2 D D2 b L MIN .055 .047 . JEDEC equivalent: Not registered Drawing No. 2.012 INCHES NOM 10 .118 -.75 0. 2. Pin 1 visual index feature may vary. .30 0.00 0.124 .020 BSC . .20 -0.016 MAX .035 .39 -2.02 0.45 3.096 .25 0.112 .05 3. Exposed pad dimensions vary with paddle size.20 REF.00 1.15 2.00 0. Package may have one or more exposed tie bars at ends.002 .069 .85 3.118 -.112 .TC1303A/TC1303B/TC1303C/TC1304 10-Lead Plastic Dual Flat No Lead Package (MF) 3x3x0.85 3.50 BSC 0.

90 BSC 3. Contact your Microchip sales office for availability.030 Standoff .118 BSC .95 0.30 15° 15° JEDEC Equivalent: MO-187 Drawing No.50 TYP.006 α Mold Draft Angle Top 5° 15° β Mold Draft Angle Bottom 5° 15° *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions.024 .016 Footprint F φ Foot Angle 0° 8° c Lead Thickness .00 BSC 0.043 Overall Height A .00 4.23 0.033 .80 8° 0.037 Molded Package Thickness A2 .031 L .010" (0.85 0.006 A1 .75 0.009 .60 0. C04-021 * The MSOP package for the TC1303B has not been qualified at the time of this publication.08 0.23 5° 5° MIN MAX Number of Pins Pitch .020 TYP . 0.15 0.95 REF 0° 0.193 BSC . © 2005 Microchip Technology Inc. 1. DS21949B-page 29 .254mm) per side.009 - MAX MILLIMETERS* NOM 10 0.012 B .118 BSC .00 BSC 3.037 REF . Mold flash or protrusions shall not exceed .000 Overall Width E Molded Package Width E1 Overall Length D Foot Length .TC1303A/TC1303B/TC1303C/TC1304 10-Lead Plastic Micro Small Outline Package (UN) (MSOP*) E E1 p D 2 B n 1 α A φ c A2 A1 L (F) β L1 Units Dimension Limits n p MIN INCHES NOM 10 .003 Lead Width .10 0.40 0.15 0.

.TC1303A/TC1303B/TC1303C/TC1304 NOTES: DS21949B-page 30 © 2005 Microchip Technology Inc.

Added information on TC1303A.TC1303A/TC1303B/TC1303C/TC1304 APPENDIX A: REVISION HISTORY Revision B (July 2005) 1. © 2005 Microchip Technology Inc. Revision A (June 2005) • Original Release of this Document. TC1303C and TC1304 throughout data sheet. DS21949B-page 31 .

TC1303A/TC1303B/TC1303C/TC1304 NOTES: DS21949B-page 32 © 2005 Microchip Technology Inc. .

5V.3V. 1.5V.8V 2. Examples: c) d) e) f) g) h) i) 1. TC1303B-AD0EMF: 3.0V 1.8V 1. 1. 10-lead = Plastic Micro Small Outline (MSOP).0V. 1. 2.g. 1. 3.3V 2. 10LD DFN pkg. 10LD DFN pkg.5V. TC1303B-IA0EMF: 2.4V 2. 10LD DFN pkg. Adj. Default.375V A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 1 3. Default. PART NO.9V 2. 10LD DFN pkg.8V. Default.1V 3. refer to the factory or the listed sales office. 2. 10LD MSOP pkg. 10LD DFN pkg.5V.2V 2. Contact your Microchip sales office for availability. 2. TC1303B-DG0EMFTR: 3. Default. 1. Default. Temperature Range: E = -40°C to +85°C Package: MF UN = Dual Flat.6V 1.5V.2V. 10-lead (The MSOP package for this device has not been qualified at the time of this publication. Default. TC1303B-IA0EUN: 2. Default. Default.0V.8V.7V 2. TC1303 X- X X X X Type VOUT1 VOUT2 +50 mV Temp Increments Range B Device: Options XX XX Package Tube or Tape & Reel TC1303A: TC1303B: TC1303C: TC1304: PWM/LDO combo with Power-Good PWM/LDO combo with Power-Good PWM/LDO combo with Power-Good PWM/LDO combo with Power-Good Code VOUT1 Code VOUT2 Code +50 mV A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 1 3. Tape and Reel. 10LD DFN pkg. 3. TC1303B-PF0EMF: 1.2V.7V 1.8V. 10LD MSOP pkg. DS21949B-page 33 . 2.8V.7V. Default. 1.3V 2.5V. TC1303B-AG0EUN: 3.7V 1.2V 3. 1. Tape and Reel.6V 1. Tape and Reel a) TC1303C-VP0EMF: b) TC1303C-VP0EMFTR: a) TC1304-VI0EMF: b) TC1304-VP0EMF: c) TC1304-VI0EUN: d) TC1304-VI0EMFTR: e) TC1304-VP0EMFTR: f) TC1304-VI0EUNTR: 1. TC1303B-PG0EUN: 1.0V 1. 2. 2.4V 1.7V.9V Adjustable 1. Default.2V 2.7V.3V. 10LD DFN pkg.2V. 10LD MSOP pkg.2V.0V 2. 2.0V 2. 10LD MSOP pkg.8V.) Tube or Tape and Reel: Blank TR = Tube = Tape and Reel © 2005 Microchip Technology Inc.1V 2. Tape and Reel 1. 3. 1.8V.7V 2. 1.2V 1.8V. No Lead (3x3 mm body).3V. 10LD MSOP pkg.3V. Default.2V. Default. Default.8V. 3. Tape and Reel. 1.TC1303A/TC1303B/TC1303C/TC1304 PRODUCT IDENTIFICATION SYSTEM To order or obtain information.5V 2.3V 3. Default. 2. 1.6V 2.8V.9V 2. Tape and Reel. e.375V. Default 10LD DFN pkg.8V 2.9V 1.8V.0V 0.1V 1. 10LD MSOP pkg. on pricing or delivery. 10LD DFN pkg.4V 2.2V 3. 2. 10LD DFN pkg. Default.2V. Default. 2.5V.2V.5V.8V.9V 1.6V 2.3V 3.1V 3. 2.3V 1. 10LD DFN pkg. Default.5V 0 1 2 3 Default +50 mV to V1 +50 mV to V2 +50 mV to V1 and V2 a) TC1303A-SI0EMF: b) TC1303A-ZA0EUN: c) TC1303A-PP3EMFTR: a) TC1303B-1H0EMF: b) * Contact Factory for Alternate Output Voltage and Reset Voltage Configurations.8V 1.3V. 1.5V 1. 10LD DFN pkg. 10LD MSOP pkg. Default.6V. TC1303B-PF0EUN: 1.2V. 10LD DFN pkg. +50 mV. 1..5V 2.1V 2.

.TC1303A/TC1303B/TC1303C/TC1304 NOTES: DS21949B-page 34 © 2005 Microchip Technology Inc.

microID. MXDEV.S. Most likely. MPSIM.A. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED. SQTP is a service mark of Microchip Technology Incorporated in the U.S. ICSP. and other countries. Migratable Memory. We at Microchip are committed to continuously improving the code protection features of our products.A. PERFORMANCE. MXLAB. dsPICDEM.S. rfPIC. PICSTART. dsPICDEM. SmartTel. when used in the intended manner and under normal conditions. SEEVAL.S. PICtail. All of these methods. In-Circuit Serial Programming. DS21949B-page 35 . • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Application Maestro. PowerTool. microperipherals.S. under any Microchip intellectual property rights. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. All other trademarks mentioned herein are property of their respective companies. PowerCal. ECONOMONITOR. Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip. Select Mode. PowerSmart. and other countries. dsPIC. KEELOQ® code hopping devices. MERCHANTABILITY OR FITNESS FOR PURPOSE.net. Accuron. SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U. The Company’s quality system processes and procedures are for its PICmicro® 8-bit MCUs. implicitly or otherwise.net. Linear Active Thermistor. MPLAB. Arizona and Mountain View. STATUTORY OR OTHERWISE. Total Endurance and WiperLock are trademarks of Microchip Technology Incorporated in the U. design and wafer fabrication facilities in Chandler and Tempe. INCLUDING BUT NOT LIMITED TO ITS CONDITION. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. Smart Serial. WRITTEN OR ORAL. you may have a right to sue for relief under that Act. PICMASTER. MPLINK. Printed in the U. Trademarks The Microchip name and logo. and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U. require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. FanSense. MPASM. FlexROM. AmpLab. PICLAB. MPLIB. FilterLab. to our knowledge. PowerMate.A. PowerInfo. ICEPIC. No licenses are conveyed. California in October 2003.A. If such acts allow unauthorized access to your software or other copyrighted work. the person doing so is engaged in theft of intellectual property. All Rights Reserved. • Microchip is willing to work with the customer who is concerned about the integrity of their code. KEELOQ. It is your responsibility to ensure that your application meets with your specifications. the Microchip logo. Printed on recycled paper. In addition. PICDEM. nonvolatile memory and analog products. • There are dishonest and possibly illegal methods used to breach the code protection feature.Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. © 2005 Microchip Technology Inc. PICmicro. Analog-for-the-Digital Age. dsPICworks. QUALITY. Code protection does not mean that we are guaranteeing the product as “unbreakable. fuzzyLAB. Microchip Technology Incorporated. PRO MATE. Serial EEPROMs.” Code protection is constantly evolving. • Microchip believes that its family of products is one of the most secure families of its kind on the market today. Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.A.. ECAN. rfLAB. PIC. rfPICDEM. PICDEM. RELATED TO THE INFORMATION. © 2005. Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters. Microchip disclaims all liability arising from this information and its use. PICkit.

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