PAL16L8AM, PAL16L8A-2M, PAL16R4AM, PAL16R4A-2M

PAL16R6AM, PAL16R6A-2M, PAL16R8AM, PAL16R8A-2M
STANDARD HIGH-SPEED PAL CIRCUITS
SRPS016 – D2705, FEBRUARY 1984 – REVISED MARCH 1992



PAL16L8’
J OR W PACKAGE

Choice of Operating Speeds
High-Speed, A Devices . . . 25 MHz Min
Half-Power, A-2 Devices . . . 16 MHz Min

(TOP VIEW)

Choice of Input/Output Configuration

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GND

Package Options Include Both Ceramic DIP
and Chip Carrier in Addition to Ceramic
Flat Package
DEVICE

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INPUTS

3-STATE
O OUTPUTS

REGISTERED
Q OUTPUTS

I/O
PORT
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PAL16L8

10

2

0

6

PAL16R4

8

0

4 (3-state buffers)

4

PAL16R6

8

0

6 (3-state buffers)

2

PAL16R8

8

0

8 (3-state buffers)

0

description

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20

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10

11

VCC
O
I/O
I/O
I/O
I/O
I/O
I/O
O
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PAL16L8’
FK PACKAGE

These programmable array logic devices feature
high speed and a choice of either standard or
half-power devices. They combine Advanced
Low-Power Schottky technology with proven
titanium-tungsten fuses. These devices will
provide reliable, high-performance substitutes for
conventional
TTL
logic.
Their
easy
programmability allow for quick design of ”custom”
functions and typically results in a more compact
circuit board. In addition, chip carriers are
available for further reduction in board space.

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VCC
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(TOP VIEW)

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18

5

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9 10 11 12 13

I/O
I/O
I/O
I/O
I/O

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GND
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I/O

The Half-Power versions offer a choice of
operating frequency, switching speeds, and
power dissipation. In many cases, these
Half-Power devices can result in significant power
reduction from an overall system level.

4

The PAL16’ M series is characterized for
operation over the full military temperature range
of –55°C to 125°C.

PAL is a registered trademark of Advanced Micro Devices Inc.
Copyright  1992, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

1

PAL16R4AM. TEXAS 75265 OE Q Q 1 I GND CLK I I I I I I I I GND (TOP VIEW) I I CLK VCC I/O (TOP VIEW) Q Q Q Q Q . PAL16R4A-2M. PAL16R6A-2M. PAL16R6AM. PAL16R8A-2M STANDARD HIGH-SPEED PAL CIRCUITS SRPS016 – D2705. PAL16R8AM. FEBRUARY 1984 – REVISED MARCH 1992 PAL16R4’ J OR W PACKAGE PAL16R4’ FK PACKAGE 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC I/O I/O Q Q Q Q I/O I/O OE I I I I I 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 PAL16R6’ J OR W PACKAGE PAL16R6’ FK PACKAGE 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC I/O Q Q Q Q Q Q I/O OE I I I I I 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 I GND 1 (TOP VIEW) I I CLK VCC I/O (TOP VIEW) CLK I I I I I I I I GND PAL16R8’ J OR W PACKAGE 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 I I CLK VCC Q 20 2 (TOP VIEW) VCC Q Q Q Q Q Q Q Q OE POST OFFICE BOX 655303 I I I I I 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 I GND 1 Q Q Q Q Q PAL16R8’ FK PACKAGE (TOP VIEW) CLK I I I I I I I I GND I/O Q Q Q Q OE I/O I/O 19 OE I/O Q 20 2 • DALLAS.

PAL16R4AM. PAL16L8A-2M. TEXAS 75265 3 . FEBRUARY 1984 – REVISED MARCH 1992 functional block diagrams (positive logic) PAL16L8AM PAL16L8A-2M & 32 X 64 16 x I 10 16 6 16 EN ≥ 1 7 O 7 O 7 I/O 7 I/O 7 I/O 7 I/O 7 I/O 7 I/O 6 PAL16R4AM PAL16R4A-2M OE CLK EN 2 C1 & 32 X 64 16 x I 8 ≥1 8 I=0 2 Q 1D 8 Q 8 Q 8 Q 16 4 4 16 EN ≥ 1 7 I/O 7 I/O 7 I/O 7 I/O 4 4 denotes fused inputs POST OFFICE BOX 655303 • DALLAS.PAL16L8AM. PAL16R4A-2M STANDARD HIGH-SPEED PAL CIRCUITS SRPS016 – D2705.

PAL16R8AM.PAL16R6AM. TEXAS 75265 . PAL16R6A-2M. PAL16R8A-2M STANDARD HIGH-SPEED PAL CIRCUITS SRPS016 – D2705. FEBRUARY 1984 – REVISED MARCH 1992 functional block diagrams (positive logic) PAL16R6AM PAL16R6A-2M OE CLK EN 2 C1 & 32 X 64 16 x I 8 ≥1 8 I=0 2 Q 1D 8 Q 8 Q 8 Q 8 Q 8 Q 16 6 2 16 EN ≥ 1 7 I/O I/O 7 2 6 PAL16R8AM PAL16R8A-2M OE CLK EN 2 C1 & 32 X 64 16 x I 8 8 ≥1 I=0 2 8 Q 8 Q 8 Q 8 Q 8 Q 8 Q 8 Q 16 8 16 8 denotes fused inputs 4 Q 1D POST OFFICE BOX 655303 • DALLAS.

TEXAS 75265 5 . FEBRUARY 1984 – REVISED MARCH 1992 logic diagram (positive logic) I 1 Increment First Fuse Numbers I I I I I I I I 2 3 4 5 6 7 8 9 0 4 8 12 16 20 24 28 0 32 64 96 128 160 192 224 31 19 256 288 320 352 384 416 448 480 18 512 544 576 608 640 672 704 736 17 768 800 832 864 896 928 960 992 16 1024 1056 1088 1120 1152 1184 1216 1248 15 1280 1312 1344 1376 1408 1440 1472 1504 14 1536 1568 1600 1632 1664 1696 1728 1760 13 1792 1824 1856 1888 1920 1952 1984 2016 12 11 O I/O I/O I/O I/O I/O I/O O I Fuse number = First fuse number + Increment POST OFFICE BOX 655303 • DALLAS. PAL16L8A-2M STANDARD HIGH-SPEED PAL CIRCUITS SRPS016 – D2705.PAL16L8AM.

PAL16R4AM. TEXAS 75265 I/O I/O OE . FEBRUARY 1984 – REVISED MARCH 1992 logic diagram (positive logic) CLK 1 Increment First Fuse Numbers I I I I I I I I 2 3 4 5 6 7 8 9 0 4 8 12 16 20 24 31 19 256 288 320 352 384 416 448 480 18 512 544 576 608 640 672 704 736 I=0 1D 768 800 832 864 896 928 960 992 I=0 1D 1024 1056 1088 1120 1152 1184 1216 1248 I=0 1D 1280 1312 1344 1376 1408 1440 1472 1504 I=0 1D 17 I/O I/O Q C1 16 Q C1 15 Q C1 14 Q C1 1536 1568 1600 1632 1664 1696 1728 1760 13 1792 1824 1856 1888 1920 1952 1984 2016 12 11 Fuse number = First fuse number + Increment 6 28 0 32 64 96 128 160 192 224 POST OFFICE BOX 655303 • DALLAS. PAL16R4A-2M STANDARD HIGH-SPEED PAL CIRCUITS SRPS016 – D2705.

PAL16R6AM. TEXAS 75265 7 . FEBRUARY 1984 – REVISED MARCH 1992 logic diagram (positive logic) CLK 1 Increment First Fuse Numbers I I I I I I I I 2 3 4 5 6 7 8 9 0 4 8 12 16 20 24 28 31 0 32 64 96 128 160 192 224 19 256 288 320 352 384 416 448 480 I=0 1D 512 544 576 608 640 672 704 736 I=0 1D 768 800 832 864 896 928 960 992 I=0 1D 1024 1056 1088 1120 1152 1184 1216 1248 I=0 1D 1280 1312 1344 1376 1408 1440 1472 1504 I=0 1D 1536 1568 1600 1632 1664 1696 1728 1760 I=0 1D 18 I/O Q C1 17 Q C1 16 Q C1 15 Q C1 14 Q C1 13 Q C1 1792 1824 1856 1888 1920 1952 1984 2016 12 11 I/O OE Fuse number = First fuse number + Increment POST OFFICE BOX 655303 • DALLAS. PAL16R6A-2M STANDARD HIGH-SPEED PAL CIRCUITS SRPS016 – D2705.

PAL16R8AM. FEBRUARY 1984 – REVISED MARCH 1992 logic diagram (positive logic) CLK 1 Increment First Fuse Numbers I I I I I I I I 2 3 4 5 6 7 8 9 0 4 8 12 16 20 24 31 I=0 1D 256 288 320 352 384 416 448 480 I=0 1D 512 544 576 608 640 672 704 736 I=0 1D 768 800 832 864 896 928 960 992 I=0 1D 1024 1056 1088 1120 1152 1184 1216 1248 I=0 1D 1280 1312 1344 1376 1408 1440 1472 1504 I=0 1D 1536 1568 1600 1632 1664 1696 1728 1760 I=0 1D 1792 1824 1856 1888 1920 1952 1984 2016 I=0 1D 19 Q C1 18 Q C1 17 Q C1 16 Q C1 15 Q C1 14 Q C1 13 Q C1 12 Q C1 11 Fuse number = First fuse number + Increment 8 28 0 32 64 96 128 160 192 224 POST OFFICE BOX 655303 • DALLAS. TEXAS 75265 OE . PAL16R8A-2M STANDARD HIGH-SPEED PAL CIRCUITS SRPS016 – D2705.

. . . . . . Information on programmers capable of programming Texas Instruments programmable logic is also available. . PAL16R6A-2M. . – 65°C to 150°C NOTE 1: These ratings apply except for programming pins during a programming cycle. 5. . –55°C to 125°C Storage temperature range . . upon request. . .8 V High-level output current –2 mA IOL TA Low-level output current 12 mA 125 °C High-level input voltage 2 Operating free-air temperature –55 POST OFFICE BOX 655303 • DALLAS. . . . . . . . .5 5 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage. . . . . . . . . . . . . . . . software. . . . from the nearest TI field sales office. recommended operating conditions MIN NOM MAX 4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Complete programming specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . FEBRUARY 1984 – REVISED MARCH 1992 programming information Texas Instruments programmable logic devices can be programmed using widely available software and inexpensive device programmers. . PAL16R4AM. . .5 UNIT V 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and the latest information on hardware. . . algorithms. . local authorized TI distributor. . . .5 V VCC VIH Supply voltage VIL IOH Low-level input voltage 0. . . . 5. . . . .5 V Operating free-air temperature range . . . PAL16R8A-2M STANDARD HIGH-SPEED PAL CIRCUITS SRPS016 – D2705. .PAL16L8AM. . . . . . PAL16L8A-2M.5 V Voltage applied to disabled output (see Note 1) . . . . . . . . . PAL16R8AM. . . . . . . . . . . . . . 7 V Input voltage (see Note 1) . . . or by calling Texas Instruments at (214) 997-5666. . . . . . . . . . . . . . . . VCC (see Note 1) . PAL16R4A-2M PAL16R6AM. . . . . . and firmware are available upon request. . . . . . . . . . . . . . . . . . . . . . . . TEXAS 75265 25 9 .

10 20 ns Q R2 = 750 Ω. IOL = 12 mA VCC = 5. fclock.5 V.PAL16L8AM. Outputs IOZH I/O ports Outputs IOZL I/O ports II I/O Ports IIH All others MIN TYP† 2. I/O 14 30 ns O. input or feedback before CLK↑ Clock high 15 Clock low 20 Hold time. 15 25 ns Q See Figure 1 10 25 ns O.5 V. I/O O. but not for both simultaneously. PAL16R4AM.7 V VCC = 5.25 – 1.5 V.2 0.5 V to avoid test equipment degradation. VI = 2. 10 POST OFFICE BOX 655303 • DALLAS.5 V. I/O 13 30 ns † All typical values are at VCC = 5 V. VO = 0. VO = 0.4 3.2 100 25 –0. VCC = 4. The minimum pulse durations specified are only for clock high or low.5 V.5 V VCC = 5.4 20 –20 –100 0.5 V VI = 0. ‡ Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.2 All others IOS‡ ICC UNIT 100 OE input IIL MAX –0. VO = 2. VI = 0. PAL16R6AM.5 V.7 V VCC = 5. TEXAS 75265 . PAL16R8AM STANDARD HIGH-SPEED PAL CIRCUITS SRPS016 – D2705. Set VO at 0.5 V.5 V.5 V V 0. I/O tpd ten CLK↑ Q OE↓ tdis ten OE↑ I.1 – 30 V µA µA mA µA mA –250 mA 180 mA MIN MAX UNIT 0 25 MHz Outputs open 75 timing requirements fclock Clock Frequency tw Pulse duration (see Note 2) tsu th Setup time. TA = 25°C. I/O PARAMETER fmax tpd TEST CONDITION MIN TYP† 25 45 MAX UNIT MHz 15 30 ns R1 = 390 Ω. VCC = 5. switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) FROM (INPUT) TO (OUTPUT) I. FEBRUARY 1984 – REVISED MARCH 1992 electrical characteristics over recommended operating free-air temperature range PARAMETER TEST CONDITIONS VIK VOH VCC = 4. I/O tdis I.4 V VCC = 5.5 V. II = – 18 mA IOH = – 2 mA VOL VCC = 4.4 V VCC = 5. VI = 5.5 V. input or feedback after CLK↑ ns 25 ns 0 ns NOTE 2: The total clock period of clock high and clock low must not exceed clock frequency.

5 V. VO = 2. I/O tdis I.4 20 –20 –100 0.5 V.5 V VI = 0.5 V V 0. I/O PARAMETER fmax tpd TEST CONDITION MIN TYP† 16 25 MAX UNIT MHz 25 40 ns R1 = 390 Ω.5 V. VI = 2. IOL = 12 mA VCC = 5. VI = 5. TA = 25°C.4 3.4 V VCC = 5. TEXAS 75265 11 .5 V. FEBRUARY 1984 – REVISED MARCH 1992 electrical characteristics over recommended operating free-air temperature range PARAMETER TEST CONDITIONS VIK VOH VCC = 4. 11 25 ns Q R2 = 750 Ω. input or feedback before CLK↑ Clock high 25 Clock low 25 Hold time. PAL16R4A-2M. VCC = 4.7 V VCC = 5.25 – 1.5 V. I/O O. input or feedback after CLK↑ ns 35 ns 0 ns NOTE 2: The total clock period of clock high and clock low must not exceed clock frequency.5 V. VO = 0. I/O tpd ten CLK↑ Q OE↓ tdis ten OE↑ I. VO = 0.2 All others IOS‡ ICC UNIT 100 OE input IIL MAX –0.5 V. PAL16R6A-2M.PAL16L8A-2M. I/O 25 35 ns † All typical values are at VCC = 5 V. ‡ Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second. PAL16R8A-2M STANDARD HIGH-SPEED PAL CIRCUITS SRPS016 – D2705. II = – 18 mA IOH = – 2 mA VOL VCC = 4. 20 25 ns Q See Figure 1 11 25 ns O. I/O 25 40 ns O. POST OFFICE BOX 655303 • DALLAS.2 0. Outputs IOZH I/O ports Outputs IOZL I/O ports II I/O Ports IIH All others MIN TYP† 2.5 V. fclock. VCC = 5. Set VO at 0.5 V VCC = 5.5 V.2 100 25 –0.1 – 30 V µA µA mA µA mA –250 mA 90 mA MIN MAX UNIT 0 16 MHz Outputs open 75 timing requirements fclock Clock Frequency tw Pulse duration (see Note 2) tsu th Setup time.5 V to avoid test equipment degradation.7 V VCC = 5.5 V.4 V VCC = 5. but not for both simultaneously. switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) FROM (INPUT) TO (OUTPUT) I. The minimum pulse durations specified are only for clock high or low. VI = 0.

E. PAL16R6A-2M.5 V 3V High-Level Pulse 1.5 V VOH 1. PAL16L8A-2M.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES Output Control (low-level enabling) 1.3 V 1.5 V 1.5 V 0 VOLTAGE WAVEFORMS PULSE DURATIONS 3V 3V 1. 3-STATE OUTPUTS NOTES: A. duty cycle = 50% D.5 V VOH 1.5 V 0 3V Low-Level Pulse VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 1.PAL16L8AM. PAL16R4AM. TEXAS 75265 SRPS016 .5 V ≈0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES. C.5 V 0 0 tw th tsu 3V Data Input 1.5 V VOL tdis ten Waveform 2 S1 Open (see Note B) VOH 1. When measuring propagation delay times of 3.5 V 1.5 V 0 tpd tpd In-Phase Output 1.5 V VOH – 0. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. Load Circuit and Voltage Waveforms 12 POST OFFICE BOX 655303 • DALLAS. B.state outputs. PAL16R4A-2M PAL16R6AM. PAL16R8AM. FEBRUARY 1984 – REVISED MARCH 1992 PARAMETER MEASUREMENT INFORMATION 5V S1 R1 From Output Under Test Test Point CL (see Note A) R2 LOAD CIRCUIT FOR 3-STATE OUTPUTS 3V Timing Input 1.5 V 1. tr and tf ≤ 2 ns.5 V 0 ten tdis ≈ 3. All input pulses have the following characteristics: PRR ≤ 10 MHz. switch S1 is closed. 5 pF for tdis.5 V 1. CL includes probe and jig capacitance and is 50 pF for tpd and ten.5 V VOL tpd tpd Out-of-Phase Output (see Note D) 1. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Figure 1. PAL16R8A-2M STANDARD HIGH-SPEED PAL CIRCUITS SRPS016 – D2705.5 V Input 1. Equivalent loads may be used for testing.5 V Waveform 1 S1 Closed (see Note B) VOL + 0.

ti.PACKAGE OPTION ADDENDUM www.com 12-Jan-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) 81036072A ACTIVE LCCC FK 20 1 TBD Call TI N / A for Pkg Type 8103607RA ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type 8103607SA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type 81036082A ACTIVE LCCC FK 20 1 TBD Call TI N / A for Pkg Type 8103608RA ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type 8103608SA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type 81036092A ACTIVE LCCC FK 20 1 TBD Call TI N / A for Pkg Type 8103609RA ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type 8103609SA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type 81036102A ACTIVE LCCC FK 20 1 TBD Call TI N / A for Pkg Type 8103610RA ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type 8103610SA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type 81036112A ACTIVE LCCC FK 20 1 TBD Call TI N / A for Pkg Type 8103611RA ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type 8103611SA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type 81036122A ACTIVE LCCC FK 20 1 TBD Call TI N / A for Pkg Type 8103612RA ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type 8103612SA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type 81036132A ACTIVE LCCC FK 20 1 TBD Call TI N / A for Pkg Type 8103613RA ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type 8103613SA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type 81036142A ACTIVE LCCC FK 20 1 TBD Call TI N / A for Pkg Type 8103614RA ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type 8103614SA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type PAL16L8A-2MFKB ACTIVE LCCC FK 20 1 TBD Call TI N / A for Pkg Type PAL16L8A-2MJ ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type PAL16L8A-2MJB ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type PAL16L8A-2MWB ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type PAL16L8AMFKB ACTIVE LCCC FK 20 1 TBD Call TI N / A for Pkg Type PAL16L8AMJ ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type PAL16L8AMJB ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type PAL16L8AMWB ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type PAL16R4A-2MFKB ACTIVE LCCC FK 20 1 TBD Call TI N / A for Pkg Type PAL16R4A-2MJ ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type PAL16R4A-2MJB ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type PAL16R4A-2MWB ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type PAL16R4AMFKB ACTIVE LCCC FK 20 1 TBD Call TI N / A for Pkg Type PAL16R4AMJ ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type PAL16R4AMJB ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type PAL16R4AMWB ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type PAL16R6A-2MFKB ACTIVE LCCC FK 20 1 TBD Call TI N / A for Pkg Type PAL16R6A-2MJ ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type Addendum-Page 1 .

Efforts are underway to better integrate information from third parties. and peak solder temperature.1% by weight in homogeneous material) (3) MSL. TI Pb-Free products are suitable for use in specified lead-free processes. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. or 2) lead-based die adhesive used between the die and leadframe. Peak Temp. (2) Eco Plan . Pb-Free (RoHS Exempt).1% by weight in homogeneous materials. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.ti. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances. OBSOLETE: TI has discontinued the production of the device.The planned eco-friendly classification: Pb-Free (RoHS).please check http://www.The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications. TI and TI suppliers consider certain information to be proprietary. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package. Where designed to be soldered at high temperatures. and thus CAS numbers and other limited information may not be available for release. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Addendum-Page 2 . -.com/productcontent for the latest availability information and additional product content details. and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible). Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. including the requirement that lead not exceed 0. TI bases its knowledge and belief on information provided by third parties. but TI does not recommend using this part in a new design. NRND: Not recommended for new designs.ti. TBD: The Pb-Free/Green conversion plan has not been defined. and a lifetime-buy period is in effect. Device is in production to support existing customers.com 12-Jan-2006 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) PAL16R6A-2MJB ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type PAL16R6A-2MWB ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type PAL16R6AMFKB ACTIVE LCCC FK 20 1 TBD Call TI N / A for Pkg Type PAL16R6AMJ ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type PAL16R6AMJB ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type PAL16R6AMWB ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type PAL16R8A-2MFKB ACTIVE LCCC FK 20 1 TBD Call TI N / A for Pkg Type PAL16R8A-2MJ ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type PAL16R8A-2MJB ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type PAL16R8A-2MWB ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type PAL16R8AMFKB ACTIVE LCCC FK 20 1 TBD Call TI N / A for Pkg Type PAL16R8AMJ ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type PAL16R8AMJB ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type PAL16R8AMWB ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. or Green (RoHS & no Sb/Br) . LIFEBUY: TI has announced that the device will be discontinued. and makes no representation or warranty as to the accuracy of such information.PACKAGE OPTION ADDENDUM www.

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458 (11.14) 0.78) 0.43) 0.063 (27.40) 0.858 (21.89) 0.080 (2.51) 0.045 (1.739 (18.028 (0.165 (29.761 (19.358 (9.047 (26.495 (12.32) 0.31) 0. The terminals are gold plated.560 (14.25) 0.938 (23.022 (0.09) 28 0.14) 0.560 (14.6) 0.045 (1. This drawing is subject to change without notice.8) 84 1.69) 0.58) 0.010 (0. E.03) 0.58) 0.020 (0.MECHANICAL DATA MLCC006B – OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO.442 (11.020 (0.89) 0.307 (7.850 (21.76) 0.495 (12.83) 0.064 (1. This package can be hermetically sealed with a metal lid.035 (0.660 (16.055 (1. All linear dimensions are in inches (millimeters).458 (11.27) 4040140 / D 10/96 NOTES: A.51) 0.26) 0.14) 0.71) 0.342 (8.640 (16.23) 0.59) 1.63) 0.25) 0.22) 23 7 52 0.406 (10. B. Falls within JEDEC MS-004 POST OFFICE BOX 655303 • DALLAS.6) 1.99) 1.63) 0.63) 21 9 22 8 44 0.962 (24.050 (1. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.010 (0.0) B SQ A SQ 25 5 26 27 28 1 2 3 4 0.035 (0. TEXAS 75265 .09) 0.358 (9.80) 0.22) 24 6 68 0.045 (1. C.141 (28. D.54) 0.

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