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EV-ADF4355-3SD1Z User Guide

UG-873
One Technology Way P.O. Box 9106 Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 www.analog.com

Evaluating the ADF4355-3 Fractional-N/Integer-N PLL Frequency Synthesizer


FEATURES

GENERAL DESCRIPTION

Self contained board, including ADF4355-3 frequency


synthesizer with integrated VCO, differential 122.88 MHz
temperature controlled crystal oscillator (TCXO), loop
filter (35 kHz), USB interface, and voltage regulators
Windows-based software allows control of synthesizer
functions from a PC
Externally powered by 6 V

The EV-ADF4355-3SD1Z evaluates the performance of the


ADF4355-3 frequency synthesizer with integrated VCO for
phase-locked loops (PLLs). A photograph of the evaluation
board is shown in Figure 1. The evaluation board contains the
ADF4355-3 frequency synthesizer with integrated VCO, a
differential 122.88 MHz reference (TCXO), a loop filter, a USB
interface, power supply connectors, and subminiature Version A
(SMA) connectors. A USB cable is included to connect the
board to a PC USB port.

EVALUATION KIT CONTENTS


EV-ADF4355-3SD1Z
USB cable

For easy programming of the synthesizer, download the


Windows-based software from www.analog.com/ADF4355-3.

EQUIPMENT NEEDED

This board requires an SDP-S (shown in Figure 1, but not


supplied with the kit). The SDP-S allows software programming
of the EV-ADF4355-3SD1Z device.

Windows-based PC with USB port for evaluation software


System demonstration platform, serial only (SDP-S)
EVAL-SDP-CS1Z controller board
Power supply (6 V)
Spectrum analyzer
50 terminators

ONLINE RESOURCES
Documents Needed
ADF4355-3 data sheet
EV-ADF4355-3SD1Z user guide
PLL Software Installation Guide
Required Software
Analog Devices, Inc., ADF4355-3 software, Version 0.46.1
or higher (available for download at
www.analog.com/ADF4355-3)

13451-001

EVALUATION BOARD PHOTOGRAPH

Figure 1. EV-ADF4355-3SD1Z

Rev. 0 | Page 1 of 18

UG-873

EV-ADF4355-3SD1Z User Guide

TABLE OF CONTENTS
Features .............................................................................................. 1

RF Output .......................................................................................4

Evaluation Kit Contents ................................................................... 1

Loop Filter ......................................................................................4

Equipment Needed ........................................................................... 1

Reference Source ...........................................................................4

Online Resources .............................................................................. 1

Default Configuration ..................................................................4

General Description ......................................................................... 1

Evaluation Board Setup ................................................................5

Evaluation Board Photograph ......................................................... 1

Evaluation Board Software ...............................................................6

Revision History ............................................................................... 2

Main Controls ................................................................................6

Getting Started .................................................................................. 3

Evaluation and Test ...........................................................................7

Software Installation Procedures ................................................ 3

Evaluation Board Schematics and Artwork ...................................8

Evaluation Board Setup Procedures........................................... 3

Ordering Information .................................................................... 17

Evaluation Board Hardware ............................................................ 4

Bill of Materials ........................................................................... 17

Power Supplies .............................................................................. 4

REVISION HISTORY
8/15Revision 0: Initial Version

Rev. 0 | Page 2 of 18

EV-ADF4355-3SD1Z User Guide

UG-873

GETTING STARTED
SOFTWARE INSTALLATION PROCEDURES

EVALUATION BOARD SETUP PROCEDURES

See the ADF4355-3 product page for the EV-ADF4355-3SD1Z


control software. For the software installation procedure, see
the PLL Software Installation Guide.

To run the software,


1.
2.

3.

Click the ADF4355-3 file on the desktop or from the Start


menu.
On the Select Device and Connection tab, choose
ADF4355-3 and SDP board (black), and then click
Connect (see Figure 2).
When connecting the board, allow 5 sec to 10 sec for the
label on the status bar to change.

13451-002

Under the File menu, the current settings can be saved to, and
loaded from, a text file.

Figure 2. Software Front Panel DisplaySelect Device and Connection

Rev. 0 | Page 3 of 18

EV-ADF4355-3SD1Z User Guide

The EV-ADF4355-3SD1Z schematics are shown in Figure 8,


Figure 9, and Figure 10. The silkscreens for the evaluation
board are shown in Figure 11 and Figure 12.

R14

C61
R1

R17
RCPOUT
C73
R5

POWER SUPPLIES

The charge pump and VCO supply pins are driven from a
5 V ADM7150 high performance, low noise regulator. The
remaining supplies are powered from 3.3 V ADM7150 high
performance, low noise regulator.

R17
C60

C59
R14

C61
13451-101

The power supply circuitry allows the user two or three separate
low dropout (LDO) regulators to feed the ADF4355-3 (using
fewer LDO regulators increases the risk of spur contaminated
dc feeds).

RVTUNE

Figure 3. Loop Filter Placement

The board is powered by a 6 V power supply connected to the


red and black banana connectors. Connect the red connector
to a 6 V power supply and the black connector to ground.

Figure 4. Loop Filter Schematic

REFERENCE SOURCE
The evaluation board contains a 122.88 MHz differential output
TCXO from Vectron International. If preferred, the user may
supply either a single-ended or differential reference input to
REFINA/REFINB SMA connectors. When using an external
reference, remove R12 to disconnect the power rail to the
TCXO.

LED1 indicates when the ADF4355-3 is powered on. Use


Switch S1 to switch the 6 V to the board on and off.

RF OUTPUT
The EV-ADF4355-3SD1Z has two pairs of SMA output
connectors: RFOUTA+/RFOUTA and RFOUTB+/RFOUTB
(differential outputs). Because they are sensitive to impedance
mismatch, connect the RF outputs to equal load impedances.
If only one port of a differential pair is used, terminate the
complementary port with an equal load terminator (in general,
a 50 terminator).

LOOP FILTER
The loop filter schematic is included in the board schematic in
Figure 8. Figure 3 shows the loop filter component placements.
For lowest rms phase noise, use the following components (that
are inserted on the evaluation board) with a 0.9 mA charge
pump current:

C60

The EV-ADF4355-3SD1Z requires the SDP-S platform that


uses the EVAL-SDP-CS1Z. (SDP-B is not recommended.)

C59

RPIN18

EVALUATION BOARD HARDWARE

13451-003

UG-873

C60 = 2.2 nF, C59 = 47 nF, C61 = 470 pF, C73 = 10 pF


R14 = 360 , R17 = 1.3 k
Loop bandwidth = 35 kHz
Phase margin = 56

To use a single-ended REFINx, connect a low noise 122.88 MHz


reference source to SMA REFINB, and connect a 50 terminator
to SMA REFINA. Remove Resistor R27 (100 ). To use a
differential REFINx, connect the differential signal to SMA
REFINA and SMA REFINB. The differential REFINA/REFINB
SMA connectors can operate to a 500 MHz input frequency.
In the schematic shown in Figure 8, the REFINA pin of U1
(ADF4355-3) is connected to SMA REFINB, and the REFINB
pin of U1 (ADF4355-3) is connected to SMA REFINA. This
schematic matches the evaluation board connections.

DEFAULT CONFIGURATION
All components necessary for local oscillator (LO) generation
are inserted on the board. This board is shipped with the
ADF4355-3 synthesizer with an integrated VCO, a differential
122.88 MHz reference TCXO, and a 35 kHz loop filter (ICP =
0.9 mA).

Narrower loop filter bandwidths have lower spurious signals.

Rev. 0 | Page 4 of 18

EV-ADF4355-3SD1Z User Guide

UG-873

EVALUATION BOARD SETUP

SDP-S BOARD

USB

PC

VSUPPLY
EXTERNAL POWER
SWITCH
EXTERNAL DC
SUPPLY

PLL
POWER
LED

EXTERNAL DC
GND

SPECTRUM
ANALYZER

SIGNAL GENERATOR

LOCK
DETECT
LED

REFERENCE
IN/OUT

REFINB

TCXO
LOOP FILTER
REFINA

REFERENCE
(OPTIONAL)

ADF4355-3
(UNDERNEATH BOARD)

RFOUTB

RFOUTA

RFOUTB+

13451-004

RFOUTA+

Figure 5. Evaluation Setup Block Diagram

Rev. 0 | Page 5 of 18

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EV-ADF4355-3SD1Z User Guide

EVALUATION BOARD SOFTWARE


MAIN CONTROLS
The Main Controls tab (see Figure 6) selects the RF and user
configurable register settings. Consult the register descriptions
of the ADF4355-3 data sheet for details. Default settings are
recommended for most registers.

In Register 4, program the CP current to match the value used


for the loop filter design.

13451-005

In the RF Settings, ensure that VCOout (MHz) equals the


VCO frequency. Set the Output divider to give the required
RFoutA (MHz).

Ensure that Reference freq equals the applied reference signal.


The PFD frequency is calculated from the reference frequency,
the R counter, the reference doubler, and the reference divide
by 2. Ensure that the value in PFD (MHz) matches the value
specified in the loop filter design.

Figure 6. Software Front Panel DisplayMain Controls

Rev. 0 | Page 6 of 18

EV-ADF4355-3SD1Z User Guide

UG-873

EVALUATION AND TEST


1.

80
90

PHASE NOISE (dBc/Hz)

Install the ADF4355-3 software (see the PLL Software


Installation Guide).
2. Follow the hardware driver installation procedure
(Windows XP only).
3. Connect a 50 terminator to RFOUTA.
4. Connect the EV-ADF4355-3SD1Z board to the SDP-S
board.
5. Connect the 6 V power supply to the banana connectors
and power-on the board using S1 (check that LED1 is on).
6. Connect the USB cable from the SDP-S board to the PC.
7. Run the ADF4355-3 software.
8. Select ADF4355-3 and SDP board (black) in the Select
Device and Connection tab of the software front panel
display window (see Figure 2).
9. Click the Main Controls tab, and set the VCOout (MHz)
to a frequency of 6600 MHz and the Output divider to 4
so that RFoutA (MHz) equals 1.65 GHz.
10. Click Write All Registers.
11. Connect the spectrum analyzer to SMA connector
RFOUTA+, see Figure 5 for a typical evaluation setup.
12. Measure the output spectrum and single sideband phase
noise.

Figure 7 shows a phase noise plots of the SMA RFOUTA+ at


2113.5 MHz.

Rev. 0 | Page 7 of 18

100
110
120
130
140
150
160
1k

10k

100k
1M
FREQUENCY (Hz)

10M

Figure 7. Single Sideband Phase Noise at 2113.5 MHz

100M

13451-100

To evaluate and test the performance of the ADF4355-3, use the


following procedure:

Figure 8. Evaluation Board SchematicPage 1

Rev. 0 | Page 8 of 18

+3.3V

RA3
0
DNI

CA3
1F
DNI
GND

CA2
1F
DNI
GND
1

C2

C1

OUT

GND

5 4 3 2

REFINA

GND

5
OUT+
NC GND
2
3 125MHz

DNI
7 Y1_ALT

VTUNE VCC

CA5
1F
DNI
GND

GND

CA4
1F
DNI
GND

RA2
0
DNI

REFINA AND REFINB ARE SPACED 15mm


CENTER TO CENTER ON PCB

CA1
100pF
DNI
GND
3

R8
51
DNI

R7
51
DNI

CE IN

LE IN

DATA IN

CLK IN

NC

R16
0

TP2

C44
100pF
GND

R19
1.8k
GND

GND

R23
1.8k

GND

VP

TP6

C50
0.1F
GND

CREG2

C48
10pF
GND

C37
10pF
GND

C43
10pF
GND

29
REFINA
28
REFINB
1
CLK
2
DATA
3
LE
4
CE

GND

U1

R3
0
DNI

IN

C59
0.047F
R14
360

R35
0
0201

R34
0
0201

R33
0
0201

R32
0
0201

GND

L4
4.7nH
0201
DNI

GND

L7
4.7nH
0201
DNI

GND

L6
4.7nH
0201
DNI

GND

L3
4.7nH
0201
DNI

C55
0.1F
GND
GND
AVDD1
R21
0

C54
10pF

DS1

R17
1.3k

C6
10pF
0201

L8
C63
100nH 100pF
0402
0201

VRF1

R5 VTUNE
0

C31
10pF
GND

C29
10pF
GND

C28
10pF
GND

GND

32K243-40ML5

RFOUTB

32K243-40ML5

RFOUTB+

32K243-40ML5

RFOUTA

GND

RFOUTB

GND

RFOUTB+

GND

RFOUTA

GND

C17
4.7F
GND

VREF

GND

C15
1F
DNI

VBIAS

VRF1

VRF1

C68
120pF

C67
0.1F

C66
1F

C65
120pF

C57
120pF

C58
0.1F

C21
1F

C56
120pF

GND

GND

RF CHOKE
MATCHED LINE WIDTHS
TRACE WIDTH = 380m

C19
10F
GND

VREGVCO

RFOUTA+

C30
1000pF
GND

C27
1000pF
GND

C26
0.1F
GND

LOCK DETECT

32K243-40ML5

RFOUTA+

GND

C73
10pF
DNI

R4
0

C3
10pF
0201

GND

L5
C64
100nH 100pF
0402
0201

VRF1

L2
7.4nH
0302

VRF1

R1
0
C61
470pF
GND

L1
7.4nH
0302

VRF1

C23
DNI

C60
2200pF
GND

R26
0
DNI

LOOP FILTER
PLACE ON BOTTOM SIDE
OF PCB SHIELD SIGNALS WITH VIAS

GND

C12
1F

VVCO

GND

R22
68

R20
0
DNI

IN MUXOUT

MUXOUT
RMUX
0 1

VRF
C9
1F

GND

GND

GND

CPOUT RCPOUT
0

C32
1000pF

GND

C36
1000pF

GND

C35
0.1F

C34
10pF

GND

PDRF

PDRF

R2
10k

+3.3V

GND

GND

C25
10pF

CREG1

C38
10pF

ADF4355-3BCPZ

30
25
7
5
10
17
20
24
23
19
11
12
14
15

R6
5.1k

GND

MUXOUT
CREG1
CPOUT
AVDD
VRF
VVCO
VTUNE
VBIAS
VREF
VREGVCO
RFOUTA+
RFOUTA
RFOUTB+
RFOUTB

ADF4355-3

C46
10pF
GND

C33
0.1F
GND

C53
0.1F
GND

C45
0.1F
GND

DVDD

AVDD2

TP3 TP4 TP5

GND

R25
1.5k

GND

R24
DNI

+3.3V

C41
1000pF

R10
51
DNI

REFINB

R12 +3.3V
0

5 4 3 2

C47
1F
GND

R9
51 +3.3V
DNI

C42
1000pF

R18
1.8k

C39
1000pF

R27
100

C40
1000pF

5 4

Y1

E/D
GND
6
VDD

TP1

GND
1

GND

+3.3V

R11
0

RA4
0
DNI

RA5
0
DNI

122.88MHz
2

CFO
FO

RA1
0
DNI

32
16
27
6
22
CREG2
AVDD
DVDD
VP
RSET

9
8 AGND
31 CPGND
SDGND
18
AGNDVCO
21
AGNDVCO
13
AGNDRF
26
PDBRF
PAD
PAD

+3.3V

13451-006

UG-873
EV-ADF4355-3SD1Z User Guide

EVALUATION BOARD SCHEMATICS AND ARTWORK

AVDD
DVDD
VRF
VRF1
VVCO
VP
VRVCO

G1
G2
G3
G4
G5
G6
G7
G8
G9
G10
G11
G12
G13
G14
G15
G16
G17
G18
G19
G20
G21
G22
G23
G24
G25
G26
G27
G28
G29
G30
G31
G32
G33
G34
G35
G36

1
2
3
4
5
6
7
8

P1

GND

MUX/LE

IN

GND

CVVCO
22F

RV7

GND

CVP
22F

Rev. 0 | Page 9 of 18

Figure 9. Evaluation Board SchematicPage 2


GND

CVRF1
22F

RV5
0

AVDD2

GND

CVRF
22F

GND

CDVDD
22F

GND

CAVDD
22F

GND

TP_VP

3.3V

AVDD2

RV2
0
DNI

VRF1

VRF

DVDD

TP_VRF1
RV31

TP_VRF
RV25

RV20

AVDD1

TP_DVDD

TP_AVDD2

RV14

VREF

GND

C4
1F

RV9
0
RV10
0
DNI
GND

REF

VIN

GND

PAD

EP

VR2
ADM7150ACPZ-5.0
1
VREG
3
2 VOUT
BYP
7
5
REF_SENSE EN
6
8

RV30
0

RV26

RV4
DNI

RV19
0

RV15

1k

GND

C16
10F

GND

C2
10F

RV3
0

RAVDD

R3V3

GND

C18
1F

RV27
0

GND

C5
1F

RV16
0

LED1

RV28
0
DNI
GND

RV17
0
DNI
GND

GND

VIN

GND

PAD

REF
EP

EN

BYP

VIN
GND

PAD

EP

REF_SENSE
REF

VOUT

7
8

VR5
ADM7150ACPZ-3.3
1
VREG
3
2 VOUT
BYP
7
5
REF_SENSE EN
6
8

5
6

VR3
ADM7150ACPZ-3.3
1
VREG
3
2

R_VREGVCO VREGVCO PLACE VBIAS, VREF 7 VREGVCO


RESISTORS CLOSE TO DUT PINS
0

VBIAS

R_VREF
DNI

GND

C1
10F

R_VBIAS
DNI

RV12
0

RV8
0

RV6
0

TP_+3.3V

VVCO

VP

TP_AVDD1

TP_VVCO

+ CVRVCO
22F

RV1

GND

GND

C22
10F

RV29
0

GND

C24 +
1F

C20
10F
GND

GND

C11
10F

RV18
0

C76
100F
GND

6V

C75
100F
GND

6V

6V

C14 +
1F

C8
10F
GND

GND

C10
10F

RV11
0

C13 + C74
1F
100F
GND
GND

C7
10F
GND

GND

G1
G2
G3
G4
G5
G6
G7
G8
G9
G10
G11
G12
G13
G14
G15
G16

1
2
3
4

P2

6V

GND

ZD1

RPIN18
0
DNI

VSUPPLY
DNI

IN

IN

GND

VSUPPLY_ALT

LE
MUX/LE
MUXOUT

IN

IN

IN

1
2
3

JUMPER 3 PIN
P3

CPOUT SHIELD SIGNALS WITH VIAS ALL


THE WAY TO THE DUT PINS.

VTUNE PLACE VTUNE, CPOUT AND SW


RESISTORS CLOSE TO DUT PINS

GND

1
2

1
2

GND

5 4 3 2

VSUPPLY

RVTUNE
0
DNI

GND

GND

C71
22F

S1

EV-ADF4355-3SD1Z User Guide


UG-873

13451-007

EV-ADF4355-3SD1Z User Guide


CN1

RLE
1.5k

LE

IN

DATA

IN

MUXOUT

IN

CLK

IN

RDATA
1.5k

VIO_+3.3V

RE3
TBD0603
DNI

RE1
100k

RE2
100k

GND

GND

8
1
2
3
6
7

RMUXOUT
0
RCLK
1.5k

UE1

A0 VCC
A1
5 SDA_0
A2
SDA
SCL
WP
VSS
4
24LC32A-I/MS

SDA
1

SCL

GND
SCL_0

PDRF

CE

1
R28
0
DNI

IN

R29
0
DNI
IN

R30
0
DNI
GND

LE

R31
0
DNI

IN

Figure 10. Evaluation Board SchematicPage 3

Rev. 0 | Page 10 of 18

120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
GND

CN1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
GND
13451-008

UG-873

UG-873

13451-009

EV-ADF4355-3SD1Z User Guide

Figure 11. Evaluation Board Silk ScreenTop Side

Rev. 0 | Page 11 of 18

EV-ADF4355-3SD1Z User Guide

13451-010

UG-873

Figure 12. Evaluation Board Silk ScreenBottom Side

Rev. 0 | Page 12 of 18

UG-873

13451-011

EV-ADF4355-3SD1Z User Guide

Figure 13. Evaluation Board Layer 1Primary

Rev. 0 | Page 13 of 18

EV-ADF4355-3SD1Z User Guide

13451-012

UG-873

Figure 14. Evaluation Board Layer 2Ground

Rev. 0 | Page 14 of 18

UG-873

13451-013

EV-ADF4355-3SD1Z User Guide

Figure 15. Evaluation Board Layer 3Power

Rev. 0 | Page 15 of 18

EV-ADF4355-3SD1Z User Guide

13451-014

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Figure 16. Evaluation Board Layer 4Secondary

Rev. 0 | Page 16 of 18

EV-ADF4355-3SD1Z User Guide

UG-873

ORDERING INFORMATION
BILL OF MATERIALS
Table 1.
Reference Designator
C1, C2, C7, C8, C10, C11,
C16, C20, C22
C9, C12, C21, C47, C66
C4, C5, C13, C14, C18, C24
C17
C19
C25, C28, C29, C31, C34, C37,
C38, C43, C46, C48, C54
C26
C27, C30, C32, C36,
C39 to C42
C3, C6
C33, C35, C45, C50, C53, C55,
C58, C67
C44
C56, C57, C65, C68
C59
C60
C61
C63, C64
C71
C74 to C76
CVP, CVRF, CAVDD, CDVDD,
CVRF1, CVVCO, CVRVCO
CN1

Description
Ceramic multilayer capacitor, X5R

Value
10 F

Manufacturer
TDK

Part Number
C2012X5R1E106K085AC

Ceramic capacitor, X7R


Ceramic capacitor, X8R
Ceramic capacitor, X5R
Ceramic capacitor, X5R
RF/microwave capacitor, C0G

1 F
1 F
4.7 F
10 F
10 pF

Allied Electronics
TDK
TDK
TDK
Allied Electronics

0603YC105KAT2A
C2012X8R1C105K125AB
C1608X5R1C475K080AC
C1608X5R1A106M080AC
04025U100GAT2A

Ceramic monochip capacitor, X5R


Ceramic capacitor, C0G, 0402

0.1 F
1000 pF

Murata
Murata

GRM155R61A104KA01D
GRM1555C1H102JA01

Chip ceramic capacitor, RF


Ceramic capacitor, X7R

10 pF
0.1 F

Allied Electronics
KEMET

0201ZK100GBSTR
C0402C104K4RACTU

100 pF
120 pF
0.047 F
2200 pF
470 pF
100 pF
22 F
100 F
22 F

Yageo
Murata
TDK
Multicomp
Kemet
Murata
Allied Electronics
Allied Electronics
Allied Electronics

2238 867 15101


GRM1555C1H121JA01
C1608X7R1H473K080AA
MC0603B222J500CT
C0603C471K5HACTU
GRM033R71E101KA01D
TCJC226M025R0100
TAJB107K006R
TAJB226K016R

HRS

FX8-120S-SV(21)

DS1, LED1

Ceramic capacitor, NP0


Ceramic capacitor, C0G, 0402
Ceramic capacitor, X7R, 0603
Monolithic, ceramic capacitor, X7R
Chip capacitor, X8R, 0603
Ceramic capacitor, 0201, X7R
Tantalum solid electrolytic capacitor
Tantalum chip capacitor
Tantalum surface-mount device (SMD)
capacitor
Printed circuit board (PCB), vertical type
receptacle, SMD connector
570 nm SMD (green) LED

HSMG-C170

GND

PCB single socket (black) connector

L1, L2
L5, L8
SCL, SDA, TP1 to TP6, PDRF,
TP_VP, MUXOUT, TP_VRF,
TP_DVDD, TP_VRF1, TP_VVCO,
TP_+3.3V, TP_AVDD1,
TP_AVDD2
P3
R1, R4, R5, R12, R21, RV1, RV3,
RV5 to RV9, R3V3, RV11, RV12,
RV14 to RV16, RV18 to RV20,
RV25 to RV27, RV29 to RV31,
RMUXOUT
R11, R16, RMUX,
RCPOUT, R_VREGVCO
R14
R17
R18, R19, R23
R2
R22
R25, RLE, RCLK, RDATA
R27
R32 to R35
R6

Chip inductor
Chip inductor
PCB test point connector (yellow)

Avago
Technologies
Del-Tron
Precision, Inc.
Coilcraft
Coilcraft
Components
Corporation

7.4 nH
100 nH

571-0100
0302CS-7N4XJLU
0402CS-R10XJLU
TP-104-01-04

Connector PCB, Header 3


Film SMD resistor, 0603

Molex
Multicomp

22-28-4033
MC0603WG00000T5E-TC

Thick film chip resistor

Multicomp

0402WGF0000TCE

Film SMD resistor, 0603


Film SMD resistor, 0603
Film SMD resistor, 0603
Thick film chip resistor
Film SMD resistor, 0603
Precision thick film chip resistor, R0805
High-frequency thin film chip resistor
Chip SMD resistor, 0201
STD thick film chip resistor

360
1.3 k
1.8 k
10 k
68
1.5 k
100
0
5.1 k

Multicomp
Vishay Dale
Multicomp
Multicomp
Multicomp
Panasonic
Vishay
Panasonic
Vishay

MC 0.063W 0603 1% 360R


CRCW06031K30FKEA
MC 0.063W 0603 1% 1K8
MC 0.063W 0603 1% 10K
MC 0.063W 0603 1% 68R
ERJ-6ENF1501V
FC0402E1000BST1
ERJ-1GE0R00C
CRCW04025K10FKED

Rev. 0 | Page 17 of 18

UG-873
Reference Designator
RAVDD
RE1, RE2
REFINA, REFINB
RFOUTA+, RFOUTA,
RFOUTB+, RFOUTB
S1
U1
UE1
VR2

EV-ADF4355-3SD1Z User Guide


Description
Precision thick film chip resistor, R0805
Precision thick film chip resistor, R0805
PCB coaxial SMA end launch connector
PCB SMA RA jack connector
SW SPST momentary
Microwave wideband synthesizer with
integrated VCO
IC 32 kB serial EEPROM

VSUPPLY_ALT

800 mA, ultralow noise high power


supply rejection ratio (PSRR), 5.0 V
output RF linear regulator
800 mA, ultralow noise high PSRR, 3.3 V
output RF linear regulator
PCB single socket( red) connector

Y1

IC crystal LVPECL, LVDS oscillator

ZD1
VSUPPLY

BZX84C 6.8 V Zener SOT-23 diode


PCB coaxial SMA end launch connector

VR3, VR5

Value
1 k
100 k

Manufacturer
Panasonic
Panasonic
Johnson
Rosenberger

Part Number
ERJ-6ENF1001V
ERJ-6ENF1003V
142-0701-801
32K243-40ML5

Alcoswitch
Analog Devices

ADF4355-3BCPZ

TT11AGPC-1

Microchip
Technology, Inc.
Analog Devices

24LC32A-I/MS

Analog Devices

ADM7150ACPZ-3.3

Del-Tron
Precision, Inc.
Vectron
International
Philips
Johnson

571-0500

ADM7150ACPZ-5.0

VCC6-LAB-122M880000
BZX84-C6V8
DNI

ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
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By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the Evaluation Board), you are agreeing to be bound by the terms and conditions
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have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (Customer) and Analog Devices, Inc.
(ADI), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
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2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG13451-0-8/15(0)

Rev. 0 | Page 18 of 18