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Application Notes

P44x/EN AP/E33

MiCOM P441/P442 & P444

APPLICATION NOTES

Application Notes

P44x/EN AP/E33

MiCOM P441/P442 & P444

Page 1/220

CONTENT
1.

INTRODUCTION

7

1.1

Protection of overhead lines and cable circuits

7

1.2

MiCOM distance relay

7

1.2.1

Protection Features

8

1.2.2

Non-Protection Features

9

1.2.3

Additional Features for the P441 Relay Model

9

1.2.4

Additional Features for the P442 Relay Model

9

1.2.5

Additional Features for the P444 Relay Model

10

1.3

Remark

10

2.

APPLICATION OF INDIVIDUAL PROTECTION FUNCTIONS

11

2.1

Configuration column

11

2.2

Phase fault distance protection

12

2.3

Earth fault distance protection

13

2.4

Consistency between zones

14

2.5

General Distance Trip logic

15

2.5.1

Equation

15

2.5.2

Inputs

15

2.5.3

Outputs

16

2.6

Type of trip

16

2.6.1

Inputs

16

2.6.2

Outputs

16

2.7

Distance zone settings

16

2.7.1

Settings table

17

2.7.2

Zone Logic Applied

19

2.7.3

Zone Reaches

22

2.7.4

Zone Time Delay Settings

24

2.7.5

Residual Compensation for Earth Fault Elements

24

2.7.6

Resistive Reach Calculation - Phase Fault Elements

25

2.7.7

Resistive Reach Calculation - Earth Fault Elements

27

2.7.8

Effects of Mutual Coupling on Distance Settings

27

2.7.9

Effect of Mutual Coupling on Zone 1 Setting

27

2.7.10

Effect of Mutual Coupling on Zone 2 Setting

28

2.8

Distance protection schemes

29

2.8.1

Settings

30

2.8.2

Carrier send & Trip logic

31

2.8.3

The Basic Scheme

33

2.8.4

Zone 1 Extension Scheme

36

2.8.5

Loss of Load Accelerated Tripping (LoL)

38

P44x/EN AP/E33
Page 2/220

Application Notes
MiCOM P441/P442 & P444

2.9

Channel-aided distance schemes

41

2.9.1

Permissive Underreach Transfer Trip Schemes PUP Z2 and PUP Fwd

41

2.9.2

Permissive Overreach Transfer Trip Schemes POP Z2 and POP Z1

44

2.9.3

Permissive Overreach Schemes Weak Infeed Features

46

2.9.4

Permissive Scheme Unblocking Logic

49

2.9.5

Blocking Schemes BOP Z2 and BOP Z1

53

2.10

Distance schemes current reversal guard logic

56

2.10.1

Permissive Overreach Schemes Current Reversal Guard

56

2.10.2

Blocking Scheme Current Reversal Guard

56

2.11

Distance schemes in the “open” programming mode

57

2.12

Switch On To Fault and Trip On Reclose protection

57

2.12.1

Initiating TOR/SOTF Protection

59

2.12.2

TOR-SOTF Trip Logic

61

2.12.3

Switch on to Fault and Trip on Reclose by I>3 Overcurrent Element (not filtered for
inruch current):

63

2.12.4

Switch on to Fault and Trip on Reclose by Level Detectors

63

2.12.5

Setting Guidelines

65

2.12.6

Inputs /Outputs in SOTF-TOR DDB Logic

66

2.13

Power swing blocking (PSB)

67

2.13.1

The Power Swing Blocking Element

68

2.13.2

Unblocking of the Relay for Faults During Power Swings

69

2.13.3

Typical Current Settings

72

2.13.4

Removal of PSB to Allow Tripping for Prolonged Power Swings

72

2.14

Directional and non-directional overcurrent protection

72

2.14.1

Application of Timer Hold Facility

75

2.14.2

Directional Overcurrent Protection

75

2.14.3

Time Delay VTS

75

2.14.4

Setting Guidelines

75

2.15

Negative sequence overcurrent protection (NPS)

78

2.15.1

Setting Guidelines

78

2.15.2

Negative phase sequence current threshold, ‘I2> Current Set’

79

2.15.3

Time Delay for the Negative Phase Sequence Overcurrent Element, ‘I2> Time Delay’

79

2.15.4

Directionalising the Negative Phase Sequence Overcurrent Element

79

2.16

Broken conductor detection

80

2.16.1

Setting Guidelines

80

2.16.2

Example Setting

81

2.17

Directional and non-directional earth fault protection

82

2.17.1

Directional Earth Fault Protection (DEF)

84

2.17.2

Application of Zero Sequence Polarising

84

2.17.3

Application of Negative Sequence Polarising

85

6 Zone 2 Phase Reach Settings 100 3.1 Breaker Failure Protection Configurations 92 2.1 Setting Guidelines 91 2.1 Distance Protection Setting Example 99 3.2 System Data 99 3.5 Zone 1 Phase Reach Settings 100 3.1.1 Objective 99 3.21 Circuit breaker fail protection (CBF) 92 2.20.19 Undervoltage protection 90 2.1 Setting Guidelines 92 2.10 Residual Compensation for Earth Fault Elements 101 3.12 Power Swing Band 102 3.2.18.1.7 Zone 3 Phase Reach Settings 100 3.1.2 Reset Mechanisms for Breaker Fail Timers 94 2.21.3 Permissive Underreach Schemes 104 3.1.1.1 The Apparent Impedance Seen by the Distance Elements 103 3.2.1.20 Overvoltage protection 91 2.3 Relay Settings 99 3.21.1 Mutual Coupling 109 4.21.2.3 Aided DEF Blocking Scheme 88 2.2 Aided DEF Permissive Overreach Scheme 87 2.1 Fault locator 108 4.1.1.11 Resistive Reach Calculations 101 3.1.13 Current Reversal Guard 102 3.18.1.3 Alternative setting groups 105 3.19.1.1 Polarising the Directional Decision 86 2.1.1 Selection of Setting Groups 106 4.1.3 Typical settings 98 3.2.3.1. APPLICATION OF NON-PROTECTION FUNCTIONS 4.1.18 Aided DEF protection schemes 85 2.2 Setting Guidelines 109 108 .2 Teed feeder protection 103 3.Application Notes MiCOM P441/P442 & P444 P44x/EN AP/E33 Page 3/220 2.14 Instantaneous Overcurrent Protection 102 3.4 Blocking Schemes 105 3.2 Permissive Overreach Schemes 103 3.8 Zone 4 Reverse Settings with no Weak Infeed Logic Selected 100 3. OTHER PROTECTION CONSIDERATIONS-SETTINGS EXAMPLE 99 3.18.1.9 Zone 4 Reverse Settings with Weak Infeed Logic Selected 100 3.4 Line Impedance 99 3.

5 Logic inputs / Outputs from synchrocheck function 123 4.1 Circuit Breaker Condition Monitoring Features 157 4.4.6.11 Dead Timer Setting 150 4.1 Circuit Breaker State Monitoring Features 152 4.2 The internal detection FUSE Failure condition 112 4.3.5.7.2.P44x/EN AP/E33 Page 4/220 Application Notes MiCOM P441/P442 & P444 4.6 Circuit breaker state monitoring 152 4.2.5.4.9 Choice of Protection Elements to Initiate Autoreclosure 149 4.2 Inputs / outputs DDB for CB logic: 156 4.7.1 VTS logic description 110 4.4.4 Check Synchronism Settings 119 4.7 Menu Settings 114 4.12 De-Ionising Time 150 4.7.5.8 INPUT / OUTPUT used in VTS logic: 115 4.2 Setting guidelines 159 4.5.5.4.5.5.8 Setting Guidelines 149 4.7 Logical Outputs generated by the Autoreclose logic 142 4.7.4 Scheme for Three Phase Trips 134 4.5.5.5 Scheme for Single Pole Trips 134 4.7.2.2.3 Current Transformer Supervision (CTS) 115 4.5.2.5.5 Setting the Excessive Fault Frequency Thresholds 160 4.5 Loss of All Three Phase Voltages Under Load Conditions 113 4.7.4.2.4 Setting the Operating Time Thresholds 160 4.2 Setting the CT Supervision Element 116 4.4 Check synchronisation 116 4.3 Auto-reclose logic operating sequence 128 4.4 Loss of One or Two Phase Voltages 113 4.1 Autorecloser Functional Description 125 4.2 Voltage transformer supervision (VTS) – Main VT for minZ measurement 110 4.5.10 Number of Shots 149 4.7 Circuit breaker condition monitoring 157 4.2.2.1 Dead Busbar and Dead Line 118 4.3 Dead Busbar and Live Line 118 4.13 Reclaim Timer Setting 151 4.2 Live Busbar and Dead Line 118 4.5 Autorecloser 125 4.6 Logical Inputs used by the Autoreclose logic 136 4.3.3 Fuse Failure Alarm reset 112 4.1 The CT Supervision Feature 115 4.6 Absence of Three Phase Voltages Upon Line Energisation 113 4.6 Inputs/Outputs for CB Monitoring logic 160 .2 Benefits of Autoreclosure 127 4.5.3 Setting the Number of Operations Thresholds 159 4.6.

9.7 Maintenance Reports 169 4.6 Fault Records 169 4.2 Settings & DDB cells assigned to zero sequence power (ZSP) function 177 5.1 HOW TO USE PSL Editor? 180 6.6 Fault recorder trigger 188 7. 167 4.5 Programmable led output mapping 188 6.9.2 Settings & DDB cells assigned to Capacitive Voltage Transformers Supervision (CVT) function 179 175 6. PROGRAMMABLE SCHEME LOGIC DEFAULT SETTINGS 180 6.1 Maximum of Residual Power Protection – Zero Sequence Power Protection 175 5.2 CT Knee Point Voltage for Earth Fault Distance Protection 189 7.9.1.3 Relay Alarm conditions.4 Protection Element Starts and Trips 168 4.1.9.1 Function description 175 5.9.9.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 5/220 4.9. 168 4.2 Logic input mapping 182 6.3 Recommended CT classes (British and IEC) 189 7.2. NEW ADDITIONAL FUNCTIONS – VERSION C1.3 Relay output contact mapping 185 6.2.9 Event Recorder 165 4.9.4 Relay output conditioning 186 6.1 CT Knee Point Voltage for Phase Fault Distance Protection 189 7.1 Change of state of opto-isolated inputs. 167 4.9.5 General Events 168 4. CURRENT TRANSFORMER REQUIREMENTS 7. DDB DESCRIPTION FOR ALL TYPES P441/P442 & P444 MODELS 189 189 .10 Viewing Event Records via MiCOM S1 Support Software 170 4.8 Circuit Breaker Control 161 4.9 Resetting of Event / Fault Records 169 4.X 5.4 Determining Vk for an IEEE “C" class CT 189 8.10 Disturbance recorder 171 5.8 Setting Changes 169 4.2 Capacitive Voltage Transformers Supervision (CVT) 178 5.1 Function description 178 5.2 Change of state of one or more output relay contacts.9.

P44x/EN AP/E33 Application Notes Page 6/220 MiCOM P441/P442 & P444 BLANK PAGE .

Also. Physical distance must also be taken into account. Where systems are not highly interconnected the use of single phase tripping and high speed autoreclosure is commonly used. For distribution systems. MiCOM relays include devices designed for application to a wide range of power system plant such as motors. The protection requirements for sub-transmission and higher voltage systems must also take into account system stability. Methods such as resistance earthing make the detection of earth faults difficult. feeders. and multi-shot autoreclose cycles are commonly used in conjunction with instantaneous tripping elements to increase system availability. Thus. Using advanced numerical technology. generators. It is therefore essential that the protection associated with them provides secure and reliable operation. or its buried joints. This not only puts the onus on the security of signalling equipment but also on the protection in the event of loss of this signal. Underground cables are vulnerable to mechanical damage. maybe of signalling equipment or switchgear. Many power systems use earthing arrangements designed to limit the passage of earth fault current.2 MiCOM distance relay MiCOM relays are a range of products from T&D EAI. . continuity of supply is of para mount importance. such as disturbance by construction work or ground subsidence.Application Notes MiCOM P441/P442 & P444 1. In the event of equipment failure. overhead lines and cables.1 Protection of overhead lines and cable circuits P44x/EN AP/E33 Page 7/220 Overhead lines are amongst the most fault susceptible items of plant in a modern power system. The relay also includes a comprehensive range of non-protection features to aid with power system diagnosis and fault analysis. backup protection is an important feature of any protection scheme. This in turn dictates the need for high speed protection to reduce overall fault clearance times. INTRODUCTION 1. Overhead lines can be hundreds of kilometres in length. etc. The relay series has been designed to cater for the protection of a wide range of overhead lines and underground cables from distribution to transmission voltage levels. faults can be caused by ingress of ground moisture into the cable insulation. If high speed. Each relay is designed around a common hardware and software platform in order to achieve a high degree of commonality between products. high speed. One such product in the range is the series of distance relays. it is necessary to provide alternative forms of fault clearance. Fast fault clearance is essential to limit extensive damage. discriminative protection is to be applied it will be necessary to transfer information between the line ends. It is desirable to provide backup protection which can operate with minimum time delay and yet discriminate with the main protection and protection elsewhere on the system. All these features can be accessed remotely from one of the relays remote serial communications options. fault clearance is often a fundamental requirement of any protection scheme on a distribution network. The majority of faults on overhead lines are transient or semi-permanent in nature. Special protection elements are often used to meet such onerous protection requirements. and avoid the risk of fire. 1. Thus.

configurable to measure either phase to phase or phase to neutral voltage.To raise an alarm should one or more of the connections from the phase CTs become faulty. The P442 and P444 models can provide single and three pole tripping. Two stages are provided. The fourth element can be configured for stub bus protection in 1½ circuit breaker arrangements. with independent directional control for the 1st and 2nd element. To detect VT fuse failures.These settings enhance the protection applied for manual circuit breaker closure.Two stage.This element can provide backup protection for many unbalanced fault conditions. plus two elements are available for backup DEF. • 27 : Undervoltage Protection . • 50/51 : Instantaneous and time delayed overcurrent protection .1 Application Notes MiCOM P441/P442 & P444 Protection Features The distance relays offer a comprehensive range of protection functions.These settings enhance the protection applied on autoreclosure of the circuit breaker. • 50/27 : Switch on to fault (SOTF) protection .Two stage. eliminated without communication channel.This can be configured for channel aided protection. should the circuit breaker at the protected terminal fail to trip. The protection features of each model are summarised below: • 21G/21P : Phase and earth fault distance protection. Standard and customised signalling schemes are available to give fast fault clearance for the whole of the protected line or cable. • 32N : Maximum of Residual Power Protection . . From version C1. P442 and P444. configurable to measure either phase to phase or phase to neutral voltage.Zero sequence Power Protection This element can provide protection element for high resistance fault. • 50N/51N : Instantaneous and time delayed neutral overcurrent protection. • 67/46 : Directional or non-directional negative sequence overcurrent protection . • 78 : Power swing blocking . • CTS : Current transformer supervision . The P441 model provides three pole tripping only. the P441. where a conductor may be broken but not in contact with another conductor or the earth. • 67N : Directional earth fault protection (DEF) . • 59 : Overvoltage Protection .2.To detect network faults such as open circuits.Selective blocking of distance protection zones ensures stability during the power swings experienced on sub-transmission and transmission systems.P44x/EN AP/E33 Page 8/220 1.Generally set to backtrip upstream circuit breakers. There are 3 separate models available. Two element are available and four threshold from next version C1. the relay can differentiate between a stable power swing and a loss of synchronism (out of steps). • VTS : Voltage transformer supervision (VTS).Four elements are available. This prevents maloperation of voltage dependent protection on AC voltage input failure. each with up to 5 independent zones of protection. for application to many overhead line and underground cable circuits. The 3rd element can be used for SOFT/TOR logic. • 50/27 :Trip on reclose (TOR) protection .0 (model 020G or 020H). Stage 1 may be selected as either IDMT or DT and stage 2 is DT only. • 50 BF : Circuit breaker failure protection . Stage 1 may be selected as either IDMT or DT and stage 2 is DT only.0. • 46 BC : Broken conductor detection .

and dead bus/live line interlocking available.Opening and closing of the circuit breaker can be achieved either locally via the user interface / opto inputs.3 1. • Commissioning Test Facilities. • Circuit Breaker Control . • Remote Serial Communications . IEC60870-5/103 and DNP3 (UCA2 soon available). available for display on the relay or accessed from the serial communications facility. Additional Features for the P441 Relay Model • 8 Logic Inputs .For monitoring of the circuit breaker and other plant status. • Fibre optic converter for IEC60870-5/103 communication (optional). • Circuit Breaker State Monitoring . • Circuit Breaker Condition Monitoring . MODBUS. with voltage synchronism. • Second rear port in COURIER Protocol (KBus/RS232/RS485) • 16 Logic Inputs . Check synchronism is optional. - For tripping.Reading in km.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 1. sum of the interrupted current and the breaker operating time. • Four Setting Groups . alarming. miles or % of line length.To allow remote access to the relays. differential voltage. • 21 Output relay contacts control.Selected measurement values polled at the line/cable terminal. • Measurements . status indication and remote Additional Features for the P442 Relay Model • Single pole tripping and autoreclose.Independent setting groups to cater for alternative power system arrangements or customer specific applications.This permits up to 4 reclose shots. - For tripping.4 • 79/25 : Autoreclosure with Check synchronism . or remotely via serial communications. status indication and remote .2.Provides records / alarm outputs regarding the number of CB operations. • Continuous Self Monitoring .Available from the serial communications or on the relay display (fault and event records only). • Distance to fault locator . live line/dead bus. alarming. • Fault/Event/Disturbance Records .Power on diagnostics and self checking routines to provide maximum relay reliability and availability.2. • 14 Output relay contacts control. The following communications protocols are supported: Courier.For monitoring of the circuit breaker and other plant status.2 Page 9/220 Non-Protection Features The P441.2.Time synchronisation is possible from the relay IRIG-B input. • Real Time Clock Synchronisation . P442 and P444 relays have the following non-protection features: 1. (IRIG-B must be specified as an option at time of order).Provides indication of any discrepancy between circuit breaker auxiliary contacts.

For monitoring of the circuit breaker and other plant status.5 1. status indication and remote Remark The PSL screen copy extracted from S1. (IRIG-B must be specified as an option at time of order). • Fibre optic converter for IEC60870-5/103 communication (optional). - For tripping. • Second rear port in COURIER Protocol (KBus/RS232/RS485) • 24 Logic Inputs . uses the different types of model P44x (07.3 MiCOM P441/P442 & P444 Additional Features for the P444 Relay Model • Single pole tripping and autoreclose. • Real Time Clock Synchronisation .Time synchronisation is possible from the relay IRIG-B input. alarming. Example : check synch OK (model 07) = DDB204 check synch OK (model 09) = DDB236 .P44x/EN AP/E33 Application Notes Page 10/220 1. 09…). (See the DDB equivalent table with the different model number).2. • 32 Output relay contacts control.

1 Configuration column The following table shows the Configuration column:Menu text Default setting Available settings Restore Defaults No Operation No Operation All Settings Setting Group 1 Setting Group 2 Setting Group 3 Setting Group 4 Setting Group Select via Menu Select via Menu Select via Optos Active Settings Group 1 Group1 Group 2 Group 3 Group 4 Save Changes No Operation No Operation Save Abort Copy From Group 1 Group1.2. 2.2. As this affects the operation of each of the individual protection functions. P442 and P444 relays each include a column in the menu called the ‘CONFIGURATION’ column.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 2. power (*) Disabled Enabled or Disabled Volt Protection Disabled Enabled or Disabled CB Fail & I< Enabled Enabled or Disabled Supervision Enabled Enabled or Disabled System Checks Disabled Enabled or Disabled CONFIGURATION . it is described in the following section. The P441.3 or 4 Copy To No Operation No Operation Group1.3 or 4 Setting Group 1 Enabled Enabled or Disabled Setting Group 2 Disabled Enabled or Disabled Setting Group 3 Disabled Enabled or Disabled Setting Group 4 Disabled Enabled or Disabled Distance Enabled Enabled or Disabled Power Swing Enabled Enabled or Disabled Back-up I> Disabled Enabled or Disabled Neg Sequence O/C Disabled Enabled or Disabled Broken Conductor Disabled Enabled or Disabled Earth Fault O/C Disabled Enabled or Disabled Aided DEF Enabled Enabled or Disabled Zero Seq. Each section also gives an extract from the respective menu columns to demonstrate how the settings are applied to the relay. Page 11/220 APPLICATION OF INDIVIDUAL PROTECTION FUNCTIONS The following sections detail the individual protection functions in addition to where and how they may be applied.

Any of the functions that are disabled or made invisible from this column do not then appear within the main relay menu. X( /phase) ZONE 3 ZONE P ZONE 2 ZONE 1X ZONE 1 R1Ph/2 R2Ph/2 RpPh/2 R3Ph/2 = R4Ph/2 R ( /phase) ZONE 4 P0470ENa FIGURE 1 – PHASE/PHASE FAULT QUADRILATERAL CHARACTERISTICS ( /PHASE SCHEME) Remarks: 1. are in ohms loop. The angle of the start element (Quad) is the angle of the positive impedance of the line (value adjusted in the settings) .2 Phase fault distance protection The P441. P442 and P444 relays have 5 zones of phase fault protection. 2.P44x/EN AP/E33 Application Notes Page 12/220 MiCOM P441/P442 & P444 Menu text Default setting Available settings Internal A/R Disabled Enabled or Disabled Input Labels Visible Invisible or Visible Output Labels Visible Invisible or Visible CT & VT Ratios Visible Invisible or Visible Event Recorder Invisible Invisible or Visible Disturb Recorder Invisible Invisible or Visible Measure’t Setup Invisible Invisible or Visible Comms Settings Visible Invisible or Visible Commission Tests Visible Invisible or Visible Setting Values Primary Primary or Secondary (*) from B1. 3. In a Ω/phase scheme the R value must be divided by 2 (for phase/phase diagram). as shown in the impedance plot Figure 1 below. R limit value in MiCOM S1. 2.0 The aim of the Configuration column is to allow general configuration of the relay from a single point in the menu.

6. The angle of the start element (Quad) is the angle of the 2Z1+Z0 (Z1: positive sequence Z. Note that zone 3 and zone 4 can be set with same Rloop value to provide a general start of the relay. Selectable in MiCOM S1 (Distance scheme\Fault type) as a directional forward or reverse zone. Z0: zero sequence Z) 3.5. and are directionalied as follows: • Zones 1.2). See calculation of KZ in section 2.5. as used in conventional three zone distance schemes.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 13/220 All phase fault protection elements are quadrilateral shaped. • Zone 4 . • Zone P . 2 and 3 . In a Ω/phase scheme the R value must be divided by 1+KZ (for phase/ground diagram) 2. See also the "Commissioning Test" chapter. Note that Zone 1 can be extended to Zone 1X when required in zone 1 extension schemes (see page 17 §2.Directional reverse zone. P442 and P444 relays have 5 zones of earth (ground) fault protection. .Directional forward zones. Earth fault distance protection The P441. as shown in the earth loop impedance plot Figure 2 below. Remark: 2.3 If any zone i presents a Rloop i bigger than R3=R4. Type of fault can be selected in MiCOM S1 (only Phase/Phase or P/P & P/Ground) X( /phase) ZONE 3 ZONE P (Programmable) ZONE 2 ZONE 1X ZONE 1 R1G 1+KZ 1 R2G 1+KZ 2 RpG R3G = R4G 1+KZ 1+KZ 1+KZ p 3/4 3/4 R( /phase) ZONE P Reverse ZONE 4 P0471ENa FIGURE 2 – PHASE/GROUND FAULT QUADRILATERAL CHARACTERISTICS ( /PHASE SCHEME) Remarks: 1.Programmable. the limit of the start is always given by R3.

The residual compensation factors are as follows: 2. Conventional rules are used as follows: − Distance Timers are initiated as soon as the relay has picked up – CVMR pickup distance (CVMR = Start & Convergence) − The minimum tripping time even with Carrier received is T1 − Zone 4 is always Reverse .P44x/EN AP/E33 Application Notes Page 14/220 MiCOM P441/P442 & P444 All earth fault protection elements are quadrilateral shaped.2 X √3 IN) − R3Ph < UN / (1.0) 3.Shared by zones 3 and 4. • kZ2 .0.For zone 2. If Z3 is disabled. Consistency between zones In order to understand how the different distance zones interact the parameters below should be considered: • • If Zp is a forward zone − Z1 ! Z2 < Zp < Z3 − tZ1 < tZ2 < tZp < tZ3 − R1G < R2G < RpG < R3G = R4G − R1Ph < R1extPh < R2Ph < RpPh < R3Ph If Zp is a reverse zone − Z1 < Z2 < Z3 − Zp > Z4 − tZ1 < tZ2 < tZ3 − tZp < tZ4 − R1G < R2G < R3G − RpG < R3G = R4G − R1Ph < R2Ph < R3Ph − RpPh < R3Ph = R4Ph − R3G < UN / (1.2 X √3 IN) Remarks: 1.For zone 1 (and zone 1X).For zone P. If Z4 is disabled.4 • kZ1 . • kZ3/4 . and are directionalised as per the phase fault elements. the directional limit is: 0° (when Z4 is selected: disable). the forward limit element becomes the smaller zone Z2. the directional limit for the forward zone is: 30° (since version A4. The reaches of the earth fault elements use residual compensation of the corresponding phase fault reach. For older version than A4.(or Zp if selected forward) 2. • kZp .

1.Tzp + Z4'.1 Equation Page 15/220 Z1'.5 General Distance Trip logic 2.UNB_Alarm).Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 2.5.7.5. With the inputs/outputs described above: 2.T4 [(*) from version A2.10 & A3.21 Forward’ Internal logic Fwd Fault Detection l (lockout by reversal guard) UNB_CR Internal logic Carrier Received INP_COS TS Opto Carrier Out of Service CSZ1 Configuration Carrier send in case of zone 1 decision CSZ2 Configuration Carrier send in case of zone 2 decision CSZ4 Configuration Carrier send in case of zone 4 decision (Reverse) None Configuration Scheme without carrier PZ1 Configuration Permissive scheme Z1 PZ2 Configuration Permissive scheme Z2 PFwd Configuration Permissive Scheme with directional Fwd BZ1 Configuration Blocking scheme Z1 BZ2 Configuration Blocking scheme Z2 INP_Z1EXT Internal logic Zone extension (digital input assigned to an opto by dedicated PSL) Z1xChannel Fail Configuration Z1x logic enabled if channel fail detected (Carrier out of service = COS) UNBAlarm Carrier Out Of Service Internal logic (*) the use of an apostrophe in the above logic (Z'1) is explained in section 2.Z2'+PFwd. PZ1 + Z1x'.Aval’] + UNB_CR .Z’ logic description) Remarks: 4. In the column Data Type:"Configuration" means MiCOM S1 Setting (the parameter is present in the settings).T3 + Zp' .T1.7.BZ1 + (Z2'. INP_COS (*)]) + T2 [ Z2' + PZ1.1] (See Figure 3 in section 2.2.[ PZ1.2.Z1' + BZ1.[ Z1'.Z1'] + Z3'.[ T1.7. the logic swap back to a basic scheme. 5.Z1'+PZ2. INP_Z1EXT] + UNB_CR.BZ2.T1. In case of COS (carrier out of service).(Tp +INP_COS(*)).1 Figure 3 .T1.(None + Z1xSiAnomTac.2 Inputs Data Type Description T1 to T4 Internal logic Elapse of Distance Timer 1 to 4 (T1/T2/T3/TZp/T4) Tp Internal logic Elapse of transmission time in blocking scheme Z1' to Z4' (*) Internal logic Detection of fault in zones 1 to 4 (lock out by PSWing or Rev Guard) – See figure 3 section 2. BZ1 .

6 Type of trip 1 : Trip 1P if selected in MiCOM S1 otherwise trip 3P 3 : Trip 3P 2. and that zones 2 and 4 will need to be enabled if required for use in channel aided schemes. .6. setting bits to 0 will disable that distance zones.6.3 MiCOM P441/P442 & P444 Outputs Data Type Description Internal logic Distance protection Trip Single Pole Z1 Single pole Z2 T1 T2 Tzp T3 T4 0 1 1 1 3 3 3 1 0 1 3 3 3 3 0 0 3 3 3 3 3 PDist_Dec 2.5.P44x/EN AP/E33 Application Notes Page 16/220 2. Setting the relevant bit to 1 will enable that zone.2 2. Note that zone 1 is always enabled.7 Inputs Data Type Description INP_Dist_Timer_Block TS opto Input for blocking the distance function Single Pole T1 Configuration Trip 1pole at T1 – 3P in other cases Single Pole T1 & T2 Configuration Trip 1pole at T1 /T2 – 3P in other cases PDist_Trip Internal Logic Trip by Distance protection T1 to T4 Internal Logic End of distance timer by Zone Fault A Internal Logic Phase A selection Fault B Internal Logic Phase B selection Fault C Internal Logic Phase C selection Data Type Description PDist_Trip A Internal Logic Trip Order phase A PDist_Trip B Internal Logic Trip Order phase B PDist_Trip C Internal Logic Trip Order phase C Outputs Distance zone settings NOTE: Individual distance protection zones can be enabled or disabled by means of the Zone Status function links.1 2.

Application Notes

P44x/EN AP/E33

MiCOM P441/P442 & P444

Remarks:

2.7.1

Page 17/220

1. .Z3 disable means Fwd start becomes Zp
.Z3 & Zp Fwd disable means Fwd start becomes Z2
.Z3 & Zp Fwd & Z2 disable means Fwd start becomes Z1
2. Z4 disable (see remark 1/2/3 in section 2.4)

Settings table
Menu text

Default setting

Setting range

Step size

Min

Max

GROUP 1
DISTANCE ELEMENTS
LINE SETTING
Line Length

1000 km
(625 miles)

0.3 km
(0.2 mile)

1000 km
(625 miles)

0.010 km
(0.005 mile)

Line Impedance

12/In Ω

0.001/In Ω

500/In Ω

0.001/In Ω

Line Angle

70°

–90°

+90°

0.1°

Zone Status

00011111

Bit 0: Z1X Enable, Bit 1: Z2 Enable,
Bit 2: Zone P Enable, Bit 3: Z3 Enable,
Bit 4: Z4 Enable.

KZ1 Res Comp

1

0

7

0.001

KZ1 Angle

360°

0.1°

Z1

10/In Ω

0.001/In Ω

500/In Ω

0.001/In Ω

Z1X

15/In Ω

0.001/In Ω

500/In Ω

0.001/In Ω

R1G

10/In Ω

0

400/In Ω

0.01/In Ω

R1Ph

10/In Ω

0

400/In Ω

0.01/In Ω

tZ1

0

0

10s

0.002s

KZ2 Res Comp

1

0

7

0.001

KZ2 Angle

360°

0.1°

Z2

20/In Ω

0.001/In Ω

500/In Ω

0.001/In Ω

R2G

20/In Ω

0

400/In Ω

0.01/In Ω

R2Ph

20/In Ω

0

400/In Ω

0.01/In Ω

tZ2

0.2s

0

10s

0.01s

KZ3/4 Res Comp

1

0

7

0.01

Zone Setting

P44x/EN AP/E33

Application Notes

Page 18/220

MiCOM P441/P442 & P444

Menu text

Default setting

Setting range

Step size

Min

Max

KZ3/4 Angle

360°

0.1°

Z3

30/In Ω

0.001/In Ω

500/In Ω

0.001/In Ω

R3G - R4G

30/In Ω

0

400/In Ω

0.01/In Ω

R3Ph - R4Ph

30/In Ω

0

400/In Ω

0.01/In Ω

tZ3

0.6s

0

10s

0.01s

Z4

40/In Ω

0.001/In Ω

500/In Ω

0.01/In Ω

tZ4

1s

0

10s

0.01s

Zone P - Direct.

Directional Fwd

Directional Fwd or Directional Rev

KZp Res Comp

1

0

7

0.001

KZp Angle

360°

0.1°

Zp

25/In Ω

0.001/In Ω

500/In Ω

0.001/In Ω

RpG

25/In Ω

0

400/In Ω

0.01/In Ω

RpPh

25/In Ω

0

400/In Ω

0.01/In Ω

tZp

0.4s

0

10s

0.01s

Serial Cmp.line (*)

Disable

Enable

Disable

Overlap Z Mode (*)

Disable

Enable

Disable

KZm Mutual Comp

0

0

7

0.001

KZm Angle

360°

0.1°

Fault Locator

(*) Serial Cmp. Line
(*) Overlap Z Mode

Enabled
Enabled

(*) These parameters are available from version A4.0 onwards

Serial Compensated Line : If enabled, the Directional used in the Deltas Algorithms is
set at 90°
(Fwd = Quad1&4 / Rev = Quad 2&3)
X

REV

FWD

R
REV

FWD

P0472ENa

Application Notes

P44x/EN AP/E33

MiCOM P441/P442 & P444

Page 19/220

If disable, the Directional of the Deltas algorithms is set at -30° like conventional
algorithms
X

FWD

FWD

R
REV

FWD
REV

-30˚

P0473ENa


2.7.2

Overlap Z Mode: If enable, for a fault in Zp (fwd), then Z1 & Z2 will be displayed in
LCD/Events/Drec – The internal logic is not modified

Zone Logic Applied
Normally the zone logic used by the distance algorithm is as below:

Z1'
Z2'
Z4'
P0462XXa

(with overlap logic the Z2 will cover also the Z1)
2.7.2.1

Zone Logic
The relay internal logic will modify the zones & directionality under the following conditions:

Power swing detection

Settings about blocking logic during Power swing

Reversal Guard Timer

Type of Logical transmission scheme

For Power swing, two signals are considered:

Presence of Power swing

Unblocking during power swing

During Power swing the zones are blocked; but can be unblocked with:

Start of unblocking logic

Unblocking logic enable in MiCOM S1 on the concerned zone or all zones

During the Reversal guard logic (in case of parallel lines), the reverse directional decision is
latched (until that timer is issued) from the switch from Reverse to Forward (for distance
scheme with Z1>ZL).

P44x/EN AP/E33

Application Notes

Page 20/220

MiCOM P441/P442 & P444
Z1x

unblock PS
in Z1

&

Z1x'

&

Z1'

&

Z2'

&

Forward'

≥1

Z1<ZL

≥1

&

1
Z1

Reversal
Guard

&
≥1

PermZ2
Power
Swing
Unblock PS

≥1

unblock PS
in Z2

≥1

Z2

&
≥1

PermFwd
Forward

unblock PS
in Z3

≥1

Z3

unblock PS
in Z4

&
Z2'

Z3'

&

Z4'

≥1

Z4
Zp_Fwd
unblock PS
in Zp

&
≥1

Zp

Reverse

≥1

&

Zp'

Reverse'

P0474ENa

FIGURE 3 - ZONES UNBLOCKING/BLOCKING LOGIC WITH POWER SWING OR REVERSAL GUARD

(*) (**) Usefull for dedicated logic designed in PSL Facility in Commissioning Test For Aided Distace Scheme – See description in the TRIP LOGIC Table (section 2.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 2.8.2 Page 21/220 Inputs Data Type Description Z1 Internal Logic Fault detected in zone 1 Z1x Internal Logic Fault detected in zone 1 extended Z2 Internal Logic Fault detected in zone 2 Z3 Internal Logic Fault detected in zone 3 Zp Internal Logic Fault detected in zone p Z4 Internal Logic Fault detected in zone 4 Forward Internal Logic FWD Fault Detected Reverse Internal Logic REV Fault Detected Reversal Guard Internal Logic Reversal guard Unblock PS Internal Logic Unblocking Power Swing Power Swing Internal Logic Power Swing Detected INP_Distance_Timer_block TS opto Zones blocked by external input Unblock Z1 Configuration Unblocking Pswing with Z1 Unblock Z2 Configuration Unblocking Pswing with Z2 Unblock Zp Configuration Unblocking Pswing with Zp Unblock Z3 Configuration Unblocking Pswing with Z3 Unblock Z4 Configuration Unblocking Pswing with Z4 Zp_Fwd Configuration Directional Zp set Forward Z1<ZL Configuration Internal Configuration which determine that Z1 is lower than the length of the line ZL Perm Z2 Configuration Type of logical distance scheme (PUP Z2– POP Z2) Perm Fwd Configuration Type of logical distance scheme (PUP Fwd) Block Z1 Configuration Type of logical distance scheme (BOP Z1) Block Z2 Configuration Type of logical distance scheme (BOP Z2) Remarks: *. **.7.4) .2.2.

refer to section 4.3 MiCOM P441/P442 & P444 Outputs Data Type Description Z1x’ Internal Logic Fault detected in zone 1 extended Z1’ Internal Logic Fault detected in zone 1 Z2’ Internal Logic Fault detected in zone 2 Z3’ Internal Logic Fault detected in zone 3 Zp’ Internal Logic Fault detected in zone p Z4’ Internal Logic Fault detected in zone 4 Forward’ Internal Logic Fault Detected in Forward Direction Reverse’ Internal Logic Fault Detected in Reverse Direction For guidance on Line Length. kZm Mutual Compensation and kZm mutual compensation Angle settings.2. The line parameters can be adjusted in polar or rectangular mode to give the total positive impedance of the protected line: Remark: Z limit in MiCOM S1 are adjusted for Ω/phase .1.7. Line Impedance. 2.3 Zone Reaches All impedance reaches for phase fault protection are calculated in polar form: Z ∠θ. and θ is the line angle setting in degrees.7.P44x/EN AP/E33 Application Notes Page 22/220 2. where Z is the reach in ohms. common to all zones.

• The zone 2 elements should be set to cover the 20% of the line not covered by zone 1. It is therefore beneficial to set zone 2 to reach as far as possible. the effects of zero sequence mutual coupling will need to be accounted for. which will be discussed in section 2.7. It is therefore recommended that the reach of the zone 1 distance elements is restricted to 80 . The zone 3 reach (Z3) is therefore set to approximately 120% of the combined impedance of the protected line plus the longest adjacent line. To ensure adequate coverage an extended reach setting may be required. fast operation of the zone 2 elements is required. For this reason the zone 2 reach should be set to cover ≤50% of the shortest adjacent line impedance. The mutual coupling will result in the Zone 2 ground fault elements underreaching. Where aided tripping schemes are used. These errors come from the relay. . will depend upon its application. The setting chosen for zone P. This can be achieved by setting: Z4 ≥ ((Remote zone 2 reach) x 120%) minus the protected line impedance. Zone P may also be useful for dealing with some mutual coupling effects when protecting a double circuit line. zone 2 does not reach beyond the zone 1 reach of adjacent line protection. In most applications the zone 1 reach (Z1) should not be able to respond to faults beyond the protected line. • The zone 4 elements would typically provide back-up protection for the local busbar. such that faults on the protected line are well within reach. and Trip on Reclose protection. Setting zone 4 in this way would also satisfy the requirements for Switch on to Fault. with zone 2 elements set to cover the final 20% of the line.85% of the protected line impedance (positive phase sequence line impedance). Where this is not possible. (Note: Two of the channel aided distance schemes described later. For an underreaching application the zone 1 reach must therefore be set to account for any possible overreaching errors.7. zone 4 must reach further behind the relay than zone 2 for the remote relay. where the offset reach is set to 25% of the zone 1 reach of the relay for short lines (<30km) or 10% of the zone 1 reach for long lines. as described in later sections. the zone 2 reach (Z2) should be set in excess of 120% of the protected line impedance for all fault conditions. A higher apparent impedance of the adjacent line may need to be allowed where fault current can be fed from multiple sources or flow via parallel paths. if possible. if used at all. where possible. • Zone P is a reversible directional zone.7. it is necessary to time grade zone 2 elements of relays on adjacent lines. Typical applications include its use as an additional time delayed zone or as a reverse back-up protection zone for busbars and transformers. Allowing for underreaching errors.7. the VTs and CTs and inaccurate line impedance data. and the previous setting recommendation does not apply). Use of zone P as an additional forward zone of protection may be required by some users to line up with any existing practice of using more than three forward zones of distance protection.Application Notes MiCOM P441/P442 & P444 P44x/EN AP/E33 Page 23/220 • The zone 1 elements of a distance relay should be set to cover as much of the protected line as possible. Where zone 4 is used to provide reverse directional decisions for Blocking or Permissive Overreach schemes. • The zone 3 elements would usually be used to provide overall back-up protection for adjacent circuits. When setting zone 2 earth fault elements on parallel circuits. allowing instantaneous tripping for as many faults as possible. A constraining requirement is that. schemes POP Z1 and BOP Z1 use overreaching zone 1 elements. this is covered in Section 2.

Thus.Z1 Ie: As a ratio.7. timers settable are: tZi but in the DDB corresponding cells are: Ti Residual Compensation for Earth Fault Elements For earth faults. the earth loop reach of any zone must generally be extended by a multiplication factor of (1 + kZ0) compared to the positive sequence reach for the corresponding phase fault element. This time may have to be adjusted where the relay is required to grade with other zone 2 protection or slower forms of back-up protection for adjacent circuits. A typical minimum zone 3 operating time would be in the region of 400ms. • The zone 2 time delay (tZ2) is set to co-ordinate with zone 1 fault clearance time for adjacent lines.7. Using symetrical components. • The zone 3 time delay (tZ3) is typically set with the same considerations made for the zone 2 time delay. kZ0 Angle. this may need to be modified to co-ordinate with slower forms of back-up protection for adjacent circuits.4 MiCOM P441/P442 & P444 Zone Time Delay Settings (initiated with CVMR (General start convergency)) • The zone 1 time delay (tZ1) is generally set to zero. and older circuit breakers may be unable to break the current until zero crossings appear. ∠kZ0 = ∠ (Z0 – Z1) / 3. However. If zone 4 is required merely for use in a Blocking scheme. Z0 = Zero sequence impedance for the line or cable. Comp. VA is described as above: (1) VA = V1 + V2 + V0 = Z1I1 + Z2I2 + Z0I0 Z2 = Z1 (for a line or a cable) (2) VA = Z1 (I1 + I2) + Z0I0 we can write also: IA = I1 + I2 +I0 (3) (I1 + I2) = IA – I0 with (3) in (2) we obtain: (4) VA = Z1 (IA – I0) + Z0I0 The physical fault current is IR = 3I0 – if put in (4) – we obtain: VA = Z1 [IA – IR/3 + Z0IR/3Z1] = Z1 [IA + IR (Z0–Z1)/3Z1] but: (Z0 – Z1)/3Z1 = kZ0 . kZ0 CALCULATION DESCRIPTION If we consider a phase to ground fault AN with analog values VA and IA. Allowance must also be made for the zone 2 elements to reset following clearance of an adjacent line fault and also for a safety margin. Again. kZ0 = (Z0 – Z1) / 3. residual current (derived as the vector sum of phase current inputs (Ia + Ib + Ic) is assumed to flow in the residual path of the earth loop circuit. a time delay might be employed in cases where a large transient DC component is expected in the fault current. kZ0 is designated as the residual compensation factor. A typical minimum zone 2 time delay is of the order of 200ms.Z1 Set in degrees. and is calculated as: kZ0 Res.P44x/EN AP/E33 Application Notes Page 24/220 2. • The zone 4 time delay (tZ4) needs to co-ordinate with any protection for adjacent lines in the relay’s reverse direction. Where: Z1 = Positive sequence impedance for the line or cable. The total fault clearance time will consist of the downstream zone 1 operating time plus the associated breaker operating time. tZ4 may be set high. giving instantaneous operation. except that the delay needs to co-ordinate with the downstream zone 2 fault clearance.5 In MiCOM S1. Remark: 2.

RPh must be set greater than the maximum fault arc resistance for a phase-phase fault. using R1Ph. When the relay is set in primary impedance terms. KZ2. (8) with Z1 = (VA – Rdef. KZ3/4 and KZp) allows more accurate earth fault reach control for elements which are set to overreach the protected line.4 RPh ≥ Ra Where: If = Minimum expected phase-phase fault current (A). Idef (Rdef = Rloop) To determine the distance. Thus. ϕ Separate compensation for each zone (KZ1. calculated from the van Warrington formula (Ω). RPh must be set to cover the maximum expected phase-to-phase fault resistance. thus the resistive reach (RPh) is set independently of the impedance reach along the protected line/cable. L = Maximum phase conductor separation (m). respectively. Ra = Arc resistance. the right hand and left hand resistive reach constraints of each zone are displaced by +RPh and -RPh either side of the characteristic impedance of the line. Idef)/(IA + kZ0 IR) Rdef: fault resistance (loop) Idef: current crossing the fault resistance Open line: Ifault = IR = IA (9) VA = Z1 IA (1 + kZ0) + Rfault IA (10) Z1 = (VA/IA – Rfault)/(1 + kZ0) The impedance detected will be: Z = Z1 (1 + kZ0) + Rfault That is the form used for the result of Z measured with injector providing U.6 Resistive Reach Calculation . 2. R2Ph and RpPh. I. calculated as follows: Ra = (28710 x L) / If1. regardless of the location of the fault within the zone.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 (5) VA = Z1 [IA + kZ0 IR] (6) Z1 = VA/(IA + kZ0 IR) Page 25/220 Particular case Resistive fault (7) VA = Z1 [IA + kZ0 IR] + Rdef. In general.7. RPh defines the maximum amount of fault resistance additional to the line impedance for which a distance zone will trip. Note that zones 3 and 4 share the resistive reach R3Ph-R4Ph. . Z1 term is extracted. RPh is generally set on a per zone basis.Phase Fault Elements In MiCOM S1 all resistances are set per loop The P441. P442 and P444 relays have quadrilateral distance elements. such that they cover other circuits which may have different zero sequence to positive sequence impedance ratios (Example: underground cable & overhead line in the protected line).

calculated from: Impedance magnitude.RESISTIVE REACHES FOR LOAD AVOIDANCE As shown in the Figure. and where zone 4 is used to provide reverse directional decisions for Blocking or Permissive Overreach schemes.P44x/EN AP/E33 Application Notes Page 26/220 MiCOM P441/P442 & P444 Typical figures for Ra are given in Table 1 below.1Ω 1. ∠Z = cos–1 (PF) Where: kV = Rated line voltage (kV). Thus.2Ω 5 110 9. Zone 3 must never reach more than 80% of the distance from the line characteristic impedance (shown dotted). the zone 2 elements used in the scheme must satisfy R2Ph ≤ (R3PhR4Ph) x 80%. However. MVA = Maximum loading.5Ω 0. R/Z ratio: For best zone reach accuracy. towards Z. Z = kV2 / MVA Leading phase angle.5Ω 1. R3Ph-R4Ph is set such as to avoid point Z by a suitable margin. This avoids relay overreach or underreach where the protected line is exporting or importing power at the instant of fault inception. where the worst case loading has been determined as point “Z”. Conductor spacing (m) Typical system voltage (kV) If = 1kA If = 5kA If = 10kA 2 33 3. for different values of minimum expected phase fault current. An example is shown in Figure 3 below. . the resistive reach of each zone would not normally be set greater than 10 times the corresponding zone reach.4Ω 8 220 14. taking the short term overloading during out ages of parallel circuits (MVA). PF = Worst case lagging power factor. The resistive reach of any other zone cannot be set greater than R3Ph.TYPICAL ARC RESISTANCES CALCULATED USING THE VAN WARRINGTON FORMULA The maximum phase fault resistive reach must be limited to avoid load encroachment trips. For this reason. R3Ph would be set ≤ 60% of the distance from the line characteristic impedance towards Z.6Ω 0. Zone 3 ∆R R3PG-R4PG Z LOAD Zone 4 P0475ENa FIGURE 4 . R3Ph and other phase fault resistive reach settings must be set to avoid the heaviest allowable loading on the feeder.6Ω TABLE 1 . a larger impedance (including ∆R) characteristic surrounds zones 3 and 4. and it is essential also that load does not encroach upon this characteristic. where power swing blocking is used.4Ω 0. A setting between the calculated minimum and maximum should be applied.0Ω 0.

7. towards Z. The zero sequence coupling is more significant and will affect relay measurement during earth faults with parallel line operation. For high resistance earth faults.4. 2. Some applications exist. but to avoid operation with minimum load impedance.032 x ∆f x R load min ∆f: power swing frequency R load min: minimum load resistance A typical resistive reach coverage would be 40Ω on the primary system.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 2. that load does not encroach upon the characteristic. A channel-aided scheme will therefore still respond to faults within the protected line and remain secure during external faults. where Power Swing blocking is used. [(R3G – R4G) – ∆R] ≤ 80% Z min load With ∆R = 0. the situation may arise where no distance elements could operate. where the effects of mutual coupling should be addressed. R3G – R4G ≤ 80% ≤ 80% Z minimum load impedance Umin/√3 1.8 Effects of Mutual Coupling on Distance Settings Where overhead lines are connected in parallel or run in close proximity for the whole or part of their length. In this case it will be necessary to provide supplementary earth fault protection. and it is essential also. Zone 3 must never reach more than 80% of the distance from the line characteristic impedance (shown dotted in Figure 3).2 x Imax • Umin: minimum phase/phase voltage in normal condition without fault • Imax: maximum load current in normal condition without fault However. in which the residual compensation factor kZ1 is set at a lower value than normal (typically ≤ 80% of normal kZ1). for best reach accuracy.7. where one circuit of a parallel line is out of service and earthed at both ends.6).9 Effect of Mutual Coupling on Zone 1 Setting For the case shown in Figure 5. it is not be possible to overreach for faults beyond the protected line and neither will it be possible to underreach to such a degree that no zone 1 overlap exists). 2. however. a larger impedance surrounds zone 3 and zone 4. In addition.7. for example using the relay Channel Aided DEF protection. it can be shown that this underreach or overreach will not affect relay discrimination during parallel line operation (ie. depending on the direction of zero sequence current flow in the parallel line. EXPERT SECTION As shown in Figure 4 (section 2. Zero sequence mutual coupling will cause a distance relay to underreach or overreach. It may be desirable to reduce the zone 1 earth loop reach for this application.Earth Fault Elements The resistive reach setting of the relay earth fault elements (RG) should be set to cover the desired level of earth fault resistance. The positive and negative sequence coupling is small and can be neglected.4 must be avoided. R3G – R4G is set such as to avoid point Z (minimum load impedance) by a suitable margin.7. the resistive reach of any zone of the relay would not normally be greater than 10 times the corresponding earth loop reach. The same load impedance as in section 2. Fault resistance would comprise arc-resistance and tower footing resistance. Thus R3G is set such as to avoid point Z by a suitable margin. mutual coupling exists between the two circuits. This can be achieved using an alternative setting group within the relay. an earth fault at the remote bus may result in incorrect operation of the zone 1 earth fault elements. However.7 Page 27/220 Resistive Reach Calculation . .

10 Effect of Mutual Coupling on Zone 2 Setting If the double circuit line to be protected is long and there is a relatively short adjacent line. This problem can be exacerbated when a significant additional allowance has to be made for the zero-sequence mutual impedance in the case of earth faults (see Section 2. it is difficult to set the reach of the zone 2 elements to cover 120% of the protected line impedance for all faults. Z2 ' Boost ' G/F Z2 PH ZMO (i) Group 1 Z2 ' Reduced ' G/F Z2 PH (ii) Group 2 P3049ENa FIGURE 6 .4. necessitating time discrimination with other Zone 2 elements. it is desirable to reduce the earth fault settings to that of the phase fault elements for single circuit operation.6).P44x/EN AP/E33 Application Notes Page 28/220 MiCOM P441/P442 & P444 Z1 G/F (Optional) Z1 G/F (Normal) ZMO P3048ENa FIGURE 5 .7.ZONE 1 REACH CONSIDERATIONS 2. but not more than 50% of the adjacent line. it is desirable to boost the setting of the earth fault elements such that they will have a comparable reach to the phase fault elements.MUTUAL COUPLING EXAMPLE . no mutual coupling exists. Changing between appropriate settings can be achieved by using the alternative setting groups available in the relay series relays. and the zone 2 earth fault elements may overreach beyond 50% of the adjacent line. For parallel circuit operation the relay Zone 2 earth fault elements will tend to underreach. as shown in Figure 5. Under single circuit operation. Therefore. Increasing the residual compensation factor kZ2 for zone 2 will ensure adequate fault coverage. Therefore.ZONE 2 REACH CONSIDERATIONS .

is offered in the P441.Application Notes MiCOM P441/P442 & P444 2. the aided DEF protection can share the distance protection signalling channel. The relays include basic five-zone distance scheme logic for stand-alone operation (where no signalling channel is available) and logic for a number of optional additional schemes. P442 and P444 relays. The features of the basic scheme will be available whether or not an additional scheme has been selected. The aided tripping schemes can perform single pole tripping. Alternatively.8 P44x/EN AP/E33 Page 29/220 Distance protection schemes The option of using separate channels for DEF aided tripping. . In this case a permissive overreach or blocking distance scheme must be used. and distance protection schemes. and the same scheme logic.

06s 0 1s 0.01s 0. PermZ2. PUP Fwd. BOP Z1.5 x In 0. Send Zone None None. PermZ1. Dist CR None None. WI Trip & Echo. CsZ2.002s LoL: Mode Status Disabled Disabled or Enabled LoL: Chan.05 x In 1 x In 0. Loss of Carrier.04s 0.P44x/EN AP/E33 Application Notes Page 30/220 2.002s Unblocking Logic None None.05 x In LoL: Window 0. Tp 0. Echo. Both Enabled. 45V 10V 70V 5V WI: Trip Time Delay 0. PermFwd.01s Weak Infeed Loss of Load .002s tReversal Guard 0. Sig. TOR-SOTF Mode 00000000110000 Bit 0: TOR Z1 Bit 1: TOR Z2 Bit 2: TOR Z3 Bit 3: TOR All Zones Bit 4: TOR Dist. POP Z1. PUP Z2.02s 0 1s 0.1 MiCOM P441/P442 & P444 Settings Menu text Default setting Setting range Min Step size Max Group 1 Distance schemes Program Mode Standard Scheme Standard Scheme Open Scheme Standard Mode Basic + Z1X Basic + Z1X. Loss of Guard. Scheme Bit 5: SOFT All Zones Bit 6: SOFT Lev. 1 Pole Z1 & CR. Trip Mode Force 3 Poles Force 3 Poles. CsZ1.02s 0 0. BlkZ2. BlkZ1. Fail Disabled Disabled or Enabled WI: Mode Status Disabled Disabled. Fail Disabled Disabled or Enabled LoL: I< 0. BOP Z2. Fault Type Both Enabled Phase to Ground Fault Enabled. WI: Single Pole Trip Disabled Disabled or Enabled WI: V< Thres. Det. POP Z2. Scheme Bit 0D: SOFT Disable Z1 Ext. Phase to Phase Fault Enabled.8. on Chan.1s 0.15s 0. 1 Pole Z1 Z2 & CR. Bit 7: SOFT Z1 Bit 8: SOFT Z2 Bit 9: SOFT Z3 Bit 0A: SOFT Z1 + Rev Bit 0B: SOFT Z2 + Rev Bit 0C: SOFT Dist. CsZ4.

CSZ1 means: "carrier send if Z1 detected" 2.8.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 31/220 2.) 2. The zones decision logic is described as below: Z1' Z2' Z4' Z2'(*) P0476XXa Remark: Z2'(*) if overlapping zone enabled in MiCOM S1 PDist-CS = (Z1' + Z2').CSZ1 + Reverse.8. The carrier send in Z4 is managed by "Reverse". DEF_CS) → logic with canal shared CS_DEF = Not Share_Logic_DEF. DEF_CS → logic with canal independent (There is a 10ms delay in drop of on the carried send to avoid a logic race between this signal and the zone pick up.1 Carrier send can be triggered by • Zone1 (CSZ1) • Zone2 (CSZ2) • Zone4 Reverse (CSZ4) Remarks: 1. instead of Z4 (because Reverse decision starts quicker than Z4).CSZ4 + WI_CS The complete logic – with DEF integrated is: CS = PDist_CS + ( Share_Logic Share_Logic_DEF.8.CSZ2 + Z1'.2 Carrier send & Trip logic 2.2.2 Inputs Data Type Description CSZ1 Configuration Carrier send for zone 1 CSZ2 Configuration Carrier send for zone 2 CSZ4 Configuration Carrier send for zone 4 (reverse) Not Share_Logic_DEF Configuration DEF channel independent Reverse' Internal Logic Fault detected Reverse Z1' to Z4' Internal Logic Zone 1 to 4 decision (blocked by Pswing or Rguard) WI_CS Internal Logic Winfeed carrier send (Echo) DEF_CS Internal Logic DEF carrier send .2.

T2 + Z3T3.15.5 MiCOM P441/P442 & P444 Tripping modes The tripping mode is settable (Distance scheme\Trip mode): − Force 3P : Trip 3P in all cases − 1PZ1 & CR : Trip 1Pole in T1 for fault in Z1 and also in case of Carrier Received (aided Trip) − 1PZ1.T1 + Z2..5 from chapter P44x/EN HW).Tp + Z1. CR .8.8.T1 + Z1T1 + Z2. Z2 & CR : Trip 1Pole for T1 & T2 in T1 for fault in Z1 and CR (aided Trip) and also in Z2 with CR Several defined aided trip logic can be selected or an open logic can be designed by user (see also section 4.. Z1 = 80% ZL PUP Fwd 448.Tp + Z1.CR.T2 + Z2T2 + Z3T3.. Z1 = 80% ZL PUP Z2 PUR2 POR2 (LFZR) Z2 Z2. CR ..T1 + Z2.T2 + Z3T3. Z1 = 80% ZL BOP Z2 448. .15.13 PUR (LFZR) or AUP Z1 Z2.T2 + Z3.15..CR.2.16 POR1 or POP or POTT Z1 Z1. Z1 = 80% ZL POP Z2 BOR1 or BOP Z4 Z1..3 2.8.CR.T1.T1 + Z1.2.T2 Z2.11 PUP or PUTT Z1 Fwd..2...4 Outputs Data Type Description CS Internal Logic Main channel Carrier send CS_DEF Internal Logic DEF channel Carrier send Trip logic IEC Standard Carrier Trip Logic Send Application Setting MiCOM 448.T2 +.. Z1 > ZL POP Z1 448.CR..T1.P44x/EN AP/E33 Application Notes Page 32/220 2.T3. Z1 > ZL BOP Z1 BOR2 BLOCK2 (LFZR) Z4 Z2.T1 + Z1.T1 + Z2.T1 + Z1.T3.15.14 2.T2 + Z3..

the type of trip1P or 3P. • Trip Distance Protection manages the Trip order regarding the distance algorithm outputs. . carries out a function similar to Carrier receive logic. In general zones 1 and 2 provide main protection for the line or cable as shown in Figure 9 below.3 • The unblocking function if enabled. (see explanations in section 2.10.4) • Weak infeed allows for the case where there may be no zone pick up from local end. Zones 1. the distance timers. and the logic datas such as power swing blocking. • TOR & SOTF applies specific logic in case of manual closing or AR closing logic. • Loss of Load manages a specific logic for tripping 3P in Z2 accelerated without carrier.7.3 to 2.MIMIC DIAGRAM The zones unblocking/blocking logic with Power swing or Reversal guard is managed as explained in the scheme: Figure 3 (section 2.9.8.7.7) 2. 2 and 3 are set as described in Sections 2. The Basic Scheme The Basic distance scheme is suitable for applications where no signalling channel is available. with zone 3 reaching further to provide back up protection for faults on adjacent circuits.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 33/220 Unblocking Basic + Aided Schemes + Weak-Infeed PSB + RVG Trip Distance Protection TOR SOTF LOL PSB: Power swing blocking RVG: Reversal guard LOL: Loss of load P0477ENa FIGURE 7 .

ZL = Impedance of the protected line. .MAIN PROTECTION IN THE BASIC SCHEME (NO REQUIREMENT FOR SIGNALLING CHANNEL) Key: A.P44x/EN AP/E33 Application Notes Page 34/220 MiCOM P441/P442 & P444 FIGURE 8 .SETTINGS IN MiCOM S1(GROUP1\DISTANCE SCHEME\STANDARD MODE) – 6 DIFFERENTS SETTABLE SCHEMES – Z2A ZL A B Z1A Z1B Z2B P3050XXa FIGURE 9 . B = Relay locations.

Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 35/220 Protection A Protection B Z1' T1 tZ1 Z1' & & Z2' T2 tZ2 Z2' & & Trip Z3' T3 tZ3 & ≥1 ≥1 Z3' & T3 tZ3 Zp' & & Z4' T4 tZ4 T2 tZ2 Trip Zp' Tzp tZp T1 tZ1 Tzp tZp Z4' & & T4 tZ4 P0543ENa FIGURE 10 . The Basic scheme is suitable for single or double circuit lines fed from one or both ends. zone 1 can have an optional time delay of 0 to 10s. P442 and P444 relays. The limitation of the Basic scheme is that faults in the end 20% sections of the line will be cleared after the zone 2 time delay. . Note that for the P441. which is why they are shown as a parallel process to the distance zones. Under certain conditions however. The method used to achieve stability is based on second harmonic current detection. then a channel aided scheme will have to be employed. Alternatively. Where no signalling channel is available.LOGIC DIAGRAM FOR THE BASIC SCHEME Figure 10 shows the tripping logic for the Basic scheme. 3. the ‘ in Z1’) indicates that protection zones are stabilised to avoid maloperation for transformer magnetising inrush current. Where high speed protection is required over the entire line. The use of an apostrophe in the logic (eg. Each with a time delay set between 0 and 10s. 4 and P. these two schemes will still result in time delayed tripping. then improved fault clearance times can be achieved through the use of a zone 1 extension scheme or by using loss of load logic. The Basic scheme incorporates the following features : Instantaneous zone 1 tripping. zone timers tZ1 to tZ4 are started at the instant of fault detection. as described below. Time delayed tripping by zones 2.

A fault on the line. Figure 11 shows the alternative reach selections for zone 1: Z1 or the extended reach Z1X. The autorecloser in the relay is used to inhibit tripping from zone 1X such that upon reclosure the relay will operate with Basic scheme logic only. The scheme can. The time delays associated with extended zone Z1X are shown in Table 2 below: Scenario Z1X Time Delay First fault trip = tZ1 Fault trip for persistent fault on autoreclose = tZ2 TABLE 2 .8.4 MiCOM P441/P442 & P444 Zone 1 Extension Scheme Auto-reclosure is widely used on radial overhead line circuits to re-establish supply following a transient fault. zone 1X is enabled and set to overreach the protected line.ZONE 1 EXTENSION SCHEME DEFINIED AS DESCRIBED ABOVE: Z1 < Z1X < Z2 or Z1 < Z2 < Z1X (with Z1 < ZL < Z1X) In this scheme. however. will now result in instantaneous tripping followed by autoreclosure. transient faults on the line will be cleared instantaneously. Thus. to coordinate with downstream protection for permanent faults.TRIP TIME DELAYS ASSOCIATED WITH ZONE 1X The Zone 1 Extension scheme is selected by setting the Z1X Enable bit in the Zone Status function links to 1. including one in the end 20% not covered by zone 1. together with transient loss of supply to a substation. although this will be followed by autoreclosure with correct protection discrimination. which will reduce the probability of a transient fault becoming permanent. A Zone 1 extension scheme may therefore be applied to a radial overhead feeder to provide high speed protection for transient faults along the whole of the protected line. Zone 1X has resistive reaches and residual compensation similar to zone 1. operate for some faults on an adjacent line. FIGURE 12 – SETTINGS IN MiCOM S1 (GROUP1\DISTANCE SCHEME\ZONE STATUS) . Increased circuit breaker operations would occur. Z1 Extension (A) ZL A B Z1A Z1B Z1 Extension (B) P3052ENa FIGURE 11 .P44x/EN AP/E33 Application Notes Page 36/220 2.

9.4)) 2.1 Inputs Data Type Description None Configuration No distance scheme (basic scheme) INP_Z1EXT Digital input Input for Z1 extended Z1x channel fail Configuration Z1X extension enabled on channel fail (UNB-CR.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Remark: Page 37/220 To enable the Z1X logic.8.DISTANCE SCHEME WITHOUT CARRIER & Z1 EXTENDED Z1' T1 & INP_Z1EXT None & & >1 Z1x' Z1X channel fail & T2 Z2' & PDist_Trip ≥1 UNB_Alarm Z3' T3 & Zp' Tzp & Z4' T4 & P0478ENa FIGURE 14 – Z1X TRIP LOGIC (Z1X can be used as well as the default scheme logic in case of UNB _Alarm-carrier out of service (See unblocking logic – section 2. the DDB "Z1X extension" cell must be linked in the PSL (opto/reclaim time…) FIGURE 13 . see Mode loss of guard or Loss of carrier) UNB_Alarm Internal logic (See Unblocking logic) Z1x’ Internal logic Z1X Decision (lock out by Power Swing) Z1’ Internal logic Z1 Decision (lock out by Power Swing) Z2’ Internal logic Z2 Decision (lock out by Power Swing) Z3’ Internal logic Z3 Decision (lock out by Power Swing) .4.

coupled with operation of a Zone 2 comparator causes tripping of the local circuit breaker. Any fault located within the reach of Zone 1 will result in fast tripping of the local circuit breaker. The loss of load current opens a window during which time a trip will occur if a Zone 2 comparator operates. A typical setting for this window is 40ms as shown in Figure 15. it provides high speed back-up clearance for end zone faults if the channel fails. The scheme has the advantage of not requiring a signalling channel.2 MiCOM P441/P442 & P444 Data Type Description Zp’ Internal logic Zp Decision (lock out by Power Swing) Z4’ Internal logic Z4 Decision (lock out by Power Swing) T1 Internal logic Elapse of distance timer 1 T2 Internal logic Elapse of distance timer 2 T3 Internal logic Elapse of distance timer 3 Tzp Internal logic Elapse of distance timer p T4 Internal logic Elapse of distance timer 4 Data Type Description Internal logic Trip order by Distance Protection Outputs PDist_Dec 2. load current must have been detected prior to the fault. When selected. the loss of load feature operates in conjunction with the main distance scheme that is selected.5 Loss of Load Accelerated Tripping (LoL) The loss of load accelerated trip logic is shown in Figure 15. although this can be altered in the menu LoL: Window cell. or a Channel Out of Service (COS) opto input. The loss of load logic provides fast fault clearance for faults over the whole of a double end fed protected circuit for all types of fault. with permissive signal aided tripping schemes. Note that loss of load tripping is only available where 3 pole tripping is used. care must be taken in setting the loss of load feature to ensure that the I< level detector setting is above the tapped load current. For an end zone fault with remote infeed. Before an accelerated trip can occur. the logic can be chosen to be enabled when the channel associated with an aided scheme has failed. This. . the remote breaker will be tripped in Zone 1 by the remote relay and the local relay can recognise this by detecting the loss of load current in the healthy phases.8. In this way it provides high speed clearance for end zone faults when the Basic scheme is selected or.4. This failure is detected by permissive scheme unblocking logic. except three phase. The accelerated trip is delayed by 18ms to prevent initiation of a loss of load trip due to circuit breaker pole discrepancy occurring for clearance of an external fault.P44x/EN AP/E33 Application Notes Page 38/220 2.8. The local fault clearance time can be deduced as follows : t = Z1d + 2CB + LDr + 18ms Z1d = maximum downstream zone 1 trip time CB = Breaker operating time LDr = Upstream level detector (LoL: I<) reset time Where: For circuits with load tapped off the protected line. Alternatively.

PFwd. PZ2. None Configuration Underreach scheme : Z1 < ZL PZ1: permissive underreach Z1 PZ2: permissive underreach Z2 PFwd: permissive underreach forward None: no distance scheme (basic scheme) Z1<ZL Configuration Underreach scheme in Z1 UNB_CR_Alarm Internal Logic Carrier out of service Alarm LOL Wind Configuration Activated time window for Loss Of Load logic IA_LOL< Internal Logic Threshold I< for phase A in LOL logic IB_LOL< Internal Logic Threshold I< for phase B in LOL logic IC_LOL< Internal Logic Threshold I< for phase C in LOL logic Flt A Internal Logic Faulty Phase A Flt B Internal Logic Faulty Phase B Flt C Internal Logic Faulty Phase C Flt AB Internal Logic Faulty Phase AB Flt BC Internal Logic Faulty Phase BC Flt AC Internal Logic Faulty Phase AC Z2' Internal Logic Fault in Z2 (lockout by Pswing or RGuard) .5.1 Inputs Data Type Description Activ_LOL Configuration Loss of Load activated (LOL) TRIP_Any Internal Logic Any trip (internal or external) LOL. channel fail Configuration LOL enabled on channel fail (alarm carrier) Force_3P_Dist Internal Logic Force Trip 3P in Distance Logic Force_3P_DEF Configuration Force Trip 3P in DEF Logic Activ_WI Configuration Weak-infeed activated (Trip & Echo) WI_1pTrip Configuration WI 1Pole trip PZ1.LOSS-OF-LOAD ACCELERATED TRIP SCHEME 2.8.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 39/220 Z2 Z1 Z1 Z1 Z1 Z2 LOL-A LOL-B & LOL-C & 0 18ms 40ms 0 1 & Trip Z2 P3053ENa FIGURE 15 .

PFwd Z1<ZL None & S Q 0 T R LOL Wind & IA_LOL< IB_LOL< IC_LOL< & & ≥1 Flt A & Flt B T & 0 18 ms S Q LOL_Trip3P R Flt C Flt AB & Flt BC Flt AC & Z2' P0479ENa FIGURE 16 – LOSS OF LOAD TRIP LOGIC .P44x/EN AP/E33 Application Notes Page 40/220 2.8. PZ2.2 MiCOM P441/P442 & P444 Outputs LOL_Trip3p Data Type Description Internal Logic 3P Trip by LOL logic ≥1 & Activ_LOL TRIP _Any Force_3P_Dist Yes Force3P_DEF 3p & Activ WI = WI/echo & WI_1pTrip = No LOL. channel fail UNB_CR_Alarm & PZ1.5.

• If the remote terminal of a line is open then faults in the remote 20% of the line will be cleared via the zone 2 time delay of the local relay. along the length of the protected circuit. the relay will operate with no additional delay. • The scheme has a high degree of security since the signalling channel is only keyed for faults within the protected line. If the remote relay has detected a forward fault upon receipt of this signal. Faults in the last 20% of the protected line are therefore cleared with no intentional time delay. current below the relay sensitivity). Permissive Underreach Transfer Trip Schemes PUP Z2 and PUP Fwd To provide fast fault clearance for all faults. • Permissive Overreach Transfer Trip Schemes POP Z2 and POP Z1.1 • Permissive Underreach Transfer Trip Schemes PUP Z2 and PUP Fwd. when fault clearance is in progress on the parallel circuit of a double circuit line. • Unblocking logic to supplement permissive schemes.9. it is necessary to use a signal aided tripping scheme.9 Page 41/220 Channel-aided distance schemes The following channel aided distance tripping schemes are available when the Standard program mode is selected: 2.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 2. • Weak infeed logic to supplement permissive overreach schemes. Z2A ZL A Z2B B Z1A Z1B P3054XXa FIGURE 17 . • Blocking Schemes BOP Z2 and BOP Z1. The simplest of these is the permissive underreach protection scheme (PUP). • If there is a weak or zero infeed from the remote line end. • If the signalling channel fails. P442 and P444 relays.ZONE 1 AND 2 REACHES FOR PERMISSIVE UNDERREACH SCHEMES . • Current reversal guard logic to prevent maloperation of any overreaching zone used in a channel aided scheme. (ie. Listed below are some of the main features/requirements for a permissive underreaching scheme: • Only a simplex signalling channel is required. Basic distance scheme tripping will be available. of which two variants are offered in the P441. The channel for a PUP scheme is keyed by operation of the underreaching zone 1 elements of the relay. both transient and permanent. then faults in the remote 20% of the line will be cleared via the zone 2 time delay of the local relay.

Figure 11 shows the simplified scheme logic.1 MiCOM P441/P442 & P444 Permissive Underreach Protection.THE PUP Z2 PERMISSIVE UNDERREACH SCHEME (SEE TRIP LOGIC TABLE IN SECTION 2. Send logic: Zone 1 Permissive trip logic: Zone 2 plus Channel Received. allowing an instantaneous Z2 trip on receipt of the signal from the remote end protection.1.8.9.2.4) . Protection A Signal Send Z1' Protection B Signal Send Z1' Z1' Z1' tZ1 & & & & & & Z3' tZ3 Z3' Zp' tZp tZ3 Zp' ≥1 Z4' tZ4 tZ1 Trip Trip ≥1 tZp Z4' & & & & tZ4 tZ2 tZ2 Z2' Z2' & & P3055ENa FIGURE 18 . Accelerating Zone 2 (PUP Z2) This scheme is similar to that used in the other AREVA distance relays.P44x/EN AP/E33 Application Notes Page 42/220 2.

.9. allowing an instantaneous Z2 or Z3 trip on receipt of the signal from the remote end protection.1.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 2.4) Key: Fwd = Forward fault detection. Figure 19 shows the simplified scheme logic.2 Page 43/220 Permissive Underreach Protection Tripping via Forward Start (PUP Fwd) This scheme is similar to that used in the AREVA EPAC and PXLN relays. Protection A Signal Send Z1' Protection B Signal Send Z1' Z1' Z1' tZ1 & & & & & & Z3' Z3' tZ3 Zp' tZp ≥1 Trip & Trip ≥1 tZ4 tZ2 & & Z2' tZp Z4' & tZ2 Fwd' <Z tZ3 Zp' Z4' tZ4 tZ1 Z2' Fwd' & & <Z P3056ENa FIGURE 19 . plus Channel Received.2.THE PUP FWD PERMISSIVE UNDERREACH SCHEME (SEE TRIP LOGIC TABLE IN SECTION 2.8. <Z = Underimpedance start by Z2 or Z3. Send logic: Zone 1 Permissive trip logic: Underimpedance Start within any Forward Distance Zone.

Basic distance scheme tripping will be available. • The POP Z2 scheme may be more advantageous than permissive underreach schemes for the protection of short transmission lines. • If the signalling channel fails. Figure 20 shows the zone reaches.1 • The scheme requires a duplex signalling channel to prevent possible relay maloperation due to spurious keying of the signalling equipment. Send logic: Zone 2 Permissive trip logic: Zone 2 plus Channel Received. then it will operate with no additional delay upon receipt of this signal.9. having the following common features/requirements: 2. The POP Z2 scheme also uses the reverse looking zone 4 of the relay as a reverse fault detector. This is necessary due to the fact that the signalling channel is keyed for faults external to the protected line. • Current reversal guard logic is used to prevent healthy line protection maloperation for the high speed current reversals experienced in double circuit lines.2 MiCOM P441/P442 & P444 Permissive Overreach Transfer Trip Schemes POP Z2 and POP Z1 The P441. since the resistive coverage of the Zone 2 elements may be greater than that of the Zone 1 elements. P442 and P444 relays offer two variants of permissive overreach protection schemes (POP).2. If the remote relay has picked up in zone 2. The signalling channel is keyed from operation of the overreaching zone 2 elements of the relay. caused by sequential opening of circuit breakers. Z2A ZL A B Z1A Z2B Z1B P3054XXa FIGURE 20 .P44x/EN AP/E33 Application Notes Page 44/220 2. Permissive Overreach Protection with Overreaching Zone 2 (POP Z2) This scheme is similar to that used in the AREVA LFZP and LFZR relays.MAIN PROTECTION IN THE POP Z2 SCHEME . This is used in the current reversal logic and in the optional weak infeed echo feature.9. and Figure 21 the simplified scheme logic.

8. This is used in the current reversal logic and in the optional weak infeed echo feature.4) 2.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 45/220 Signal Send Z2' Protection A Protection B Signal Send Z2' Z1' Z1' tZ1 tZ1 & & & & Z3' Z3' tZ3 tZ3 Zp' Zp' & tZp ≥1 Z4' tZ4 Trip & Trip ≥1 tZp Z4' & & & & tZ4 tZ2 tZ2 Z2' Z2' & & P3058ENa FIGURE 21 . and Figure 23 the simplified scheme logic. The signalling channel is keyed from operation of zone 1 elements set to overreach the protected line. Send logic: Zone 1 Permissive trip logic: Zone 1 plus Channel Received. If the remote relay has picked up in zone 1.LOGIC DIAGRAM FOR THE POP Z2 SCHEME (SEE TRIP LOGIC TABLE IN SECTION 2.2 Permissive Overreach Protection with Overreaching Zone 1 (POP Z1) This scheme is similar to that used in the AREVA EPAC and PXLN relays. NOTE: Should the signalling channel fail. then it will operate with no additional delay upon receipt of this signal.MAIN PROTECTION IN THE POP Z1 SCHEME .9.2. The POP Z1 scheme also uses the reverse looking zone 4 of the relay as a reverse fault detector. Figure 22 shows the zone reaches. Z2A Z1A A ZL B Z1B Z2B P3059XXa FIGURE 22 . the fastest tripping in the Basic scheme will be subject to the tZ2 time delay.2.

and WI Tripping. NOTE: The 2 modes are blocked during Fuse failure conditions.P44x/EN AP/E33 Application Notes Page 46/220 MiCOM P441/P442 & P444 Protection A Signal Send Z1' Protection B Signal Send Z1' Z2' Z2' tZ2 & & & & & & tZ2 Z3' Z3' tZ3 Zp' tZ3 Zp' tZp ≥1 Z4' Trip Trip & tZ4 ≥1 tZp Z4' & tZ4 & & Z1' Z1' & tZ1 & tZ1 P3060ENa FIGURE 23 .2.9.8.WEAK INFEED MODE ACTIVATION LOGIC . Power swing detection Def_Reverse Reverse 0 Distance start 150 ms FFUS_Confirmed UNB_CR & T WI Logic confirmed 0 T 60 ms & Pulse Timer 200 ms Activ_WI Echo or WI/echo P0480ENa FIGURE 24 . Two options are available: WI Echo.LOGIC DIAGRAM FOR THE POP Z1 SCHEME (SEE TRIP LOGIC TABLE IN SECTION 2.4) 2.3 Permissive Overreach Schemes Weak Infeed Features Weak infeed logic can be enabled to run in parallel with all the permissive schemes.

Three undervoltage elements. The additional signal send logic is: WI logic WI_CS & UNB_CR Echo send: (NB: For UNB_CR explanation see Unblocking logic in next section 2. The P441.WEAK INFEED PHASE SELECTION LOGIC UNB_CR is used as a filter to avoid a permanent phase selection which could be maintained if Cbaux signals are not mapped in the PSL (when line is opened). the weak infeed relay can be set to “echo” back any channel received to the strong infeed relay (ie. if one circuit breaker had already been left open.9. to immediately send a signal once a signal has been received).Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 • Page 47/220 Weak Infeed Echo For permissive schemes. the fault current infeed at one line end may be so low as to be insufficient to operate any distance zones. Vb< and Vc< are used to detect the line fault at the weak infeed terminal. a signal would only be sent if the required signal send zone were to detect a fault. However.4) • Weak Infeed Tripping Weak infeed echo logic ensures an aided trip at the strong infeed terminal but not at the weak infeed. P442 and P444 relays also have a setting option to allow tripping of the weak infeed circuit breaker of a faulted line. with a common setting typically 70% of rated phase-neutral voltage. Va<. the current infeed would be zero. Also. and risks a failure to send the signal. This voltage check prevents tripping during spurious operations of the channel or during channel testing. These are termed weak infeed conditions. This allows the strong infeed relay to trip instantaneously in its permissive trip zone. To avoid this slow tripping. . and may result in slow fault clearance at the strong infeed line end (tripping after time tZ2). VA<_WI & CB 52a_phA WI_A & FLT_A VB<_WI & WI_B CB 52a_phB FLT_B & VC<_WI & WI_C CB 52a_phC UNB_CR & FLT_B P0481ENa FIGURE 25 .

P44x/EN AP/E33

Application Notes

Page 48/220

MiCOM P441/P442 & P444

The additional weak infeed trip logic is:
Weak infeed trip:

No Distance Zone Operation, plus reverse directional decision, plus
V<, plus Channel Received.

Weak infeed tripping is time delayed according to the WI:
Trip Time Delay value, usually set at 60ms. Due to the use of phase segregated
undervoltage elements, single pole tripping can be enabled for WI trips if required. If single
pole tripping is disabled a three pole trip will result after the time delay.

WI_A

≥1

WI_B

WI_C

&

≥1

WI_PhaseA

≥1

WI_PhaseB

≥1

WI_PhaseC

WI/echo

Activ_WI

Trip1P_WI

Yes

&

&

&
P0482ENa

FIGURE 26 – WEAK INFEED TRIP DECISION LOGIC

WI_Phase A

T
WI_Phase B

0

≥1
TtripWI

WI_Phase C

&

WI_TripA

&

WI_TripB

&

WI_TripC

Autor_WI
P0531ENa

FIGURE 27 - WEAK INFEED TRIP LOGIC

Application Notes

P44x/EN AP/E33

MiCOM P441/P442 & P444
2.9.3.1

2.9.3.2

2.9.4

Page 49/220

Inputs
Data Type

Description

Activ_WI

Configuration

Weak infeed mode selection (Disable, Echo,
WI/echo)

Trip1P_WI

Configuration

Trip 1P in Weak infeed mode

Any Pole Dead

Internal Logical

Minimum 1 pole is open

Distance start

Internal Logical

Convergency of any impedance Loop – start of
distance

Reverse

Internal Logical

Fault detected in Reverse direction

FFUS_Confirmed

Internal Logical

Fuse Failure confirmed

Power swing

Internal Logical

Power swing detection

UNB_CR

Internal Logical

Carrier Received

VA<_WI

Internal Logical

Phase A selection by WI

VB<_WI

Internal Logical

Phase B selection by WI

VC<_WI

Internal Logical

Phase C selection by WI

CB52a_A, CB52a_B,
CB52a_C

Internal Logical

Dead Pole by phase A/B/C
(detected by interlocking contacts 52a/52b)

TtripWI

Configuration

Weak-Infeed Trip Timer

Data Type

Description

WI_CS

Internal Logical

Carrier Send (echo)

WI_TripA

Internal Logical

Trip Phase A by WI logic

WI_TripB

Internal Logical

Trip Phase A by WI logic

WI_TripC

Internal Logical

Trip Phase A by WI logic

Outputs

Permissive Scheme Unblocking Logic
Two modes of unblocking logic are available for use with permissive schemes, (Blocking
schemes are excluded).
The unblocking logic creates the : "UNB_Alarm" and the : "UNB_CR" signals, which depend
upon:

Inputs signals [binary inputs: CR (Carrier Receive) COS (Carrier Out of Service)]

Settings used for the distance channel & DEF aided trip channel

Shared or independent logic between DEF & Distance

Carrier Out of Service detected

Different modes are selectable :

None (basic mode)

Loss of Guard mode

Loss of Carrier mode

P44x/EN AP/E33
Page 50/220

Application Notes
MiCOM P441/P442 & P444

Two types of carrier received signals are used:

2.9.4.1

Carrier received (INP_CR - binary input)

Carrier Out of Service (INP_COS - binary input for distance logic) and
(INP_COS_DEF - binary input for DEF logic)

None

The status of opto is copied directly :
UNB_ALARM = INP_COS + INP_COS_DEF
UNB_CR = INP_CR
UNB_CR_DEF = INP_CR_DEF
2.9.4.2

Loss of Guard Mode
This mode is designed for use with frequency shift keyed (FSK) power line carrier
communications. When the protected line is healthy a guard frequency is sent between line
ends, to verify that the channel is in service. However, when a line fault occurs and a
permissive trip signal must be sent over the line, the power line carrier frequency is shifted to
a new (trip) frequency. Thus, distance relays should receive either the guard, or trip
frequency, but not both together. With any permissive scheme, the PLC communications
are transmitted over the power line which may contain a fault. So, for certain fault types the
line fault can attenuate the PLC signals, so that the permissive signal is lost and not received
at the other line end. To overcome this problem, when the guard is lost and no “trip”
frequency is received, the relay opens a window of time during which the permissive scheme
logic acts as though a “trip” signal had been received. Two opto inputs to the relay need to
be assigned, one is the Channel Receive opto, the second is designated Loss of Guard (the
inverse function to guard received). The function logic is summarised in Table 3.

Application Notes

P44x/EN AP/E33

MiCOM P441/P442 & P444

Page 51/220

System
Condition

Permissive
Channel
Received

Loss of
Guard

Permissive Trip
Allowed

Alarm
Generated

Healthy Line

No

No

No

No

Internal Line Fault Yes

Yes

Yes

No

Unblock

No

Yes

Yes, during a
150ms window

Yes, delayed on
pickup by 150ms

Signalling
Anomaly

Yes

No

No

Yes, delayed on
pickup by 150ms

TABLE 3 - LOGIC FOR THE LOSS OF GUARD FUNCTION
The window of time during which the unblocking logic is enabled starts 10ms after the guard
signal is lost, and continues for 150ms. The 10ms delay gives time for the signalling
equipment to change frequency as in normal operation.
For the duration of any alarm condition, zone 1 extension logic will be invoked if the option
Z1 Ext on Chan. Fail has been Enabled.

150 ms

0

S
Q

=1
Pulse Timer

Indicates by digital input
the Loss of guard

UNB Alarm

R

200 ms

INP COS

&

≥1

INP CR

UNB CR

10 ms

0

S

&

Q
R

Pulse Timer
150 ms

P3061ENa

FIGURE 28 - LOSS OF GUARD LOGIC
INP_CR

INP_COS

UNB_CR

UNB_Alarm

0

0

0

0

1

1

1

0

0

1

1 (Window)

1 (delayed)

1

0

0

1 (delayed)

such that both the carrier and permissive trip are normally received together. delayed on pickup by 150ms TABLE 4 . and continues for 150ms.LOGIC FOR THE LOSS OF CARRIER FUNCTION The window of time during which the unblocking logic is enabled starts 10ms after the guard signal is lost. Two opto inputs to the relay need to be assigned. additional information is contained in the carrier (eg. For a permissive trip signal to be sent. 150 ms 0 S Q Pulse Timer 200 ms Indicates by digital input the Loss of Carrier INP COS UNB Alarm R & ≥1 INP CR UNB CR 10 ms 0 & S Q Pulse Timer R 150 ms P3062ENa FIGURE 29 .4. System Condition Permissive Channel Received Loss of Guard Permissive Trip Allowed Alarm Generated Healthy Line No No No No Internal Line Fault Yes No Yes No Unblock No Yes Yes. a trip bit is set). Fail has been Enabled. zone 1 extension logic will be invoked if the option Z1 Ext on Chan.P44x/EN AP/E33 Application Notes Page 52/220 2. when in service.LOSS OF CARRIER . Should the carrier be lost at any time.3 MiCOM P441/P442 & P444 Loss of Carrier In this mode the signalling equipment used is such that a carrier/data messages are continuously transmitted across the channel. The function logic is summarised in Table 4. in case a line fault has also affected the signalling channel. one is the Channel Receive opto. the relay must open the unblocking window. delayed on pickup by 150ms Signalling Anomaly No Yes No Yes.9. the second is designated Loss of Carrier (the inverse function to carrier received). during a 150ms window Yes. For the duration of any alarm condition.

P442 and P444 relays offer two variants of blocking overreach protection schemes (BOP).9.9. • If the signalling channel fails to send a blocking signal during a fault. and so there are no problems associated with power line carrier signalling equipment.9. • Reverse looking Zone 4 is used to send a blocking signal to the remote end to prevent unwanted tripping. • BOP schemes provides similar resistive coverage to the permissive overreach schemes. a BOP scheme can easily be applied to a multiterminal line provided that outfeed does not occur for any internal faults.4. • When a simplex channel is used. but also for some faults within the next line section. the DEF channel is the Main Distance channel signal (the scheme & contacts of carrier received will be identical) • 2. • The blocking signal is transmitted over a healthy line. the signalling channel is keyed from the reverse looking zone 4 element.5 2. for faults along the protected line section.Distance channel INP_COS_DEF Digital input Carrier Out of Service – DEF channel Data Type Description UNB_CR internal logic Internal carrier received – Distance channel UNB_CR _DEF internal logic Internal carrier received – DEF channel UNB_Alarm internal logic Alarm channel Main & DEF Outputs Blocking Schemes BOP Z2 and BOP Z1 The P441.4. which is used to block fast tripping at the remote line end. • Fast tripping will occur at a strong source line end. With a blocking scheme.5 Independent channel (2 Different channels) – (2 independent contacts) Inputs Data Type Description INP_CR Digital input Distance channel carrier received INP_CR_DEF Digital input DEF channel carrier received INP_COS Digital input Carrier Out of Service . even if there is weak or zero infeed at the other end of the protected line. . • If a line terminal is open.4 2.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 53/220 INP_CR INP_COS UNB_CR UNB_Alarm 0 0 0 0 0 1 1 (Window) 1 (delayed) 1 0 1 0 1 1 0 1 (delayed) NOTE: • For DEF the logic will used depende upon which settings are enabled: Same channel (shared) In this case. fast tripping will still occur for faults along the whole of the protected line length. Features are as follows: • BOP schemes require only a simplex signalling channel. fast tripping will occur for faults along the whole of the protected line.

and Figure 31 the simplified scheme logic.5.1 = Max. • To allow time for a blocking signal to arrive.4) .9. signalling channel operating time + 14ms Blocking Overreach Protection with Overreaching Zone 2 (BOP Z2) This scheme is similar to that used in the other ALSTOM distance relays. as follows: Recommended Tp setting 2. If the remote relay has picked up in zone 2. Send logic: Reverse Zone 4 Trip logic: Zone 2. Figure 30 shows the zone reaches. The signalling channel is keyed from operation of the reverse zone 4 elements of the relay.2. • A current reversal guard timer is included in the signal send logic to prevent unwanted trips of the relay on the healthy circuit. during current reversal situations on a parallel circuit. then it will operate after the Tp delay if no block is received.LOGIC DIAGRAM FOR THE BOP Z2 SCHEME (SEE TRIP LOGIC TABLE IN SECTION 2. a short time delay on aided tripping. Z2A Z4A ZL A B Z1A Z1B Z4B Z2B P3063XXa FIGURE 30 . Tp.8. plus Channel NOT Received. delayed by Tp. must be used. the relay will operate in the conventional Basic mode.MAIN PROTECTION IN THE BOP Z2 SCHEME Protection A Signal Emission Send Z4' Téléac Protection B Signal Emission Send Z4' Téléac Z1' Z1' tZ1 T1 & & & & & & Z3' tZ3 T3 Z3' Zp' tZp Tzp Tp ≥1 Trip Trip ≥1 tZp Tzp Z4' & & & & Z2' tZ2 T2 tZ3 T3 Zp' Z4' tZ4 T4 tZ1 T1 tZ4 T4 Tp Z2' & & tZ2 T2 P0533ENa FIGURE 31 .P44x/EN AP/E33 Application Notes Page 54/220 MiCOM P441/P442 & P444 • If the signalling channel is taken out of service.

2 Page 55/220 Blocking Overreach Protection with Overreaching Zone 1 (BOP Z1) This scheme is similar to that used in the AREVA EPAC and PXLN relays.4) . If the remote relay has picked up in overreaching zone 1. plus Channel NOT Received.8. NOTE: The fastest tripping is always subject to the Tp delay. Send logic: Reverse Zone 4 Trip logic: Zone 1. Z2A Z4A Z1A A ZL B Z1B Z4B Z2B P3065XXa FIGURE 32 .Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 2. Figure 32 shows the zone reaches.2. The signalling channel is keyed from operation of the reverse zone 4 elements of the relay. then it will operate after the Tp delay if no block is received. and Figure 33 the simplified scheme logic.MAIN PROTECTION IN THE BOP Z1 SCHEME Protection A Signal Send Z4' Protection B Signal Send Z4' Z2' Z2' tZ2 & & & & & & Z3' tZ3 Z3' Zp' tZp ≥1 & & Trip Trip ≥1 tZp Z4' & tZ4 & Z1' tZ1 tZ3 Zp' Z4' tZ4 tZ2 Z1' & & Tp tZ1 Tp P3066ENa FIGURE 33 .LOGIC DIAGRAM FOR THE BOP Z1 SCHEME (SEE TRIP LOGIC TABLE IN SECTION 2.9. delayed by Tp.5.

10 MiCOM P441/P442 & P444 Distance schemes current reversal guard logic For double circuit lines. t2(C) t2(D) Fault Strong source Fault A L1 B C L2 D Weak source A L1 C L2 B D Note how after circuit breaker B on line L1 opens the direction of current flow in line L2 is reversed. A system configuration that could result in current reversals is shown in Figure 34. After the faulty line is isolated. as circuit breaker B trips it causes the direction of current flow in line L2 to reverse.10. The reset of the current reversal guard timer is initiated when the reverse looking Zone 4 resets. the relay’s permissive trip logic and signal send logic are inhibited at substation D (Figure 34). A time delay tREVERSAL GUARD is required in case the overreaching trip element at end D operates before the signal send from the relay at end C has reset. . and Blocking schemes to trip the healthy line. Otherwise this would cause the relay at D to over trip. the relays in the healthy line are prevented from over tripping due to the sequential opening of the circuit breakers in the faulted line. The race between operation and resetting of the overreaching distance elements at each line terminal can cause the Permissive Overreach. For a fault on line L1 close to circuit breaker B. the fault current direction can change in one circuit when circuit breakers open sequentially to clear the fault on the parallel circuit. When the current reverses and the reverse looking Zone 4 elements reset.1 Permissive Overreach Schemes Current Reversal Guard The current reversal guard incorporated in the POP scheme logic is initiated when the reverse looking Zone 4 elements operate on a healthy line.2 = Maximum signalling channel reset time + 35ms. Blocking Scheme Current Reversal Guard The current reversal guard incorporated in the BOP scheme logic is initiated when a blocking signal is received to inhibit the channel-aided trip. The recommended setting is: tREVERSAL GUARD 2. P3067ENa FIGURE 34 . The recommended setting is: Where Duplex signalling channels are used: tREVERSAL GUARD = Maximum signalling channel operating time + 14ms. Permissive tripping for the relays at D and C substations is enabled again.P44x/EN AP/E33 Application Notes Page 56/220 2. The change in current direction causes the overreaching distance elements to see the fault in the opposite direction to the direction in which the fault was initially detected (settings of these elements exceed 150% of the line impedance at each terminal). Where Simplex signalling channels are used: tREVERSAL GUARD = Maximum signalling channel operating time minimum signalling channel reset time + 14ms. the reverse-looking Zone 4 elements at substation C and the forward looking elements at substation D will reset. the blocking signal is maintained by the timer tREVERSAL GUARD.10.CURRENT REVERSAL IN DOUBLE CIRCUIT LINES (See the zone’ description in section 2. once the faulted line is isolated and the current reversal guard time has expired. Once the reverse looking Zone 4 elements have operated.4 – unblock/blocking logical scheme) 2. Thus referring to Figure 34.

TOR protection remains enabled for 500ms following circuit breaker closure. TABLE 6 . since a persistent fault at the remote end of the line can be cleared instantaneously after reclosure of the breaker. CsZ2 Zone 2 To configure a Permissive scheme.AIDED SCHEME OPTIONS ON CHANNEL RECEIPT Where appropriate. The options for SOTF and TOR are found in the “Distance Schemes” menu.12 Switch On To Fault and Trip On Reclose protection Switch on to fault protection (SOTF) is provided for high speed clearance of any detected fault immediately following manual closure of the circuit breaker. CsZ4 Zone 4 To configure a Blocking scheme. Instantaneous three pole tripping (TOR logic) can be selected for faults detected by various elements. 2. SOTF protection remains enabled for 500ms following circuit breaker closure. Further customising of distance schemes can be achieved using the Programmable Scheme Logic to condition send and receive logic. PermZ1 To configure a Permissive scheme where Zone 1 can only trip if a channel is received. Setting Signal Send Zone Function None No Signal Send To configure a Basic scheme. BlkZ1 To configure a Blocking scheme where Zone 1 can only trip if a channel is NOT received. The signal send zone options are shown in Table 5.11 Page 57/220 Distance schemes in the “open” programming mode When a scheme is required which is not covered in the Standard modes above. Trip on reclose protection (TOR) is provided for high speed clearance of any detected fault immediately following autoreclosure of the circuit breaker. PermFwd To configure a Permissive scheme where any forward distance zone start will cause an aided trip if a channel is received. The user then has the facility to decide which distance relay zone is to be used to key the signalling channel.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 2. the Open programming mode can be selected. BlkZ2 To configure a Blocking scheme where Zone 2 can trip without waiting for tZ2 timeout if a channel is NOT received. rather than after the zone 2 time delay. TABLE 5 . CsZ1 Zone 1 To configure a Permissive scheme. detected via the CB Man Close input or CB close with CB control or Internal detection with all pole dead (see Figure 37). (See MiCOM S1 settings description above). or for the duration of the close pulse on internal detection.SIGNAL SEND ZONES IN OPEN SCHEMES Setting Aided Scheme Function None None To configure a Basic scheme. . and what type of aided scheme runs when the channel is received. [Instantaneous three pole tripping (and auto-reclose blocking) can be also selected (AR lock out by BAR Figure 80 in AR section)– See BAR logic in Figure 80 AR description section]. The use of a TOR scheme is usually advantageous for most distance schemes. the tREVERSAL GUARD and Tp timer (in case of blocking scheme for covering the time transmission) settings will appear in the relay menu. PermZ2 To configure a Permissive scheme where Zone 2 can trip without waiting for tZ2 timeout if a channel is received. and the aided scheme options on channel receipt are shown in Table 6.

1: Bit 7 : SOTF Z1 Enabled Bit 8 : SOTF Z2 Enabled SOTF all Zones Bit 5 to D Default: bit 5 Bit 9 : SOTF Z3 Enabled Bit A: SOTF Z1+Rev Bit B: SOTF Z2+Rev Bit C: SOTF Dist. Scheme Bit D: SOTF Disable SOTF Delay 110sec 10sec 3600sec 1 sec . Scheme . 14 bits Bit 3:TOR All Zones. Bit 4:TOR Dist. Bit 1:TOR Z2 Enabled.P44x/EN AP/E33 Application Notes Page 58/220 MiCOM P441/P442 & P444 (7 additional settable bits are available from version A3. From version A3. Detect. Bit 2: TOR Z3 Enabled.1) and are as shown below: Menu text Default setting Setting range Min Step size Max GROUP 1 DISTANCE SCHEMES TOR-SOTF Mode Bit 0: TOR Z1 Enabled. TOR Dist scheme Bit 0 to 4 Bit 5 : SOTF All Zones Default: bit 4 Bit 6 : SOTF Lev.

.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 2. the « TOR Enable » is activated . The detection of open pole is based on the activation of : Any Pole Dead (at least one pole opened).0 /allows variation of the duration when dead pole is detected before the internal logic detects line dead and activates the SOTF logic and also where the relay logic detects that further delayed autoreclose shots are in progress. TOR Enable logic is activated in 2 cases : 1. SOTF protection is enabled for manual reclosures. It will be reset at the end of the internal or external reclaim time.12. Trip Reclosing Any Pole Dead 200 ms 500 ms TOR Enable P0532ENa • SOTF protection is enabled any time that the circuit breaker has been open 3 pole for longer than 110s. not for autoreclosure.the timer is configurable from version A3. that timer is configurable from version A3. Without any reclaim time (internal AR disabled or external opto input Reclaim Time not assigned in the PSL): TOR Enable will be activated during a 200 ms time window. 2. following the detection of pole dead detection. When internal AR is activated or when the reclaim signal from an external AR is connected to a digital input (opto): As soon as the reclaim time starts. which is requested in case of VT Bus side). in case of an incorrect Any Pole Dead detection performed by the internal level detectors (Ex: Fault front of Busbar on a parallel line and weak source on the other end of the line) A delay of 200ms will allow the adjacent line to be tripped and the level detectors will then reset the timer : • TOR protection logic is enabled any time that any circuit breaker pole has been open longer than 200ms but not longer than 110s default value (ie. There is a difference between them due to the AR (internal or external) which must be blocked in SOTF logic. The TOR logic will be reset (TOR Enable) ONLY 500 ms after the drop off of any pole dead detection.0 /allows variation of the duration when dead pole is detected before the internal logic detects line dead and activates the SOTF logic and autoreclosure is not in progress. (default value for V< dead line = 20% VN) − I< is either a fixed threshold of 5% In or equal to the I< threshold of the Breaker Failure protection (default value for I< CB fail = 5% IN). First shot autoreclosure is in progress). The Dead pole Level Detectors V< and I< per phase are settable as described belows: − V< is either a fixed threshold 20% Vn or equal to V Dead Line threshold of the check synchro function if enabled. Thus.1 Page 59/220 Initiating TOR/SOTF Protection SOTF/TOR Activated 2 signals are issued from the logic: TOR Enable . It is a OR logic between the internal analog detection (level detectors) or the external detection (given by CB status : 52A/52B.SOTF Enable (See DDB description in appendix from that chapter). This behaviour has been designed to avoid any maloperation on a parallel line.

2.0). AR_RECLAIM Pulse >1 T INP_RECLAIM >1 500 ms TOR Enable 1P or 3P AR INP_RECLAIM Assigned >1 T & 0 S 200 ms Q >1 >1 0 Any Pole Dead R T 500 ms >1 R T All Pole Dead SOTF HS Q 0 TSOTF Enable (by default:110 s) SOTF Enable S >1 & CBC_Closing Order CB_Control activated INP_CB_Man_Close & & P0485ENa FIGURE 35 – SOTF/TOR LOGIC . SOTF is enable for 500msec and then is reset.START . then SOTF is enabled for 500 ms and then reset. When an external closing command (manual or by remote communication via control system) is present: The SOTF logic is activated immediately.P44x/EN AP/E33 Application Notes Page 60/220 MiCOM P441/P442 & P444 SOTF Enable logic is activated in 2 cases: 1. as soon as all poles are closed. As soon as all the poles are closed (after the external closing order if a synchro condition is used in the PSL). If no external closing command (manual or by remote communication via control system) is present : When the internal levels detectors have detected a three pole open for more than 110 s (settable from A3.

to avoid maloperation where power transformers are connected in-zone. until a trip occurs. and memory voltage for a directional decision is unavailable. Harmonic blocking of distance zones occurs when the magnitude of the second harmonic current exceeds 25% of the fundamental.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 2. T3=600ms. . Tzp=400ms. Note. and inrush current would otherwise cause problems. Thus tripping can even occur for close-up three phase short circuits where line connected VTs are used. T2=200ms. individual distance protection zones can be enabled or disabled by means of the TOR-SOTF Mode function links.“ALL ZONES” DISTANCE CHARACTERISTIC AVAILABLE FOR SOTF/TOR TRIPPING Test results from different settings selected in MiCOM S1. the TOR/SOTF element has second harmonic current detection. Setting “All Zones Enabled” allows instantaneous tripping to occur for all faults within the trip characteristic shown in Figure 36 below. WARNING: MiCOM S1 DOES NOT DYNAMICALLY CHANGE THE SETTINGS. SOTF Z2: means that an instantaneous 3 poles trip will occur for fault in Z1 or Z2 without waiting for the issue of the distance timer T1 or T2 only in case Z2 or Z1 are detected by the logic. Setting the relevant bit to 1 will enable that zone. The fault is maintained with a duration bigger than the 500msec SOTF time. the zones will trip without waiting for their usual time delays.2 Page 61/220 TOR-SOTF Trip Logic During the TOR/SOTF 500ms window. X Zone 4 R Zone 3 Directional line (not used) P0535ENa FIGURE 36 . setting bits to 0 will disable distance zones.12. T0 = instantaneous Trip Ts = Trip at the end of SOTF time window (500ms) T1 = 0. T4=1s (Distance timer). AND ONE SETTING MAY AFFECT ANOTHER. When enabled (Bit = 1).

TOR Trip logic results Type of Fault Fault in Z1 Fault in Z2 Fault in Zp Fwd Fault in Zp Rev Fault in Z3 Fault in Z4 TOR selected Logic TOR All Zone (Zp Fwd) TOR trip T0 TOR trip T0 TOR trip T0 TOR trip T0 TOR trip T0 TOR trip T0 TOR Z1 Enabled (Zp Fwd) TOR trip T0 Dist trip T2 Dist trip Tp Dist trip Tp Dist trip T3 Dist trip T4 TOR Z2 Enabled (Zp Fwd) TOR trip T0 TOR trip T0 Dist trip Tp Dist trip Tp Dist trip T3 Dist trip T4 TOR Z3 Enabled (Zp Fwd) TOR trip T0 TOR trip T0 TOR trip T0 Dist trip Tp TOR trip T0 Dist trip T4 TOR Dist.P44x/EN AP/E33 Application Notes Page 62/220 MiCOM P441/P442 & P444 SOTF Trip logic results Type of Fault Fault in Z1 Fault in Z2 Fault in Zp Fwd Fault in Zp Rev Fault in Z3 Fault in Z4 SOTF selected Logic SOTF All Zone (Zp Fwd) SOTF trip T0 SOTF trip T0 SOTF trip T0 Same result SOTF trip if Zp Rev T0 T0 SOTF trip T0 SOTF Z1 (Zp Fwd) SOTF trip T0 DIST trip T2 DIST trip TZp x DIST trip T3 DIST trip T4 SOTF Z2 (Zp Fwd) SOTF trip T0 SOTF trip T0 DIST trip TZp x DIST trip T3 DIST trip T4 SOTF Z3 (Zp Fwd) SOTF trip T0 SOTF trip T0 SOTF trip T0 x SOTF trip T0 DIST trip T4 SOTF Z1+Rev (Zp Fwd) SOTF trip T0 DIST trip T2 DIST trip TZp x DIST trip T3 SOTF trip T0 SOTF Z2+Rev (Zp Fwd) SOTF trip T0 SOTF trip T0 DIST trip TZp x DIST trip T3 SOTF trip T0 SOTF Z1+Rev (Zp Rev) SOTF trip T0 DIST trip T2 x SOTF trip T0 DIST trip T3 DIST trip T4 SOTF Z2+Rev (Zp Rev) SOTF trip T0 SOTF trip T0 x SOTF trip T0 DIST trip T3 DIST trip T4 SOTF Dist. Sch. (Zp fwd) (With a 3Plogic) SOTF trip T1 SOTF trip T2 SOTF trip TZp x SOTF trip T3 SOTF trip T4 SOTF Disable (Distance scheme & 1P) DIST trip T1* DIST trip T2 DIST trip TZp* x DIST trip T3 DIST trip T4 No setting in SOTF (All Bits at 0) & No I>3 DIST trip T1* DIST trip T2 DIST trip TZp x DIST trip T3 DIST trip T4 Level detectors SOTF trip T0 SOTF trip T0 SOTF trip T0 x SOTF trip T0 SOTF trip T0 *No Ban Tri: Distance trip logic is applied without any 3P trip logic forced by SOTF.Scheme (logic POP/PUP) Dist trip T1 Dist trip T2 Dist trip Tp Dist trip Tp Dist trip T3 Dist trip T4 .

12. but no trip results as the system voltage rapidly recovers to near nominal. .Application Notes MiCOM P441/P442 & P444 2. an instantaneous 3 phases trip logic will be issued. such as those where maintenance earth clamps are inadvertently left in position on line energisation. provided that its corresponding Live Line level detector has not picked up within 20ms. When closing a circuit breaker to energize a healthy line. 2.12. if a faulty current is measured over the I>3 threshold value (adjusted in MiCOM S1).4 Switch on to Fault and Trip on Reclose by Level Detectors TOR/SOTF level detectors (Bit6 in SOTF logic). allows an instantaneous 3 phases tripping from any low set I< level detector. This element would trip for close-up high current faults. the I>3 overcurrent element remains in service with a trip time delay equal to the setting I>3 Time Delay. current would normally be detected above setting. resulting in a trip.3 P44x/EN AP/E33 Page 63/220 Switch on to Fault and Trip on Reclose by I>3 Overcurrent Element (not filtered for inruch current): Inside the 500 ms time window initiated by SOTF/TOR logic. • SOTF/TOR trip by level detectors per phase: If Vphase< 70% Vn AND if Iphase> 5% In during 20 ms (to avoid any maloperation due to unstable contact during reclosing order). After the 500 ms TOR/SOTF time windows has ended. Only when a line fault is present will the voltage fail to recover. an instantaneous trip order is issued.

P44x/EN AP/E33 Application Notes Page 64/220 MiCOM P441/P442 & P444 The logic diagram for this. Scheme Enable & Dist Trip TOR Enable P0486ENa FIGURE 37 .SWITCH ON TO FAULT AND TRIP ON RECLOSE LOGIC DIAGRAM . and other modes of TOR/SOTF protection is shown in Figure 37: Va > & T Ia < 0 & 0 & 0 & TOC A 20 ms Vb > & T Ib < TOC B 20 ms Vc > & Ic < T TOC C 20 ms SOTF LD Enable LD Enable SOTF All Zones Enable & All Zones SOTF Z1 Enable & ≥1 Z1 & & SOTF Z1 + rev Enable Zp & Z4 1 Zp Reverse & & SOTF Z2 + rev Enable Z1+Z2 SOTF Z2 Enable SOTF Z3 Enable & ≥1 SOTF/TOR trip & Z1+Z2+Z3 PHOC_Start_3Ph_I>3 SOTF Enable TOR Z1 Enable & Z1 TOR Z2 Enable & Z1+Z2 TOR Z3 Enable & Z1+Z2+Z3 TOR All Zones Enable ≥1 & & All Zones Dist.

Ic< Internal Logic No current detected (I< threshold.) Z1. Inputs Data Type Description Ia<.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 2. Also the I>3 element must be disabled to avoid overreaching trips by level detectors. by default 5% In or I< CB fail) Dist Trip Internal Logic Trip by Distance logic AR_RECLAIM Internal Logic Internal AR reclaim in progress INP_RECLAIM Digital Input External AR in progress (by opto) CBC_closing order Internal Logic Closing order in progress by CB Control INP_CB_Man_Close Digital Input CB Closing order (by opto) CB Control activated Configuration CB control activated 1P or 3 P AR Configuration 1P or 3P AR enabled TOR Zi Enable Configuration TOR logic enabled in case of fault in Zi TOR All Zones Enable Configuration TOR logic enabled in case for all zones (Distance Start) Dist. the I>3 current setting applied should be above load current. Z3. Typically.5. Z2. Ib<.5 2.12.12.12.5. Vb>. and > 35% of peak magnetising inrush current for any connected transformers as this element has no second harmonic blocking.2 Page 65/220 Setting Guidelines • When the overcurrent option is enabled.1 2. Scheme Enable Configuration Distance scheme aided Trip logic applied SOTF LD Enable Configuration Levels detectors in SOTF activated SOTF All Zones Enable Configuration SOTF logic enabled for all zones (Distance Start) Va>. Setting guidelines for the I>3 element are shown in more detail in Table below. TOR-SOTF Mode bit 0 only would be set to “1”. • When a Zone 1 Extension scheme is used along with autoreclosure. fixed at 70% Vn) Valid_stx_PHOC Configuration Threshold I>3 must be activated PHOC_Start_3Ph_I>3 Internal Logic Detection by I>3 overcurrents (not filtered by INRUSH. Vc> Internal Logic Live Voltage detected ( V Live Line threshold. all zones Internal Logic Zones Detected Data Type Description TOC_A Internal Logic Trip phase A by TOR /SOTF TOC_B Internal Logic Trip phase B by TOR /SOTF TOC_C Internal Logic Trip phase C by TOR /SOTF SOTF/TOR trip Internal Logic Trip by SOTF (manual close) or TOR (AR close) logic Outputs . it must be ensured that only Zone 1 distance protection can trip instantaneously for TOR.

6. indicates a Tripping order on phase B issued by the SOTF levels detectors .P44x/EN AP/E33 Application Notes Page 66/220 2. CB aux A CB aux B CB aux C The DDB CB Aux if assigned to an opto input in PSL and when energized.12. indicates a Tripping order on phase C issued by the SOTF levels detectors . indicates that TOR logic is activated in the relay see logic description in Figure 37 TOC Start A The DDB TOC Start A if assigned in PSL.see Figure 37 Any Pole Dead The DDB Any Pole Dead if assigned in PSL. indicates that SOTF logic is enabled in the relay – see logic description in Figure 37 TOR Enable The DDB TOR Enable if assigned in PSL. indicates that at least one pole is opened . If CB control is activated managed by CB control) SOTF will be enable by internal detection (CB closing order AR Reclaim The DDB AR Reclaim if assigned to an opto input in PSL and when energized.see Figure 37 TOC Start C The DDB TOC Start C if assigned in PSL.(External AR logic applied).1 Inputs Man Close CB Digital input (opto) 6 is assigned by default PSL to "Man Close CB" The DDB Man Close CB if assigned to an opto input in PSL and when energized. will start the internal logic TOR enable (see Figure 35).see Figure 37 TOC Start B The DDB TOC Start B if assigned in PSL. DDB description in appendix of the same section.12.6 MiCOM P441/P442 & P444 Inputs /Outputs in SOTF-TOR DDB Logic See also..12. 2.6. indicates a Tripping order on phase A issued by the SOTF levels detectors . will be used for Any pole dead & All pole dead internal detection 2.2 Outputs SOTF Enable The DDB SOTF Enable if assigned in PSL. will initiate the internal SOTF logic enable (see Figure 35) without CB control.

1s Blocking Zones 00000000 Bit 0: Z1/Z1X Block.01/In Ω IN > Status Enabled Disabled or Enabled IN > (% Imax) 40% 10% I2 > Status Enabled Disabled or Enabled I2 > (% Imax) 30% 10% Imax line > Status Enabled Disabled or Enabled Imax line > 3 x In 1 x In 20 x In 0. In the case of a stable power swing it is important that the relay should not trip. Such disturbances can cause generators on the system to accelerate or decelerate to adapt to new power flow conditions.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 67/220 All Pole Dead The DDB All Pole Dead if assigned in PSL.01 x In Unblocking Time delay 30s 0 30s 0.5/In Ω 0 400/In Ω 0. The relay should also not trip during loss of stability since there may be a utility strategy for controlled system break up during such an event. Bit 1: Z2 Block. which in turn leads to power swinging.13 Power swing blocking (PSB) Power swings are oscillations in power flow which can follow a power system disturbance. Menu text Default setting Setting range Step size Min Max GROUP 1 POWER SWING Delta R 0. Bit 2: Z3 Block.01/In Ω Delta X 0. Bit 3: Zp Block. loss of synchronism across a power system or changes in direction of power flow as a result of switching. indicates all pole are dead (All 3 poles are opened) SOTF/TOR Trip The DDB SOTF/TOR Trip if assigned in PSL. indicates a 3poles trip by TOR or SOTF logic see Figure 37 2. A power swing may cause the impedance presented to a distance relay to move away from the normal load area and into one or more of its tripping characteristics. They can be caused by sudden removal of faults. 100% 100% 1% 1% .5/In Ω 0 400/In Ω 0.

P44x/EN AP/E33 Application Notes Page 68/220 2.POWER SWING SETTINGS (SET HIGHZONE IS LOCKED OUT) . Power swing detection uses a ∆R (resistive) and ∆X (reactive) impedance band which surrounds the entire phase fault trip characteristic.POWER SWING DETECTION CHARACTERISTICS FIGURE 39 . where power swings would not normally be experienced.13.1 MiCOM P441/P442 & P444 The Power Swing Blocking Element PSB can be disabled on distribution systems. or set to 0 to allow tripping as normal. The Blocked Zones function links are set to 1 to block zone tripping. This band is shown in Figure 38 below: ∆X Zone 3 ∆R ∆R Power swing bundary Zone 4 ∆X P3068ENa FIGURE 38 . Operation of the PSB element is menu selectable to block the operation of any or all of the distance zones (including aided trip logic) or to provide indication of the swing only.

The threshold is set as: Imax line> (in A).1 In + ( (I2> / 100) . A power swing is detected where all three phase-phase measured impedances have remained within the ∆R band for at least 5ms.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 69/220 A fault on the system results in the measured impedance rapidly crossing the ∆R band. PSB is indicated on reaching zone 3 or zone 4.1 x In. as there are three selectable conditions which can unblock the relay: A biased residual current threshold is exceeded .this allows tripping for three-phase faults occurring during a power swing.this allows tripping for earth faults occurring during a power swing.1 x In. A phase current threshold is exceeded . with the threshold always subject to a minimum of 0. Power swings follow a much slower impedance locus. Thus the residual current threshold is: IN > 0.13.this allows tripping for phasephase faults occurring during a power swing. with the threshold always subject to a minimum of 0.1 In + ( (IN> / 100) . en route to a tripping zone. and have taken longer than 5ms to reach the trip characteristic (the trip characteristic boundary is defined by zones 3 and 4). the ∆R and ∆X band settings are both set with: 0. NOTE: 2. (I maximum) ). Typically. The bias is set as: Ir> (as a percentage of the highest measured current on any phase).032 x ∆f x Rmin load.2 ∆f = Power swing frequency Unblocking of the Relay for Faults During Power Swings The relay can operate normally for any fault occurring during a power swing. A biased negative sequence current threshold is exceeded . . (I maximum) ). The bias is set as: I2> (as a percentage of the highest measured current on any phase). Thus the negative sequence current threshold is: I2 > 0.

P44x/EN AP/E33 Application Notes Page 70/220 MiCOM P441/P442 & P444 AnyPoleDead ≥1 Loop AN detected in PS bundary S ≥1 ∆t Q R & ≥2 S Q PS loop AN R Loop BN detected in PS bundary ≥1 S ≥1 ≥1 & Tunb ∆t Q R S Q PS loop BN R Tunb ≥1 Loop CN detected in PS bundary S ≥1 ∆t Q R & ≥1 S S Q PS loop CN Q R R Power Swing Detection Tunb Inrush AN Inrush BN Inrush CN ≥1 Fault clear Healthy Network All Pole Dead & /Fuse Failure confirmed PS disabled Iphase>(Imax line>) S Q Unblocking Imax disabled IN> threshold R ∆ Tunblk S Q Unblocking IN disabled I2> threshold S ≥1 R Q ≥1 ∆Tunblk Power Swing unblocking R S Q Unblocking I2> disabled R P0488ENa FIGURE 40 – POWER SWING DETECTION & UNBLOCKING LOGIC .

01/In ∆Tunbk Configuration 0 to 60 s by step de 1 s.DISTANCE PROTECTION BLOCK/UNBLOCKING LOGIC Data Type Description ∆R Configuration 0. Imax> Configuration 1 to 20 In by step de 0.1/In to 250/In by step 0.1/In to 250/In by step de 0.01/In ∆X Configuration 0.01 IN> Configuration 0.1In + 10 to 100 % of Imax> I2> Configuration 0.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 71/220 Z1x & Z1x' Unblock Z1 ≥1 & Z1 Power Swing Detection Unblocking Power Swing Unblock Z2 ≥1 ≥1 & Z1' Z2' Z2 Unblock Z3 ≥1 & Z3' Z3 Zp_Fwd ≥1 & & Zp' Unblock Zp Zp P0489ENa FIGURE 41 .1In + 10 to 100 % of Imax> Unblock Z1 Configuration 0 => Z1 blocked during PSwing 1 => Z1 unblocked during PSwing Unblock Z2 Configuration 0 => Z2 blocked during PSwing 1 => Z2 unblocked during PSwing Unblock Z3 Configuration 0 => Z3 blocked during PSwing 1 => Z3 unblocked during PSwing Unblock Zp Configuration 0 => Zp blocked during PSwing 1 => Zp unblocked during PSwing .

the power swing current will not exceed 2. and the maximum expected power swing current. It is also used to detect close-up faults (in SOTF/TOR tripping logic no timer is applied).14 − 30s if a near permanent block is required.The fourth element is only used for stub bus protection. with independent time delay characteristics. Thus.P44x/EN AP/E33 Application Notes Page 72/220 2.PHASE CURRENT THRESHOLD TO UNBLOCK PSB FOR LINE FAULTS 2. (Could be used for back up protection during a VTS logic) The following Table shows the relay menu for overcurrent protection. where it is fixed as nondirectional. Typical setting limits are given in Table 7 and Table 8 below: Parameter Minimum Setting (to avoid maloperation for asymmetry in power swing currents) Maximum Setting (to ensure unblocking for line faults) Typical Setting IN> > 30% < 100% 40% I2> > 10% < 50% 30% TABLE 7 . The first two stages of overcurrent protection.2 x (maximum power swing current) 0.13. The third and fourth overcurrent stages can be set as follows: I>3 . I>4 .13. One or more stages may be enabled. All the stages trip three-phase only. .3 MiCOM P441/P442 & P444 Typical Current Settings The three current thresholds must be set above the maximum expected residual current unbalance.BIAS THRESHOLDS TO UNBLOCK PSB FOR LINE FAULTS Parameter Minimum Setting Maximum Setting Imax line> 1. certain locations on the power system can be designated as split points. All overcurrent and directional settings apply to all three phases but are independent for each of the four stages. Generally. or definite time (DT). Power swing blocking is automatically removed after the Unblocking Delay with typical settings: 2. in order to complement the relay distance protection. Note that all tripping via overcurrent protection is three pole. I>1 and I>2 have time delayed characteristics which are selectable between inverse definite minimum time (IDMT). This element can be permanently enabled.The third element is fixed as non-directional.8 x (minimum phase fault current level) TABLE 8 . where circuit breakers will trip three pole should a power swing fail to stabilise. or enabled only for Switch on to Fault (SOTF) or Trip on Reclose (TOR). P442 and P444 relays provides two stage non-directional / directional three phase overcurrent protection and two non directional stages (I>3 and I>4). the maximum negative sequence unbalance.In. including the available setting ranges and factory defaults. for instantaneous or definite time delayed tripping. Directional and non-directional overcurrent protection The overcurrent protection included in the P441. − 2s if unblocking is required to split the system. and only enabled when the opto-input Stub Bus Isolator Open (Stub Bus Enable) is energised.4 Removal of PSB to Allow Tripping for Prolonged Power Swings It is possible to limit the time for which blocking of any distance protection zones is applied.

IEC V Inverse. Non-Directional I>2 Current Set 2 x In 0.01s I>4 Status Disabled Disabled or Enabled I>4 Current Set 4 x In 0.08 x In 32 x In 0. US Inverse.2s 0 100s 0. Directional Fwd.2 0.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Menu text Page 73/220 Default setting Setting range Min Step size Max GROUP 1 BACK-UP I> I>1 Function DT Disabled. IEEE M Inverse.0 x In 0.08 x In 4. DT.01s I>2 Time Delay VTS 2s 0 100s 0. IEC S Inverse.5 15 0.01s I>1 TMS 1 0.01xIn I>3 Time Delay 3s 0s 100s 0. IEEE E Inverse.08 x In 32 x In 0. DT.01s I>3 Status Enabled Disabled or Enabled I>3 Current Set 3 x In 0. IEC V Inverse. US Inverse.025 1.025 I>1 Time Dial 7 0.1 I>1 Reset Char DT DT or Inverse I>1 tRESET 0 0 100s 0.01 x In I>2 Time Delay 2s 0 100s 0. IEEE E Inverse. Directional Rev I>1 VTS Block Non-Directional Block. Non-Directional I>1 Current Set 1.0 x In 0.025 1. UK LT Inverse.01xIn I>4 Time Delay 4s 0s 100s 0.08 x In 4. Directional Fwd.01s I>2 TMS 1 0. IEEE V Inverse. US ST Inverse I>1 Direction Directional Fwd Non-Directional. IEC E Inverse.01s . UK LT Inverse.025 I>2 Time Dial 7 0.5 15 0.01s I>2 Function DT Disabled.5 x In 0.2 0. IEC S Inverse.1 I>2 Reset Char DT DT or Inverse I>2 tRESET 0 0 100s 0. IEC E Inverse.01s I>1 Time Delay VTS 0. Directional Rev I>2 VTS Block Non-Directional Block. IEEE M Inverse.01 x In I>1 Time Delay 1s 0 100s 0. US ST Inverse I>2 Direction Non Directional Non-Directional. IEEE V Inverse.

0114 Very Inverse IEEE 19. with regard to the time setting.95 2 0.491 Extremely Inverse IEEE 28. The menu is arranged such that if an IEC/UK curve is selected.2 2 0.02 0. whereas a time dial setting is employed for the IEEE/US curves.14 0.1217 Inverse US 5. comply with the following formula: K t=T× + L α (I/Is) –1   Where: t = operation time K = constant I = measured current Is = current threshold setting α = constant L = ANSI/IEEE constant (zero for IEC curves) T = Time multiplier Setting Curve description Standard K constant α constant L constant Standard Inverse IEC 0.02 0 Very Inverse IEC 13.0515 0.1694 Note that the IEEE and US curves are set differently to the IEC/UK curves.61 2 0.5 1 0 Extremely Inverse IEC 80 2 0 Long Time Inverse UK 120 1 0 Moderately Inverse IEEE 0. as shown in the previous menu. the I> Time Dial cell is not visible and vice versa for the TMS setting. A time multiplier setting (TMS) is used to adjust the operating time of the IEC curves.18 Short Time Inverse US 0.P44x/EN AP/E33 Application Notes Page 74/220 MiCOM P441/P442 & P444 The inverse time delayed characteristics listed above. Both the TMS and Time Dial settings act as multipliers on the basic characteristics but the scaling of the time dial is 10 times that of the TMS. .02394 0.02 0.

(Note that if an IEEE/US operate curve is selected. any directional zones would be unable to trip. Typical systems which require such protection are parallel feeders and ring main systems. The I>1 and I>2 elements are continuously active. where overcurrent elements are set. 2. The timer hold facility can be found for the first and second overcurrent stages as settings I>1 tRESET and I>2 tRESET. 2.14. which may either be set to zero or to a definite time value. This may be useful in certain applications.1 P44x/EN AP/E33 Page 75/220 Application of Timer Hold Facility The first two stages of overcurrent protection in the P441. By using the timer hold facility the relay will integrate the fault current pulses. as the reset time is then determined by the programmed time dial setting.14. this will affect operation of voltage dependent protection elements.Application Notes MiCOM P441/P442 & P444 2.4 Setting Guidelines I>1 and I>2 Overcurrent Protection When applying the overcurrent or directional overcurrent protection provided in the P441. In general.14. Setting of the timer to zero means that the overcurrent timer for that stage will reset instantaneously once the current falls below 95% of the current setting. it is necessary to add directional control to the overcurrent relays in order to obtain correct discrimination. until the fault becomes permanent. As the I>1 and I>2 overcurrent elements in the relay use the same directionalising technique as for the distance zones. When the reset time of the overcurrent relay is instantaneous the relay may not trip until the fault becomes permanent. An example is shown in Figure 42. Note that this cell is not visible if an inverse time reset characteristic has been selected. For more detailed information regarding overcurrent relay co-ordination.3 Time Delay VTS Should the Voltage Transformer Supervision function detect an ac voltage input failure to the relay. for example when grading with upstream electromechanical overcurrent relays which have inherent reset time delays. standard principles should be applied in calculating the necessary current and time settings for co-ordination. and so will be blocked. reference should be made to AREVA’s ‘Protective relay Application Guide’ . Distance protection will not be able to make a forward or reverse decision. An example of this may occur in a plastic insulated cable. Setting of the hold timer to a value other than zero. . To maintain protection during periods of VTS detected failure. However tripping is blocked if the distance protection function starts. P442 and P444 relays. thereby extinguishing the fault. In this application it is possible that the fault energy melts and reseals the cable insulation. This process repeats to give a succession of fault current pulses. delays the resetting of the protection element timers for this period. the reset characteristic may be set to either definite or inverse time in cell I>1 Reset Char. P442 and P444 relays are provided with a timer hold facility.14. these should also be set to time discriminate with downstream and reverse distance protection. otherwise this setting cell is not visible in the menu). thereby reducing fault clearance time. Another possible situation where the timer hold facility may be used to reduce fault clearance times is where intermittent faults may be experienced. 2. the relay allows an I> Time Delay VTS to be applied to the I>1 and I>2 elements. no characteristic angle needs to be set as the relay uses the same directionalising technique as for the distance zones (fixed superimposed power technique).Chapter 9. On VTS pickup.2 Directional Overcurrent Protection If fault current can flow in both directions through a relay location. such as due to a VT fuse blow. each of increasing duration with reducing intervals between the pulses. both elements are forced to have non-directional operation. Where I>1 or I>2 stages are directionalised. and are subject to their revised definite time delay. Note that the timer hold facility should not be used where high speed autoreclose with short dead times are set.

P442 and P444 relays can be Enabled as an instantaneous highset just during the TOR/SOTF period. such as those where maintenance earth clamps are inadvertently left in position on line energisation. I phase I 1> Trip I 2> No trip t tI1> tI2> P0483ENa FIGURE 43 . If fast protection is the main priority then a time delay of zero or equal to tZ2 could be used. The I>3 current setting applied should be above load current. This element would trip for close-up high current faults.P44x/EN AP/E33 Application Notes Page 76/220 MiCOM P441/P442 & P444 Time I>1 I>2 Z3.tZ2 Reverse Forward Z1. and > 35% of peak magnetising inrush current for any connected transformers as this element has no second harmonic blocking. although operating non-directional. This requires I>1 and I>2 current settings to be calculated to approximate to distance zone reaches. If a high current setting is chosen. An example is shown in Figure 43. . It should also be verified that the remote source is not sufficiently strong to cause element pickup for a closeup reverse fault. If parallel current-based main protection is used alongside the relay.tZ1 P3069ENa FIGURE 42 .TRIPPING LOGIC FOR PHASE OVERCURRENT PROTECTION I>3 Highset Overcurrent and Switch on to Fault Protection The I>3 overcurrent element of the P441. the element remains in service with a trip time delay setting I>3 Time Delay. After this period has ended. and protection discrimination remains the priority. then a DT setting greater than that for the distance zones should be used. such that the I>3 element will not overreach the protected line.tZ3 Z4.TIME GRADING OVERCURRENT PROTECTION WITH DISTANCE PROTECTION (DT EXAMPLE) I>1 and I>2 Time Delay VTS The I>1 and I>2 overcurrent elements should be set to mimic operation of distance protection during VTS pickup.tZp Z2. tZ4 Zp. then the I>3 Time Delay can be set to zero.

a set of 52b auxiliary contacts (closed when the isolator is open) are required.CURRENT AND TIME DELAY SETTINGS FOR THE I>3 ELEMENT Key: As the instantaneous highset trips three pole it is recommended that the I>3 Time Delay is set ≥ tZ2 in single pole tripping schemes. and max. Instantaneous highset to detect close-up faults. I>4 Stub Bus Protection When the protected line is switched from a breaker and a half arrangement it is possible to use the I>4 overcurrent element to provide stub bus protection. grade with distance protection. Thus. it is still common practice to apply a high current setting. reverse fault current Time Delay Required Time delayed backup Longer than tZ3 to protection. The I>4 element would normally be set instantaneous. where mismatched CT saturation could present a spill current to the relay. fault current for a fault at high current closethe remote line terminal up faults. to allow operation of the correct single pole autoreclose cycle. I>3 Current Setting Instantaneous Function After TOR/SOTF Function TOR/SOTF Period Above load and inrush current but LOW Yes . . t>4 = 0s. (Note #. This avoids maloperation for heavy through fault currents. Yes .sensitive. When stub bus protection is selected in the relay menu. ≥ 120% of max. This principle is shown in Table 9. I>3 Time Delay = 0. the element is only enabled when the opto-input Stub Bus Isolator Open (Stub Bus Enable) is energised.may detect HIGH.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 77/220 If a low current setting is chosen.) TABLE 9 . I>3 will need to discriminate with local and remote distance protection. I>4 Element: Stub Bus Protection Busbar 1 VT V=0 Protection's blocking using VTs I>0 Open isolator Stub Bus Protection : I >4 Busbar 2 P0536ENa Although this element would not need to discriminate with load current.

which improves sensitivity for earth faults. negative sequence current will be present on both sides of the transformer for any fault condition. an negative phase sequence overcurrent element may be employed to provide timedelayed back-up protection for any uncleared asymmetrical faults downstream. • Where rotating machines are protected by fuses. loss of a fuse produces a large amount of negative sequence current. Directional Rev I2> VTS Non-Directionel Block. thereby limiting the element’s sensitivity. a negative phase sequence overcurrent element can operate for both phase-to-phase and phase to earth faults. the element may be set as non-directional.15.08In 4In 0. This is a dangerous condition for the machine due to the heating effects of negative phase sequence current and hence an upstream negative phase sequence overcurrent element may be applied to provide back-up protection for dedicated motor protection relays.15 MiCOM P441/P442 & P444 Negative sequence overcurrent protection (NPS) When applying traditional phase overcurrent protection.01s I2> Char Angle –45° –95° +95° 1° . However. For example. irrespective of the transformer configuration. Any unbalanced fault condition will produce negative sequence current of some magnitude. Directional Fwd. the overcurrent elements must be set higher than maximum load current. • In certain applications. 2. an earth fault relay applied on the delta side of a delta-star transformer is unable to detect earth faults on the star side. where phase overcurrent elements may not operate. The following section describes how negative phase sequence overcurrent protection may be applied in conjunction with standard overcurrent and earth fault protection in order to alleviate some less common application difficulties. However.01In I2> Time Delay 10s 0s 100s 0. Non-Directional I2> Current Set 0. • It may be required to simply alarm for the presence of negative phase sequence currents on the system.P44x/EN AP/E33 Application Notes Page 78/220 2. Therefore. The negative phase sequence overcurrent element has a current pick up setting ‘I2> Current Set’.1 Setting Guidelines The relay menu for the negative sequence overcurrent element is shown below: NEG SEQ O/C Default Min Max Step I2> Status Enabled Disabled. Thus.2In 0. Most protection schemes also use an earth fault element operating from residual current. The user may choose to directionalise operation of the element. residual current may not be detected by an earth fault relay due to the system configuration. certain faults may arise which can remain undetected by such schemes. • Negative phase sequence overcurrent elements give greater sensitivity to resistive phase-to-phase faults. and is time delayed in operation by the adjustable timer ‘I2> Time Delay’. Alternatively. for either forward or reverse fault protection for which a suitable relay characteristic angle may be set. Enabled I2> Directional Non-Directional Non-Directional. Operators may then investigate the cause of the unbalance.

‘I2> Current Set’ The current pick-up threshold must be set higher than the negative phase sequence current due to the maximum normal load unbalance on the system. a precise threshold setting would have to be based upon an individual fault analysis for that particular system due to the complexities involved. making use of the relay measurement function to display the standing negative phase sequence current. It must be ensured that the time delay is set greater than the operating time of any other protective device (at minimum fault level) on the system which may respond to unbalanced faults.15.4 • Phase overcurrent elements • Earth fault elements • Broken conductor elements • Negative phase sequence influenced thermal elements Directionalising the Negative Phase Sequence Overcurrent Element Where negative phase sequence current may flow in either direction through a relay location.Application Notes MiCOM P441/P442 & P444 2.15. and setting at least 20% above this figure. it would be associated with a long time delay. This setting should be set equal to the phase angle of the negative sequence current with respect to the inverted negative sequence voltage (. such as: 2. Note that in practice. if the required fault study information is unavailable. to ensure operation of the protection. A suitable relay characteristic angle setting (I2> Char Angle) is chosen to provide optimum performance. the current pick-up setting must be set approximately 20% below the lowest calculated negative phase sequence fault current contribution to a specific remote fault condition. the setting must adhere to the minimum threshold previously outlined. It should also be noted that this element is applied primarily to provide back-up protection to other protective devices or to provide an alarm. ‘I2> Time Delay’ As stated above. correct setting of the time delay for this function is vital. This is vital to prevent unnecessary interruption of the supply resulting from inadvertent operation of this element. in practice. typical settings for the element are as follows: • For a transmission system the RCA should be set equal to -60° • For a distribution system the RCA should be set equal to -45° .2 P44x/EN AP/E33 Page 79/220 Negative phase sequence current threshold.3 Time Delay for the Negative Phase Sequence Overcurrent Element. However.15. Directionality is achieved by comparison of the angle between the negative phase sequence voltage and the negative phase sequence current and the element may be selected to operate in either the forward or reverse direction. Hence. directional control of the element should be employed.V2). However. This can be set practically at the commissioning stage. employing a suitable time delay for coordination with downstream devices. Where the negative phase sequence element is required to operate for specific uncleared asymmetric faults. in order to be at the centre of the directional characteristic. 2. The angle that occurs between V2 and I2 under fault conditions is directly dependent upon the negative sequence source impedance of the system. such as parallel lines or ring main systems.

or the operation of fuses. current from the positive sequence network will be series injected into the negative and zero sequence networks across the break. maloperation of single phase switchgear. the negative sequence current resulting from a series fault condition may be very close to. on a lightly loaded line.1 Setting Guidelines The sequence network connection diagram for an open circuit fault is detailed in Figure 1. there will be little zero sequence current flow and the ratio of I2/I1 that flows in the protected circuit will approach 100%. they may arise from other causes such as birds on overhead lines or mechanical damage to cables etc. which can be detected. since the ratio is approximately constant with variations in load current. load unbalance etc. This will be affected to a lesser extent than the measurement of negative sequence current alone.16 MiCOM P441/P442 & P444 Broken conductor detection The majority of faults on a power system occur between one phase and ground or two phases and ground. the full load steady state unbalance arising from CT errors. the ratio I2/I1 will be 50%. These can arise from broken conductors. From this. 2. it can be seen that when a conductor open circuit occurs. In the case of a multiple earthed power system (assuming equal impedances in each sequence network). a more sensitive setting may be achieved.P44x/EN AP/E33 Application Notes Page 80/220 2. Series faults will not cause an increase in phase current on the system and hence are not readily detectable by standard overcurrent relays. Hence. Such faults result in an appreciable increase in current and hence in the majority of applications are easily detectable. Another type of unbalanced fault which can occur on the system is the series or open circuit fault. However. or less than. In the case of a single point earthed power system. It is possible to calculate the ratio of I2/I1 that will occur for varying system impedances. Alternatively. The relay incorporates an element which measures the ratio of negative to positive phase sequence current (I2/I1). However. they will produce an unbalance and a resultant level of negative phase sequence current. A negative sequence element therefore would not operate at low load levels.16. by referring to the following equations:E (Z + Z ) I1F = Z Z +g Z 2Z + 0Z Z 1 2 1 0 2 0 –E Z I2F = Z Z + Z Zg 0+ Z Z 1 2 1 0 2 0 Where: Eg = System Voltage Z0 = Zero sequence impedance Z1 = Positive sequence impedance Z2 = Negative sequence impedance Therefore: I2F Z0 = I1F Z0 + Z2 . It is possible to apply a negative phase sequence overcurrent relay to detect the above condition. These are known as shunt faults and arise from lightning discharges and other overvoltages which initiate flashovers.

that this ratio may vary depending upon the fault location. If the latter method is adopted. including the available setting ranges and factory defaults:Menu text Default setting Setting range Min Step size Max GROUP 1 BROKEN CONDUCTOR Broken Conductor Enabled Enabled/Disabled N/A I2/I1 0. Hence.2 0. A 60 second time delay setting may be typical.16. Since sensitive settings have been employed. it can be expected that the element will operate for any unbalance condition occurring on the system (for example. Note that a minimum value of 8% negative phase sequence current is required for successful relay operation. In practice. to ensure that all single phase loads are accounted for. The following table shows the relay menu for the Broken Conductor protection. during a single pole autoreclose cycle).2 Example Setting The following information was recorded by the relay during commissioning. I2/I1 can be determined from the ratio of zero sequence to negative sequence impedance. It must be noted however.2 1 0. 2. This can be determined from a system study. Ifull load = 1000A I2 = 100A therefore the quiescent I2/I1 ratio is given by.05 To allow for tolerances and load variations a setting of 200% of this value may be typical: Therefore set I2/I1 = 0. I2/I1 = 100/1000 = 0.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 81/220 It follows that.2 Set I2/I1 Time Delay = 60s to allow adequate time for short circuit fault clearance by time delayed protections. it is important to take the measurements during maximum system load conditions.01 I2/I1 Time Delay 60 0s 100s 1s I2/I1 Trip Disabled* Enabled Disabled N/A * If disabled. or by making use of the relay measurement facilities at the commissioning stage. It is desirable therefore to apply as sensitive a setting as possible. for an open circuit in a particular part of the system. this minimum setting is governed by the levels of standing negative phase sequence current present on the system. a long time delay is necessary to ensure co-ordination with other protective devices. . only a Broken Conductor Alarm is possible.

01s IN>2 Status Enabled Disabled or Enabled IN>2 Directional Non Directional Non-Directional. IEEE M Inverse. and have an optional timer hold facility on reset. Menu text Default setting Setting range Min Step size Max GROUP 1 EARTH FAULT O/C IN>1 Function DT Disabled.025 IN>1 Time Dial 7 0. The IN> element may only be used as part of a channel-aided scheme.2s 0 200s 0. The following table shows the relay menu for the Earth Fault protection.P44x/EN AP/E33 Application Notes Page 82/220 2.01 x In IN>1 Time Delay 1s 0 200s 0. • IN>2 element - Directional or non-directional. The IN>1 and IN>2 backup elements always trip three pole. US ST Inverse IN>1 Directional Directional Fwd Non-Directional.3 x In 0. Directional Fwd. DT delayed. UK LT Inverse.08 x In 4.2 0. (The IN> element can be selected to trip single and/or three pole). IEEE E Inverse. IEC V Inverse.0 x In 0.17 MiCOM P441/P442 & P444 Directional and non-directional earth fault protection Three elements of earth fault protection are available. DT.025 1. definite time (DT) or IDMT time-delayed. Directional Rev IN>1 VTS Block Non directional Block or Non directional IN>1 Current Set 0. Directional Fwd.01s IN>2 Time Delay VTS 2s 0 200s 0. All Earth Fault overcurrent elements operate from a residual current quantity which is derived internally from the summation of the three phase currents. US Inverse.5 15 0.1 IN>1 Reset Char DT DT or Inverse IN>1 tRESET 0 0 100s 0. including the available setting ranges and factory defaults. IEC S Inverse.01s IN>1 TMS 1 0. as per the phase fault elements. IEC E Inverse.08 x In 32 x In 0.01s IN>1 Time Delay VTS 0. as follows: • IN> element - Channel aided directional earth fault protection. • IN>1 element - Directional or non-directional protection.01 x In IN>2 Time Delay 2s 0 200s 0. IEEE V Inverse.2 x In 0. Directional Rev IN>2 VTS Block Non directional Block or Non directional IN>2 Current Set 0.01s IN> Char Angle –45° –95° 95° 1° Polarisation Zero Sequence Zero Sequence or Negative Sequence IN> DIRECTIONAL . and is fully described in the Aided DEF section of the Application Notes which follow.

the relay allows an IN> Time Delay VTS to be applied to the IN>1 and IN>2 elements.SBEF CALCULATION & LOGIC P0490ENa . On VTS pickup. V2 I2 VN Negative sequence Polarisation Residual zero sequence Polarisation Directional Calculation SBEF Fwd SBEF Rev IN IN IN> IN> Pick-up IN> Pick-up CTS Blocking IDMT/DT IN> Trip & Any Pole Dead IN> Timer Block IN> Pick-up CTS Blocking & Any Pole Dead & IN> Timer Block SBEF Fwd SBEF Rev MCB/VTS Line IDMT/DT Directionnal Check & >1 & IN> Trip IN> TD VTS 0 FIGURE 44 . and the grading principles used will be as per the phase fault overcurrent elements. which is three times the magnitude of zero sequence current (Ires = 3I0). both elements are forced to have non-directional operation. To maintain protection during periods of VTS detected failure.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 83/220 Note that the elements are set in terms of residual current. The IDMT time delay characteristics available for the IN>1 element. and are subject to their revised definite time delay.

1 Directional Earth Fault Protection (DEF) The method of directional polarising selected is common to all directional earth fault elements.17. the primary star point of the VT must be earthed.LOGIC WITHOUT DIRECTIONALITY CTS Block SBEF Overcurrent SBEF Start Slow VTS Block Directional Check Vx > Vs Ix > Is IDMT/DT SBEF Trip SBEF Timer Block P0533ENa FIGURE 46 .The relay performs a directional decision by comparing the phase angle of the derived negative sequence current with respect to the derived negative sequence voltage. this quantity is commonly used to polarise DEF elements.LOGIC WITH DIRECTIONALITY 2. This means that for a forward earth fault. the residual current is expected to be approximately in phase with the inverted residual voltage (-Vres). The relay internally derives this voltage from the 3 phase voltage input which must be supplied from either a 5-limb or three single phase VT’s.2 Even though the directional decision is based on the phase relationship of I2 with respect to V2. There are two options available in the relay menu: • Zero sequence polarising . applied where there is not significant mutual coupling with a parallel line. • Negative sequence polarising . . A three limb VT has no path for residual flux and is therefore incompatible with the use of zero sequence polarising. and where the power system is not solidly earthed close to the relay location. including the channel-aided element. As residual voltage is generated during earth fault conditions. Typical characteristic angle settings are as follows: • Resistance earthed systems generally use a 0° RCA setting.17.P44x/EN AP/E33 Application Notes Page 84/220 MiCOM P441/P442 & P444 CTS Block SBEF Start SBEF Overcurrent SBEF IDMT/DT Trip SBEF Trip SBEF Timer Block P0484ENa FIGURE 45 .The relay performs a directional decision by comparing the phase angle of the residual current with respect to the inverted residual voltage: (–Vres = –(Va + Vb + Vc)) derived by the relay. NOTE: 2. Application of Zero Sequence Polarising This is the conventional option. In addition. These types of VT design allow the passage of residual flux and consequently permit the relay to derive the required residual voltage. The required characteristic angle settings for DEF will differ depending on the application. the operating current quantity for DEF elements remains the derived residual current.

17. is offered in the P441. a -60° RCA setting should be set. The operate quantity. The aided tripping schemes can perform single pole tripping. for example if only a three limb VT were fitted.E. In this case a permissive overreach or blocking distance scheme must be used. In either of these situations. the use of residual voltage polarisation of DEF may either be not possible to achieve. When a common signalling channel is employed. the problem may be solved by the use of negative phase sequence (nps) quantities for polarisation. Aided DEF Status Enabled Disabled or Enabled Polarisation Zero Sequence Zero Sequence or Negative Sequence V> Voltage Set 1V 0.01V IN Forward 0. This method determines the fault direction by comparison of nps voltage with nps current.1 x In 0.typically set at . An example of the latter case would be an HV/EHV parallel line application where problems with zero sequence mutual coupling may exist.18 Aided DEF protection schemes The option of using separate channels for DEF aided tripping. and distance protection schemes.MiCOM S1 SETTINGS . Application of Negative Sequence Polarising In certain applications.1s Scheme Logic Shared Shared.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 2. however. When a separate channel for DEF is used. 2. The relay has aided scheme settings as shown in the following table: Menu text Default setting Setting range Min Step size Max GROUP 1 AIDED D. or problematic.F.5V 20V 0. The Application Notes section for the Negative Sequence Overcurrent Protection better describes how the angle is calculated .05 x In 4 x In 0. the above DEF schemes are independently selectable.01 x In Time Delay 0 0 10s 0. is still residual current.45° (I2 lags (-V2)). When negative sequence polarising is used. Blocking or Permissive Tripping Three Phase Three Phase or Single Phase FIGURE 47 . the relay requires that the Characteristic Angle is set. An example of the former case would be where a suitable type of VT was unavailable. a -45° RCA setting should be set. the distance and DEF must Share a common scheme. P442 and P444 relays.3 Page 85/220 • When protecting solidly-earthed distribution systems or cable feeders. • When protecting solidly-earthed transmission systems.

to avoid operation for typical power system imbalance and voltage transformer errors. On high resistance earthed and insulated neutral systems the settings might need to be as high as 10% or 20% of phase-neutral voltage.DEF CALCULATION NOTE: 2. respectively.PSL REQUIRED TO ACTIVATE DEF LOGIC WITH SHARED CHANNEL V2 I2 VN Negative Polarisation Residual Polarisation Directionnal Calculation DEF Fwd DEF Rev IN V2 Negative Polarisation VN Residual Polarisation IN V> IN> INRev = 0. and hence there would be no tripping from the scheme.18. This could equate to an overall error of up to 5% of phase-neutral voltage. The relay has a V> threshold which defines the minimum residual voltage required to enable an aided DEF directional decision to be made. . and the VT error could be 1% per phase. suitable for protecting all solidly-earthed and resistance earthed systems.6*INFwd DEF V> INRev> INFwd> P0545ENa FIGURE 50 . CR DEF CS Relay label 01 >1 P0544ENa FIGURE 49 . the V> threshold becomes a V2> negative sequence voltage detector. CR DIST CS DEF. CR DEF CS Relay Label 02 P0534ENa FIGURE 48 . When negative sequence polarising is set. CR DIST CS Relay Label 01 Opto Label 02 DEF.1 The DEF is blocked in case of VTS or CTS Polarising the Directional Decision The relative advantages of zero sequence and negative sequence polarising are outlined on the previous page.P44x/EN AP/E33 Application Notes Page 86/220 MiCOM P441/P442 & P444 Opto label 01 DIST. The V> threshold is set above the standing residual voltage on the protected system.PSL REQUIRED TO ACTIVATE DEF LOGIC WITH AN INDEPENDANT CHANNEL Opto label 01 DIST. The characteristic angle for aided DEF protection is fixed at –14°. although a setting between 2% and 4% is typical. the typical zero sequence voltage on a healthy system can be as high as 1% (ie: 3% residual). Note how the polarising chosen for aided DEF is independent of that chosen for backup earth fault elements. A residual voltage measured below this setting would block the directional decision. In practice.

SHARED CHANNEL – PERMISSIVE SCHEME This scheme is similar to that used in the AREVA LFZP. and Figure 54 the simplified scheme logic.2 Aided DEF Permissive Overreach Scheme DEF Fwd IN Fwd> DEF V> DEF Timer Block & Reversal Guard Any Pole Dead DEF CS 0 150 ms IN Rev> & T DEF Trip 0 t_delay UNB CR DEF P0546ENa FIGURE 51 .Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 87/220 X FWD FWD R -14˚ REV REV P0491ENa 2.18. Send logic: IN> Forward pickup Permissive trip logic: IN> Forward plus Channel Received. . LFZR. EPAC and PXLN relays. then it will operate with no additional delay upon receipt of this signal. Figure 53 shows the element reaches. If the remote relay has also detected a forward fault.INDEPENDANT CHANNEL – PERMISSIVE SCHEME DEF Fwd IN Fwd> DEF V> DEF Timer Block & Reversal Guard Any Pole Dead Any DIST Start IN Rev> >1 DEF CS 0 150 ms & DEF Trip T 0 t_delay UNB CR DEF P0547ENa FIGURE 52 . The signalling channel is keyed from operation of the forward IN> DEF element of the relay.

The signalling channel is keyed from operation of the reverse DEF element of the relay. EPAC and PXLN relays. If the remote relay forward IN> element has picked up. DEF Fwd IN Fwd> Tp DEF V> 0 Reversal Guard & T IN Rev> & DEF Trip 0 t_delay 0 Any Pole Dead 150 ms DEF Timer Block UNB CR DEF DEF Rev IN Rev> & DEF CS DEF V> P0548ENa FIGURE 55 . Figure 57 shows the element reaches. and Figure 58 the simplified scheme logic. Where “t” is shown in the diagram this signifies the time delay associated with an element.3 Aided DEF Blocking Scheme This scheme is similar to that used in the AREVA LFZP. 2. noting that the Time Delay for a permissive scheme aided trip would normally be set to zero.P44x/EN AP/E33 Application Notes Page 88/220 MiCOM P441/P442 & P444 IN> Fwd (A) ZL A B IN> Fwd (B) P3070ENa FIGURE 53 . then it will operate after the set Time Delay if no block is received. LFZR.THE DEF PERMISSIVE SCHEME FIGURE 54 .INDEPENDANT CHANNEL – BLOCKING SCHEME .LOGIC DIAGRAM FOR THE DEF PERMISSIVE SCHEME The scheme has the same features/requirements as the corresponding distance scheme and provides sensitive protection for high resistance earth faults.18.

plus Channel NOT Received. The recommended Time Delay setting = max.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 89/220 DEF Fwd IN Fwd> DEF V> Reversal Guard & T IN Rev> 0 Tp 0 t_delay Any Pole Dead 0 >1 Any DIST Start 150 ms DEF Timer Block & UNB CR DEF DEF Rev DEF Trip & IN Rev> DEF CS DEF V> P0549ENa FIGURE 56 .LOGIC DIAGRAM FOR THE DEF BLOCKING SCHEME The scheme has the same features/requirements as the corresponding distance scheme and provides sensitive protection for high resistance earth faults. To allow time for a blocking signal to arrive. Where “t” is shown in the diagram this signifies the time delay associated with an element.THE DEF BLOCKING SCHEME Protection A Signal Send IN> Reverse IN>1 t IN>2 t & t 0 0 0 Signal Send IN> Reverse 0 Trip IN > Forward Protection B >1 t IN>1 t IN>2 t & Trip >1 0 0 IN> Forward P0551ENa FIGURE 58 . signalling channel operating time + 14ms. with small set delay.SHARED CHANNEL – BLOCKING SCHEME Send logic: DEF Reverse Trip logic: IN> Forward. . IN> Fwd (A) IN> Rev (A) ZL A B IN> Fwd (B) IN> Rev (B) P0550ENa FIGURE 57 . a short time delay on aided tripping must be used.

method of system earthing and its location with respect to the relaying point. Two stages are included to provide both alarm and trip stages. Stage 1 may be selected as either IDMT.01s V<1 TMS 1 0. • Faults occurring on the power system result in a reduction in voltage of the phases involved in the fault. where required. Generally. in order to bring the system voltage back to it’s nominal value.01s UNDER VOLTAGE As can be seen from the menu.19 MiCOM P441/P442 & P444 Undervoltage protection Undervoltage conditions may occur on a power system for a variety of reasons. within the V<1 Function cell. co-ordination with other voltage and current-based protection devices is essential in order to achieve correct discrimination. Alternatively. then tripping by means of an undervoltage relay will be required following a suitable time delay. Menu text Default setting Setting range Min Step size Max GROUP 1 VOLT Protection V< & V> MODE 0 V<1 Trip. DT or disabled. Both the under and overvoltage protection functions can be found in the relay menu “Volt Protection”. V<2 Trip. The proportion by which the voltage decreases is directly dependent upon the type of fault. The IDMT characteristic available on the first stage is defined by the following formula: t= K 1–M Where: K = Time Multiplier Setting (TMS) T = Operating Time in Seconds M = Measured Voltage / relay Setting Voltage (V<) . some of which are outlined below:• Increased system loading.5 V<2 Status Disabled Disabled or Enabled V<2 Voltage Set 38V 10V 120V 1V V<2 Time Delay 5s 0s 100s 0. different time settings may be required depending upon the severity of the voltage dip. These are configurable as either phase to phase or phase to neutral measuring within the V< Measur’t Mode cell. the undervoltage protection included within the P441. V>2 Trip V< Measur't Mode Phase-Neutral Phase-phase or Phase-neutral V<1 Function DT Disabled.5 100 0. some corrective action would be taken by voltage regulating equipment such as AVR’s or On Load Tap Changers.P44x/EN AP/E33 Application Notes Page 90/220 2. If the regulating equipment is unsuccessful in restoring healthy system voltage. V>1 Trip. DT pr IDMT V<1 Voltage Set 50V 10V 120V 1V V<1 Time Delay 10s 0s 100s 0. This function will be blocked with VTS logic or could be disabled if CB open. Consequently. P442 and P444 relays consists of two independent stages. Stage 2 is DT only and is enabled/disabled in the V<2 Status cell. The following table shows the undervoltage section of this menu along with the available setting ranges and factory defaults.

the system should be designed to withstand such overvoltages for a defined period of time. The following table shows the overvoltage section of this menu along with the available setting ranges and factory defaults. Menu text Default setting Setting range Min Step size Max Group 1 Volt protection V> Measur't Mode Phase-Neutral Phase-phase or Phase-neutral V>1 Function DT Disabled.01s V>1 TMS 1 0. This threshold is dependent upon the system in question but typical healthy system voltage excursions may be in the order of -10% of nominal value. As previously stated. the required time delay is dependent upon the time for which the system is able to withstand a depressed voltage. the element should be selected in the menu to operate from a phase to phase voltage measurement. undervoltage protection is not required to operate during system earth fault conditions.20 Overvoltage protection Undervoltage conditions may occur on a power system for a variety of reasons. the supply voltage will increase in magnitude. failure of this equipment to bring the system voltage back within prescribed limits leaves the system with an overvoltage condition which must be cleared in order to preserve the life of the system insulation. overvoltage protection which is suitably time delayed to allow for normal regulator action. i.1 Page 91/220 Setting Guidelines In the majority of applications.5 V>2 Status Enabled Disabled or Enabled V>2 Voltage Set 90V 60V 185V 1V V>2 Time Delay 0. Hence. If this is the case.19. Similar comments apply with regard to a time setting for this element. may be applied.e.01s As can be seen. The voltage threshold setting for the undervoltage protection should be set at some value below the voltage excursions which may be expected under normal system operating conditions. • During earth fault conditions on a power system there may be an increase in the healthy phase voltages. However. This situation would normally be rectified by voltage regulating equipment such as AVRs or on-load tap changers. as this quantity is less affected by single phase voltage depressions due to earth faults.5s 0s 100s 0. the setting cells for the overvoltage protection are identical to those previously described for the undervoltage protection.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 2. 2. some of which are outlined below:• Under conditions of load rejection.1) Where: K = Time Multiplier Setting T = Operating Time in Seconds M = Measured Voltage / relay Setting Voltage (V>) . The IDMT characteristic available on the first stage is defined by the following formula: t = K / (M . DT pr IDMT V>1 Voltage Set 75V 60V 185V 1V V>1 Time Delay 10s 0s 100s 0.5 100 0. both the over and undervoltage protection functions can be found in the relay menu “Volt Protection”. Ideally.

The circuit breaker failure protection incorporates two timers.P44x/EN AP/E33 Page 92/220 2. 2.21 Circuit breaker fail protection (CBF) Following inception of a fault one or more main protection devices will operate and issue a trip output to the circuit breaker(s) associated with the faulted circuit. both stages could be set to definite time and configured to provide the required alarm and trip stages. As the voltage settings for both of the stages are independent. the remaining stage may be disabled within the relay menu.1 Application Notes MiCOM P441/P442 & P444 Setting Guidelines The inclusion of the two stages and their respective operating characteristics allows for a number of possible applications. CBF operation can also reset all start output contacts. • Use of the IDMT characteristic gives the option of a longer time delay if the overvoltage condition is only slight but results in a fast trip for a severe overvoltage. and prevent damage / further damage to the power system. breaker failure protection (CBF) will operate. This type of protection must be co-ordinated with any other overvoltage relays at other locations on the system. If the fault current has not been interrupted following a set time delay from circuit breaker trip initiation. 2. ‘CB Fail 1 Timer’ and ‘CB Fail 2 Timer’.20. allowing configuration for the following scenarios: . This should be carried out in a similar manner to that used for grading current operated devices.21. It is therefore common practice to install circuit breaker failure protection. which monitors that the circuit breaker has opened within a reasonable time.1 Breaker Failure Protection Configurations The phase selection must be performed by creating dedicated PSL. if preferred. Operation of the circuit breaker is essential to isolate the fault. the second stage could then be set lower than the first to provide a time delayed alarm stage if required. • Alternatively. ensuring that any blocks asserted on upstream protection are removed. CBF operation can be used to backtrip upstream circuit breakers to ensure that the fault is isolated correctly. • If only one stage of overvoltage protection is required. or if the element is required to provide an alarm only. For transmission/sub-transmission systems. slow fault clearance can also threaten system stability.

For any protection trip. generally tripping all infeeds connected to the same busbar section. a backtrip may be issued following an additional time delay. Should re-tripping fail to open the circuit breaker. ‘CB Fail 1 Timer’ is used to route a trip to a second trip circuit of the same circuit breaker. plus delayed backtripping. Here. This requires duplicated circuit breaker trip coils. the ‘CB Fail 1 Timer’ is started. .CB FAIL GENERAL LOGIC • Simple CBF.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 93/220 tBF1 Enable CBF1_Status & 0 tBF1 Trip 3Ph Pulsed output latched in UI >1 tBF1 & 0 Any Internal Trip A 1 >1 0 2 3 tBF2 . The backtrip uses ‘CB Fail 2 Timer’. and normally reset when the circuit breaker opens to isolate the fault. ‘CB Fail 1 Timer’ times out and closes an output contact assigned to breaker fail (using the programmable scheme logic).tBF1 4 S 0 Ia< & R 2 >1 & tBF1 Q 1 Breaker Fail Alarm tBF2 Trip 3Ph 0 0 4 3 0 1 S 2 Any Internal Trip A 3 & Non Current Prot Trip CBF2_Status Q 4 R 0 Enable >1 1 2 3 CBA_A 4 Setting: Non I Trip Reset: 0) I< Only 1) /Trip & I< 2) CB & I< 3) Disable 4) /Trip or I< 0 External Trip A 1 S 2 3 Q 4 R >1 0 Ia< 1 & 2 3 4 Setting: >1 Ext. If breaker opening is not detected. This contact is used to backtrip upstream switchgear. • A re-tripping scheme. which is also started at the instant of the initial protection element trip. where only ‘CB Fail 1 Timer’ is enabled. and is known as re-tripping. Trip Reset: 0) I< Only 1) /Trip & I< 2) CB & I< CBA_A & 3) Disable 4) /Trip or I< Any Internal Trip B Ib< Non Current Prot Trip CBA_B PHASE B Same logic as A phase WI Trip A External Trip B WI Trip B WI Trip C V<1 Trip >1 Non Current Prot Trip V<2 Trip Any Internal Trip C Ic< Non Current Prot Trip CBA_C PHASE C Same logic as A phase V>1 Trip V>2 Trip External Trip C P0552ENa FIGURE 59 .

. Detecting drop-off of the initiating protection element might be a more reliable method. For example: • Where non-current operated protection. as required. This may result in continued arcing at the primary contacts. However. the position of the circuit breaker auxiliary contacts may give the best reset method. In such cases. Here. The latter is achieved by allocating one of the relay opto-isolated inputs to ‘External Trip’ using the programmable scheme logic. derives measurements from a busbar connected voltage transformer.2 Reset Mechanisms for Breaker Fail Timers It is common practice to use low set undercurrent elements in protection relays to indicate that circuit breaker poles have interrupted the fault or load current.P44x/EN AP/E33 Page 94/220 Application Notes MiCOM P441/P442 & P444 CBF elements ‘CB Fail 1 Timer’ and ‘CB Fail 2 Timer’ can be configured to operate for trips triggered by protection elements within the relay or via an external protection trip. the initiating protection element may reset. Also. This covers the following situations: • Where circuit breaker auxiliary contacts are defective. such as under/overvoltage or under/overfrequency. or cannot be relied upon to definitely indicate that the breaker has tripped. the relay uses operation of undercurrent elements (I<) to detect that the necessary circuit breaker poles have tripped and reset the CB fail timers. such as under/overvoltage or under/overfrequency. the undercurrent elements may not be reliable methods of resetting circuit breaker fail in all applications. with an additional arcing resistance in the fault current path. • Where a circuit breaker has started to open but has become jammed. reset of the element may not give a reliable indication that the circuit breaker has opened fully. Again using I< would rely upon the feeder normally being loaded. For any protection function requiring current to operate.21. derives measurements from a line connected voltage transformer. Thus. (in that case setting will be : "Prot. tripping the circuit breaker may not remove the initiating condition from the busbar. Should this resistance severely limit fault current. and hence drop-off of the protection element may not occur. 2. I< only gives a reliable reset method if the protected circuit would always have load current flowing. Reset or I<") • Where non-current operated protection.

some residual current remains due to the CT. The detection is confirmed 12 / 15 msec after the pole is opened.3 ms (50 Hz) T = 11. the current line is interrupted by the CB opening. . the algorithm detects if the current is bigger than the I< threshold. If yes. At the end of the detection timer. if it is lower than the adjusted value nothing is done.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 95/220 I Pole Live + + Pole Dead + I< T T - - - I Pole Live + + Pole Dead + I< T - - - P0553ENa FIGURE 60 . The detection is confirmed 3 ms after the pole is opened.1 ms (60 Hz) The current used is the unfiltered current (only the analog lowPass ) Example: In the first example. open pole decision is given by the algorithm. then the detection timer is restarted. In the second example. Timer value given by: (Number of Samples/2 + 2) * ((1/Freq)/Number of Samples) With: T = 13.ALGORITHM FOR POLE DEAD DETECTION Description of open pole detection algorithm : Each half period after zero crossing of current.

CBF_I< Configuration Dead Pole threshold detection Any Trip A Internal Logic Trip phase A by internal or external protection function Any Trip B Internal Logic Trip phase B by internal or external protection function Any Trip C Internal Logic Trip phase C by internal or external protection function CB 52a_A Internal Logic CB Pole A opened CB 52a_B Internal Logic CB Pole B opened CB 52a_C Internal Logic CB Pole C opened Ia<. interlocks). The resetting options are summarised in the following table. In these cases resetting is only allowed provided the undercurrent elements have also reset.2. CBF2_Reset Configuration Type of reset (current. interlocks).2.2 MiCOM P441/P442 & P444 Inputs Data Type Description CBF1_Status Configuration Breaker Failure 1 activated CBF2_Status Configuration Breaker Failure 2 activated CBF1_Timer Configuration Timer Breaker Failure 1 CBF2_Timer Configuration Timer Breaker Failure 2 CBF1_Reset Configuration Type of reset (current. Ic< Internal Logic Under-current detection for dead pole Data Type Description CBF1_Trip_3p Internal Logic Trip 3P CB fail by TBF1 CBF2_Trip_3p Internal Logic Trip 3P CB fail by TBF2 CB Fail Alarm Internal Logic CB Fail alarm Outputs Resetting of the CBF is possible from a breaker open indication (from the relay’s pole dead logic) or from a protection reset. . Ib<. CB status.1 2.P44x/EN AP/E33 Application Notes Page 96/220 2. CB Status.21.21.

. [All I< and IN< elements operate] [Protection element reset] AND [All I< and IN< elements operate] CB open (all 3 poles) AND [All I< and IN< elements operate] External protection - Three options are available. Disable CBF Ext Reset CB Open & I< I< Only.01s 0. CB Open & I<.05In 10s 10s 0. Prot Reset or I<. The user can select from the following options.01In The ‘CBF Blocks I>‘ and ‘CBF Blocks IN>‘ settings are used to remove starts issued from the overcurrent and earth elements respectively following a breaker fail time out. Disabled CB Fail 1 Timer 0. Disabled CB Fail 2 Timer 0. . [All I< and IN< elements operate] [External trip reset] AND [All I< and IN< elements operate] CB open (all 3 poles) AND [All I< and IN< elements operate] The selection in the relay menu is grouped as follows: Menu text Default setting Setting range Min Step size Max CB FAIL & I< BREAKER FAIL CB Fail 1 Status Enabled Enabled.2s 0s CB Fail 2 Status Disabled Enabled. The user can select any or all of the options.4s 0s CBF Non I Reset CB Open & I< I< Only. Prot Reset & I<.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 97/220 Initiation (Menu selectable) CB fail timer reset mechanism Current based protection (eg.01s UNDER CURRENT I< Current Set 3. The start is removed when the cell is set to Enabled. 27/59/81/32L. Prot Reset or I<.05In 0. Disable 0. CB Open & I<. 50/51/46/21/87..) The resetting mechanism is fixed. Prot Reset & I<.) Three options are available.2In 0. [IA< operates] & [IB< operates] & [IC< operates] & [IN< operates] Non-current based protection (eg.

3.3. .) + safety margin Note that all CB Fail resetting involves the operation of the undercurrent elements.21. to ensure that I< operation indicates that the circuit breaker pole is open. The examples above consider direct tripping of a 2½ cycle circuit breaker.) + error in tBF timer + safety margin 50 + 50 + 10 + 50 = 160 ms CB open CB auxiliary contacts opening/closing time (max.3 Typical settings 2.21. with 5% In common for generator circuit breaker CBF.2 Breaker Fail Undercurrent Settings The phase undercurrent settings (I<) must be set less than load current. 2. an additional 10-15 ms must be added to allow for trip relay operation.1 Breaker Fail Timer Settings MiCOM P441/P442 & P444 Typical timer settings to use are as follows: CB Fail Reset Mechanism tBF time delay Typical delay for 2½ cycle circuit breaker Initiating element reset CB interrupting time + element reset time (max. A typical setting for overhead line or cable circuits is 20% In.) + error in tBF timer + safety margin 50 + 10 + 50 = 110 ms Undercurrent elements CB interrupting time + 50 + 25 + 50 undercurrent element operating = 125 ms time (max.P44x/EN AP/E33 Application Notes Page 98/220 2. Where element reset or CB open resetting is used the undercurrent time setting should still be used if this proves to be the worst case. Note that where auxiliary tripping relays are used.21.

select Line Angle = 80° for convenience.576 = 1. .1.4° Ω secondary.12 = 5.576 OHM/km Faults levels Green Valley substation busbars maximum 5000MVA.484 / 79.1 Distance Protection Setting Example 3.4° (primary) x 0. For the purposes of this example.476 = 0.089 + j0. shown in Figure 61.089 + J0.8° Ω/km 0 Z /Z1 = 3.476 OHM/km Z0 = 0.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 99/220 3.372 / -4.1 Objective To protect the 100Km double circuit line between Green Valley and Blue River substations using relay protection in the POP Z2 Permissive Overreach mode and to set the relay at Green Valley substation.1.Blue River transmission line 21 21 System voltage 230kv System grounding solid CT ratio 1200/5 VT ratio 230000/115 Line length 100km Line impedance Z1 = 0.1. Relay Line Angle settings -90° to 90° in 1° steps. Therefore.SYSTEM ASSUMED FOR WORKED EXAMPLE 3. secondary quantities are used.426 + J1.484 / 79. Settings on the relay can be performed in primary or secondary quantities and impedances can be expressed as either polar or rectangular quantities (menu selectable). Therefore set Line Impedance and Line Angle: = 5. minimum 2000MVA Blue River substation busbars maximum 3000MVA.81 / 80° Ω secondary. Tiger Bay Green valley Blue River Rocky bay 80 Km 100 Km 60 Km System Data Green Valley .12 230000 / 115 Line impedance secondary = ratio CT/VT x line impedance primary.81 / 79. Line Impedance = 100 x 0. OTHER PROTECTION CONSIDERATIONS-SETTINGS EXAMPLE 3. 3.6° 0 3.3 CT ratio: 1 200 / 5 VT ratio: 230 000 / 115 Relay Settings It is assumed that Zone 1 Extension is not used and that only three forward zones are required.1.426 + j1.4 Line Impedance Ratio of secondary to primary impedance = 1200 / 5 = 0.4° Ω/km 1 Z = 0.632 / 74.2 System Data Line length: 100Km Line impedances: Z = 0. minimum 1000MVA P3074ENa FIGURE 61 .

1.64 / 79.4° x 0.464 / 79.5 MiCOM P441/P442 & P444 Zone 1 Phase Reach Settings Required Zone 1 reach is to be 80% of the line impedance between Green Valley and Blue River substations.56 / 80° Ω secondary 3.46 / 80° ohms secondary 3.64 / 80° Ω secondary.16 / 80° ohms secondary 3.4° Actual Zone 4 reverse reach setting = 0.12 Z1 = 4.13 / 79.81 / 79.12 Z3 = 11.4° ohms secondary Actual Zone 3 forward reach setting = 11.484 / 79.1.1.4° x 0.(5.484 / 79.4° Ω secondary. Required Zone 1 reach = 0.8 Zone 4 Reverse Settings with no Weak Infeed Logic Selected Required Zone 4 reverse reach impedance = Typically 10% Zone 1 reach = 0.4° Ω secondary.484 / 79.1 x 4.1.4°) x 120%) .2 x 0.6 Zone 2 Phase Reach Settings Required Zone 2 impedance = (Green Valley-Blue River) line impedance + 50% (Blue River-Rocky Bay) line impedance Z2 = (100+30) x 0.9 Zone 4 Reverse Settings with Weak Infeed Logic Selected Where zone 4 is used to provide reverse directional decisions for Blocking or Permissive Overreach schemes.4°) = 3.7 Zone 3 Phase Reach Settings Required Zone 3 forward reach = (Green Valley-Blue River + Blue River-Rocky Bay) x 1.56 / 79. ≥ ((8.95 / 79.12 = 8.2 = (100+60) x 1. 3. The Line Angle = 80°.1. Actual Zone 2 reach setting = 7.13 / 79.484 / 79.4° x 0.484 / 79. zone 4 must reach further behind the relay than zone 2 for the remote relay. This can be achieved by setting: Z4 ≥ ((Remote zone 2 reach) x 120%) minus the protected line impedance: Remote Zone 2 reach = (Blue River-Green Valley) line impedance + 50% (Green Valley-Tiger Bay) line impedance Z4 = (100+40) x 0. Therefore actual Zone 1 reach.15 / 79. Z1 = 4.4° The Line Angle = 80°. Z2 = 100 x 0.P44x/EN AP/E33 Application Notes Page 100/220 3.4° Ω secondary.4° Z4 = 0.4° x 0.12 = 7.8 x 100 x 0.4° Minimum zone 4 reverse reach setting = 3.484 / 79.4° + 50% x 60 x 0.96 / 80° ohms secondary .64 / 79.

3 Ω (secondary) Typically. RG (min) = 40 x 0.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 3.5° Z -Z L0 L1 kZ0 = 1. respectively.12 = 1. select: 3.10 Page 101/220 Residual Compensation for Earth Fault Elements The residual compensation factor can be applied independently to certain zones if required. ∠kZ0 = ∠ (Z0 . Minimum Maximum Zone 1 Zone 2 Zones 3 & 4 Phase (RPh) Ω 1. Taking the 5A CT secondary rating as a guide to the maximum load current.576) . and assuming a typical earth fault coverage of 40Ω. Comp”.9Ω.15 / 72.9 R1Ph = 3 R1Ph = 4 R3Ph-4Ph = 8 Earth (RG) Ω 4.4° Therefore.(0. kZ4). Resistive Reach Calculations All distance elements must avoid the heaviest system loading. kZ2.4).476) = 0.74Ω (secondary). kZp. kZ2. and R2G ≤ (R3G x 80%).SELECTION OF RESISTIVE REACHES R3Ph-R4Ph should be set ≤ 80% Z minimum load – ∆R.9° 3 × 0.Z1) / 3.5 x 0.6Ω.484 / 79.426 + j1. This allows maximum resistive reaches of 7. phase fault distance zones would avoid the minimum load impedance by a margin of ≥40% if possible (bearing in mind that the power swing characteristic surrounds the tripping zones).337 + j1.Z1 Set in degrees. and an angle “kZ0 Angle”: kZ0 Res. the minimum secondary reaches become: RPh (min) = 14. taking a required primary resistive coverage of 14. From Table 1 (see §2. earth fault zones would use a ≥20% margin. kZp.11 kZ0 Res. the minimum load impedance presented to the relay would be: Vn (phase-neutral) / In = (115 / √3) / 5 = 13.1 = 1.5Ω for phase faults. and 10.6 R1G = 5 R1G = 6 R3G-4G = 10 TABLE 10 . = (0.12 = 4. .Z1 Ie: As a ratio. This feature is useful where line impedance characteristics change between sections or where hybrid circuits are used.74 7. kZ0 = (Z0 .8Ω (secondary).Z1) / 3.15 / 72. kZ0 Angle. Comp.1.8 10. Comp = 0.9° = 0. In this example. kZ4).5° (Set for kZ1.4.79 / –6. the line impedance characteristics do not change and as such a common KZ0 factor can be applied to each zone.089 + j0. The zone 2 elements satisfy R2Ph ≤ (R3Ph x 80%). This is set as a ratio “kZ0 Res. Resistive reaches could be chosen between the calculated values as shown in Table 10.1.79 (Set for kZ1. kZ0 Angle = –6.

8Ω. For convenience.3 times the protected line impedance. The worst case scenario for this is when only one of the parallel lines is in service. Therefore. Two cases must be considered. it is possible to use the I>3 element as an instantaneous highset.1.14 tREVERSAL GUARD = 0 Tp = 98ms (typical). In this example.58Ω .12 MiCOM P441/P442 & P444 Power Swing Band Typically.58 + 48.032 × ∆f × RLOAD To ensure that a power swing frequency of 5 Hz is detected.4Ω Fault current seen by relay = (230000 / √3) / (10. their reach is only 1.P44x/EN AP/E33 Application Notes Page 102/220 3.16 × RLOAD Where: 3.1. It must be ensured that the element will only respond to faults on the protected line.0Ω could be set. The width of the power swing band is calculated as follows: ∆R = 1. the ∆R and ∆X band settings are both set between 10 .5 times the impedance of the protected line. Case 1: Source Impedance = 2302 / 5000 Line Impedance = 48. 1. Instantaneous Overcurrent Protection To provide parallel high-speed fault clearance to the distance protection.4) = 2251A = 10. The first case is a fault at Blue River substation with the relay seeing fault current contribution via Green Valley.1. the following is obtained: ∆R = 0.6 and 1. This gives a secondary impedance between 0.3 × tan(π × ∆f × ∆t) × RLOAD Assuming that the load corresponds to 60° angles between sources and if the resistive reach is set so that Rlim = RLOAD/2.30% of R3Ph. current reversal guard logic does not need to be used and the recommended settings for scheme timers are: 3. the following is obtained: ∆R = 0. The second case is a fault at Green Valley with the relay seeing fault current contribution via Blue River.13 ∆R width of the power swing detection band ∆f power swing frequency (fA – fB) Rlim resistive reach of the starting characteristic (=R3ph-R4ph) Z network impedance corresponding to the sum of the reverse (Z4) and forward (Z3) impedances RLOAD load resistance Current Reversal Guard The current reversal guard timer available with POP schemes needs a non-zero setting when the reach of the zone 2 elements is greater than 1.

2 Permissive Overreach Schemes To ensure operation for internal faults in a POP scheme. This not only effects time delayed zone 2 tripping but also channel-aided schemes. the underreaching effect can be substantial.4) = 2011A = 17. it will be necessary for Zone 2 elements at all line terminals to overreach both remote terminals with allowance for the effect of teepoint infeed. several problems arise when applying distance protection to three terminal lines. To provide an adequate safety margin a setting ≥120% the minimum calculated should be chosen. A POP scheme requires the use of two signalling channels. the relays at the three terminals should be able to see a fault at any point within the protected feeder. However. or the internal Programmable Scheme Logic.TEED FEEDER APPLICATION . P442 and P444 relays. A Ia Ib Zat Zbt B Ic Zct C Va = Ia Zat + Ib Zbt Ib = Ia + Ic Va = Ia Zat + Ia Zbt + Ic Zbt Impedance seen by relay A = Va Ia Za = Zat + Zbt + Ic Zbt Ia P3075ENa FIGURE 62 .2 Teed feeder protection The application of distance relays to three terminal lines is fairly common. say 2800A. 3. For a fault at the busbars of terminal B the impedance seen by a relay at terminal A will be equal to : Za = Zat + Zbt + [ Zbt. When terminal C is a relatively strong source.APPARENT IMPEDANCES SEEN BY RELAY 3.63 + 48.2. A permissive trip can only be issued upon operation of zone 2 and receipt of a signal from both remote line ends. the signalling requirements make its use unattractive. Both these requirements can be met through use of the alternative setting groups in the P441.1 The Apparent Impedance Seen by the Distance Elements Figure 62 shows a typical three terminal line arrangement. Zone 1 elements must be set to underreach the true impedance to the nearest terminal without infeed.63Ω The overcurrent setting must be in excess of 2251A. The requirement for an 'AND' function of received signals must be realised through use of contact logic external to the relay. Although a POP scheme can be applied to a three terminal line. This may demand very large zone 2 reach settings to deal with the apparent impedances seen by the relays. .2. 3.4Ω Fault current seen by relay = (230000 / √3) / (17. Where infeed is present.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 103/220 Case 2: Source Impedance = 2302 / 3000 Line Impedance = 48.(Ic/Ia) ] Relay A will underreach for faults beyond the tee-point with infeed from terminal C. this effect may result in non-operation of the element for internal faults. For a zone 2 element set to 120% of the protected line.

zone 1 elements set to 80% of the shortest relative feeder length do not overlap.TEED FEEDER APPLICATIONS P3076ENa . There are however two cases where this is not possible: Figure 63 (i) shows the case where a short tee is connected close to another terminal. Provided at least one zone 1 element can see an internal fault then aided tripping will occur at the other terminals if the overreaching zone 2 setting requirement has been met. This leaves a section not covered by any zone 1 element. A common power line carrier (PLC) signalling channel or a triangulated signalling arrangement can be used. In this example current is outfeed from terminal 'C' for an internal fault. The relay at 'C' will therefore see the fault as reverse and not operate until the breaker at 'B' has opened. (i) A B Z1A Z1C = area where no zone 1 overlap exists C (ii) A B Z1B Z1A Fault Fault seen by A & B in zone 2 C No infeed (iii) A B C Relay at C sees reverse fault until B opens FIGURE 63 . sequential tripping will occur. Permissive tripping is allowed for operation of zone 2 plus receipt of a signal from either remote line end. Figure 63 (iii) illustrates a further difficulty for a PUP scheme. This makes the signalling channel requirements for a PUP scheme less demanding than for a POP scheme. Faults close to this terminal will not operate the relay at 'C' and hence the fault will be cleared by the zone 2 time-delayed elements of the relays at 'A' and 'B'. This makes the use of a PUP scheme for a teed feeder a more attractive alternative than use of a POP scheme. Figure 63 (ii) shows an example where terminal 'C' has no infeed. the signalling channel is only keyed for internal faults.2. i.P44x/EN AP/E33 Application Notes Page 104/220 3.e.3 MiCOM P441/P442 & P444 Permissive Underreach Schemes For a PUP scheme. Any fault in this section would result in zone 2 time delayed tripping. The channel is keyed from operation of zone 1 tripping elements. In this case.

4 Page 105/220 Blocking Schemes Blocking schemes are particularly suited to the protection of teed feeders. The major disadvantage of blocking schemes is highlighted in Figure 63 (iii) where fault current is outfeed from a terminal for an internal fault condition. and for any bypass circuit isolator to be connected to bus 2 as shown in Figure 64. For bypass operation the appropriate setting group can be selected as required.TYPICAL DOUBLE BUS INSTALLATION WITH BYPASS FACILITIES A further use for this feature is the ability to provide alternative settings for teed feeders or double circuit lines with mutual coupling. Double bus installations.3 Alternative setting groups The P441. 3. associated with the transfer circuit breaker or the bus coupler. This arrangement avoids the need for a current polarity reversing switch that would be required if both buses were to be used for by-pass purposes. lines being switched in or out). This results in a blocking signal being sent to the two remote line ends. where the transfer circuit breaker or bus coupler might be used to take up the duties of any feeder circuit breaker when both the feeder circuit breaker and the current transformers are by-passed. . Similar alternative settings could be required to cover different operating criteria in the event of the channel failing. since high speed operation can be achieved where there is no current infeed from one or more terminals. with or without a separate transfer bus. it is usual for bus 1 to be referred to as the main bus and bus 2 as the reserve bus. The scheme also has the advantage that only a common simplex channel or a triangulated simplex channel is required. P442 and P444 relays can store up to four independent groups of settings. relay 'C' sees a reverse fault condition. or an alternative system configuration (ie. preventing tripping until the normal zone 2 time delay has expired. The active group is selected either locally via the menu or remotely via the serial communications. The ability to quickly reconfigure the relay to a new setting group may be desirable if changes to the system configuration demand new protection settings.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 3. Typical examples where this feature can be used include: Single bus installations with a transfer bus. In the case of a double bus installation. The standby relay. This facility is extremely useful in the case of unattended substations where all of the switching can be controlled remotely.2. Main bus (1) Reserve bus (2) 21 P440 21 Feeder 1 21 Feeder 2 P3077ENa FIGURE 64 . can be programmed with the individual setting required for each of the outgoing feeders.

3. which should be configured and sent to the relay independently) .(See also hysteresis value for level logic 0 & level logic 1 in section 6. instead of Dist DEF Carrier Receive Logic Start. When this selection is chosen.e in the default PSL they have been used for another functions: DIST/DEF Chan. (If assigned in the PSL.1 Application Notes MiCOM P441/P442 & P444 Selection of Setting Groups Setting groups can be changed by one of two methods selectable by MiCOM S1: • Automatic group selection by changes in state of two opto-isolated inputs. • Default PSL: To enable the setting group via binary inpputs. as shown in Table 11 below. assigned as Setting Group Change bit 0 (opto 1). a setting group change will occur) Note that each setting group has its own dedicated PSL. Recv. and Setting Group Change bit 1 (opto 2). the two opto-isolated inputs assigned to this function will be opto inputs 1 and 2 and they must not be connected to any output signal in the PSL. Special care should be take into account to avoid use them for another purpose (i.1 of this chapter).P44x/EN AP/E33 Page 106/220 3. For opto 1 and DIST/DEF carrier out of service). thus rejecting spurious induced interference. The new setting group binary code must be maintained for 2 seconds before a group change is implemented. the opto input 1 and 2 must be removed from the PSL.

OPTO 1 & 2 MUST BE REMOVED FROM THE PSL (THEY ARE DEDICATED FOR GROUPS SELECTION ONLY) . the user is given greater priority than automatic setting group selection.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 • Page 107/220 Or using the relay operator interface / remote communications. Binary State of SG Change bit 1 Binary State of SG Change bit 0 Setting Group Activated Opto 2 Opto 1 0 0 1 0 1 2 1 0 3 1 1 4 TABLE 11 . the relay will transfer to that settings group. Should the user issue a menu command to change group. Thus. and then ignore future changes in state of the bit 0 and bit 1 opto-inputs.SETTING GROUP SELECTION REMINDER : IF SELECTED IN THE MENU (CHANGEMENT GROUPS BY OPTOS).

miles.1 Fault locator The relay has an integral fault locator that uses information from the current and voltage inputs to provide a distance to fault measurement. The fault locator can store data for up to five faults. whilst also retaining data for at least the previous fault. The sampled data from the analogue input circuits is written to a cyclic buffer until a fault condition is detected. When the fault calculation is complete the fault location information is available in the relay fault record. When calculated the fault location can be found in the fault record under the VIEW RECORDS column in the Fault Location cells. impedance or percentage of line length. This ensures that fault location can be calculated for all shots on a typical multiple reclose sequence. Distance to fault is available in km. FIGURE 65 .FAULT LOCATION INFORMATION INCLUDED IN AN EVENT: . APPLICATION OF NON-PROTECTION FUNCTIONS 4.P44x/EN AP/E33 Page 108/220 Application Notes MiCOM P441/P442 & P444 4. The data in the input buffer is then held to allow the fault calculation to be made.

Line length: 100Km CT ratio: 1 200 / 5 VT ratio: 230 000 / 115 Line impedances: Z 1 ZM 0 = 0.484 / 79.2 Setting Guidelines The system assumed for the distance protection worked example will be used here.4° x 0.3 km (0.81 / 79.089 + j0.12 = 5.1 Mutual Coupling When applied to parallel circuits mutual flux coupling can alter the impedance seen by the fault locator.1.015 km (0. as shown.571 = 0. .4° Ω/km = 0. negative and zero sequence components. In practice the positive and negative sequence coupling is insignificant. Relay Line Angle settings 0° to 360° in 1° steps.4° Ω/km (Mutual) Ratio of secondary to primary impedance = Line Impedance 1200 / 5 = 0.1.005 mile) Line Impedance 12 / In Ω 0. The effect on the fault locator of the zero sequence mutual coupling can be eliminated by using the mutual compensation feature provided.001 / In Ω 500 / In Ω 0. as shown in Appendix B. The Green Valley – Blue River line is considered. including the available setting ranges and factory defaults:Menu text Default setting Setting range Step size Min Max GROUP 1 DISTANCE ELEMENTS LINE SETTING Line Length 1000 km (625 miles) 0. Therefore.4° Ω secondary.107 + j0.2 mile) 1000 km (625 miles) 0. This requires that the residual current on the parallel line is measured. The coupling will contain positive.001 / In Ω Line Angle 70° –90° +90° 0.1° kZm Mutual Comp 0 0 7 0.1.581 / 79. refer to section 3.12 230000 / 115 = 100 x 0. 4.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 109/220 The following table shows the relay menu for the fault locator.484 / 79.01 kZm Angle 0° 0° +360° 1° FAULT LOCATOR 4.476 = 0. select Line Angle = 80° for convenience. It is extremely important that the polarity of connection for the mutual CT input is correct.

The VTS logic in the relay is designed to detect the voltage failure (with internal thresholds or external opto input).Z1 Ie: As a ratio. This may be caused by internal voltage transformer faults. Following a failure of the ac voltage input there would be a misrepresentation of the phase voltages on the power system. as the relay automatically uses the kZ0 factor applicable to the distance zone which tripped. The condition of this alarm is given by: FFUS_Confirmed = (Fuse_Failure And VTS Timer) Or INP_FFUS_Line INP_F.484 / 79.40 / 0° kZm Mutual Comp = 0.Failure Q R Fuse_Failure ∆I>F.Failure Any_pole_dead V<F.2. Weak infeed.81 / 80° Ω (secondary).1 VTS logic description The voltage transformer supervision (VTS) feature is used to detect failure of the analog ac voltage inputs to the relay. mutual compensation could be set as follows: kZm Mutual Comp.Failure_Line VN >F. However.VTS LOGIC (SEE ALSO DDB DESCRIPTION IN THE END OF THAT SECTION) . The CT ratio for the mutual compensation may be different from the Line CT ratio.P44x/EN AP/E33 Application Notes Page 110/220 MiCOM P441/P442 & P444 Therefore set Line Impedance and Line Angle: = 5.2 Voltage transformer supervision (VTS) – Main VT for minZ measurement 4. and automatically adjust the configuration of protection elements (Distance element is blocked but may be unblocked on I1.Failure & ≥1 I0 >F. A settable time-delayed alarm output is also available (min1sec to Max 20sec).40 kZm Angle = 0° 4. kZm Therefore set = ZM0 / 3. kZm = ZM0 / 3.Z1 Set in degrees.Failure I2 >F. ∠kZm = ∠ ZM0 / 3. or faults on the interconnecting wiring to relays. No residual compensation needs to be set for the fault locator.I2 or I0 conditions in case of fault during VTS conditions) whose stability would otherwise be compromised (Distance. Should a CT residual input be available for the parallel line. DEF. kZm Angle.4° / (3 x 0.Failure FFUS_Confirmed S & Q R Healthy network All Pole Dead ≥1 P0530ENa FIGURE 66 . for this example we will assume that they are identical.Failure VTS Time delay ≥1 S I >F.Z1 = 0. overloading. as measured by the relay.581 / 79.4°) = 0. which may result in maloperation of the distance element. Directionnal phase current& all directional elements used in the internal logic). This usually results in one or more VT fuses blowing.

Fuse failure conditions are confirmed instantaneously if the opto input "INP_FFus line" is energised and assigned in PSL.…). ∆I> criteria and will force the unblocking functions: Distance Protection DEF Protection Weak-infeed Protection I> Directional U>. Directional overcurrent. or after elapse of the VTS Time delay in case of 1.VT SUPERVISION: VTS SETTINGS IN MiCOM S1 • VTS Timer: A settable alarm from 1 to 20s by step of 1s gives the possibility to signal by an alarm the Failure. A non confirmed Fuse Failure will be a detection of an internal fuse failure before the timer is issued. In that case a fault can be detected by the I2>. it is common to use MCB auxiliary contacts to indicate a three phase output disconnection. U< .DEFAULT PSL EXTRACTED Where a miniature circuit breaker (MCB) is used to protect the voltage transformer ac output circuits.I0>.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 111/220 FIGURE 67 . this facility has been provided for compatibility with various utilities current practices. • INP_FFUS Line :The external information given by the MCB to the opto input is secure and will block instantaneously the distance function and the functions which are use directional element. The confirmed Fuse Failure blocks all protection functions which use the voltage measurement (Distance. During no load. the timer covers the duration of Dead time1 HSAR cycle (Vo&/IO in case of no load) which could be detected as VT failure 1 pole. This alarm is instantaneous in case of opto energized by external INP FFU signal (issued from contact of MCB). However. it is possible for the VTS logic to operate correctly without this input. The directional overcurrent element may be blocked or set to become non directional with dedicated timer (Time VTS in MiCOM S1). FIGURE 68 . As previously described. 2 or 3 phases Fuse Failure. Energising an opto-isolated input assigned to “MCB Open” on the relay will therefore provide the necessary block.I>1 or IN>1. Weak infeed.I1>.

• The I0 criteria (zero sequence current threshold) gives the possibility to UNBLOCK the distance protection in case of phase to ground fault (if the fuse failure has not been yet confirmed).75Vn I0>_FFUS : The zero sequence current is bigger than a settable threshold : From 0. the condition which manages the Reset are given by : Fusion_Fusible = 0 And INP_FFUS_Line = 0 And /All Pole Dead Or Healthy Network • All Pole Dead: No current AND no voltage OR CB Opened ((52a) if assigned in PSL) UN . V<_FFUS : All the voltages are lower than a settable threshold from 0.5 In by step of 0. PSWING • Healthy Network: Rated Line voltage AND No V0 and No I0 AND No start element AND No Power Swing . I0 .01 In FuseFailure_3P : Parameter in MiCOM S1 which allows the FFU tri pole detection Any pole dead 4.P44x/EN AP/E33 Application Notes Page 112/220 4.1 ∆Ι>_FFUS : The line currents have a variation bigger than a settable value from 0.01 I2>_FFUS : The negative sequence current is bigger than a settable threshold identical to the I0 threshold. Fuse Failure Alarm reset In case of Fuse Failure confirmed.05 à 1 Un by step of 0.2. • The I2 criteria (negative sequence current threshold) gives the possibility to UNBLOCK the distance protection in case of insulated phase to phase fault (if the fuse failure has not been yet confirmed). CVMR (convergence) .2 MiCOM P441/P442 & P444 The internal detection FUSE Failure condition Is verified by follows (Fuse Failure not confirmed logic) (Vr AND /I0 AND /l2 Et /I>) OR (FusFus_tri AND /Any_pole_dead AND V< AND /∆Ι ) Vr>_FFUS : The residual voltage is bigger than a fixed threshold := 0.3 : Cycle in progress. • The criteria (V< AND /∆Ι) gives the possibility to detect the 3Poles Fuse Failure(No more phase voltage and no variation of current) (no specific logic about line energisation).00 In by step of 0.5IN.01 to 1. V0 . I>_FFUS : The direct current is bigger than a fixed threshold equal to 2.01 to 0.2.

An alternative method of detecting 3 phase VT failure is therefore required on line energisation: in that case the SOTF logic is applied.2. Under normal load conditions. Zero Sequence VTS Element: The thresholds used by the element are: • Fixed operate threshold: VN ≥ 0. a collapse of the three phase voltages will occur. Absence of three phase voltages upon line energisation Loss of One or Two Phase Voltages The VTS feature within the relay operates on detection of residual voltage without the presence of zero and negative phase sequence current. however. However. The phase voltage level detectors is settable (default value is adjusted at 30V / setting range : min:10V to Max:70V). . In practice. Stability of the VTS function is assured during system fault conditions. These signals are generated by comparison of the present value of the current with that exactly one cycle previously. If this is detected without a corresponding change in any of the phase current signals (which would be indicative of a fault).4 1.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 113/220 There are three main aspects to consider regarding the failure of the VT supply. VTS operation is blocked (and distance element unblocked) when any phase current exceeds 2.2. On line energisation there will. and earth fault current (ΣIph). the relay detects the presence of superimposed current signals. These are defined below: 4.1In (setting range : 0.01In to 5In).5 x In.05In). incorrect operation of voltage dependent elements could result.6 Absence of Three Phase Voltages Upon Line Energisation If a VT were inadvertently left isolated prior to line energisation.2. under such circumstances.75 x Vn. Also.5 x In. by the presence of I0 and/or I2 current. 4.5 Loss of All Three Phase Voltages Under Load Conditions Under the loss of all three phase voltages to the relay. The sensitivity of the superimposed current elements is settable and default value is adjusted at 0. and 4. The previous VTS element detected three phase VT failure by absence of all 3 phase voltages with no corresponding change in current. Under a fault condition a superimposed current signal will be generated which will prevent operation of the VTS. 2. then a VTS condition will be raised. Loss of one or two phase voltages 2. I0 = Iph = I2 = 0 to 1 x In. This gives operation for the loss of one or two phase voltages. be a change in current (as a result of load or line charging current for example). the value of superimposed current should therefore be zero. • Blocking current thresholds. Loss of all three phase voltages under load conditions 3. there will be no zero phase sequence quantities present to operate the VTS function. settable (defaulted to 0. which are changes in the current applied to the relay.

1×In 0. Menu text Default setting Setting range Step size Min Max GROUP 1 SUPERVISION VT Supervision VTS Time Delay 5s 1s 20s 1s VTS I2> & I0> Inhibit 0. Once the signal has latched then two methods of resetting are available. and others protection functions using voltage measurement • Dedirectionalising of directionalised overcurrent elements with new time delays “I> VTS”.2. (See Reset logic description in section 4.7 MiCOM P441/P442 & P444 Menu Settings The VTS settings are found in the ‘SUPERVISION’ column of the relay menu.01×In 5×In 0.(if selected) The VTS block is latched after a user settable time delay ‘VTS Time Delay’.3). The relevant settings are detailed below. • Instantaneous blocking of distance protection elements (if opto used). If not blocked the time delay associated can be modified as well (Time VTS): . on operation of any VTS element: • VTS alarm indication (delayed by the set Time Delay).01 x In Detect 3P Disabled Enabled Disabled Threshold 3P 30V 10V 70V 1V Delta I> 0.05 x In 0 1 x In 0.P44x/EN AP/E33 Application Notes Page 114/220 4.01×In The relay responds as follows.2.

Earth Fault.2.3. and has the primary star point earthed. (Line in this case means Main VT ref measurement / even if the main VT is on the bus side and the Synchro VT is on the line side).4). informs the P44X about an internal maloperation from the VT used for the impedance measurement reference.2 Outputs VTS Fast Set high for internal FFAilure detection made with internal logic. The voltage transformer connection used must be able to refer zero sequence voltages from the primary to the secondary side. Neg Seq O/C) are always blocked on operation of the CT supervision element. informs the P44X about an internal maloperation from the VT used for synchrocheck control (See CheckSync logic in section 4.2.3 Current Transformer Supervision (CTS) The current transformer supervision feature is used to detect failure of one or more of the ac phase current inputs to the relay.1 The CT Supervision Feature The CT supervision feature operates on detection of derived zero sequence current. 4. Any Pole Dead The DDB Any Pole Dead if linked in the PSL.2. Thus. Operation of the element will produce a time-delayed alarm visible on the LCD and event record (plus DDB 125: CT Fail Alarm). or comprises three single phase units. with an instantaneous block for inhibition of protection elements. indicates that one or more poles is opened. MCB/VTS Bus The DDB:MCB/VTS Bus if linked to an opto in the PSL and when energized. in the absence of corresponding derived zero sequence voltage that would normally accompany it. All Pole Dead The DDB All Pole Dead if linked in the PSL. VTS Fail Alarm Set high Set highwhen Opto energised (copy of MCB) OR internal FFAilure confirmed at the end of VTS timer. including the available setting ranges and factory defaults:- .8 INPUT / OUTPUT used in VTS logic: 4. indicates all pole are dead (The 3 poles are open). 4. 4. Additionally.Application Notes MiCOM P441/P442 & P444 4.8.1 Inputs P44x/EN AP/E33 Page 115/220 MCB/VTS Line The DDB:MCB/VTS Line if linked to an opto in the PSL and when energized. Protection elements operating from derived quantities (Broken Conductor. The following table shows the relay menu for the CT Supervision element. Failure of a phase CT or an open circuit of the interconnecting wiring can result in incorrect operation of any current operated element. interruption in the ac current circuits risks dangerous CT secondary voltages being generated.8. this element should only be enabled where the VT is of five limb construction.

CTS VN< Inhibit and the residual current setting.3.5 / 2V CTS IN> Set 0.1 0. With manual closure.e. Where the magnitude of residual voltage during an earth fault is unpredictable. 4. the element be disabled to prevent a protection elements being blocked during fault conditions. a difference in voltage magnitudes or phase angles existed. resulting in loss of stability and possible damage to connected machines.5 / 2V 22 / 88V 0. CTS Time Delay. Such checking may be required to be applied for both automatic and manual reclosing of the circuit breaker and the system conditions which are acceptable may be different in each case. For this reason. This is often referred to as guard logic and requires the close signal to be released and then re-applied if the closure is unsuccessful.08 x In 4 x In 0.3. If a circuit breaker were closed when the two system voltages were out of synchronism with one another. The time-delayed alarm.4 Check synchronisation The check synchronism option is used to qualify reclosure of the circuit breaker so that it can only occur when the network conditions on the busbar and line side of the open circuit breaker are acceptable.P44x/EN AP/E33 Application Notes Page 116/220 MiCOM P441/P442 & P444 Menu text Default setting Setting range Min step size max GROUP 1 SUPERVISION CT SUPERVISION 4. . the system would be subjected to an unacceptable ‘shock’. The CTS IN> set will typically be set below minimum load current. CTS IN> set.01 x In CTS Time Delay 5 0s 10s 1s Setting the CT Supervision Element Ir> & Temporisation 0<->10sec Vr< Calulation Part Logical Part P0554ENa The residual voltage setting. the CB close signal is applied into the logic as a pulse to ensure that an operator cannot simply keep the close signal applied and wait for the system to come into synchronism. should be set to avoid unwanted operation during healthy system conditions.2 CTS Status Disabled Enabled/Disabled N/A CTS VN< Inhibit 1 0.1 Inputs/outputs in CTS logic: CT Fail Alarm The DDB cell indicates a CT Fail detected after timer is issued 4. i. separate check synchronism settings are included within the relay for both manual and automatic reclosure of the circuit breaker. if both sides are ‘live’.2. Check synchronising therefore involves monitoring the voltage on both sides of a circuit breaker and. is generally set to 5 seconds. For example CTS VN< Inhibit should be set to 120% of the maximum steady state residual voltage. the relative synchronism between the two supplies.

to activate the c/s check logic. only if a logic of STF has been enabled by S1. These signals allow reclosure provided that the relevant check-synch criteria are fulfilled. Bit 2: Live Bus / Live Line.5° Bus-Line Delay 0. Dead / Dead made by PSL only (from version A3. a dedicated PSL must be created using Deb B (live L or live B/Dead L) – live/live could not be managed – in that case.5V 0.05Hz 0. − At least one condition of c/s scheme must be selected in the 3 bits. and that autoreclosure can proceed safely. closure of the breaker can be inhibited. If they are not. − Man CB. Parallel interconnections will ensure that the two sides remain in synchronism. a live busbar / live line synchronism check prior to reclosing the breaker ensures that the resulting phase angle displacement. signal is For an interconnected power system.0 model 05) V< Dead Line 13V 5V 30V 1V V> Live Line 32V 30V 120V 1V V< Dead Bus 13V 5V 30V 1V V> Live Bus 32V 30V 120V 1V Diff Voltage 6. Note that if check-synchronising is disabled. slip frequency and voltage difference between the busbar and line voltages are all within acceptable limits for the system.02Hz 1Hz 0.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 117/220 The check synchronising element provides two ‘output’ signals which feed into the manual CB control and the auto reclose logic respectively. Hence. − If SOTF is disabled in S1. the frequencies of the two sections of the split system will begin to slip with respect to each other during the time that the systems are disconnected. the DDB: automatically asserted and becomes invariant (logical status always forced at 1). Bit 2: Live Bus / Live Line.2s 0. The SYSTEM CHECKS menu contains all of the check synchronism settings for auto (“A/R”) and manual (“Man”) reclosure and is shown in the table below along with the relevant default settings:Menu text Default setting Setting range Min Step size Max GROUP 1 SYSTEM CHECKS C/S Check Scheme for A/R 111 Bit 0: Live Bus / Dead Line.1V Diff Frequency 0. . Bit 1: Dead Bus / Live Line.1s 2s 0. check sync condition is tallen in account.01Hz Diff Phase 20° 5° 90° 2. However.0 model 05) C/S Check Scheme for Man 111 CB Bit 0: Live Bus / Dead Line. tripping of one line should not cause a significant shift in the phase relationship of the busbar and line side voltages. if the parallel interconnection(s) is/are lost.1s KEY: “Diff” denotes the differential between Line VT and Busbar VT measurements.5V 40V 0. Dead / Dead made by PSL only (from version A3. Bit 1: Dead Bus / Live Line.

P44x/EN AP/E33

Application Notes

Page 118/220

MiCOM P441/P442 & P444

Note that the combination of the Diff Phase and Bus-Line Delay settings can also be equated
to a differential frequency, as shown below:

Diff Phase angle set to +/-20°, Bus-Line Delay set to 0.2s.

The phase angle ‘window’ is therefore 40°, which corresponds to 40/360ths of a
cycle = 0.111 cycle. This equates to a differential frequency of:
0.111 / 0.2 = 0.55 Hz

Thus it is essential that the time delay chosen before an “in synchronism” output can be
given is not too long, otherwise the synchronising conditions will appear more restrictive than
the actual Diff Frequency setting.
The Live Line and Dead Line settings define the thresholds which dictate whether or not the
line or bus is determined as being live or dead by the relay logic. Under conditions where
either the line or bus are dead, check synchronism is not applicable and closure of the
breaker may or may not be acceptable. Hence, setting options are provided which allow for
both manual and auto-reclosure under a variety of live/dead conditions. The following
paragraphs describe where these may be used.
WARNING:

THE SETTINGS VOLTAGE IN MiCOM S1 IS ALLWAYS CALCULATED IN
PHASE TO GROUND – EVEN IF PHASE/PHASE REF HAS BEEN
SELECTED.

If the threshold : live line has been set too high – the relay will never detect a healthy
network (as the line voltage is always measured below the voltage threshold). Without live
line condition, the distance protection cannot use the delta algorithms as no prefault
detection has been previously detected.
4.4.1

Dead Busbar and Dead Line
This mode is not integrated in the internal logic, however can be created using a dedicated
PSL:

(This facility with cells (Dead Line/Dead Bus) is available since version A3.0 model 05)
This setting might also be used to allow manual close with specific test conditions on the CB.
4.4.2

Live Busbar and Dead Line
Where a radial feeder is protected, tripping the circuit breaker will isolate the infeed, and the
feeder will be dead. Provided that there is no local generation which can backfeed to
energise the feeder, reclosure for live busbar / dead line conditions is acceptable. This
setting might also be used to allow re-energisation of a faulted feeder in an interconnected
power system, which had been isolated at both line ends. Live busbar / dead line reclosing
allows energising from one end first, which can then be followed by live line / live busbar
reclosure with voltages in synchronism at the remote end.

4.4.3

Dead Busbar and Live Line
If there was a circuit breaker and busbar at the remote end of the radial feeder mentioned
above, the remote breaker might be reclosed for a dead busbar / live line condition.

Application Notes
MiCOM P441/P442 & P444
4.4.4

P44x/EN AP/E33
Page 119/220

Check Synchronism Settings
Depending on the particular system arrangement, the main three phase VT for the relay may
be located on either the busbar or the line. Hence, the relay needs to be programmed with
the location of the main voltage transformer. This is done under the ‘CT & VT RATIOS’
column in the ‘Main VT Location’ cell, which should be programmed as either ‘Line’ or ‘Bus’
to allow the previously described logic to operate correctly. (See DDB description bellow)
Note that the check synch VT input may be driven from either a phase to phase or phase to
neutral voltage. The ‘C/S Input’ cell in the ‘CT & VT RATIOS’ column has the options of A-N,
B-N, C-N, A-B, B-C or C-A, which should therefore be set according to the actual VT
arrangement.
If the VTS feature internal to the relay operates, the check synchronising element is inhibited
from giving an ‘Allow Reclosure’ output. This avoids allowing reclosure in instances where
voltage checks are selected and a VT fuse failure has made voltage checks unreliable.
Measurements of the magnitude angle and delta frequency (slip frequency - since version
A4.0 with model 07) – the rated frequency of network is displayed by default in case of
problem with the delta f calculation : No line voltage or no bus voltage or both of the checksynch voltage are displayed in the ‘MEASUREMENTS 1’ column.
Individual System Check logic features can be enabled or disabled by means of the C/S
Check Scheme function links. Setting the relevant bit to 1 will enable the logic, setting bits
to 0 will disable that part of the logic. Voltage, frequency, angle and timer thresholds are
shared for both manual and autoreclosure, it is the live/dead line/bus logic which can differ.

P44x/EN AP/E33

Application Notes

Page 120/220

MiCOM P441/P442 & P444

Enable_SYNC
VTS_Slow
1

INP_Fuse Failure Bus
AR_Force_Sync
INP_AR_Cycle_1P

S

INP_AR_Reclaim

R

Q

INP_AR_Cycle_Conf

1
1

INP_AR_Reclaim_Conf
0

&

Any_Pole_Dead

&
t

&

CHECK
SYNC
Conditions
verified

1

200ms

All_Pole_Dead

Dead L/Live B
V< Dead Line

&

t
0

100ms

V> Live Bus

Live L/Dead B
V> Live L

&

t
0

100ms

V< Dead B

Live L/Live B
t

V> Live B
V> Live L

&

0

Bus Line Delay

Diff voltage
Diff frequency
Diff phase

P0492ENa

FIGURE 69 – CHECK SYNC LOGIC DESCRIPTION

Application Notes

P44x/EN AP/E33

MiCOM P441/P442 & P444

Page 121/220

X1

X2

b0

i0
i1

b1

sample

T sample

P0493ENa

FIGURE 70 – CALCUL OF FREQUENCY
Frequency tracking is calculated by: freq=1/((X2-X1+ Nbsamples)* Tsamples)
With X1 = b0 /(b0 – b1) et X2 = I0 /(I0 – I1).
Tsamples is the sampling period.
Nbsamples is the number of samples per period (between b1 & i1 (b1 being excluded))
The Line & Bus frequencies are calculated with the same principle (described here after).

For a phase shift of 245°. (360 –245) = 115° will be displayed . PHASE Phase shift = (∆T/ T) *360 ∆T = Ta + (x1-y2) A phase shift calculation requests a change of sign from both signals. All the angles will be between 0° and 180°.CALCULATION OF DIFF.P44x/EN AP/E33 Application Notes Page 122/220 MiCOM P441/P442 & P444 Trailing VLine phase VLine VBus x2 x1 Ta ∆T y1 y2 Leading VLine phase VBus VLine y3 y2 Ta ∆T x1 x2 P0494ENa FIGURE 71 .

4. . (Line in that case means Main VT ref measurement / even if the main VT are bus side and the Synchro VT is line side) When that opto picks up it will block the internal logic of Synchrocheck.always calculated as a single phase voltage ref V>Live Bus Set high when the Live Bus condition is verified (voltage above the V>Live Bus threshold value (settable in MiCOM S1) .4.always calculated as a single phase voltage ref V<Dead Bus Set high when the Dead Bus condition is verified (voltage below the V<Dead Bus threshold value (settable in MiCOM S1) . will inform the P44X about an internal maloperation from the VT used for impedance measurement ref.5 Logic inputs / Outputs from synchrocheck function 4.4.Application Notes MiCOM P441/P442 & P444 4.5.1). indicates that Check Sync conditions are verified by an external device – The DDB cell should be assigned afterwards with an internal AR logic (See also AR description in section 4.5.5. MCB/VTS Line The DDB:MCB/VTS Line if assigned to an opto input in PSL and when energized. (BUS in that case means Checksync ref measurement / even if the main VT is on the bus side and the Synchro VT is on the line side) When this opto picks up it will block the internal logic of Synchrocheck.2 Logic DDB outputs issued by the check sync logic Check Sync OK Set high when Check Synchro conditions are verified [Used with AR close in dedicated PSL – "AND" gate : [(AR Close) & (CheckSync OK)] A/R Force Sync Simulates the CheckSync control and force the logical DDB output "CheckSync OK" at 1 during a 1 pole or 3 poles high speed AR cycle.4.always calculated as a single phase voltage ref Control No C/S Set high when the internal Check Sync conditions are not verified Ext Chk Synch OK The DDB Ext Chk Synch OK if assigned to an opto input in PSL and when energized.1 Logic DDB input from the check sync logic P44x/EN AP/E33 Page 123/220 MCB/VTS Bus The DDB:MCB/VTS Bus if assigned to an opto input in PSL and when energized. Without CheckSync control (See the explanation in AR description Figure 76 and Figure 106) V<Dead Line Set high when the Dead line condition is verified (voltage below the V<Dead Line threshold value (settable in MiCOM S1) – The measured voltage is always calculated as a single phase voltage V>Live Line Set high when the Live line condition is verified (voltage above the V>Live Line threshold value (settable in MiCOM S1) . will inform the P44X about an internal maloperation from the VT used for synchrocheck ref.

THE ABOVE PSL SHOULD BE SET.P44x/EN AP/E33 Application Notes Page 124/220 MiCOM P441/P442 & P444 WARNING: TO ENSURE THAT THE AR CLOSING COMMAND IS CONTROLED BY THE CHECK SYNC CONDITIONS. (Different schemes can be created with internal AR & external CSync or internal Csync & external AR) Synchro Check : Dead Bus / Dead Line P0537ENa FIGURE 72 – CHECK SYNC PSL LOGIC Output assigned PSL Check Sync SYNC 1 AR_Force_Sync AR_Fail AReclose AR_Close AR_Cycle_1P AR_Cycle_3P 1 CB Control & CBC_Recl_3P Closing command with check sync conditions verified CBC_No_Check_Sync P0495ENa FIGURE 73 – INTERNAL CHECK SYNC AND INTERNAL AR LOGIC .

Dead times for all shots (reclose attempts) are independently adjustable (in MiCOM S1). up to four reclose shots are available.LOGIC WITH EXTERNAL AR 4. The autorecloser can be adjusted to perform a single shot. each with three phase tripping and reclosure.LOGIC WITH EXTERNAL SYNCHRO CHECK Output_Sync External AR close order Output_AR_force_Sync 1 & Output_AR_Close External closing order with internal C. two shot. Autoreclosure of two circuit breakers in a 1½ circuit breaker or mesh corner scheme is not supported by the standard logic (Dedicated PSL must be created & tested by user). three shot or four shot cycle. Where the relay is configured for single and three pole tripping. each performing three phase reclosure.1 Autorecloser Functional Description The relay autorecloser provides selectable multishot reclosure of the line circuit breaker.5 Autorecloser 4. Where the relay is configured for three pole tripping only.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 External Check Sync Page 125/220 1 Closing command with external C. . For a three pole trip. for a single phase to earth fault. the recloser can perform a high speed (HSAR) single pole reclose shot. Sync conditions verified 1 Output_closing order P0497ENa FIGURE 75 . The standard scheme logic is configured to permit control of one circuit breaker. This single pole shot may be followed by up to three delayed (DAR) autoreclose shots. up to four reclose shots are available in the same scheme.5. Sync conditions verified & Output_AR_force_Sync Output_closing order P0496ENa FIGURE 74 .

Bit 7: Block for V<1 Trip.01s 1 PAR or/and 3 PAR logic must be enable in CB control: .1s (CB healthy application) C/S on 3P Rcl DT1 (Check Sync with HSAR) AUTORECLOSE LOCKOUT Block A/R (Bit = 1 means AR blocked) Discrim. Bit 3: Block for LoL Trip. Disabled 11111111 11111111 Bit 0: Block at tZ2. Bit 12: Block for IN>2 Trip. Bit 1: Block at tZ3. Bit 2: Block at tZp.P44x/EN AP/E33 Application Notes Page 126/220 MiCOM P441/P442 & P444 Menu text Default setting Setting range Min Step size Max GROUP 1 AUTORECLOSE AUTORECLOSE MODE 1P Trip Mode Single Single Single/Three Single/Three/Three Single/Three/Three/Three 3P Trip Mode Three Three Three/Three Three/Three/Three Three/Three/Three/Three 1P .01s 3P . Bit 9: Block for V>1 Trip. Bit 6: Block for I>2 Trip. Bit 8: Block for V<2 Trip. Time Remark: 5s 0. 5s 0.01s Dead Time 2 (DAR) 60s 1s 3600s 1s Dead Time 3 (DAR) 180s 1s 3600s 1s Dead Time 4 (DAR) 180s 1s 3600s 1s Reclaim Time 180s 1s 600s 1s Close Pulse Time 0.Dead Time 1(HSAR) 1s 0. Bit 5: Block for I>1 Trip.1s 10s 0.1s 5s 0. Bit 4: Block for I2> Trip.Dead Time 1(HSAR) 1s 0. Bit 13: Block for Aided DEF Trip. Bit 11: Block for IN>2 Trip. Bit 10: Block for V>2 Trip.1s A/R Inhibit Wind 5s 1s 3600s 1s Enabled Enabled.1s 0.1s 60s 0.

but could be burnt away/thrown clear after several further reclose attempts or “shots”. with obvious benefits. any decision to install auto-reclosing would be influenced by any data known on the frequency of transient faults. Such faults can be cleared by the immediate tripping of one or more circuit breakers to isolate the fault. When a significant proportion of the faults are permanent. The remaining 10 . other possibilities being clashing conductors and wind blown debris. if the faulty line is immediately tripped out. • A high speed trip and reclose cycle clears the fault without threatening system stability. Lightning is the most common cause. a healthy restoration of supply will result. High speed single phase autoreclosure then follows.20% of faults are either semi-permanent or permanent. Permanent faults could be broken conductors. A semipermanent fault could be caused by a small tree branch falling on the line. utilities often employ single pole tripping for earth faults. using the line to maintain synchronism between remote regions of a relatively weakly interconnected system.Application Notes MiCOM P441/P442 & P444 4. The advantages and disadvantages of such single pole trip/reclose cycles are: • Synchronising power flows on the unfaulted phases. At subtransmission and transmission voltages. reclosure of the circuit breakers will result in the line being successfully re-energised. the capacitive current induced from the healthy phases can increase the time taken to de-ionise fault arcs. the advantages of auto-reclosing are small. particularly since reclosing on to a faulty cable is likely to aggravate the damage. transformer faults or cable faults which must be located and repaired before the supply can be restored. followed by a reclose cycle for the circuit breakers. The main advantages to be derived from using autoreclose can be summarised as follows: • Minimises interruptions in supply to the consumer. As the faults are generally self clearing ‘non-damage’ faults.5. . and time is allowed for the fault arc to de-ionise. In the majority of fault incidents. The cause of the fault may not be removed by the immediate tripping of the circuit. • However. Thus several time delayed shots may be required in forest areas. When considering feeders which are partly overhead line and partly underground cable. leaving circuit breaker poles on the two unfaulted phases closed.2 P44x/EN AP/E33 Page 127/220 Benefits of Autoreclosure An analysis of faults on any overhead line network has shown that 80-90% are transient in nature.

the relay either advances to the next shot in the programmed autoreclose cycle.8). a CB close command of set duration = Close Pulse is given. At the end of the dead time. and three pole (3P). The conditions to be met for closing are that the system voltages satisfy the internal check synchronism criteria (set in the System Checks section of the relay menu – and in a dedicated PSL (needs to be created by user – see section 4. 3 or 4.P44x/EN AP/E33 Application Notes Page 128/220 4.2.SUCCESSIVE AR CYCLE – SECOND TRIP ORDER BEFORE RECLAIM TIME IS ISSUED . (See Figure 76 with AR Close logic) provided system conditions are suitable. is fully charged indicated from the DDB: CB Healthy input (Optional application / See Figure 78 and Figure 82 AR inputs). 2. noting that separate dead times are provided for the first high speed shot of single pole (1P). if all programmed reclose attempts have been made.AR CYCLE – GENERAL DESCRIPTION AR_Trip_3ph and Reclaim Time stop with next Trip Trip_1P or Trip_3P Dead Time_1P Dead Time_3P Close Pulse AR_Trip_3ph Reclaim Time P0556ENa FIGURE 77 . The autorecloser is ready again to restart from the first shot a new cycle again (for future faults). and that the circuit breaker closing spring. or. goes to lockout. provided the circuit breaker is closed at the instant of protection operation. or other energy source.5. Trip_1P or Trip_3P Dead Time_1P or Dead Time_3P Close Pulse AR_Trip_3ph Reclaim Time P0555ENa FIGURE 76 . If the protection retrips during the reclaim time.3 MiCOM P441/P442 & P444 Auto-reclose logic operating sequence An autoreclose cycle is internally initiated by operation of a protective element (could be started by an internal trip or external trip). The appropriate dead timer for the shot is started (Dead Time 1. When the CB has closed the reclaim time (Reclaim Time) starts (See Figure 76 with AR Close logic). the autoreclose logic is reset at the end of the reclaim time. reclosure). If the circuit breaker has been not retrip.

LOGIC FOR RECLAIM TIME /AR CLOSE / AR FAIL AND AR FORCE_SYNC (AR FAIL is reseted with 3 pole closed) .Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 129/220 (The reclaim time is reset when the reclaim timer adjusted in MiCOM S1 Timer is issued or if a new trip order 1P or 3P occurs – see Figure 78) Any Pole Dead CHECK SYNC OK R Q End of Dead Time 2 CHECK SYNC 3P HSAR AR_Fail S & 1 & End of 3P Dead Time 1 S & AR_Force_Sync Q R 1 End of 1P Dead Time 1 1 1 & S Q R AR_Enable AR_RECLAIM 0 & t 1 Reclaim Time Block AR 1 INP_CBHealthy 1 S Q TRIP_1P 1 TRIP_3P AR_Close R 1 0 t Close pulse Time P0498ENa FIGURE 78 .

INTERNAL LOGIC OF AR LOCK OUT AR lockout logic picks up by: Block AR (see Figure 80) or AR BAR Shots (see Figure 81) or Inhibit (see Figure 82) or No pole discrepancy detected at the end of dead time1 (see Figure 83) or Trip order still present at the end of Dead time or Trip3P issued during 1P cycle after Discrimination Timer or Trip3P issued during 1P cycle with no 3PAR enable.P44x/EN AP/E33 Application Notes Page 130/220 MiCOM P441/P442 & P444 AR_Enable Block AR 1 AR lock out inhibit CBA_Discrepency & S & Q R AR_lock out 1 0 t End of 1P Dead Time 1 Reclaim Time 1 End of 3P Dead Time 1 S & TRIP_1P Q 1 R TRIP_3P Reset TRIP 1P 1 Reset TRIP 3P TPAR enable AR_Cycle_1P & S Q AR_Discrimination R TRIP_3P 1 Reset TRIP 3P & S Q R P0499ENa FIGURE 79 . .

the AR does not initiate any additional AR cycle. − A dedicated PSL can be created. the AR close is blocked. for performing an AR lock out in case of Fuse Failure confirmed. . If AR lock out picks up during a cycle.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 131/220 S >1 Q AR 1P in Prog & >1 AR 3P in Prog BAR_Block_T2 Enable & T2 BAR_Block_T3 Enable & T3 BAR_Block_Tzp Enable & Tzp T4 BAR_Block_LOL Enable & LOL_Trip_3P BAR_Block_I2 > Enable & Trip_I2> BAR_Block_I> Enable & TRIP 3P_I>1 BAR_Block_I>2 Enable & TRIP 3P_I>2 BAR_Block_V<1 Enable & TRIP 3P_V<1 BAR_Block_V<2 Enable & TRIP 3P_V<2 BAR_Block_V>1 Enable Enable TRIP 3P_V>2 BAR_Block_IN>1 Enable SBEF_TRIP 3P_IN>1 BAR_Block_IN>2 SBEF_TRIP 3P_IN>2 BAR_Block_DEF Enable & >1 Block AR & TRIP 3P_V>1 BAR_Block_V>2 >1 & & & Enable & DEF_TripA DEF_TripB >1 DEF_TripC BRK_Trip 3P SOTF_Enable SOTF/TOR trip & PHOC_Trip_3P_I>4 CBF1_Trip_3P CBF2_Trip_3P INP_BAR P0500ENa FIGURE 80 – BLOCK AR LOGIC − With AR Lock out (Block AR) activated.

POLES DISCREPENCY (CBA-DISC) Trip1P or Trip 3P Dead time1 or Dead time 3P AR_Close AR_BAR P0557ENa FIGURE 84 .LOGIC OF INHIBIT WINDOW The inhibit timer is started at the end of dead time if CB healthy is absent Trip1P Dead time(1P) AR_BAR AR_Trip_3ph CBA_Discrepency P0503ENa FIGURE 83 .TRIP ORDER STILL PRESENT AT THE END OF DEAD TIME WILL FORCE AR LOCK OUT (AR _BAR) .AR LOCK OUT BY NUMBER OF SHOTS AR_Enable End of 1P_Dead Time 1 & End of 3P_Dead Time S t Q & inhibit 0 R Inhibit Window INP_CBHealthy P0502ENa FIGURE 82 .P44x/EN AP/E33 Application Notes Page 132/220 MiCOM P441/P442 & P444 AR_Enable SPAR enable & & 1 S AR lockout_Shots> Q R TRIP_1P 1 & Trip counter = setting TRIP_3P & TPAR enable Reset TRIP_1P 1 Reset TRIP_3P P0501ENa FIGURE 81 .

The counters can be reset to zero with the Reset Total A/R command. Separate counters for single pole and three pole reclosures are available (See HMI description chapter P44x/EN HI).LOGICAL CBAUX SCHEME (CBA_DISC LOGIC FOR AR_BAR (AR LOCK OUT)) CBA TIME DISC=150MSEC FIXED VALUE Logic of pole dead : − CBA_A = Pole Dead A − CBA_3P = All pole Dead − CBA_3P_C = All pole Live − CBA_Any = Minimum 1Pole dead The total number of autoreclosures is shown in the “CB Condition” menu from LCD under Total Reclosures.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 133/220 CNF_52b CNF_52a & & INP_52a_A S Q & & INP_52b_A R 1 CBA_A & & & CBA_3P_C xor & & INP_52a_B S Q & & INP_52b_B 1 R CBA_ANY 1 CBA_B & & & CBA_3P xor & & & INP_52a_C S Q & & INP_52b_C R 1 CBA_C & & t 1 xor 0 CBA_Status_Alarm CBA_Time_Alarm CBA_Time_Disc 1 INP_DISCREPENCY t 0 CBA_Disc P0504ENa FIGURE 85 . by LCD HMI .

RECLOSING SCHEME FOR 3 PHASE TRIPS 4. (see Figure 86) . The scheme is selected in the relay menu as shown in Table 12: (The first 3P_HSAR cycle can be controlled by the check Sync logic) Reclosing Mode Number of Three Phase Shots 3 1 3/3 2 3/3/3 3 3/3/3/3 4 TABLE 12 . The Dead time1 and Discrimination timer (from version A3. if enable. When a single pole trip is issued by the relay.5 Scheme for Single Pole Trips The relay allows up to four reclose shots. If the AR logic detects a single pole or three poles trip (internal or external) during the discrimination timer. a 1 pole AR cycle is initiated. the recloser will then move to the appropriate three phase cycle. plus up to three delayed (DAR) shots. If no AR 3P is enable in MiCOM S1. the relay trip 3 poles and AR is blocked. All DAR shots have three pole operation. one high speed single pole AR shot (HSAR). ie.RECLOSING SCHEME FOR SINGLE PHASE TRIPS Should a single phase fault evolve to affect other phases during the single pole dead time.P44x/EN AP/E33 Application Notes Page 134/220 4.4 MiCOM P441/P442 & P444 Scheme for Three Phase Trips The relay allows up to four reclose shots.0) are started.5. the 1P HSAR cycle is disabled and replaced by a 3P HSAR cycle.5. The scheme is selected in the relay menu as follows: Scheme Number of Single Pole HSAR Shots Number of Three Pole DAR Shots 1 1 None 1/3 1 1 1/3/3 1 2 1/3/3/3 1 3 TABLE 13 .

and during the 1P dead time. (see Figure 87) Trip 1P Trip 3P after Discrim Timer Trip_1P or Trip_3P 1P_Dead Time AR_Discrimination Timer 3P_Dead Time AR_Trip_3ph AR_BAR P0506ENa FIGURE 87 .Figure 86 .FAULT DURING A HSAR 1P CYCLE WHEN DISCRIMINATION TIMER IS ISSUED .FAULT DURING A HSAR 1P CYCLE DURING DISCRIMINATION TIMER If the AR logic detect a 3 poles trip (internal or external) when the Discrimination Timer is issued.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 135/220 Trip 1P Trip 3P during Discrimination Timer Trip_1P or Trip_3P 1P_Dead Time AR_Discrimination Timer 3P_Dead Time AR_Trip_3ph AR_BAR P0505ENa FIGURE 86 . the single pole AR cycle is stopped and the relay trip 3 phases and block the AR.Figure 87: Evolving fault during AR 1P cycle - .

will enable the internal AR logic. TPAR 1 AR TPAR enable INP_TPAR P0508ENa FIGURE 89 NOTE: After a new PSL loaded in the relay (which includes "TPAR" or "SPAR" cells). will enable the 1P AR logic (The priority of that input is higher than the settings done via MiCOM S1 or by front panel . as that opto is not energized.that means the 1P AR can be disabled even if activated in MiCOM S1.2 sec). AR_Internal SPAR enable 1 & AR_Enable TPAR enable FIGURE 90 .6 MiCOM P441/P442 & P444 Logical Inputs used by the Autoreclose logic Contacts from external equipment (External protection or external synchrocheck or external AR) may be used to influence the auto-recloser via opto-isolated inputs. it is necessary to transfer again the settings configuration (from PC to relay) for adjusting the datas in RAM and EEPROM (otherwise discrepency could appear in the logic status of AR enable). SPAR 1 AR SPAR enable INP_SPAR P0507ENa FIGURE 88 TPAR Enable The DDB TPAR Enable if assigned to an opto input in the PSL (in default PSL is inverted and recorded to opto8) and when energized. these optos cannot be mapped to functions in the PSL). A/R Internal The DDB A/R Internal if assigned to an opto input in the PSL and when energized.2 sec). The inputs can be selected to accept either a normally open or a normally closed contact.P44x/EN AP/E33 Application Notes Page 136/220 4.Otherwise. SPAR Enable The DDB SPAR Enable if assigned to an opto input in the PSL (in default PSL is inverted and recorded to opto8) and when energized. (to be valid opto must be energized >1.that means the 3P AR can be disabled even if activated in MiCOM S1.5. Such functions can be allocated to any of the opto-isolated inputs on the relay via the programmable scheme logic (Ensure that optos1&2 are not set for setting group change. as the opto input is not energized. will enable the 3P AR logic (The priority is higher than the settings done via MiCOM S1 or by front panel . (to be valid opto must be energized >1.AR ACTIVATED CONDITIONS P0509ENa . programmable via the PSL editor. This opto input could be connected to an external condition like the Wdog of protection Main1 – which activates the internal AR of Main 2 (P44x) in case of internal failure of the Main1.

Application Notes
MiCOM P441/P442 & P444

P44x/EN AP/E33
Page 137/220

A/R 1p in Prog
The DDB A/R 1P in Prog if assigned to an opto input in the PSL and when energized, will
block the internal DEF as an external single pole AR cycle is in progress.

A/R 3p in Prog
The DDB A/R 3P in Prog if assigned to an opto input in the PSL and when energized, will
inform the P44X about the presence of an external 3P cycle.That data could be used in case
of evolving fault

A/R Close
The DDB A/R Close if assigned to an opto input in the PSL and when energized, could be
linked with the internal check sync condition to control the external CB closing command.

A/R Reclaim
The DDB A/R Reclaim if assigned to an opto input in the PSL and when energized, will
inform the protection about an external reclaim time in progress; and will initiate the internal
TOR logic. (That information extension logic, by using a dedicated PSL could be used also
in Z1x.

BAR
Block Autoreclose (via Opto Input or PSL) – see Figure 80.
The DDB: BAR input will block the autoreclose and lockout the AR if in progress. If a single
pole cycle is in progress a three pole trip and lockout will be issued. It can be used when
protection operation without autoreclose is required. A typical example is on a transformer
feeder, where autoreclosing may be initiated from the feeder protection but blocked from the
transformer protection. Similarly, where a circuit breaker low gas pressure or loss of vacuum
alarm occurs during the dead time, autoreclosure, should be blocked – and BAR can be
used to realise that blocking logic.

Ext Chk Synch OK
External Check Synchroniser Used (via Opto Input) – Dedicated PSL required to be
configured.
If an opto input is assigned in the PSL (DDB: Ext Chk Synch OK), the AR close command
will be controlled by an external check synchronism device. The input is energised when the
Check Sync conditions are verified.

CB Healthy
(via Opto Input)
The majority of circuit breakers are only capable of providing one trip-close-trip cycle. It is
necessary to re-establish sufficient energy in the circuit breaker before the CB can be
reclosed. The DDB: CB Healthy input is used to ensure that there is sufficient energy
available to close and trip the CB before initiating a CB close command. If on completion of
the dead time, sufficient energy is not detected by the relay within a period given by the AR
Inhibit Wind window, lockout will result and the CB will remain open (AR BAR Picks up –
see Figure 79) If the CB energy becomes healthy during the time window, autoreclosure will
occur. This check can be disabled by not allocating an opto input. In this case, the DDB cell
“CB Healthy” is considered invariant for the logic of the relay. This will mean that the signal
is always high within the relay (when the logic required a high level) and at 0, if low level is
requested. It is an invariant status for the firmware (Same logic is applied for every optional
opto – if not linked in the PSL these cells are managed as invariant data for internal logic).

P44x/EN AP/E33

Application Notes

Page 138/220

MiCOM P441/P442 & P444
INP_CB_Healthy picks up,
before issued of INhWind

Start of
INhWind
INhWind
1P Dead Time or
3P Dead Time
INP_CB_Healthly
Close pulse
AR_Trip_3ph
AR_RECLAIM

P0510ENa

FIGURE 91 - CB_HEALTHY IS PRESENT BEFORE INHWIND IS ISSUED
Start of
INhWind

INhWind is
issued

INhWind
1P_Dead Time or
3P_Dead Time
INP_CB_Healthy
AR_Close
AR_Trip_3ph
AR_BAR

P0511ENa

FIGURE 92 - CB_HEALTHY DID NOT PICKS UP WHEN INHWIND IS ISSUED (AR BAR PICKS UP)
The CB healthy logic is used as a negative logic (due to an inverter in the scheme – see
Figure 82 (logic of inhibit window) but the DDB takes into account the CB healthy as a
positive logic [1=opto energised during inhwind (MiCOM S1 setting) =AR close pulse]

Force 3P Trip
The DDB Force 3P Trip if assigned to an opto input in the PSL and when energized, will
force the internal single phase protection to trip three phases. (external order from Main1 to
Main2 (P44x)) – next Trip will be 3P (Figure 92 & Figure 93)

INP_Trp_3P
1

BAN3

AR_Trip_3Ph
SPAR enable

&

AR_internal

P0512ENa

FIGURE 93 – 3P TRIP LOGIC

Application Notes

P44x/EN AP/E33

MiCOM P441/P442 & P444

Page 139/220

Trip_3P_SBEF_IN>1
Trip_3P_SBEF_IN>2
Trip_3P_I2>
TOR_Trip_3P
LOL_Trip_3P
BRK_Trip_3P
Trip_3P_I>1
Trip_3P_I>2

1

Trip_3P_I>3
Trip_3P_I>4
Trip_3P_V<1
Trip_3P_V<2

1

Trip_3P_V>1
1

Trip_3P_V>2

1

TRIP_Any Pole

PW_trip
R
Q
S

&

Dwell

1

Timer

BAN3
Trip_timer

PDist_Trip_A
Weak_Trip_A

Dwell

1

DEF_Trip_A

1

Trip_A

1

TRIP_Any_A

Timer

80 ms

User_Trip_A
1

INP_EXTERNAL_ProtA

&

&

1

TRIP_3Poles

Trip_timer

PDist_Trip_B
Weak_Trip_B

Dwell

1

DEF_Trip_B

1

Trip_B

1

TRIP_Any_B

Timer

80 ms

User_Trip_B

1

INP_EXTERNAL_ProtB

xor

&

xor

TRIP_1Pole

Trip_timer

PDist_Trip_C
Weak_Trip_C

1

Dwell

1

Trip_C

1

TRIP_Any_C

Timer

DEF_Trip_C

80 ms

User_Trip_C

INP_EXTERNAL_ProtC

1

P0513ENa

FIGURE 94 - GENERAL TRIP LOGIC

Manual Close CB
(via Opto Input, Local or Remote Control)
Manual closure of the circuit breaker will force the autorecloser in a lockout logic, if selected
in the menu (see SOTF logic Figure 35).

P44x/EN AP/E33
Page 140/220

Application Notes
MiCOM P441/P442 & P444

Any fault detected within 500ms of a manual closure will cause an instantaneous three pole
tripping, without autoreclosure (See next Figure 80 BAR logic)
With AR Lock out (AR_BAR) activated, the AR does not initiate any additional AR cycle. If
AR lock out picks up during a cycle, the AR close is blocked.
This prevents excessive circuit breaker operations, which could result in increased circuit
breaker and system damage, when closing onto a fault.

Manual Trip CB
The DDB Force Manual Trip CB if assigned to an opto input in the PSL and when
energized, will inform the protection about an external trip command on the CB by the CB
control function (if activated).

Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 SUP_Trip_Loc Page 141/220 & Manual/Remote/Local Trip 1 CBC_Local_Control & SUP_Close_Loc SUP_Trip_Rem & CBC_Remote_Control & SUP_Close_Rem INP_CB_Trip_Man & CBC_Input_Control Manual/Remote/Local Close 1 & INP_CB_Man_Close TRIP & CBA_3P_C CBC_Trip_Pulse S Q 1 R t 0 CBC_Trip_3P Pulsed output latched in UI & CBC_Failed_To_Trip CBA_3P CLOSE CBA_Status_Alarm & S CBC_Close_In_Progress Q AR_Cycle_1P R 1 t INP_AR_Cycle_1P AR_Cycle_3P 0 1 1 CBC_Delay_Close INP_AR_Cycle_3P & S Q R CBA_3P CBA_Disc TRIP_Any 1 INP_AR_Close Pulsed output latched in UI AR_Close 1 & t CBC_ Fail_To_Close 0 R CBC_Recl_3P Q CBC_Close_Pulse S CBA_Any INP_CB_Healthy & CBC_Healthy_Window t 0 CBC_UnHeathly & 1 CBC_CS_Window t 0 & CBC_No_Check_Syn SYNC P0514ENa FIGURE 95 .GENERAL CB CONTROL LOGIC .

The relay will be driven to lockout and the autoreclose function will be disabled until the lockout condition has been reset. or the AR function is Locked Out. until the circuit breaker is closed successfully. This DDB signal may also be useful during relay commissioning to check the operation of the autoreclose cycle.P44x/EN AP/E33 Page 142/220 Application Notes MiCOM P441/P442 & P444 CB Discrepancy The DDB CB Discrepancy if assigned to an opto input in the PSL and when energized. External Trip B and External Trip C (external Trip Order issued by main 2 or in order to initiate the internal AR backup protection). External TripA External TripB External TripC From External Protection Devices (via Opto Inputs). These are described below. (see Figure 78) AR Close Initiates the reclosing command pulse for the circuit breaker. 4. Where three single pole circuit breakers are used. an alarm "AR Fail" will be raised. to provide information about the status of the autoreclose cycle. identified by their DDB signal text.5. No Dwell timer is associated as for an internal trip (see Figure 94: trip logic). AR Lockout Shot> Indicates an unsuccessful autoreclose (definitive trip following the last AR shot). Opto inputs are assigned as External Trip A. External trip is integrated in the DDB: Any Trip. . "AR Lockout Shots>" (along with AR Lockout) will be raised. This signal may be useful during relay commissioning to check the operation of the autoreclose cycle. Must be Set to high logical level before Dead time 1 is issued (see Figure 83) -can be generated also internally (see Figure 85 and Figure 109 Cbaux logic).see General trip logic Figure 94. thus indicating that dead time timeout is in progress. (See Figure 78) AR 1P In Prog. will inform the protection about a pole Discrepancy status. This output feeds a signal to the Reclose Time Delay timer. – (see Figure 79 and Figure 81) AR Fail If the check sync conditions are not meet prior to reclose within the time window. 1 pole opened and two other poles closed.7 Logical Outputs generated by the Autoreclose logic The following DDB signals can be masked to a relay contact in the PSL or assigned to a Monitor Bit in Commissioning Tests. the AR Close contact will need to energise the closing circuits for all three breaker poles (or alternatively assign three CB Close contacts). This output will remain activated from the initiating protection trip. which maintains the assigned reclose contact closed for a sufficient time period to ensure reliable CB mechanism operation. An alarm. A single pole autoreclose cycle is in progress.

This signal may be useful during relay commissioning to check the operation of the autoreclose cycle. or the AR function is Locked Out. thus indicating that dead time timeout is in progress. A three phase autoreclose cycle is in progress.DAR 3 POLES (DELAYED AR CYCLE 3 POLES) .OUTPUT AR 3 POLES IN PROGRESS AR_1P in prog & Trip counter = 0 TPAR enable & 1 S HSAR_3P Q TRIP_3P R & AR_discrimination t 0 Block AR Dead Time1 1 P0517ENa FIGURE 98 . until the circuit breaker is closed successfully.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 SPAR enable Page 143/220 & TRIP_1P AR_Cycle_3P S & Q CBA_Discrepency AR__1P in prog R BAR t 1 0 1P Dead Time 1 TRIP_3P S AR_Discrimination Q R 1 t 0 Discrimination Time P0515ENa FIGURE 96 – AR 1 POLE IN PROGRESS LOGIC AR 3P In Prog. This output will remain activated from the initiating protection trip.HSAR 3 POLES (HIGH SPEED AR CYCLE 3 POLES) 3Par & TRIP_3P & Q DAR_3P R 0 < Trip counter < setting Block AR S 1 t 0 Dead Time 2 P0518ENa FIGURE 99 . HS_AR_3P 1 AR_3P in prog DAR_3P P0516ENa FIGURE 97 .

is used to indicate that the autorecloser is timing out its first dead time.OUTPUT HSAR (FOR DEAD TIME1) AR 234 in Prog. and then set to assert the DDB: BAR input. DDB: AR 1st in Prog. the protection element operation is combined with AR 234 in Prog. 3 or 4. fixed logic converts single phase trips for faults on autoreclosure to three pole trips. AR_1P in prog 1 AR_3P in prog & TRIP_1P 1 Block AR AR_RECLAIM & inhibit AR_Internal 1 AR_Trip_3Ph & SPAR enable P0521ENa FIGURE 102 . as a logical AND operation in the Programmable Scheme Logic. whether a high speed single pole or three pole shot. HSAR_3P 1 AR_1st_Cycle AR_1P in prog P0519ENa FIGURE 100 . DDB: AR 234 in Prog. . The DDB: AR Reclaim output would be energised at the same instant as resetting of any Cycle outputs. DAR_3P 1 AR_234th_Cycle P0520ENa FIGURE 101 . This technique is commonly used when the downstream devices are fuses.4) AR Trip 3 Ph This is an internal logic signal used to condition any protection trip command to the circuit breaker(s). AR Reclaim could be used to block low-set instantaneous protection on autoreclosure. is used to indicate that the autorecloser is timing out delayed autoreclose dead times for shots 2.3.-AR LOGIC FOR 3P TRIP DECISION AR Reclaim Indicates that the reclaim timer following a particular autoreclose shot is timing out. Where single pole tripping is enabled. forcing lockout. which had not been time-graded with downstream protection. and fuse saving is implemented.P44x/EN AP/E33 Application Notes Page 144/220 MiCOM P441/P442 & P444 AR 1st in Prog. This avoids fuse blows for transient faults. See Figure 78. Where certain protection elements should not initiate autoreclosure for DAR shots.OUTPUT DAR (FOR DEAD TIME2.

When a single pole trip is issued by the relay. (see Figure 87 and Figure 96) SPAR enable & TRIP_1P AR_3P in prog S & Q CBA_Discrepency AR_1P in prog R Block AR t 1 0 1P Dead Time 1 TRIP_3P S AR_Discrimination Q R 1 t 0 Discrimination Time P0522ENa FIGURE 103 – AR DISCRIMINATION LOGIC See also Figure 86 & Figure 87 The discrimination timer is used to differentiate an evolving fault to a second fault in the power system or a long operation of the circuit breaker. If the AR logic detects a single pole or three poles trip (internal or external) during the discrimination timer. a 1 pole AR cycle is initiated. the 1P HSAR cycle is disabled and replaced by a 3P HSAR cycle. If no AR 3P is enable in MiCOM S1. if enable. and during the 1P dead time. the relay trip 3 poles and AR is blocked.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 145/220 AR Discrim Start with the trip order. (see Figure 86) If the AR logic detect a 3 poles trip (internal or external) when the Discrimination Timer is issued.0) are started. the single pole AR cycle is stopped and the relay trip 3 phases and block the AR. . The Dead time1 and Discrimination timer (from version A3.

the first single pole high speed AR cycle (1P HSAR) is stopped and removed by a 3 pole high speed AR cycle (3P HSAR) P0523ENa FIGURE 104 . it is considered like a new fault. (No 3P AR cycle is started) (definitive trip – 3 poles are kept opened) – see Figure 105. .P44x/EN AP/E33 Page 146/220 Application Notes MiCOM P441/P442 & P444 If an evolving occurs during the discrimination timer.DEAD TIME 1P=500MSEC / T DISCRIM=100MSEC If the evolving fault occurs after the discrimination timer. The 1P cycle is blocked and the CB is kept opened.

Secondly. AR Enable Indicates that the autoreclose function is in service. broken current lockout. following the final reclose attempt. manual close no check synchronism and CB unhealthy. excessive fault frequency lockout.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 147/220 FIGURE 105 To inhibit the discrimination timer logic (fixed logic) . NOTE: Lockout can also be caused by the CB condition monitoring functions maintenance lockout. AR Lockout. (See Figure 79 & Figure 80) . (See Figure 89) AR Lockout If protection operates during the reclaim time. (See Figure 88) AR TPAR Enable Three poles AR is enabled. the DDB: BAR input will block autoreclose and cause a lockout if autoreclose is in progress. (See Figure 90) AR SPAR Enable Single pole AR is enabled. Lockout will also occur if the CB energy is low and the CB fails to close. it will not function until a Reset Lockout or CB Manual Close command is received (depending on the Reset Lockout method chosen in CB Monitor Setup). (1P Dead Time 1). CB failed to trip and CB failed to close. Once the autorecloser is locked out. the relay will be driven to lockout and the autoreclose function will be disabled until the lockout condition is reset. the value should be equal to the 1P cycle dead time. This will produce an alarm.

2) V<Dead Line (See Checksync logic description – section 4.4.5.4.5.2) .5.4.2) V>Live Line (See Checksync logic description – section 4.5.OK (See Checksync logic description – section 4.THE CHECK SYNC SIGNAL IS FORCED AT THE END OF DEAD TIME (SEE FIGURE 78) Ext Chk Synch OK The DDB Ext Chk Synch OK if linked to an opto in a dedicated PSL and when energized.signal is reset with AR reclaim DEC_3P AR_Cycle_3P SYNC AR_Close AR_Trip_3ph RECLAIM AR_Force_Sync P0558ENa FIGURE 106 – CHECK SYNC SIGNAL PICK-UP AT THE END OF THE DEAD TIME (AR CYCLE) DEC_3P AR_Cycle_3P SYNC AR_Close AR_Trip_3ph AR_RECLAIM AR_Fail AR_Force_Sync P0559ENa FIGURE 107 .2) V<Dead Bus (See Checksync logic description – section 4.4. Check Sync. indicates that external conditions of Synchro are fullfiled – This can be linked afterwards with an internal AR logic (See also AR description in Figure 76).P44x/EN AP/E33 Application Notes Page 148/220 MiCOM P441/P442 & P444 A/R Force Sync Force the Check Sync conditions to high logical level – used for SPAR or TPAR with SYNC AR3 fast (Enable by MiCOM S1) .

Stub Bus Protection. DDB signals 2Ph Fault and 3Ph Fault can be mapped via the PSL in a logical OR combination onto input DDB: BAR. the function may be Disabled in the relay Configuration menu. All other protection trips will initiate autoreclosure unless blocking bits are set in the A/R Block function links. The logic is partly fixed so that autoreclosure is always blocked for any Switch on to Fault. Disabling the autorecloser does not prevent the use of the internal check synchronism element to supervise manual circuit breaker closing. If statistical information for the power system shows that a moderate percentage of faults are semi-permanent. 4.Application Notes MiCOM P441/P442 & P444 P44x/EN AP/E33 Page 149/220 V>Live Bus (See Checksync logic description – section 4.90% of faults are transient highlights the advantage of single shot schemes. Note that DAR shots will always be three pole. If the autoreclose function is Enabled. the setting guidelines now outlined should be read: 4. Broken Conductor or Zone 4 trip. When autoreclosure is not required for multiphase faults.4. further DAR shots may be used provided that system stability is not threatened.5.8 Setting Guidelines Should autoreclosure not be required. When blocking is only required for a three phase fault. The fact that 80 . there will be a requirement to reclose for certain types of faults but not for others. .2) Ctrl Cls In Prog Manual close in progress-using CB control (timer manual closing delay in progress) Control Trip CB Trip command by internal CB control Control Close CB close command by internal CB control 4. the DDB signal 3Ph Fault is mapped to BAR alone.5.9 Choice of Protection Elements to Initiate Autoreclosure In most applications.10 Number of Shots There are no clear-cut rules for defining the number of shots for any particular application.5. setting bits to zero will allow the set autoreclose cycle to proceed. In order to determine the required number of shots the following factors must be taken into account: An important consideration is the ability of the circuit breaker to perform several trip close operations in quick succession and the effect of these operations on the maintenance period. Setting the relevant bit to 1 will block autoreclose initiation (forcing a three pole lockout). Autoreclosure will also be blocked when relay supervision functions detect a Circuit Breaker Failure or Voltage Transformer/Fuse Failure. Three phase faults are more likely to be persistent. so many utilities may not wish to initiate autoreclose in such instances.5.

the capacitive current induced from the healthy phases can increase the time taken to de-ionise fault arcs. <50 ms.5. For stability between two sources a system dead time of <300 ms may typically be required. conductor spacing.28 275 0. NOTE: For single pole HSAR.MINIMUM FAULT ARC DE-IONISING TIME (THREE POLE TRIPPING) . Here the best policy may be to adopt longer dead times. Line Voltage (kV) Minimum De-Energisation Time (s) 66 0. 4. As circuit voltage is generally the most significant. • Circuit breaker characteristics. to allow time for power swings on the system resulting from the fault to settle. For high speed autoreclose the system disturbance time should be minimised by using fast protection.12 De-Ionising Time The de-ionisation time of a fault arc depends on circuit voltage.5 TABLE 14 . For high speed autoreclose instantaneous reset of protection is required.15 132 0. minimum de-ionising times can be specified as in the Table below.P44x/EN AP/E33 Application Notes Page 150/220 4.5.1 110 0. The minimum system dead time considering just the CB is the trip mechanism reset time plus the CB closing time. fault current and duration.11 MiCOM P441/P442 & P444 Dead Timer Setting High speed autoreclose may be required to maintain stability on a network with two or more power sources.3 400 0. For highly interconnected systems synchronism is unlikely to be lost by the tripping out of a single line. Also it is essential that the protection fully resets during the dead time.17 220 0. Minimum relay dead time settings are governed primarily by two factors: • Time taken for de-ionisation of the fault path. so that correct time discrimination will be maintained after reclosure onto a fault. such as distance or feeder differential protection and fast circuit breakers <100 ms. wind speed and capacitive coupling from adjacent conductors.

Dead Time 1 could be chosen as ≥ 300ms. = 245ms. so 3P Rcl . (This gives 335ms and 635ms respectively here).Dead Time 1 could be chosen as ≥ 600ms. • Fault incidence/Past experience . 4. • CB Opening + Reset time (Trip coil energised → Trip mechanism reset): 200ms (b). De-ionising time for 220kV line: • 280ms (e) for a three phase trip. to allow protection reset.For high speed autoreclose the reclaim time may be set longer than the spring charging time.85 = 50 + 560 . • The Reclaim Time setting is always set greater than the tZ2 distance zone delay. . = 525ms.5. such as.13 Reclaim Timer Setting A number of factors influence the choice of the reclaim timer. and then subtracting (a).85 = 130ms. to allow de-ionising (three pole). The overall system dead time is found by adding (d) to the chosen settings. (560ms for a single pole trip).Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 151/220 Example Minimum Dead Time Calculation The following circuit breaker and system characteristics are to be used: • CB Operating time (Trip coil energised → Arc interruption): 50ms (a). • Switchgear Maintenance . A minimum reclaim time of >5s may be needed to allow the CB time to recover after a trip and close before it can perform another tripclose-trip cycle. • Protection reset time: < 80ms (c). The minimum relay dead time setting is the greater of: (a) + (c) = 50 + 80 (a) + (e) .Small reclaim times may be required where there is a high incidence of recurrent lightning strikes to prevent unnecessary lockout for transient faults. • Spring charging time . In practice a few additional cycles would be added to allow for tolerances. to allow de-ionising (single pole). For delayed autoreclose there is no need as the dead time can be extended by an extra CB healthy check AR Inhibit Wind window time if there is insufficient energy in the CB. • CB Closing time (Close command → Contacts make): 85ms (d). This time will depend on the duty (rating) of the CB.Excessive operation resulting from short reclaim times can mean shorter maintenance intervals.(d) = 50 + 280 . and 1P Rcl .

The time delay is set to avoid unwanted operation during normal switching duties.6 MiCOM P441/P442 & P444 Circuit breaker state monitoring An operator at a remote location requires a reliable indication of the state of the switchgear. A normally open / normally closed output contact can be assigned to this function via the programmable scheme logic (PSL). or. an alarm is raised. giving an indication of the position of the circuit breaker. if the state is unknown. The relay incorporates circuit breaker state monitoring.P44x/EN AP/E33 Application Notes Page 152/220 4. Under healthy conditions.6. this would indicate one of the following conditions: • Auxiliary contacts / wiring defective • Circuit Breaker (CB) is defective • CB is in isolated position Should both sets of contacts be closed. Should both sets of contacts be open.1 Circuit Breaker State Monitoring Features MiCOM relays can be set to monitor normally open (52a) and normally closed (52b) auxiliary contacts of the circuit breaker. only one of the following two conditions would apply: • Auxiliary contacts / wiring defective • Circuit Breaker (CB) is defective If any of the above conditions exist. Without an indication that each circuit breaker is either open or closed. 4. these contacts will be in opposite states. In the PSL CB AUX could be used or not. following the four options: None 52A (1 or 3 optos if it is a single pole logic) 52B (1 or 3 optos) Both 52A and 52B (2 optos or 6 optos) Sol1: One opto used for 52a (3 poles breaker) Sol2: One opto used for 52b (3 poles breaker) . the operator has insufficient information to decide on switching operations. an alarm will be issued after a 5s time delay.

Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Sol3: Two optos used for 52a & 52b (3 poles breaker) Sol4: Three optos used for 52a (1 pole breaker) Sol5: Three optos used for 52b (1 pole breaker) Sol6: Six optos used for 52a &52b (1 pole breaker) FIGURE 108 – DIFFERENTS OPTOS/CB AUX SCHEMES Page 153/220 .

Similarly for a closed breaker condition indication that all three phases are closed must be given. With 52a&52b both present. For single pole tripping applications 52a-A. See Figure 109.P44x/EN AP/E33 Application Notes Page 154/220 MiCOM P441/P442 & P444 Where ‘None’ is selected no CB status will be available. CBA_Status Alarm is activated. If no valid status is present (52a=52b) when the Alarm timer is issued (value=150 msec). Where only 52a is used on its own then the relay will assume a 52b signal from the absence of the 52a signal. 52a and 52b inputs are assigned to relay optoisolated inputs via the PSL. the relay memorizes the last valid status of the 2 inputs (52a=/52b). for example CB control. If both 52a and 52b are used then status information will be available and in addition a discrepancy alarm will be possible. etc. 52a-B and 52a-C and/or 52b-A. according to the following table. Circuit breaker status information will be available in this case but no discrepancy alarm will be available. Auxiliary Contact Position CB State Detected Action 52a 52b Open Closed Breaker Open Circuit breaker healthy Closed Open Breaker Closed Circuit breaker healthy Closed Closed CB Failure Alarm raised if the condition persists for greater than 5s Open Open State Unknown Alarm raised if the condition persists for greater than 5s Where single pole tripping is used (available on P442 and P444) then an open breaker condition will only be given if all three phases indicate and open condition. 52b-B and 52b-C inputs should be used. auto-reclose. This will directly affect any function within the relay that requires this signal. The above is also true where only a 52b is used. .

Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 155/220 CNF_52b CNF_52a & & INP_52a_A S Q & & INP_52b_A R 1 CBA_A & & & CBA_3P_C xor & INP_52a_B & S Q & INP_52b_B & 1 R CBA_ANY 1 CBA_B & & & CBA_3P xor & INP_52a_C & & S Q & INP_52b_C & R 1 CBA_C & CBA_Time_Alarm & t 1 0 xor CBA_Status_Alarm 150 ms CBA_Time_Disc 1 INP_DISC t 0 CBA_Discrepancy 150 ms P0524ENa FIGURE 109 .NON COMPLEMENTARY OF 52a/52b NOT LONG ENOUGH FOR GETTING THE ALARM .LOGICAL SCHEME OF CBAUX CBA_A = Dead PoleA CBA_B = Dead PoleB CBA_C = Dead PoleC CBA_3P_C = All Pole live CBA_3P = All Pole Dead CBA_ANY = Any Pole dead CBA_Disc = Pole Discrepancy detection INP_52a_A INP_52a_A CBA_A CBA_STATUS_ALARM P0525ENa FIGURE 110 .

POLE DEAD LOGIC INP_52b_A CBA_A CBA_STATUS_ALARM P0528ENa FIGURE 113 .COMPLEMENTARY OF 52a/52b IS LONG ENOUGH FOR GETTING THE ALARM INP_52a_A CBA_A CBA_STATUS_ALARM P0527ENa FIGURE 112 . If these optos inputs are assigned as External Trip A.WITH ONE OPTO 52b – POLE DEAD LOGIC 4.P44x/EN AP/E33 Application Notes Page 156/220 MiCOM P441/P442 & P444 INP_52a_A INP_52b_A CBA_A CBA_STATUS_ALARM P0526ENa FIGURE 111 .see General trip logic Figure 94. will be used for Any pole dead & All pole dead internal logic & Discrepency logic CB Discrepancy Used for internal CBA_Disc issued by external (opto) or internal detection (CB Aux) .WITH ONE OPTO 52a.6. (see Figure 94: trip logic) CB aux A(52a) CB aux B(52a) CB aux C(52a) CB aux A(52b) CB aux B(52b) CB aux C(52b) The DDB CB Aux if assigned to an opto input in the PSL and when energized.No Dwell timer is associated as for an internal trip. (External trip is integrated in the DDB: Any Trip.6. External Trip B and External Trip C – their change will update the CB Operation counter.1 Inputs External TripA External TripB External TripC From External Protection Devices (via Opto Inputs).2 Inputs / outputs DDB for CB logic: 4.2.

7 Circuit breaker condition monitoring Periodic maintenance of circuit breakers is necessary to ensure that the trip circuit and mechanism operate correctly.7.2 Page 157/220 Outputs CB Status Alarm Picks up when CB Discrepancy status is detected after CBA timer issued externally by opto or internally by CB Aux CB aux A CB aux B CB aux C Pole A+B+C detected Dead pole by internal logic or CB status Any Pole Dead The DDB Any Pole Dead if assigned in the PSL.1 Circuit Breaker Condition Monitoring Features For each circuit breaker trip operation the relay records statistics as shown in the following table taken from the relay menu.2.5s 0. These cells can not be set: Menu text Default setting Setting range Step size Min Max CB CONDITION CB Operations {3 pole tripping} 0 0 10000 1 CB A Operations {1 & 3 pole tripping} 0 0 10000 1 CB B Operations {1 & 3 pole tripping} 0 0 10000 1 CB C Operations {1 & 3 pole tripping} 0 0 10000 1 Total IA Broken 0 0 25000In^ 1 Total IB Broken 0 0 25000In^ 1 Total IC Broken 0 0 25000In^ 1In^ CB Operate Time 0 0 0. 4.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 4.001 Reset All Values No Yes. Generally. These monitoring features are discussed in the following section. These methods of monitoring circuit breaker condition give a rough guide only and can lead to excessive maintenance. The Min/Max values in this case show the range of the counter values. No . indicates that one or more poles is open All Pole Dead The DDB All Pole Dead if assigned in the PSL. indicates that all pole are dead (All 3 poles are open) 4. allowing a more accurate assessment of the circuit breaker condition to be determined. such maintenance is based on a fixed time interval. or a fixed number of fault current interruptions. The relays record various statistics related to each circuit breaker trip operation. The menu cells shown are counter values only.6. and also that the interrupting capability has not been compromised due to previous fault interruptions.

Menu text Default setting Setting range Step size Min Max CB MONITOR SETUP Default Min Max Step Broken I^ 2 1 2 0. The following table.5s 0. Alarm Enabled N° CB Ops Lock 20 1 CB Time Maint Alarm Disabled Alarm Disabled.2s 0.005s CB Time Lockout Alarm Disabled Alarm Disabled. It includes the setup of the current broken facility and those features which can be set to raise an alarm or CB lockout. detailing the options available for the CB condition monitoring. for example.the highest counter value is compared to two thresholds values settable (value n): .P44x/EN AP/E33 Application Notes Page 158/220 MiCOM P441/P442 & P444 The above counters may be reset to zero. Alarm Enabled I^ Maintenance 1000In^ 1In^ I^ Lockout Alarm Disabled Alarm Disabled.001s 0.1s 0. Alarm Enabled N° CB Ops Maint 10 1 N° CB Ops Lock Alarm Disabled Alarm Disabled. is taken from the relay menu.1 I^ Maintenance Alarm Disabled Alarm Disabled.005s Fault Freq Lock Alarm Disabled Alarm Disabled. Alarm Enabled I^ Lockout 2000In^ 1In^ N° CB Ops Maint Alarm Disabled Alarm Disabled.One counter is incremented by phase..001s The circuit breaker condition monitoring counters will be updated every time the relay issues a trip command. Alarm Enabled CB Time Lockout 0. Alarm Enabled Fault Freq Count 10 0 9999 1 Fault Freq Time 3600s 0 9999s 1s 25000In^ 25000In^ 10000 10000 0. following a maintenance inspection and overhaul. Alarm Enabled CB Time Maint 0.5s 1In^ 1In^ 1 1 0.

1 steps. The signal that is mapped to the opto is called ‘External TripA or B or C’. Thus. by setting ‘Broken I^’ = 2. It is imperative that any maintenance programme must be fully compliant with the switchgear manufacturer’s instructions. and hence oil degradation is slower than expected.2 Setting guidelines Setting the Σ I^ Thresholds Where overhead lines are prone to frequent faults and are protected by oil circuit breakers (OCB’s).0 in 0. typically 1. Suitable setting of the maintenance threshold will allow an alarm to be raised. A pre-lock out Alarm is generated at value n-1.4 or 1. However.Application Notes MiCOM P441/P442 & P444 P44x/EN AP/E33 Page 159/220 Maintenance Alarm or Lock Out Alarm can be generated. and ‘t’ is the arcing time within the interrupter tank (not the interrupting time). especially those operating on higher voltage systems. The setting range for ‘Broken I^’ is variable between 1.7. may be based upon the number of operations.7. An alarm in this instance may be indicative of the need for gas/vacuum interrupter HV pressure testing.3 Setting the Number of Operations Thresholds Every operation of a circuit breaker results in some degree of wear for its components. oil changes are performed at a fixed interval of circuit breaker fault operations. 4. Note that when in Commissioning test mode the CB condition monitoring counters will not be updated. the relay would normally be set to monitor the sum of the broken current squared. such as oiling of mechanisms. As the arcing time cannot be determined accurately. Generally. . This prevents further reclosure when the circuit breaker has not been maintained to the standard demanded by the switchgear manufacturer’s maintenance instructions. the dielectric withstand of the oil generally decreases as a function of Σ I2t. For OCB’s. All counters can be re-initiated with the command Reset all values (by HMI) In cases where the breaker is tripped by an external protection device it is also possible to update the CB condition monitoring. 4. oil changes account for a large proportion of the life cycle cost of the switchgear. routine maintenance. indicating when preventative maintenance is due. For other types of circuit breaker. This is achieved by allocating one of the relays optoisolated inputs (via the programmable scheme logic) to accept a trigger from an external device.5. for example. practical evidence suggests that the value of ‘Broken I^’ = 2 may be inappropriate. This is where ‘I’ is the fault current broken. In such applications ‘Broken I^’ may be set lower.0 and 2. this may result in premature maintenance where fault currents tend to be low. Should maintenance not be carried out. the relay can be set to lockout the autoreclose function on reaching a second operations threshold. The Σ I^ counter monitors the cumulative severity of the duty placed on the interrupter allowing a more accurate assessment of the circuit breaker condition to be made.

the lockout threshold (N° CB Ops Lock) may be set to disable autoreclosure when repeated further fault interruptions could not be guaranteed. For this reason it is possible to set a frequent operations counter on the relay which allows the number of operations (Fault Freq Count) over a set time period (Fault Freq Time) to be monitored. A separate alarm and lockout threshold can be set.1 Inputs Reset Lock Out Provides a reset of the CB monitoring lock out (all counters & values are reset) Reset All Values Provides a reset of the CB monitoring (all counters & values are reset) 4.7. successive circuit breaker operations in a short period of time may result in the need for increased maintenance.4 Setting the Operating Time Thresholds Slow CB operation is also indicative of the need for mechanism maintenance.P44x/EN AP/E33 Page 160/220 Application Notes MiCOM P441/P442 & P444 Certain circuit breakers. Therefore. or for more comprehensive maintenance. 4.6 Inputs/Outputs for CB Monitoring logic 4. 4. However. This is because each fault interruption causes carbonising of the oil.6.7.6. This time is set in relation to the specified interrupting time of the circuit breaker. Again.2 Outputs I^Maint Alarm An alarm maintenance is issued when the maximum broken current (1st level) calculated by the CB monitoring function is reached I^Lock Out Alarm An alarm Lock Out is issued when the maximum broken current (2nd level) calculated by the monitoring function is reached CB Ops Maint An alarm is issued when the maximum of CB operations is reached [initiated by internal (any protection function) or external trip (via opto)] (1st level:CB Ops Maint) CB Ops Lockout An alarm is issued when the maximum of CB operations is reached [initiated by internal or external trip] (2nd level:CB Ops Lock) CB Op Time Maint An alarm is issued when the operating tripping time on any phase pass over the CB Time Maint adjusted in MiCOM S1 (slowest pole detection calculated by I< from CB Fail logic) CB Op Time Lock An alarm is issued when the operating tripping time on any phase pass over the CB Time Lockout adjusted in MiCOM S1 (slowest pole detection calculated by I< from CB Fail logic) . degrading its dielectric properties.7.5 Setting the Excessive Fault Frequency Thresholds A circuit breaker may be rated to break fault current a set number of times before maintenance is required. 4.7. alarm and lockout thresholds (CB Time Maint / CB Time Lockout) are provided and are settable in the range of 5 to 500ms. such as oil circuit breakers (OCB’s) can only perform a certain number of fault interruptions before requiring maintenance attention. This minimises the risk of oil fires or explosion.7. The maintenance alarm threshold (N° CB Ops Maint) may be set to indicate the requirement for oil sampling for dielectric testing.

Depending on the relay model some of the cells may not be visible: . + ve Protection trip Remote control trip Trip 0 close Remote control close Local Remote Trip Close ve P3078ENa FIGURE 114 . This enables the control outputs to be selected via a local/remote selector switch as shown in Figure 114. Where this feature is not required the same output contact(s) can be used for both protection and remote tripping. using the relay communications It is recommended that separate relay output contacts are allocated for remote circuit breaker control and protection tripping.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 161/220 FF Pre Lockout An alarm is issued at (n-1) value in the counters of Main lock out or Fault frequency FF Lock An alarm is issued at (n) value in the counters of Main lock out or Fault frequency Lockout Alarm An alarm is issued with: CBC Unhealthy or CBC No check sync or CBC Fail to close or CBC fail to trip or FF Lock or CB Op Time Lock or CB Ops Lock 4. via the relay menu • Local tripping and closing.REMOTE CONTROL OF CIRCUIT BREAKER The following table is taken from the relay menu and shows the available settings and commands associated with circuit breaker control.8 Circuit Breaker Control The relay includes the following options for control of a single circuit breaker: • Local tripping and closing. via relay opto-isolated inputs • Remote tripping and closing.

01s Man Close Delay 10s 0. Local. Opto. Opto+local. Local+Remote. The AR single and three poles mode could be enabled in the menu "CB control" via MiCOM S1 or by the front panel. will enable/disable the single or three poles AR function independing of the MiCOM S1 or front LCD settings. Opto+Rem+local Close Pulse Time 0. .01s Healthy Window 5s 0. However. if the DDB signals TPAR/SPAR have been assigned in the PSL.1s 10s 0. Enabled {Refer to Autoreclose notes for further information} A/R Three Pole Disabled Disabled.1s 5s 0. Remote.01s 9999s 0. Opto+Remote.01s 600s 0.01s Trip Pulse Time 0.01s A/R Single Pole {1&3 pole A/R only} Disabled Disabled.5s 0. Remark: If TPAR is disable.P44x/EN AP/E33 Application Notes Page 162/220 MiCOM P441/P442 & P444 Menu text Default setting Setting range Min Step size Max CB CONTROL CB Control by Disabled Disabled. Enabled {Refer to Autoreclose notes for further information} If AR Enable in MiCOM S1 (2 additive lines): (*) For P442 – P444 only WARNING: Must be enabled for validating the AR function (if TPAR/SPAR optos are assigned in the PSL.01s C/S Window 5s 0. these inputs have a higher priority from the MiCOM S1 settings).5s 0.01s 9999s 0. the Dead Time 2 is not used when SPAR logic manages only 1PAR. these both inputs have a higher priority and depending of their status.

(See the different solutions proposed in the CBAux logic section 4. Likewise.6.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 SUP_Trip_Loc Page 163/220 & 1 CBC_Local_Control & SUP_Close_Loc SUP_Trip_Rem & CBC_Remote_Control & SUP_Close_Rem INP_CB_Trip_Man & CBC_Input_Control 1 & INP_CB_Man & CBA_3P_C CBC_Trip_Pulse S Q 1 R t 0 CBC_Trip_3P Pulsed output latched in UI & CBC_Failed_To_Trip CBA_3P CBA_Status_Alarm & S CBC_Close_In_Progress Q AR_Cycle_1P R 1 t INP_AR_Cycle_1P AR_Cycle_3P 0 1 1 CBC_Delay_Close INP_AR_Cycle_3P & S Q R CBA_3P CBA_Disc TRIP_Any 1 INP_AR_Close Pulsed output latched in UI 1 AR_Close & t CBC_ Fail_To_Close 0 R CBC_Recl_3P Q CBC_Close_Pulse S CBA_Any INP_CB_Healthy & CBC_Healthy_Window t 0 CBC_UnHeathly & 1 CBC_CS_Window t 0 & CBC_No_Check_Syn SYNC P0529ENa FIGURE 115 . a close command can only be issued if the CB is initially open. This would give personnel time to move away from the circuit breaker following the close command.CB CONTROL LOGIC A manual trip will be authorised if the circuit breaker has been initially closed. . Therefor it will be necessary to use the breaker positions 52a and/or 52b contacts via PSL. This time delay will apply to all manual CB Close commands. If no CB auxiliary contacts are available no CB control (manual or auto) will be possible.1) Once a CB Close command is initiated the output contact can be set to operate following a user defined time delay (‘Man Close Delay’).

These alarms can be viewed on the relay LCD display.12. Where the check synchronism function is set. or can be assigned to operate output contacts for annunciation using the relays programmable scheme logic (PSL). These should be set long enough to ensure the breaker has completed its open or close cycle before the pulse has elapsed. Where auto-reclose is used it may be desirable to block its operation when performing a manual close. A user settable time delay is included (‘C/S Window’) for manual closure with check synchronising. and a protection trip signal is generated. In general. A circuit breaker close output will only be issued if the check synchronism criteria are satisfied. The "man close" input without CB Control selected OR the "CBClose in progress" with CB control enabled: will initiate the SOTF logic for which auto-reclose will be disabled following a manual closure of the breaker during 500msec (see SOTF logic in section 2. If the CB fails to respond to the control command (indicated by no change in the state of CB Status inputs) a ‘CB Fail Trip Control’ or ‘CB Fail Close Control’ alarm will be generated after the relevant trip or close pulses have expired. NOTE : The manual close commands for each user interface are found in the System Data column of the menu. If the checksynch criteria are not satisfied in this time period following a close command the relay will lockout and alarm. remotely via the relay communications. CBA_3P_C SUP_Trip OR INP_CB_Trip_Man CBC_Trip_3P 0. this can be enabled to supervise manual circuit breaker close commands. If the CB does not indicate a healthy condition in this time period following a close command then the relay will lockout and alarm. the protection trip command overrides the close command.1 to 5 Sec CBC_Failed_To_Trip P0560ENa FIGURE 116 . Figure 35).STATUS OF CB IS INCORRECT CBA3P C (3POLES ARE CLOSED) STAYS – AN ALARM IS GENERATED “CB FAIL TO TRIP” (SEE ALSO FIGURE 109 & FIGURE 115) . This facility accepts an input to one of the relays opto-isolators to indicate that the breaker is capable of closing (circuit breaker energy for example). A user settable time delay is included (‘Healthy Window’) for manual closure with this check.P44x/EN AP/E33 Application Notes Page 164/220 MiCOM P441/P442 & P444 The length of the trip or close control pulse can be set via the ‘ManualTrip Pulse Time’ and ‘Close Pulse Time’ settings respectively.1. In addition to a synchronism check before manual reclosure there is also a CB Healthy check if required. If an attempt to close the breaker is being made. the majority of faults following a manual closure will be permanent faults and it will be undesirable to auto-reclose.

The event records are available for viewing either via the frontplate LCD or remotely. the oldest event is automatically overwritten by the new one (First in first out). connected to the relay (event extracted from relay & loaded in PC): 1. 4. The ‘Lockout Reset’ and ‘Reset Lockout by’ setting cells in the menu are applicable to CB Lockouts associated with manual circuit breaker closure. switching sequence etc. This enables the system operator to establish the sequence of events that occurred within the relay following a particular power system condition.9 Event Recorder The relay records and time tags up to 250 events and stores them in non-volatile (battery backed up – installed behind the plastic cover in front panel of the relay)) memory. CB Condition monitoring (Number of circuit breaker operations. for example) and auto-reclose lockouts.1 to 10 Sec CBC_ Fail_To_Close P0561ENa FIGURE 117 . via the communications ports or via MiCOM S1 with a PC.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 165/220 CBA_3P SUP_Close OR INP_CB_Man CBC_Close_In_Progress 0 to 60 Sec CBC_Recl_3P 0. Established the communication [ Device\open connection\address (always1 by serial front port\Password (AAAA) ] FIGURE 118 2. The real time clock within the relay provides the time tag to each event. When the available space is exhausted. to a resolution of 1ms. Select the extraction of events: .STATUS OF CB IS INCORRECT CBA3P (3POLES ARE OPENED) STAYS – AN ALARM IS GENERATED “CB FAIL TO CLOSE” (SEE ALSO FIGURE 109 & FIGURE 115) Note that the ‘Healthy Window’ timer and ‘C/S Window’ timer set under this menu section are applicable to manual circuit breaker operations only. These settings are duplicated in the Auto-reclose menu for Auto-reclose applications.

This selects the required fault record from the possible 5 that may be stored. Note that a full list of all the event types and the meaning of their values is given in chapter P44x/EN GC (Configurations Mapping). identified (file named) & Stored Local viewing on the LCD is achieved in the menu column entitled ‘VIEW RECORDS’. . Select Report Setting range from 0 to 4. i. Time & Date Time & Date Stamp for the event given by the internal Real Time Clock Event Text Up to 32 Character description of the Event (refer to following sections) Event Value Up to 32 Bit Binary Flag or integer representative of the Event (refer to following sections) Select Fault Setting range from 0 to 4. protection starts.P44x/EN AP/E33 Application Notes Page 166/220 3. This selects the required event record from the possible 250 that may be stored. A value of 0 corresponds to the latest fault and so on. The following cells show all the fault flags. Report Text Up to 32 Character description of the occurrence (refer to following sections) Report Type These cells are numbers representative of the occurrence. fault and maintenance records and is shown below:VIEW RECORDS LCD Reference Description Select Event Setting range from 0 to 249. measurements etc. A value of 0 corresponds to the latest event and so on. fault location. (Commissioning) where the procedure is fully explained. This selects the required maintenance report from the possible 5 that may be stored. refer to Chapter P44x/EN CM. MiCOM P441/P442 & P444 Events must be listed. associated with the fault. For extraction from a remote source via communications. A value of 0 corresponds to the latest report and so on. This serves to reset the trip LED indications provided that the relevant protection element has reset. They form a specific error code which should be quoted in any related correspondence to AREVA T&D. This column allows viewing of event. protection trips.e. the complete fault record. Report Data Reset Indication Either Yes or No.

where the least significant bit (extreme right) corresponds to opto input 1 etc. an alarm condition. If one or more of the opto (logic) inputs has changed state since the last time that the protection algorithm ran. setting change etc. then the new status is logged as an event. The same information is present if the event is extracted and viewed via PC. three applicable cells will become visible as shown below. If one or more of the output relay contacts has changed state since the last time that the protection algorithm ran. three applicable cells will become visible as shown below.9. Time & Date of Event “LOGIC INPUTS” “Event Value 0101010101010101” The Event Value is an 8 or 16 bit word showing the status of the opto inputs. The same information is present if the event is extracted and viewed via PC. The following sections show the various items that constitute an event:- FIGURE 119 .9.FILE\OPEN\EVENTS FILE 4.1 Change of state of opto-isolated inputs. When this event is selected to be viewed on the LCD.2 Change of state of one or more output relay contacts. Time & Date of Event “OUTPUT CONTACTS” “Event Value 010101010101010101010” The Event Value is a 7. the new status is logged as an event. . When this event is selected to be viewed on the LCD.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 167/220 Types of Event An event may be a change of state of a control input or output relay. 14 or 21 bit word showing the status of the output contacts. 4. where the least significant bit (extreme right) corresponds to output contact 1 etc.

Either ON or OFF is shown after the description to signify whether the particular condition has become operated or has reset. This value is appended to each alarm event in a similar way as for the input and output events previously described.an example is shown below:Nature of Event Displayed Text in Event Record Displayed Value Level 1 Password Modified PW1 Edited UI. (either a start or a trip condition). to identify the alarm and is therefore invisible if the event is viewed on the LCD. and is therefore invisible when the event is viewed on the LCD.9. Front or Rear Port A complete list of the ‘General Events’ is given in chapter P44x/EN GC.5 General Events A number of events come under the heading of ‘General Events’ . such as MiCOM S1.9. such as MiCOM S1. consisting of a text string indicating the operated element and an event value. 4. The following table shows examples of some of the alarm conditions and how they appear in the event list:Alarm Condition Resulting Event Event Text Event Value Battery Fail Battery Fail ON/OFF Number from 0 to 31 Field Voltage Fail Field V Fail ON/OFF Number from 0 to 31 Setting group via opto invalid Setting Grp Invalid ON/OFF Number from 0 to 31 Protection Disabled Prot'n Disabled ON/OFF Number from 0 to 31 Frequency out of range Freq out of Range ON/OFF Number from 0 to 31 VTS Alarm VT Fail Alarm ON/OFF Number from 0 to 31 CB Trip Fail Protection CB Fail ON/OFF Number from 0 to 31 The previous table shows the abbreviated description that is given to the various alarm conditions and also a corresponding value between 0 and 31. 4. will be logged as an event record.3 MiCOM P441/P442 & P444 Relay Alarm conditions.4 Protection Element Starts and Trips Any operation of protection elements. F or R 0 Either from User Interface.P44x/EN AP/E33 Application Notes Page 168/220 4. . Any alarm conditions generated by the relays will also be logged as individual events. rather than for the user. It is used by the event extraction software. Again.9. this value is intended for use by the event extraction software.

9. which is selectable from up to 5 records. field voltage failure etc. 4. 4. fault location.9 Control/Support settings are communications.9. are logged into a maintenance report.7 Maintenance Reports Internal failures detected by the self monitoring circuitry. which are not duplicated within the four setting groups. . CT/VT ratio settings etc. with a corresponding time stamp. When any of these settings are changed. Note that viewing of the actual fault record is carried out in the ‘Select Fault’ cell further down the ‘VIEW RECORDS’ column. The event simply states that a fault record was generated. The Maintenance Report holds up to 5 such ‘events’ and is accessed from the ‘Select Report’ cell at the bottom of the ‘VIEW RECORDS’ column. Also note that the time stamp given in the fault record itself will be more accurate than the corresponding stamp given in the event record as the event is logged some time after the actual fault record is generated. this may be done from within the ‘RECORD CONTROL’ column. Each time a Maintenance Report is generated.6 Page 169/220 Fault Records Each time a fault record is generated. These records consist of fault flags. with a corresponding time stamp. an event is also created. Each entry consists of a self explanatory text string and a ‘Type’ and ‘Data’ cell. the event record is created simultaneously.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 4. measurement. Resetting of Event / Fault Records If it is required to delete either the event. changes to protection or disturbance recorder settings will only generate an event once the settings have been confirmed at the ‘setting trap’. fault measurements etc. fault or maintenance reports. such as watchdog failure. However. Two examples are shown in the following table: Type of Setting Change Displayed Text in Event Record Displayed Value Control/Support Setting C & S Changed 0 Group 1 Change Group 1 Changed 1 NOTE: 4.8 Setting Changes Changes to any setting within the relay are logged as an event. an event is also created.9. which are explained in the menu extract at the beginning of this section and in further detail in Appendix A. The event simply states that a report was generated.9. Error codes are in hexadecimal format and must be recalculated in decimal format to check with the table in chapter P44x/EN GC.

the first line gives the description and time stamp for the event.9. whilst the additional information that is displayed below may be collapsed via the +/. The following shows an example of how various events appear when displayed using MiCOM S1:− Monday 03 November 1998 15:32:49 GMT I>1 Start ON 2147483881 AREVA : MiCOM Model Number: P441 Address: 001 Column: 00 Row: 23 Event Type: Protection operation − Monday 03 November 1998 15:32:52 GMT Fault Recorded 0 AREVA : MiCOM Model Number: P441 Address: 001 Column: 01 Row: 00 Event Type: Fault record − Monday 03 November 1998 15:33:11 GMT Logic Inputs 00000000 AREVA : MiCOM Model Number: P441 Address: 001 Column: 00 Row: 20 Event Type: Logic input changed state − Monday 03 November 1998 15:34:54 GMT Output Contacts 0010000 AREVA : MiCOM Model Number: P441 Address: 001 Column: 00 Row: 21 Event Type: relay output changed state As can be seen.symbol.P44x/EN AP/E33 Application Notes Page 170/220 4. For further information regarding events and their specific meaning. . refer to chapter P44x/EN GC.10 MiCOM P441/P442 & P444 Viewing Event Records via MiCOM S1 Support Software When the event records are extracted and viewed on a PC they look slightly different than when viewed on the LCD.

5 sec duration) 2. each of 10. Uncompressed Disturbance Recorder used for IEC 60870-5/103 could be limited to 2 or 3 secondes. at which time the oldest record(s) are overwritten to make space for the newest one. . Each disturbance record consists of eight analogue data channels and thirty-two digital data channels. The number of records that may be stored is dependent upon the selected recording duration but the relays typically have the capability of storing a minimum of 20 records.10 Disturbance recorder The integral disturbance recorder has an area of memory specifically set aside for record storage. The recorder stores actual samples which are taken at a rate of 24 samples per cycle. Compressed Disturbance Recorder used for Kbus/Modbus/DNP3 reach that typical size value (10. Disturbance records continue to be recorded until the available memory is exhausted.5 second duration. Note that the relevant CT and VT ratios for the analogue channels are also extracted to enable scaling to primary quantities).Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 171/220 FIGURE 120 4. NOTE: 1.

IN Analog Channel 3 VC VA.5s 0. VB. The digital channels may be mapped to any of the opto isolated inputs or output contacts. . IA. For example. VB. IC. The complete list of these signals may be found by viewing the available settings in the relay menu or via a setting file in MiCOM S1. if this has been set to ‘Extended’. IN Analog Channel 7 IC VA. IC. VB. IB. IN Analog Channel 4 VN VA. relay 3) will trigger the recorder.3% of this. VC. VB. IB.1s 10. LED’s etc. the post trigger timer will be reset to zero. IA. ‘Duration’ sets the overall recording time and the ‘Trigger Position’ sets the trigger point as a percentage of the duration. VC. IC. IN Analog Channel 5 IA VA. VB. IB. VC. VC. in addition to a number of internal relay digital signals. IB. However. IN Analog Channel 8 IN VA. such as protection starts. IB. each of the analogue channels is selectable from the available analogue inputs to the relay. IC. As can be seen from the menu. giving 0. VB. IB. VC. IC. IN Analog Channel 6 IB VA. IN Digital Inputs 1 to 32 Relays 1 to 14/21 and Opto’s 1 to 8/16 Any of 14 or 21 O/P Contacts or Any of 8 or 16 Opto Inputs or Internal Digital Signals Inputs 1 to 32 Trigger No Trigger except No Trigger. IC. Trigger L/H. VC.5s pre-fault and 1s post fault recording times.3% 0 100% 0. IN Analog Channel 2 VB VA. The pre and post fault recording times are set by a combination of the ‘Duration’ and ‘Trigger Position’ cells.P44x/EN AP/E33 Application Notes Page 172/220 MiCOM P441/P442 & P444 The ‘DISTURBANCE RECORDER’ menu column is shown below: Menu text Default setting Setting range Step size Min Max DISTURB RECORDER Duration 1. VB. thereby extending the recording time.5s with the trigger point being at 33. IB.1% Trigger Mode Single Single or Extended Analog Channel 1 VA VA. via the ‘Input Trigger’ cell. IA. IA. IA. VC. The default trigger settings are that any dedicated trip output contacts (e. the recorder will ignore the trigger if the ‘Trigger Mode’ has been set to ‘Single’. IA.g. VC. IC.5s 0. Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition. If a further trigger occurs whilst a recording is taking place. IC. IA. VB. the default settings show that the overall recording time is set to 1. IB. IA.01s Trigger Position 33. Trigger H/L Dedicated Trip Relay O/P’s which are set to Trigger L/H Note The available analogue and digital signals may differ between relay types and models and so the individual courier database in Appendix should be referred to when determining default settings etc.

(Events or Disturbances can be extracted) This message is displayed if the memory is empty (control in that case the trigger condition): . for providing Drec file.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 173/220 FIGURE 121 Trigger choices: (Minimum one trigger condition must be present . they must be extracted using suitable software such as MiCOM S1.) It is not possible to view the disturbance records locally via the LCD. This process is fully explained in Chapter 6.

P44x/EN AP/E33 Page 174/220 Application Notes MiCOM P441/P442 & P444 After extraction the Drec file can be displayed by the viewer integrated in MiCOM S1(See Commissioning test section – chap CT) Click down to select : .

5 0 0 PA Fault PB P3101ENa Selective fault clearance of the protection for forward faults is provided by the power measurement combined with a time-delay inversely proportional to the measured power. When a phase to ground fault occurs.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 175/220 5. zero-sequence power will decrease along the lines until null value at the source’s neutral points (see below).1. Zero-sequence voltage is at maximum value at the fault point. NEW ADDITIONAL FUNCTIONS – VERSION B1. the measured power is determined by the following formula: Sr = Vrr.ϕ0) With: ϕ: Phaseshift between Vr and Ir ϕ0: 255° or – 75° Vrr. therefore.X 5.s x cos(ϕ .1 Maximum of Residual Power Protection – Zero Sequence Power Protection 5. Zero-sequence power is.s: R.m.5 0. Supposing that zerosequence current is constant.Zol x . The protection does not send any trip commands for reverse faults. the fault can be considered as a zero-sequence power generator.m. PB PA Z os1 Z os2 (1-x).1 Function description The aim of protection is to provide the system with selective and autonomous protection against resistive Phase to ground faults.M. Irr.S values of the residual voltage and current The Vr and Ir values are filtered in order to eliminate the effect of the 3rd and 5th harmonics. High resistive faults such as vegetation fires cannot be detected by distance protection.s x Irr. Zol P3100XXa With: Zos1: Zero-sequence source side 1 impedance of Zol: Zero-sequence line impedance Zos2: Zero-sequence source side2 impedance of x: Distance to the fault From PA Vo Po 1 1 0.m. In compliance with sign conventions (the zero-sequence power flows from the fault towards the sources) and with a mean characteristic angle of the zero-sequence source impedances of the equal to 75°. .s. also at maximum value at the same point.m.

The IDMT time-delay is determined by the following formula: T(s) = K x (Sref/Sr) With: K: Adjustable time constant from 0 to 2sec (Time delay factor) Sref: Reference residual power at: 10 VA for In = 1A 50 VA for In = 5A Sr: Residual power generated by the fault The following chart shows the adjustment menu for the zero-sequence residual overcurrent protection. The basis time-delay is set at a value greater than the 2nd stage time of the distance protection of the concerned feeder if the 3-pole trip is active.05 x In 1 x In 0. Menu text Default setting Setting range Min Step size Max Group1 ZERO-SEQ.0VA 30. the adjustment ranges and the default in-factory adjustments. or at a value greater than the single-phase cycle time if single-pole autorecloser shots are active. Power Status K Time Delay Factor Activated Activated / Disabled N/A 0 0 2 0.P44x/EN AP/E33 Application Notes Page 176/220 MiCOM P441/P442 & P444 Sr > Po Fixed Time Delay P3837ENa 3-pole trip is sent out when the residual power threshold “Residual Power" is overshot.01 x In Po threshold 510mVA 300mVA 6.0mVA . POWER Zero Seq.1 x In 0.2 Basis Time Delay 1sec 0sec 10sec 0. after a time-delay "Basis Time Delay" and a IDMT time-delay adjusted by the “K” time delay factor.01sec Residual Current 0.

2 P44x/EN AP/E33 Page 177/220 Settings & DDB cells assigned to zero sequence power (ZSP) function DDB cell INPUT associated: The ZSP TIMER BLOCK cell if assigned to an opto input in a dedicated PSL . it indicates that the timers associated have started and are running (fixed one first and then IDMT timer) The ZSP TRIP cell at 1 indicates that the Zero Sequence Power function has performed a trip command (after the start and when associated timers are issued) .Application Notes MiCOM P441/P442 & P444 5.in the same time.1.the associated timer will be blocked DDB cell OUTPUT associated: The ZSP START cell at 1 indicates that the Zero Sequence Power function has started . Zero Sequence Power function will start. but will not perform a trip command .

Menu text Default setting Setting range Min Step size Max Group1 SUPERVISION CVTS Status CVTS VN> CVTS Time Delay Activated Activated / Disabled N/A 1sec 0.4 Un Vab(t) > 0.1 Function description This CVT supervision will detect the degradation of one or several capacitors of voltage dividers.2 Capacitive Voltage Transformers Supervision (CVT) 5. It is based on permanent detection of residual voltage.2. after a time-delay T which can be set at between 0 and 300 seconds. if the conditions are as follows: Vab(t) • The residual voltage is greater than the setting threshold during a delay greater then T • The 3 phase-phase voltages have a value greater than 0.Alarm R Vr(t) > SVr P3102ENa FIGURE 122 .4*Vn Vbc(t) Vbc(t) > 0. settings range and the default infactory settings.8*Vn S Q R S Q Vbc(t) < 0.4*Vn Vr(t) R S &T Q T TCTs . A “CVT fault” signal is sent out.4*Vn Vca(t) Vca(t) > 0.01sec .8*Vn Vab(t) < 0.P44x/EN AP/E33 Application Notes Page 178/220 MiCOM P441/P442 & P444 5.8*Vn Vca(t) < 0.5 100sec 0sec 300sec 0.5sec 22sec 0.BASIC CVT SUPERVISION DIAGRAM The table below shows the CVT supervision settings menu.

during a delay greater than the timer adjusted in MiCOM S1.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 5.2 Page 179/220 Settings & DDB cells assigned to Capacitive Voltage Transformers Supervision (CVT) function FIGURE 123 . That alarm is also included in the general alarm.2. .FOR ENABLING THE FUNCTION FIGURE 124 – SETTINGS DDB cell OUTPUT associated: The CVT ALARM cell at 1 indicates that the residual voltage is greater than the threshold adjusted in the settings.

modified and loaded again in the protection. relay output contacts and the programmable LED’s.one PSL by Group of settings enabled (maximum 4 groups of PSLogic can be assigned in the relay) The purpose of this logic is multi-functional and includes the following: • Enables the mapping of opto-isolated inputs. The following section details the default settings of the PSL. • Fault Recorder start mapping.1 HOW TO USE PSL Editor? OFF Line method: − Open first the application free software delivered with the relay : MiCOM S1 (can be also downloaded from the web) − Open the PSL Editor part. which internal signals initiate a fault record. latching or self-reset). i. 6.e. dwell time. . • Enables customer specific scheme logic to be generated through the use of the PSL editor inbuilt into the MiCOM S1 support software. displayed. Note that changes to these defaults can only be carried out using the PSL editor and not via the relay front-plate. Further information regarding editing and the use of PSL can be found in the MiCOM S1 user manual. Application Notes MiCOM P441/P442 & P444 PROGRAMMABLE SCHEME LOGIC DEFAULT SETTINGS The relay includes programmable scheme logic (PSL).P44x/EN AP/E33 Page 180/220 6. • Provides relay output conditioning (delay on pick-up/drop-off. − Open a blancking scheme or a default scheme with the good model number (File\New\Default Scheme or Blanck Scheme) Selection of type of relay & model number is done in that window (Version software is displayed for compatibility ) – Italian is available with model ?40X? ON Line method: − Communication with the relay can be started (Device\open connection\address1\pword AAAA) and the PSL activated in the internal logic of the relay can be extracted.

2 09 The type of model used by the relay in the settings or PSL is displayed in the bottom of your screen by that line: and will inform about the : − Model number used (last 2 digits:???07??) − PSL activated for the logic of Group1 − Number of timers still available (15 on a total of 16) − Number of contacts still available (7 on a total of 21 for P442 model) − Number of leds still available (0 on 8 – if all already assigned in the PSL) − Memory Capacity still available (decrease with the numbers of cells & logical gates linked in the dedicated PSL) (See also the section commissioning for deeper tools explanations) .5 07 B1. Some additive cells can be present regarding the type of model used by the software embedded in the relay. Software Version Model N° A2.3 06 A4. please refer to the DDB description cell by cell (conditions of set & reset) in the table included in the annex A at the end of that technical guide.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 − Page 181/220 Any group from 1 to 4 can be modified (ref of group must be validated before resenting the file from PC to relay) Before creating a dedicated PSL for covering customized application .11 04 A3.

4 >38.2 MiCOM P441/P442 & P444 Logic input mapping The default mappings for each of the opto-isolated inputs are as shown in the following table: − Version A : Optos are in 48VDC polarised (can be energised with the internal field voltage offered by the relay (–J7/J9-J8/J10 in a P441) − Version B : Optos are universal and opto range can be selected in MiCOM S1 by: Opto A .4 >24.2 30/34 <20.4 110/125 <75. Or “Custom” can be selected in the menu to offer the possibility to adjust a different voltage pick-up for any optos inputs: .P44x/EN AP/E33 Application Notes Page 182/220 6. temperature and CTR degradation over time. Below 12V. logical status is guaranteed Off Opto B – Universal opto inputs: Setting Guaranteed No Operation Guaranteed Operation 24/27 <16. Between 13-29V is the uncertainty band.0 >88.2 >19.48VDC: The opto inputs are specified to operate between 30 and 60V to ensure there is enough current flowing through the opto diode to guarantee operation with component tolerances.0 These margins ensure that ground faults on substation batteries do not create mal-operation of the opto inputs.0 48/54 <32.0 220/250 <150 >176.

Application Notes MiCOM P441/P442 & P444 P44x/EN AP/E33 Page 183/220 .

P44x/EN AP/E33 Application Notes Page 184/220 Opto Input N° MiCOM P441/P442 & P444 P441 Relay P442 Relay P444 Relay 1 Channel Receive (Distance Channel Receive (Distance Channel Receive (Distance or DEF) or DEF) or DEF) 2 Channel out of Service (Distance or DEF) Channel out of Service (Distance or DEF) Channel out of Service (Distance or DEF) 3 MCB/VTS Line MCB/VTS Line MCB/VTS Line (Z measurement-Dist) (Z measurement-Dist) (Z measurement-Dist) 4 Block Autoreclose(LockOut) Block Autoreclose(LockOut) Block Autoreclose(LockOut) 5 Circuit Breaker Healthy Circuit Breaker Healthy Circuit Breaker Healthy 6 Circuit breaker Manual Close external order Circuit breaker Manual Close external order Circuit breaker Manual Close external order 7 Reset Lockout Reset Lockout Reset Lockout 8 Disable Autoreclose (1pole Disable Autoreclose (1and 3poles) pole and 3poles) Disable Autoreclose (1pole and 3poles) 9 Not allocated Not allocated 10 Not allocated Not allocated 11 Not allocated Not allocated 12 Not allocated Not allocated 13 Not allocated Not allocated 14 Not allocated Not allocated 15 Not allocated Not allocated 16 Not allocated Not allocated 17 Not allocated 18 Not allocated 19 Not allocated 20 Not allocated 21 Not allocated 22 Not allocated 23 Not allocated 24 Not allocated .

and Any Trip close simultaneously. Trip &Any Zone&DistUnb CR Dist. or DEF) 6 Any Protection Start Any Protection Start Any Protection Start 7 Any Trip Any Trip Any Trip 8 General Alarm General Alarm General Alarm 9 DEF A+B+C Trip DEF A+B+C Trip DEF A+B+C Trip + IN>1Trip + IN>1Trip + IN>1Trip + IN>2Trip + IN>2Trip + IN>2Trip 10 Dist. Trip &Any Zone&DistUnb CR Dist. Trip B.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 6. all trip contacts: Trip A. . Trip C.3 Page 185/220 Relay output contact mapping The default mappings for each of the relay output contacts are as shown in the following table (PSL are equivalent for P441/442/444):Relay Contact P441 Relay N° P442 Relay P444 Relay 1 TripA+B+C & Z1 TripA+B+C & Z1 TripA+B+C & Z1 2 Any Trip Phase A Any Trip Phase A Any Trip Phase A 3 Any Trip Phase B Any Trip Phase B Any Trip Phase B 4 Any Trip Phase C AnyTrip Phase C Any Trip Phase C 5 Signal send (Dist. or DEF) Signal send (Dist. Trip &Any Zone&DistUnb CR 11 Autoreclose lockout Autoreclose lockout Autoreclose lockout 12 Autoreclose 1P+3P cycle in progress Autoreclose 1P+3P cycle in progress Autoreclose 1P+3P cycle in progress 13 A/R Close A/R Close A/R Close 14 Power Swing Detected Power Swing Detected Power Swing Detected 15 Not allocated Not allocated 16 Not allocated Not allocated 17 Not allocated Not allocated 18 Not allocated Not allocated 19 Not allocated Not allocated 20 Not allocated Not allocated 21 Not allocated Not allocated 22 Not allocated Not allocated 23 Not allocated 24 Not allocated 25 Not allocated 26 Not allocated 27 Not allocated 28 Not allocated 29 Not allocated 30 Not allocated 31 Not allocated 32 Not allocated Note that when 3 pole tripping is selected in the relay menu. or DEF) Signal send (Dist.

Pulse Timer Pick UP/Drop Off Timer Dwell Timer Pick Up Timer Drop Off Timer Latching Straight (Transparent) .P44x/EN AP/E33 Application Notes Page 186/220 6.4 MiCOM P441/P442 & P444 Relay output conditioning The default conditioning for each of the relay output contacts are as shown in the following table: Relay Contact P441 Relay N° P442 Relay P444 Relay 1 Straight Straight Straight 2 Straight Straight Straight 3 Straight Straight Straight 4 Straight Straight Straight 5 Straight Straight Straight 6 Straight Straight Straight 7 Straight Straight Straight 8 Straight Straight Straight 9 Straight Straight Straight 10 Straight Straight Straight 11 Straight Straight Straight 12 Straight Straight Straight 13 Straight Straight Straight 14 Straight Straight Straight 15 Not allocated Not allocated 16 Not allocated Not allocated 17 Not allocated Not allocated 18 Not allocated Not allocated 19 Not allocated Not allocated 20 Not allocated Not allocated 21 Not allocated Not allocated 22 Not allocated Not allocated 23 Not allocated 24 Not allocated 25 Not allocated 26 Not allocated 27 Not allocated 28 Not allocated 29 Not allocated 30 Not allocated 31 Not allocated 32 Not allocated NOTE: Others conditions of relays logic are available in the relays design by PSL.

Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 Page 187/220 Input Pulse Timer Output Pulse setting Input Output Pulse setting Input Pick Up/ Drop Off Timer Output Tp setting Td setting Input Output Tp setting Td setting Input Output Dwell Timer Input Output Input Pick Up Timer Timer setting Output Input Output Timer setting Timer setting Timer setting Input Output Drop Off Timer Timer setting Input Output Timer setting P0562ENa FIGURE 125 – TIMER DEFINITION IN PSL .

5 MiCOM P441/P442 & P444 Programmable led output mapping The default mappings for each of the programmable LED’s are as shown in the following table:LED N° P441 Relay P442 Relay P444 Relay 1 Any Trip A Any Trip A Any Trip A 2 Any Trip B AnyTrip B Any Trip B 3 Any Trip C AnyTrip C Any Trip C 4 Any Start Any Start Any Start 5 Z1+Aided Trip Z1+Aided Trip Z1+Aided Trip 6 Dist FWd Dist Fwd Dist Fwd 7 Dist Rev Dist Rev Dist Rev 8 A/R Enable A/R Enable A/R Enable NOTE: 6.6 All the Leds are latched in the default PSL Fault recorder trigger The default PSL trigger which initiates a fault record is as shown in the following table:P441 Relay P442 Relay P444 Relay Any Start Any Start Any Start Any Trip Any Trip Any Trip FIGURE 126 If the fault recorder trigger is not assigned in the PSL. no Fault recorder can be initiated and displayed in the list by the LCD front panel.P44x/EN AP/E33 Application Notes Page 188/220 6. .

(RCT + 2RL) KRPA = Fixed dimensioning factor IFe Z1 = Max.05 ] + [ 100 x RCT ] DDB DESCRIPTION FOR ALL TYPES P441/P442 & P444 MODELS . = always 0. Xe/Re = Primary system reactance / resistance ratio for earth loop. KRPA = Fixed dimensioning factor IF Z1 = Max. secondary earth fault current at Zone 1 reach point (A). The highest of the two calculated Vk voltages must be used: 7. Page 189/220 CURRENT TRANSFORMER REQUIREMENTS Two calculations must be performed – once for the three phase fault current at the zone 1 reach. and once for earth (ground) faults.6 CT Knee Point Voltage for Earth Fault Distance Protection ≥ KRPA x IFe Z1 x (1+ Xe/Re) .2 Vk = Required CT knee point voltage (volts). = [ (C rating in volts) x 1. In = CT nominal secondary current.3 = always 0. X/R = Primary system reactance / resistance ratio. Vk Where: 7. Where: 7. (RCT + RL) Where: 7. ALF = Accuracy Limit Factor. RL = Single lead resistance from CT to relay (Ω). noting that the knee point voltage equivalent these offer can be approximated from: Vk + (RCT x ALF x In) = (VA x ALF) / In VA = Voltampere burden rating. the C class voltage rating can be checked to determine the equivalent Vk (knee point voltage according to IEC). RCT = CT secondary winding resistance (Ω).1 CT Knee Point Voltage for Phase Fault Distance Protection Vk ≥ KRPA x IF Z1 x (1+ X/R) . secondary phase fault current at Zone 1 reach point (A). The equivalence formula is: Vk 8. Class 5P protection CTs can be used.6 Recommended CT classes (British and IEC) Class X current transformers with a knee point voltage greater or equal than that calculated can be used.Application Notes P44x/EN AP/E33 MiCOM P441/P442 & P444 7.4 Determining Vk for an IEEE “C" class CT Where American/IEEE standards are used to specify CTs.

P44x/EN AP/E33 Application Notes Page 190/220 MiCOM P441/P442 & P444 BLANK PAGE .

2 chapter P44x/EN AP P441 / P442 / P444 Set 0 : No alarm is present opto power off At 0 : (see table in section 3. 10 ms (universal) to be See Hysteresis description in sect 6.2 sec to be validated by internal logic See Hysteresis description in sect 6.3.1 in chap AP) opto power off At 0 : (see table in section 3.1 in chap AP) ∗ Minimum time >1 sec for: changement Gr/TPAR/SPAR/AR enable In No cell assigned ∗ In Out In No cell assigned DDB label MiCOM P441/P442 & P444 Application Notes .3.2 chapter P44x/EN AP P442 / P444 Opto energised for a minimum time : 7 ms (48Vdc).1 in chap AP) (48Vcc Version A / Universal Version B-C) P441 / P442 / P444 OPTOS INPUTS Setting Group selected via opto are invalid Example :1group is requested by the optos status but that group is not present in the settings (Gr3 requested but only Gr1&2 are present in MiCOM S1-The settings restart with GR1 & that cell switch on at 1) opto energised (>1 sec)(*) – Must be not assigned in the PSL At1 :MSB Bit (see table in section 3.Out In In In In SG-opto Invalid Opto Label 1/8 Opto Label 9/16 Opto Label 17/24 Opto Label 25/32 Opto2 Opto1 Default PSL Changement of Group by Optos Set with : Reset with : Page 191/220 P44x/EN AP/E33 P442 / P444 Not Used Opto energised for a minimum time : 1.3.2 chapter P44x/EN AP validated by internal logic See Hysteresis description in sect 6.2 chapter P44x/EN AP P444 Not Used See Hysteresis description in sect 6.2 chapter P44x/EN AP validated by internal logic See Hysteresis description in sect 6.1 in chap AP) opto energised (>1 sec)( ) – Must be not assigned in the PSL At1 :LSB Bit (see table in section 3. 10 ms (universal) to be See Hysteresis description in sect 6.3.2 chapter P44x/EN AP P444 Opto energised for a minimum time : 7 ms (48Vdc).

LED 1 22/32 Relay Label 15/21 Relay Label 01/14 Relay Label DDB label Page 192/220 Led Out Out Out Out In P44x/EN AP/E33 Default PSL (Right side – Front panel) Set1 : For any DDB cell at 1 if linked by PSL Programmable Led : ANY TRIP A in the default PSL LEDS Set1 :For any DDB cell at 1 if linked by PSL & regarding the type of logic selected in PSL by MiCOM S1 Programmable Relay– Not assigned in default PSL Type of Logic: (See Description above) P444 Set1 :For any DDB cell at 1 if linked by PSL & regarding the type of logic selected in PSL by MiCOM S1 Programmable Relay – Not assigned in default PSL Type of Logic: (See Description above) P442 / P444 Set1 :For any DDB cell at 1 if linked by PSL & regarding the type of logic selected in PSL by MiCOM S1 Programmable Relays : All relays are assigned in The default PSL (See DDB table description) Type of Logic: Pulse timer Pick Up/Drop Off Timer Dwell Timer Pick Up Timer Drop Off Timer Latching Straight (used in default PSL) P441 / P442 / P444 OUTPUT RELAYS Set with : Set 0 : For any DDB cell at 0 if linked by PSL & regarding the type of logic selected in PSL by MiCOM S1 (Latched or not Latched) Set 0 :For any DDB cell at 0 if linked by PSL & regarding the type of logic selected in PSL by MiCOM S1 Type of Logic: (See Description above) P444 Set 0 :For any DDB cell at 0 if linked by PSL & regarding the type of logic selected in PSL by MiCOM S1 Type of Logic: (See Description above) P442 / P444 Set 0 :For any DDB cell at 0 if linked by PSL & regarding the type of logic selected in PSL by MiCOM S1 Type of Logic: Pulse timer Pick Up/Drop Off Timer Dwell Timer Pick Up Timer Drop Off Timer Latching Straight (used in default PSL) P441 / P442 / P444 Reset with : MiCOM P441/P442 & P444 Application Notes .

Led Led Led Led Led Led Led LED 3 LED 4 LED 5 LED 6 LED 7 LED 8 Out In LED 2 DDB label Default PSL MiCOM P441/P442 & P444 Application Notes Set1 : For any DDB cell at 1 if linked by PSL Programmable Led : Auto Reclose Enable in the default PSL Set1 : For any DDB cell at 1 if linked by PSL Programmable Led : Dist REV in the default PSL Set1 : For any DDB cell at 1 if linked by PSL Programmable Led : Dist FWD in the default PSL Set1 : For any DDB cell at 1 if linked by PSL Programmable Led : Z1+Aided Trip in the default PSL Set1 : For any DDB cell at 1 if linked by PSL Programmable Led : General Start in the default PSL Set1 : For any DDB cell at 1 if linked by PSL Programmable Led : ANY TRIP C in the default PSL Set1 : For any DDB cell at 1 if linked by PSL Programmable Led : ANY TRIP B in the default PSL Set with : Set 0 : For any DDB cell at 0 if linked by PSL & regarding the type of logic selected in PSL by MiCOM S1 (Latched or not Latched) Set 0 : For any DDB cell at 0 if linked by PSL & regarding the type of logic selected in PSL by MiCOM S1 (Latched or not Latched) Set 0 : For any DDB cell at 0 if linked by PSL & regarding the type of logic selected in PSL by MiCOM S1 (Latched or not Latched) Set 0 : For any DDB cell at 0 if linked by PSL & regarding the type of logic selected in PSL by MiCOM S1 (Latched or not Latched) Set 0 : For any DDB cell at 0 if linked by PSL & regarding the type of logic selected in PSL by MiCOM S1 (Latched or not Latched) Set 0 : For any DDB cell at 0 if linked by PSL & regarding the type of logic selected in PSL by MiCOM S1 (Latched or not Latched) Set 0 : For any DDB cell at 0 if linked by PSL & regarding the type of logic selected in PSL by MiCOM S1 (Latched or not Latched) Reset with : Page 193/220 P44x/EN AP/E33 .

In In In In In In In TPAR Enable A/R Internal A/R 1p in Prog A/R 3p in Prog A/R Close A/R reclaim Out In SPAR Enable DDB label Page 194/220 P44x/EN AP/E33 Relay 13 Relay 12 Relay 12 Opto8 +Inv Opto8 +Inv Default PSL Reset at 0 : opto power off At 0 :no Ban Tri logic available.requested for blocking the internal DEF function – (pb of Pole Operating Time) Reset at 0 : opto power off Reset at 0 : opto power off Reset at 0 : opto power off opto energised if linked by PSL Reset at 0 : opto power off At1 : External 1P AR cycle in progress – requested for blocking the internal DEF function opto energised (> 1 sec) if linked by PSL At1 :AR internal becomes present [AR becomes enable by external contact example :Wdog of Main1 when pick up activates the internal AR in Main2(P44x)] opto energised (> 1 sec) if linked by PSL At1 :3P AR internal is enabled in the AR logic (higher priority than MiCOM S1) opto energised (> 1 sec) if linked by PSL At1 :1P AR internal is enabled in the AR logic (higher priority than MiCOM S1) AUTO RECLOSE (AR) Logic Set with : MiCOM P441/P442 & P444 Application Notes . AR is disable Reset at 0 : opto power off At 0 : AR 3P internal is disabled (even if selected enable by MiCOM S1) logic becomes :no more 3P cycle available (1P could exist if SPAR at 1) Reset at 0 : opto power off At 0 : AR 1P internal is disabled (even if selected enable by MiCOM S1) AR logic becomes 3P only with AR 3P cycle -if TPAR =1 Reset with : opto energised if linked by PSL At1 :Reclaim time from external AR in progress – requested to initiate internal TOR logic / Used in Z1X logic (by specific PSL) opto energised if linked by PSL At1 :External AR gives a CB closing order – for using internal synchro conditions of P44X opto energised if linked by PSL External 3P Arcycle in progress .

Trip CB CB Discrepancy External TripA Out In BAR DDB label Opto 6 Opto 5 Opto 4 Default PSL MiCOM P441/P442 & P444 Application Notes Reset at 0 : opto power off Conditiond of external synchro are unvailable Reset at 0 : opto power off AR Lock out is reseted Reset with : opto energised if linked by PSL At1 :External trip command A opto energised if linked by PSL At1 : Contact from external status of CB poles (one pole opened) – that data must be at 1 before end of Dead time1 if assigned in the PSL OR Internal logic = Any pole &Not All pole Dead (CB Aux must be connected 52a or 52b) opto energised if linked by PSL At1 :External manual trip command to provide a CB trip command by CB control if selected in MiCOM S1 opto energised if linked by PSL At1 :External manual close command – requested to initiate SOTF logic & to close CB (Arlock out during SOTF logic) opto energised if linked by PSL At1 :External command for tripping 3P only (Order issued from Main1 to Main2) – next trip will be 3P Reset at 0 : opto power off Reset at 0 : opto power off OR drop Off Internal Logic At 0 : Stop the 1P cycle if absent at the end of dead time1.Close CB Man.Must be at 1 inside the time window (adjusted by MiCOM S1 : PSL). At the end of InhWInd the signal AR BAR picks up.In In In In In In In In Ext Chk Synch OK CB Healthy Force 3P trip Man. group1/Autoreclose mode/AR Inhibit Wind) during an AR cycle (signals :AR close & AR Reclaim pick up when CB healthy is detected during the InhWind timer) opto energised if linked by PSL At1 :External check synchro condition satisfied – to be used with internal AR close by specific PSL – (With AND logic between Arclose&CsyncExt) opto energised if linked by PSL Set at1 :External condition which blocks the internal AR (other internal blocking conditions can be selected in MiCOM S1 :Autoreclose/Block AR) – see also logic AR lockout figure. Set with : Page 195/220 P44x/EN AP/E33 .. AR is ofrced in AR Lock Out Reset at 0 : opto power off Reset at 0 : opto power off Reset at 0 : opto power off opto energised if linked by PSL Reset at 0 : opto power off At 0 : AR cycle is stopped (if that cell is assigned in the At1 :contact from CB when CB is operationnal (gas pressure/mechanical state).

In In Out Out Out Out External TripC AR Lockout Shot> AR Fail A/R close A/R 1p in Prog Out In External TripB DDB label Page 196/220 P44x/EN AP/E33 Relay 12 Relay 13 Default PSL At0 : AR Cycles continue if fault still present (not erased by the previous Arcycle) Reset at 0 : Reset Trip1P + Reset Trip3P Reset at 0 : opto power off Reset at 0 : opto power off Reset with : Reset at 0 with : Close Pulse Time (Setting) OR Trip1P or Trip3P 1P AR cycle in progress (could be connected to external Main2 for Blocking Set 0 with : DEF) End of 1P Dead Time +AR Lock out (BAR) + 3P TRip Set at 1 :AR internal command :CB Close Starts as AR Reclaim Set at 1 : Absence of check sync condition involve AR failure (For 3P cycle) Reset at 0 : by 3 Poles Closed AR is blocked by passing over the number of shots selected in Auto Reclose/trip mode (in MiCOM S1) Set at 1 : (AR Enable) & [(Trip1P&No SPAR)+(Trip3P&NoTPAR) +(Trip1P+Trip3P)&(Number of shots=MiCOM S1 value)] opto energised if linked by PSL At1 :External trip command C Activate a Trip command phase C(DDB :Any TripC) (No dwell timer is associated as for an internal trip) Activate internal AR Integrated in the Any Trip & Any TripC cell opto energised if linked by PSL At1 :External trip command B Activate a Trip command phase B(DDB :Any TripB) (No dwell timer is associated as for an internal trip) Activate internal AR Integrated in the Any Trip & Any TripB cell Activate a Trip command phase A (DDB :Any TripA) (No dwell timer is associated as for an internal trip) Activate internal AR Integrated in the Any Trip & Any TripA cell Set with : MiCOM P441/P442 & P444 Application Notes .

Initiate the internal TOR logic Reset at 0 with : End of Reclaim time (MiCOM S1) OR Reset (Trip1P or Trip3P) (See Figure 78 section 4.Can be connected to Main2 as an external Ban Tri Set at 1 : Reset at 0 : (AR enable MiCOM S1)&(No SPAR) SPAR & AR enable MiCOM S1 + (InhibitWind at 0) Further delayed AR Cyles in progress (could be connected to external Main2) First high speed AR Cycle in progress (could be connected to external Main2) 3P AR cycle in progress (could be connected to external Main2) Set with : Page 197/220 P44x/EN AP/E33 .3) AR signal which force all trips to be 3P – picks up at the end of the first trip At 0 : AR1P could operate if programmed (1P or 3P) .Out Out Out Out Out A/R 1st in Prog A/R 234 in Prog A/R Trip 3P A/R Reclaim Out In A/R 3p in Prog DDB label Relay 12 Default PSL MiCOM P441/P442 & P444 Application Notes Set 0 with : End of 3P Dead time (DAR) +AR Lock Out (BAR) +End of Dead time1 (HSAR) Set 0 with : End of 3P Dead time (DAR) +AR Lock Out (BAR) +End of Dead time1 (HSAR) Set 0 with : End of 3P Dead time (DAR) +AR Lock Out (BAR) +End of Dead time1 (HSAR) Reset with : Set at 1 :Reclaim timer in progress.(Value adjusted in MiCOM S1) Picks up at the end of the dead time –in synchronism with AR Close order .5.Can be connected to Main2 for cycle in progress external information .

.Out Out Out Out Out A/R Enable A/R SPAR Enable A/R TPAR Enable A/R Lockout A/R Force Sync LED 8 Out Out In AR Discrim DDB label Page 198/220 P44x/EN AP/E33 Relay 11 Led 8 Default PSL AR Enable (See DDB Description) Force the Synchro condition ok at 1 (Could be used during test for getting Arclose whatever are the real conditions of CheckSyn ) AR function locked out/No more cycle is initiated by the AR (Pole is kept opened) – Reset must be done for enabling the AR logic again (AR counters are resetted) Set at 1 = ARenable & [(BAR =1 (see internal logic figure.) +(AR BAR n shot>) AR lockout by number of shots +(No CB Healthy at the end of InhWind(MiCOM S1)) +[No Discrepancy (opto or internal by CBAux if present in PSL) at the end of 1P Dead time1] + (Trip 1P or3P maintained /still present at the end of the1Por3P Dead time) +(After discrim timer if Trip3P occures during a 1PAR Cycle) ] Set at 1 :3P AR activated (copy of opto TPAR or MiCOM S1) Set at 1 :1P AR activated (copy of opto SPAR or MiCOM S1) Copy of status AR Enable Set at 1 : [(optos SPAR) +(optoTPAR)]& (AR enable byMiCOM S1) Dicrim status detected (inter or Externaly)-timer in progress Set with : Latched by PSL design Reset 0 : With Reset of A/R Reclaim (See DDB description) At0 : AR is activated Reset at 0 = [Reset(Trip1P)+Reset(Trip3P)] & (End of RC timer) & Reset (BAR ) & Reset (AR BAR n shot>) & Reset (No CB Healty) & Reset (No Discrepancy) Reset at 0: if TPARopto=0 or AR Disable in MiCOM S1 Reset at 0: if SPARopto=0 or AR Disable in MiCOM S1 Reset at 0: If SPAR and TPAR Optos at 0 (if integrated in PSL) + AR Disable in MiCOM S1 Rest 0 : End of Discrim timer (MiCOM S1) +Trip 3P (DEC 3P) +AR Lock Out (BAR) Reset with : MiCOM P441/P442 & P444 Application Notes .. section.

OK DDB label Default PSL MiCOM P441/P442 & P444 Application Notes Set at 1 :CB Trip 3P command by internal CB Control See CB Control logic sect 4.8 fig 115 Set at 0 :End of Timer manual closing Reset at 0 : opto power off Reset at 0 : opto power off Set at 0 : Condition of Live Bus at 0 (voltage below the threshold value (settable in MiCOM S1) Set at 0 : Condition of Dead Bus at 0 (voltage above the threshold value (settable in MiCOM S1) Set at 0 : Condition of Live line at 0 (voltage below the threshold value (settable in MiCOM S1) Set at 0 : Condition of Dead line at 0 (voltage above the threshold value (settable in MiCOM S1) Set at 0 :CSYnc conditions available Set at 0 : Conditions of checksyn unsatisfied (thresholds of dead & live definied in MiCOM S1 :system checks) Reset with : Page 199/220 P44x/EN AP/E33 .8 fig 115 Set at 1 :Manual close in progress – using CB control (Timer manual closing delay in progress) Set at 1 :Internal fault in VT used for Z measurement ref (Main VT) Distance &all Directionnal functions are blocked(can unblocked with different VTS timer.see MiCOM S1 settings) Set at 1 :Internal fault in VT used for synchro ref Csync function is blocked Set at 1: Condition of Live Bus at 1 (voltage above the threshold value (settable in MiCOM S1) – Default value is 32V Set at 1: Condition of Dead Bus at 1 (voltage below the threshold value (settable in MiCOM S1) – Default value is 13V Set at 1: Condition of Live line at 1 (voltage above the threshold value (settable in MiCOM S1) – Default value is 32V Set at 1 : Condition of Dead line at 1 (voltage below the threshold value (settable in MiCOM S1) – Default value is 13V Set at 1 : Internal conditions of Csync are not fulfilled Set at 1 : Check Synchro conditions are satisfied Used with AR close in dedicated PSL – AND gate : [(AR Close) or (Manual Close) & (Checksync OK)] CHECK SYNC Logic Set with : Reset at 0 : End of timer MiCOM S1 (Trip pulse timer) Reset at 0 : End of Timer MiCOM S1 (Close pulse timer) +Any Trip +CBC No Csync +CBC Unhealthy See CB Control logic sect 4.8 fig 115 Set at1 :CB Close 3P command by internal CB Control (Control with synchrocheck manual condition could be used in dedicated PSL – MiCOM S1Chk scheme ManCB) See CB Control logic sect 4.Out Out Out Out Out Out In In Out Out Out Control No C/S V<Dead line V>Live line V<Dead Bus V>Live Bus MCB/VTS Bus MCB/VTS Line Ctrl Cls In Prog Control Close Control Trip Out In Check Synch .

In In In In In Out Out AR Reclaim CB Aux A CB Aux B CB Aux C SOTF Enable TOR Enable Out In Man Close CB DDB label Page 200/220 P44x/EN AP/E33 Opto 6 Default PSL When SOTF logic is enable Set at 1 : By a Pulse of 500msec initiated by : AR Reclaim internal+AR reclaim External Input OR Any pole opened for more than 200ms When SOTF logic is enable Set at 1 : [Sotf not disable (Bit D in MiCOM S1)] AND All pole dead & End Timer (110sec/default) + Input Man Close + (CB control & Close in progress) opto energised if linked by PSL (See CB DDB ) used for Any pole dead/All pole dead opto energised if linked by PSL (See CB DDB ) used for Any pole dead/All pole dead opto energised if linked by PSL (See CB DDB ) used for Any pole dead/All pole dead opto energised if linked by PSL When at 1 (See AR DDB) start the TOR logic opto energised if linked by PSL At1 : AND no CB Control is activated in MiCOM S1 External command for closing manualy the CB Will initiate SOTF logic if SOTF not disable in MiCOM S1(BitD) AND CB control enable will initiate CB close in progress if All pole dead = SOTF Enable SOTF – TOR Logic Set with : Reset 500ms after Any pole dead stops Timer 500msec issued after Any pole Dead + Reset of one conditions requested for SOTF enable Reset at 0 : opto power off Reset at 0 : opto power off Reset at 0 : opto power off Reset at 0 : opto power off Reset at 0 : opto power off Reset with : MiCOM P441/P442 & P444 Application Notes .

12 – fig 37) When at 1 (See AR DDB) start the TOR logic Set1 :Trip order phase C initiated by levels detectors in SOTF logic (Pickup Set 0 : Reset of Level detectors logic 20ms delayed ) Set1 :Trip order phase B initiated by levels detectors in SOTF logic (Pickup Set 0 : Reset of Level detectors logic 20ms delayed ) Set1 :Trip order phase A initiated by levels detectors in SOTF logic (Pickup Set 0 : Reset of Level detectors logic 20ms delayed ) Set with : Page 201/220 P44x/EN AP/E33 .Out Out Out Out Out Out Out In In In In In TOC Start B TOC Start C AR Reclaim SOTF/TOR Trip Any Pole Dead All Pole Dead CB Aux A (52a) CB Aux A (52b) CB Aux B (52a) CB Aux B (52b) CB Aux C (52a) Out In TOC Start A DDB label Default PSL MiCOM P441/P442 & P444 Application Notes Reset with : Detection of pole status made by Cbaux or internal thresholds Set 0 :1pole is detected not dead Detection of pole status made by Cbaux or internal thresholds Set 0 :All poles are detected not dead Set 0 :When conditions reset (See logic section 2.Dead C Detection of pole status made by Cbaux or internal thresholds (see dead pole logic in SOTF section 2.12 – fig 35) Set1 :Minimum 1 pole is open Pole Dead A+Pole DeadB+Pole Dead C Detection of pole status made by Cbaux or internal thresholds (see dead pole logic in SOTF section 2.12 – fig 35) Set1 :Trip order initiated by any condition fulfilled in the SOTF/TOR logic (See logic section 2.DeadB & P.12 – fig 37) Set 0 : (See AR DDB) opto energised if linked by PSL At1 :Status input from CB-Pole C is closed opto energised if linked by PSL At1 :Status input from CB-Pole B is opened opto energised if linked by PSL At1 :Status input from CB-Pole B is closed opto energised if linked by PSL At1 :Status input from CB-Pole A is opened opto energised if linked by PSL At1 :Status input from CB-Pole A is closed Reset at 0 : opto power off Set 0 :Pole A is opened Reset at 0 : opto power off Set 0 :Pole B is closed Reset at 0 : opto power off Set 0 :Pole B is opened Reset at 0 : opto power off Set 0 :Pole A is closed Reset at 0 : opto power off Set 0 :Pole A is opened CIRCUIT BREAKER Logic (CB Control / CB Monitoring / CB Fail) Set1 :All poles are open Pole DeadA & P.

In In In In In In In Out Out Out CB Healthy Man Close CB Man Trip CB CB Discrepancy Reset Lockout Reset All Values CB Fail Alarm I^ Maint Alarm I^ Lockout Alarm Out In CB Aux C (52b) DDB label Page 202/220 P44x/EN AP/E33 Opto 7 Opto 6 Opto 5 Default PSL Set1 : Lockout :Alarm picks up when the maximum broken current (2nd level) calculated by monitoring task is reached (set in MiCOM S1 :I^Maintenance) (min1/Max 25000A) Set1 : :Alarm Maintenace picks up when the maximum broken current (1st level) calculated by monitoring task is reached (set in MiCOM S1 :I^Maintenance) (min1/Max 25000A) Set 1 :For any Breaker failure on any trip for any phase opto energised if linked by PSL At1 :Provides a CB monitoring reset (all counters & values are reset) opto energised if linked by PSL At1 :Provides a CB monitoring lockout reset (all counters & values are reset) See DDB description of AR Logic See DDB description of AR Logic See DDB Description in SOTF logic (CB control not used) See DDB description of AR Logic (CB control not used) opto energised if linked by PSL At1 :Status input from CB-Pole C is opened Set with : Set 0 :When the maximum broken current (2nd level) calculated by monitoring task is not reached Reset 0 : (selectable in MiCOM S1 : CB fail & I< logic) Iphase< + CB open & Iphase< +Trip reset & Iphase +Trip reset OR Iphase<< Reset at 0 : opto power off Reset at 0 : opto power off See DDB description of AR Logic See DDB description of AR Logic See DDB Description in SOTF logic See DDB description of AR Logic Reset at 0 : opto power off Set 0 :Pole C is closed Reset with : MiCOM P441/P442 & P444 Application Notes .

8 Figure 115 Displayed with 2 LSB of « Plan Status « at 00 or 11 from LCD of relay Set1 :When CB discrepency status is detected after CBA timer issued by opto input or internaly by CBAux logic – Alarm issued after 5 sec. See CB aux Logic in sect 4.7.F Lock Lockout Alarm CB Status Alarm Man CB trip Fail Out In CB Ops Maint DDB label Default PSL MiCOM P441/P442 & P444 Application Notes Reset with : Set 0 :untill number of operations is bellow the MiCOM S1 value Counter can be reseted by « Reset all values » Set1 :CB Fail on Manual Trip See CB Control logic section 4.1 Figure 109 Set1 :Lockout Alarm with CBC Unhealthy +CBC No Check Sync +CBC Fail to Close +CBC Fail To Trip +FF Lock +CB OpTime Lock +CB Ops Lock Set1 : CB Trip Lockout Alarm With : (Maint Lockout =1) + (Fault Frequence=1) Set1 :CB Trip Prelockout Alarm With (Maint Lockout –1) + (Fault Frequency-1) at 1 Set 0 : See CB Control logic section 4.F Pre Lockout F.8 Figure 115 Set 0 : When conditions reset Opto or internal logic Reset 0 : By user interface OR CB Close (selectable in MiCOM S1) Reset 0 : By user interface OR CB Close (selectable in MiCOM S1) ReSet 0 : end of timer in MiCOM S1 (Fault Freq Time) (min0/Max 9999 sec) Set1 :Alarm picks up for an excessive operating time on any phase (slowest Set 0 :untill operating time is bellow the MiCOM S1 value pole detection calculated by I< of CB Fail logic) In MiCOM S1-CB Time Lockout (min5/Max 500 msec) Set1 :Alarm picks up for an excessive operating time on any phase (slowest Set 0 :untill operating time is bellow the MiCOM S1 value pole detection calculated by I< of CB Fail logic)) In MiCOM S1-CB Time maint (min5/Max 500 msec) Set1 :When CB is lockout due to number of CB operations bigger than in MiCOM S1 value(CB Ops Lock) (min1/Max 10000) Set1 :Alarm picks up when the maximum number of CB operations initiated Set 0 :untill number of operations is bellow the MiCOM S1 by internal or external Trip (set in MiCOM S1 :CB Ops Maint) is reached value (min1/Max 10000) Counter can be reseted by « Reset all values » Set with : Page 203/220 P44x/EN AP/E33 .Out Out Out Out Out Out Out Out Out CB Ops Lockout CB Op Time Maint CB Op Time lock F.

8 Figure 115 Set with : Reset at 0 : opto power off Reset at 0 : opto power off Set 0 :No carrier received Reset end of Timer tBF2 Reset end of Timer tBF1 See DDB Description in SOTF logic See DDB Description in SOTF logic Set 0 :Pole C is closed CB Pole A Status detceted by internal logic & CBAux optos input status (See CB Section 4.6 – Figure 109) Set 0 : See CB Control logic section 4.8 Figure 115 Set 0 : See CB Control logic section 4.6 – Figure 109) Set1 :Pole B is opened CB Pole A Status detceted by internal logic & CBAux optos input status (See CB Section 4.6 – Figure 109) Set1 :Pole A is opened CB Pole A Status detceted by internal logic & CBAux optos input status (See CB Section 4.Out Out Out Out Out Out Out Out Out In In Man CB Unhealthy CB Aux A CB Aux B CB Aux C Any Pole Dead All Pole Dead TBF1 Trip TBF2 Trip DIST.8 Figure 115 Reset with : MiCOM P441/P442 & P444 Application Notes .8 Figure 115 Set1 :CB Fail on Manual Close See CB Control logic section 4.6 – Figure 109) Set 0 :Pole A is closed CB Pole A Status detceted by internal logic & CBAux optos input status (See CB Section 4.Chan Recv DIST COS Out In Man CB Cls Fail DDB label Page 204/220 P44x/EN AP/E33 Opto2 Opto1 Default PSL opto energised if linked by PSL At1 :Signal (Loss of carrier/Loss of Guard) is detected out of service by external device opto energised if linked by PSL At1 :Signal (carrier)received on main channel for Distance scheme logic (depending on MiCOM S1 settings :Program mode/standard Mode) DISTANCE PROTECTION Logic Trip order : Breaker Failure trip from timer tBF2 in CB Fail ogic Trip Order :Breaker Failure trip from timer tBF1 in CB Fail ogic See DDB Description in SOTF logic See DDB Description in SOTF logic Set1 :Pole C is opened CB Pole A Status detceted by internal logic & CBAux optos input status (See CB Section 4.6 – Figure 109) Set1 : CB Unhealthy for Manual Control See CB Control logic section 4.6 – Figure 109) Set 0 :Pole B is closed CB Pole A Status detceted by internal logic & CBAux optos input status (See CB Section 4.

Set1 :VT Alarm indication with : internal logic after timer is issued+ MCB by opto at1 The Distance/WInfeed & Directionnal functions are blocked (only Non direc I> are working) (See Fuse Failure logic section 4.5.2. That cell can be assigned to any external/Internal condition for starting Z1X logic (See Z1X logic section 4.2 Figure 66) Reset 0 : Healthy network detected + All pole Dead (See FFailure logic in section 4.4) Set1 :Alarm for Carrier Out Of Service Set 0 : Set 0 : Rest of initiale condition opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto (Usefull during test) OR Set1 :The DIST Timer will be blocked & DIST will start but will not perform a DDB at 0 if assigned to a DDB cell Trip command.4 Figure 13 Figure 14) Set with : Page 205/220 P44x/EN AP/E33 .8.All Distance & Directionnality will be blocked after a FFU timer adjusted by MiCOM S1 (See Fuse Failure logic section 4.2 Figure 66) Set 0 :Rest of one of the conditions See Check Sync DDB description (Used in Synchrocheck logic) Set1 :Signal send in Distance Protection scheme (See logic of distance section 2.2 Figure 66) Even if Main VT are Bus side – that cell must be linked to MCB status) Reset at 0 : opto power off opto energised if linked by PSL OR any internal DDB by dedicated PSL At1 :Signal will initiate Z1 extension logic if selected in MiCOM S1.2 Figure 66) Set1 :Copy of Instantaneous unconfirmed Fuse Failure (in internal logic detection) (See Fuse Failure logic section 4.2 Figure 66) Protections blocked.Min Z can be unblocked by I>&I2>&IN&∆I (for 1P/2P/3P Failure) See Check Sync DDB description (Used in Synchrocheck logic) Reset at 0 : opto power off opto energised if linked by PSL At1 :Fuse Failure by external MCB status on Main VT (Z measurement) .In In In Out Out In Out Out MCB/VTS Line (Z measure VT main) MCB/VTS Bus (Sync Ref) VTS Fast VTS Fail Alarm Dist Timer Block COS Alarm DIST Sig Send Out In Z1X Extension DDB label Relay 05 Opto3 Default PSL MiCOM P441/P442 & P444 Application Notes Reset with : (See FFailure logic in section 4.

5 Figure 94) Set1 :Directionnal Reverse detected in distance Algorithms (Deltas or Classical) AND (CVMR) (See Description of Algorithms in chapter P44x/EN HW.Out Out Out Out Out Out Out Out Dist Fwd Dist Rev Dist Trip A Dist Trip B Dist Trip C DIST Start A DIST Start B Out In DIST UNB CR DDB label Page 206/220 P44x/EN AP/E33 Led7 Led6 Default PSL Set1 : Distance Protection logic start phase B (See Description of Algorithms in chapter 3) Set1 : Distance Protection logic start phase A (See Description of Algorithms in chapter 3) Set1 :Trip Phase C with Distance protection logic (See Trip logic in Section 2.5 Figure 94) Set1 :Trip Phase B with Distance protection logic (See Trip logic in Section 2.5 Figure 94) Set1 :Trip Phase A with Distance protection logic (See Trip logic in Section 2. item 4) Assigned to Led 7 by default Set1 :Directionnal Forward detected in distance Algorithms (Deltas or Classical) AND (CVMR) See Description of Algorithms in chapter P44x/EN HW. item 4) Assigned to Led 6 by default Set1 :Unblock Main channel signal received See Led 5 / Relay 10 description Set with : Set 0 : Reset of R/X computation made by All pole Dead detection I Dead calculated by Laurent (3 or 4 samples requested) V Dead calculated by CB Fail (More than 10ms requested) Set 0 : Reset of R/X computation made by All pole Dead detection I Dead calculated by Laurent (3 or 4 samples requested) V Dead calculated by CB Fail (More than 10ms requested) Set 0 :Reset Dist Trip signal (fixed pulse duration is 80ms) Set 0 :Reset Dist Trip signal (fixed pulse duration is 80ms) Set 0 :Reset Dist Trip signal (fixed pulse duration is 80ms) Set 0 : With reset of Any Start/Dist Start Set 0 : With reset of Any Start/Dist Start Set 0 : Reset with : MiCOM P441/P442 & P444 Application Notes .

POP (Copy of MiCOM S1 setting Dist scheme) Set1 : Distance Protection logic start phase C (See Description of Algorithms in chapter 3) Set with : Set 0 : Reset of R/X computation made by All pole Dead detection (See Dist Start DDB reset description) Set 0 : Reset of R/X computation made by All pole Dead detection (See Dist Start DDB reset description) Set 0 : Reset of R/X computation made by All pole Dead detection (See Dist Start DDB reset description) Set 0 : Reset of R/X computation made by All pole Dead detection (See Dist Start DDB reset description) Set 0 : Reset of R/X computation made by All pole Dead detection (See Dist Start DDB reset description) Set 0 : If disabled in MiCOM S1 Set 0 : If disabled in MiCOM S1 Set 0 : If disabled in MiCOM S1 Set 0 : Reset of R/X computation made by All pole Dead detection I Dead calculated by Laurent (3 or 4 samples requested) V Dead calculated by CB Fail (More than 10ms requested) Reset with : Page 207/220 P44x/EN AP/E33 .PUP (Copy of MiCOM S1 setting Dist scheme) Set1 :Distance scheme accelerating .Out Out Out Out Out Out Out Out Out DIST Sch Accel. DIST Sch Perm DIST Sch Block Z1 = Z'1 Z1X = Z'1x Z2 = Z'2 Z3 = Z'3 Z4 = Z'4 Out In DIST Start C DDB label Led5 Relay 10 Led5 Relay 10 Led5 Relay 10 Led5 Relay 10 Led5 Relay 01-10 Default PSL MiCOM P441/P442 & P444 Application Notes Set1 :Fault is detected in Z4(convergence of loop in Z4) and filtered by blocking/unblocking PSwing/Rguard logic See Relay 10 / Led5 description Set1 :Fault is detected in Z3(convergence of loop in Z3) and filtered by blocking/unblocking PSwing/Rguard logic See Relay 10 / Led5 description Set1 :Fault is detected in Z2(convergence of loop in Z2) and filtered by blocking/unblocking PSwing/Rguard logic See Relay 10 / Led5 description Set1 :Fault is detected in Z1x(convergence of loop in Z1x) and filtered by blocking/unblocking PSwing/Rguard logic See Led 5/Relay10 description Set1 :Fault is detected in Z1(convergence of loop in Z1) See Led 5/Relay01/Relay 10 description Set1 :Distance scheme Blocking – BOP Z1 – BOP Z2 (Copy of MiCOM S1 setting Dist scheme) Set1 :Distance scheme Permissive .

Out Out Out Out Out Out Out Out Out Out Out T1 T2 T3 T4 Tzp Dist Fwd No Filt Dist Rev No Filt Dist Convergency Cross Country Filt Relay Label 01 Out In Zp DDB label Page 208/220 P44x/EN AP/E33 Led5 Relay 10 Default PSL Assigned in default PSL : »TRIP Z1 » .Default logic Z1&[( Dist TripA)+ (Dist TripB)+ (Dist TripC)] Set1 : Cross country logic is activated (1 Fault Fwd/1 Fault Rev detected) Set1 : logic with CVMR at 1 (Minimum 1 loop has been detected in the quad) Set1 :Directionnal Reverse decision made by Distance logic without any filter by CVMR or Zone Picks up quicker than Dist Rev Set1 :Directionnal Forward decision made by Distance logic without any filter by CVMR or Zone Picks up quicker than Dist Fwd Set1 :Timer Distance for Zp (tZp in MiCOM S1) is issued End of Timer =1 Set1 :Timer Distance for Z4 (tZ4 in MiCOM S1) is issued End of Timer =1 Set1 :Timer Distance for Z3 (tZ3 in MiCOM S1) is issued End of Timer =1 Set1 :Timer Distance for Z2 (tZ2 in MiCOM S1) is issued End of Timer =1 Set1 :Timer Distance for Z1 (tZ1 in MiCOM S1) is issued (If T1=0 picks up when relay starts (CVMR or Predef) End of Timer =1 Set1 :Fault is detected in Zp(convergence of loop in Zp) – See Relay 10 / Led5 description Set with : Set 0 : See PSL logic Set 0 : With reset of initiale conditions Set 0 : Reset of R/X computation made by All pole Dead detection (See Dist Start DDB reset description) Set 0 : Identical to Dist Rev reset logic Set 0 : Identical to Dist Fwd reset logic Set 0 : Timer Distance T Zp is not issued Set 0 : Timer Distance T4 is not issued Set 0 : Timer Distance T3 is not issued Set 0 : Timer Distance T2 is not issued Set 0 : Timer Distance T1 is not issued Set 0 : Reset of R/X computation made by All pole Dead detection (See Dist Start DDB reset description) Reset with : MiCOM P441/P442 & P444 Application Notes .

3 Figure 24) Set1 :Reversal guard logic is activated (Directionnal switching from Rev to Fwd in parallel line application) See Description logic in section 2.9.Default logic [( Dist TripA)+ (Dist TripB)+ (Dist TripC)] & Dist Unb CR & (Z1+Z1x+Z2+Z3+Zp+Z4) Set with : Page 209/220 P44x/EN AP/E33 .3 Figure 24) Set 0 : (See Weak Infeed logic section 2.2.14 Figure 40) Associated DISTANCE PROTECTION Logic Assigned in default PSL : »Z1+Aided Trip » Relay10 + Z1 + Z1x Assigned in default PSL : »Dist Aided Trip » .9.9.Chan Recv Out In Relay Label 10 DDB label Opto1 Relay 14 Default PSL MiCOM P441/P442 & P444 Application Notes Set 0 : (See Weak Infeed logic section 2.9.8.9.3 Figure 24) Set1 : For Trip phase B in Weak infeed logic (See Weak Infeed logic section 2.3 Figure 24) Set1 : For Trip phase A in Weak infeed logic (See Weak Infeed logic section 2.3 Figure 24) Set 0 : (See Weak Infeed logic section 2.4 Figure 3) Set1 : Power Swing detected (See description logic in section 2.3 Figure 24) Set 0 : Set 0 : Reset of initiale conditions Set 0 : See PSL logic Set 0 : See PSL logic Reset with : opto energised if linked by PSL opto power off At1 :Signal (carrier)received on main channel for DEF scheme logic Set 0 :No carrier received (depending on MiCOM S1 settings :Aided DEF/Scheme logic) Selected shared by default – Can operate as an independant scheme with adifferent opto from Dist Aided DEF PROTECTION Logic Set1 : For Trip phase C in Weak infeed logic (See Weak Infeed logic section 2.9.Out Led Out Out Out Out Out In LED 5 Power Swing Reversal Guard WI Trip A WI Trip B WI Trip C DEF.

In In Out Out Out Out Out Out Out Out Out Out DEF Timer Block DEF Sig Send DEF UNB CR DEF Rev DEF Fwd DEF Start A DEF Start B DEF Start C DEF Trip A DEF Trip B DEF Trip C Out In DEF COS DDB label Page 210/220 P44x/EN AP/E33 Relay 09 Relay 09 Relay 09 Relay 05 Opto2 Default PSL Reset with : Set 0 : Reset of R/X computation made by All pole Dead detection (See Dist Start DDB reset description) Set 0 : Set 0 : Reset at 0 : opto power off if assigned to an opto OR DDB at 0 if assigned to a DDB cell Set1 : DEF Protection logic Trip phase C (See Description of Algorithms in Figure 52) Set1 : DEF Protection logic Trip phase B (See Description of Algorithms in Figure 52) Set1 : DEF Protection logic Trip phase A (See Description of Algorithms in Figure 52) Set1 :Start Phase C with DEF protection logic (See Trip logic in section 2.18) Set1 :Start Phase A with DEF protection logic (See Trip logic in section 2. opto energised if linked by PSL Reset at 0 : opto power off At1 :Signal (Loss of carrier/Loss of Guard) is detected out of service by external device Selected shared by default – Can operate as an independant scheme with adifferent opto from Dist Set with : MiCOM P441/P442 & P444 Application Notes .18 Figure 50) Set1 :Directionnal Reverse detected in DEF Algorithms (Deltas or Classical) See Description of Algorithms in section 2.18 Figure 50) Set1 :Unblock DEF Channel Set1 :Signal send in DEF Protection scheme (See logic of DEF section 2.18) Set 0 : Reset DEF Trip Order Set 0 : Reset DEF Trip Order Set 0 : Reset DEF Trip Order Set 0 : Reset of R/X computation made by All pole Dead detection (See Dist Start DDB reset description) Set 0 : Reset of R/X computation made by All pole Dead detection (See Dist Start DDB reset description) Set 0 : Reset of R/X computation made by All pole Dead detection (See Dist Start DDB reset description) Set1 :Directionnal Foward detected in DEF Algorithms (Deltas or Classical) Set 0 : Reset of R/X computation made by All pole Dead detection (See Dist Start DDB reset description) (See Description of Algorithms in section 2.18) Set1 :Start Phase B with DEF protection logic (See Trip logic in section 2.18 Figure 48 and Figure 49) opto energised if linked by PSL OR any internal DDB by dedicated PSL Set1 :The DEF Timer will be blocked & DEF will start but will not perform any Trip command.

0) Input energised if linked by PSL OR any internal DDB by dedicated PSL Set 1:The ZSP Timer will be blocked & ZSP will start but will not perform any Trip command ZERO SEQUENCE POWER PROTECTION Set with : Page 211/220 P44x/EN AP/E33 . DDB at 0 if assigned to a DDB cell opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto Set1 :The I>3 Timer will be blocked & I>3 will start but will not perform any OR Trip command. DDB at 0 if assigned to a DDB cell opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto Set1 :The I>1 Timer will be blocked & I>1 will start but will not perform any OR Trip command. BACK UP OVERCURRENT PROTECTION Set 1:3P Trip order performed by Zero sequence power function when associated timers are issued Set 1:Zero sequence power function Start (Timer associated picks up) with fixed time delay first and IDMT curve timer Reset with : Reset at 0 : opto power off if assigned to an opto OR DDB at 0 if assigned to a DDB cell ZSP Logic (since version B1. DDB at 0 if assigned to a DDB cell opto energised if linked by PSL OR any internal DDB by dedicated PSL Set1 :The IN>2 Timer will be blocked & IN>2 will start but will not perform any Trip command.In Out Out In In In In In In ZSP Start ZSP Trip IN>1 Timer Block IN>2 Timer Block I>1 Timer Block I>2 Timer Block I>3 Timer Block I>4 Timer Block Out In ZSP Timer Block DDB label Default PSL MiCOM P441/P442 & P444 Application Notes Set 0:Reset ZSP Trip Order Set 0:Reset with IN or SR below the threshold IN> or SR> Hysteresis= (See Pole Dead description in Figure 60) Reset at 0 : opto power off if assigned to an opto OR DDB at 0 if assigned to a DDB cell opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto Set1 :The I>4 Timer will be blocked & I>4 will start but will not perform any OR Trip command. DDB at 0 if assigned to a DDB cell opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto Set1 :The I>2 Timer will be blocked & I>2 will start but will not perform any OR Trip command. Reset at 0 : opto power off if assigned to an opto OR DDB at 0 if assigned to a DDB cell IN>1/IN>2/I2>/I>1/I>2/I>3/I>4 Logic opto energised if linked by PSL OR any internal DDB by dedicated PSL Set1 :The IN>1 Timer will be blocked & IN>1 will start but will not perform any Trip command.

In Out Out Out Out Out Out Out Out Out IN>1 Trip IN>2 Trip IN>1 Start IN>2 Start I2> Start I2> Trip I>Start Any A I>Start Any B I>Start Any C Out In I2> Timer Block DDB label Page 212/220 P44x/EN AP/E33 Relay 09 Relay 09 Default PSL Reset with : Set1 :Any Overcurrent function start for phase C Set1 :Any Overcurrent function start for phase B Set1 :Any Overcurrent function start for phase A Set1 : Negative sequence current detection – 3P Trip order performed when associated timer is issued Set1 : Negative sequence current detection – Start function (Timer associated picks up) Directionnal or not .with DT curves Negative polarisation Set1 : Earth Fault stage 2 – Start function (Timer associated picks up) Directionnal or not .DT only Negative or positive sequence polarisation Set1 : Earth Fault stage 1 – Start function (Timer associated picks up) Directionnal or not .with DT or IDMT curves Negative or positive sequence polarisation Set1 : Earth Fault stage 2 – 3Poles Trip order performed when associated timer is issued Set1 : Earth Fault stage 1 – 3Poles Trip order performed when associated timer is issued Set 0 : Reset with Iphase C below the lowest threshold I>1 Hysteresis= (See Pole Dead description in Figure 60) Set 0 : Reset with Iphase B below the lowest threshold I>1 Hysteresis= (See Pole Dead description in Figure 60) Set 0 : Reset with Iphase A below the lowest threshold I>1 Hysteresis= (See Pole Dead description in Figure 60) Set 0 : Reset I2> Trip Order (See Pole Dead description in Figure 60) Set 0 : Reset with IN below the threshold I2> Hysteresis= Set 0 : Reset with IN below the threshold IN>2 Hysteresis= (See Pole Dead description in Figure 60) Set 0 : Reset with IN below the threshold IN>1 Hysteresis= (See Pole Dead description in Figure 60) Set 0 : Reset IN>2Trip Order Set 0 : Reset IN>1 Trip Order opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto Set1 :The I2> Timer will be blocked & I2> will start but will not perform any OR Trip command with negative overcurrent detection DDB at 0 if assigned to a DDB cell Set with : MiCOM P441/P442 & P444 Application Notes .

with DT or IDMT curves Directionnal managed by Deltas Algorithms VTS Block timer facility Set1 :Overcurrent stage1 start Directionnal or not .with DT or IDMT curves Directionnal managed by Deltas Algorithms VTS Block timer facility Set with : Page 213/220 P44x/EN AP/E33 .12 Figure 35) Set1 :Overcurrent stage2 start Directionnal or not .14) Set1 :Overcurrent stage3 start Not Directionnal with DT curves Use without timer for SOTF (see description in section 2.Out Out Out Out Out Out Out Out Out I>2 Start I>3 Start I>4 Start I>1 Trip I>2 Trip I>3 Trip I>4 Trip Stub Bus Enable Out In I>1 Start DDB label Default PSL MiCOM P441/P442 & P444 Application Notes Set 0 : Reset I>4 Trip Order Set 0 : Reset I>3 Trip Order Set 0 : Reset I>2 Trip Order Set 0 : Reset I>1 Trip Order (See Pole Dead description in Figure 60) Set 0 : Reset with Iphase A below the threshold I>4 Hysteresis= (See Pole Dead description in Figure 60) Set 0 : Reset with Iphase A below the threshold I>3 Hysteresis= (See Pole Dead description in Figure 60) Set 0 : Reset with Iphase A below the threshold I>2 Hysteresis= (See Pole Dead description in Figure 60) Set 0 : Reset with Iphase A below the threshold I>1 Hysteresis= Reset with : opto energised if linked by PSL Reset at 0 : opto power off if assigned to an opto At1 :Status input from HV line isolator opened – indicates that line is dead & disconnected At1 : I>4 is activated as a back up Stub Bus protection Set1 :Overcurrent Stage 4 Trip 3P performed when associated timer is issued Set1 :Overcurrent Stage 3 Trip 3P performed when associated timer is issued Set1 :Overcurrent Stage 2 Trip 3P performed when associated timer is issued Set1 :Overcurrent Stage 1 Trip 3P performed when associated timer is issued Set1 :Overcurrent stage4 start Not Directionnal with DT curves Use without timer for SOTF (see description in section 2.

In In In In Out Out Out Out Out Out V<2 Timer Block V>1 Timer Block V>2 Timer Block V<1 Alarm V<2 Alarm V>1 Alarm V>2 Alarm V<Start Any A V<Start Any B Out In V<1 Timer Block DDB label Page 214/220 P44x/EN AP/E33 Default PSL Set1 :Any Undervoltage function start for phase B Set1 :Any Undervoltage function start for phase A Set 0 : Reset with V phase B measure over the lowest threshold V< Hysteresis= Set 0 : Reset with V phase A measure over the lowest threshold V< Hysteresis= Set 0 : Reset with V measure below the threshold V>2 Hysteresis= Set 0 : Reset with V measure below the threshold V>1 Hysteresis= Set1 :1st stage Overvoltage Alarm picks up when V<1 starts Set1 :2nd stage Overvoltage Alarm picks up when V<1 starts Set 0 : Reset with V measure over the threshold V<2 Hysteresis= Set 0 : Reset with V measure over the threshold V<1 Hysteresis= Set1 :1st stage undervoltage Alarm picks up when V<1 starts Set1 :2nd stage undervoltage Alarm picks up when V<1 starts Reset at 0 : opto power off if assigned to an opto OR DDB at 0 if assigned to a DDB cell Reset at 0 : opto power off if assigned to an opto OR DDB at 0 if assigned to a DDB cell Reset at 0 : opto power off if assigned to an opto OR DDB at 0 if assigned to a DDB cell opto energised if linked by PSL OR any internal DDB by dedicated PSL Set1 :The V>2 Timer will be blocked & V>2 will start but will not perform any Trip command. opto energised if linked by PSL OR any internal DDB by dedicated PSL Set1 :The V<2 Timer will be blocked & V<2 will start but will not perform any Trip command. Reset with : Reset at 0 : opto power off if assigned to an opto OR DDB at 0 if assigned to a DDB cell V<1/V<2/V>1/V>2 Logic opto energised if linked by PSL OR any internal DDB by dedicated PSL Set1 :The V<1 Timer will be blocked & V<1 will start but will not perform any Trip command. opto energised if linked by PSL OR any internal DDB by dedicated PSL Set1 :The V>1 Timer will be blocked & V>1 will start but will not perform any Trip command. BACK UP VOLTAGE PROTECTION Set with : MiCOM P441/P442 & P444 Application Notes .

Out Out Out Out Out Out Out Out Out Out Out Out V<1 Start V<2 Start V<1 Trip V<2 Trip V>Start Any A V>Start Any B V>Start Any C V>1 Start V>2 Start V>1 Trip V>2 TRip Out In V<Start Any C DDB label Default PSL MiCOM P441/P442 & P444 Application Notes Set 0 : Reset with V measure below the threshold V<2 Hysteresis= Set 0 : Reset of V<1 Trip order Set1 :2nd Stage Undervoltage function start for any phase Set1 :1st Stage Undervoltage function trip 3 phase Set 0 : Reset with V phase C measure below the lowest threshold V< Hysteresis= Set 0 : Reset with V measure below the threshold V>1 Hysteresis= Set 0 : Reset with V measure below the threshold V>2 Hysteresis= Set 0 : Reset of V>1 Trip order Set 0 : Reset of V>2 Trip order Set1 :1st Stage Overvoltage function start for any phase Set1 :2nd Stage Overvoltage function start for any phase Set1 :1st Stage Overvoltage function 3 phase TRIP Set1 :2nd Stage Overvoltage function 3 phase TRIP Set 0 : Reset with V phase B measure below the lowest threshold V< Hysteresis= Set 0 : Reset with V phase A measure below the lowest threshold V< Hysteresis= Set1 :Any Overvoltage function start for phase C Set1 :Any Overvoltage function start for phase B Set1 :Any Overvoltage function start for phase A Set1 :2 Stage Undervoltage function trip 3 phase Set 0 : Reset of V<2 Trip order Set 0 : Reset with V measure over the threshold V<1 Hysteresis= Set1 :1st Stage Undervoltage function start for any phase nd Set 0 : Reset with V phase C measure over the lowest threshold V< Hysteresis= Reset with : Set1 :Any Undervoltage function start for phase C Set with : Page 215/220 P44x/EN AP/E33 .

Alarm CVT Alarm Field Volt Fail Alarm User1 Alarm User2 Alarm User3 Alarm User4 Alarm User5 General Alarm Out In F out of Range DDB label Page 216/220 P44x/EN AP/E33 Relay 08 Default PSL Set 0 :With reset of min Field voltage detection Set 0 :No CVT Fail Alarm detected Set 0 :No Brok.Out Out Out Out Out In In In In In Out CT Fail Alarm Brok.Alarm detected Set 0 :No CT Fail Alarm detected Set 0 : With frequency tracking operating correctly Reset with : Set1 :For any Alarm started & included in the list : Battery Fail Field Volt Fail General Alarm Prot’n Disabled F out of range VT Fail Alarm CT Fail Alarm CVT Fail Alarm CB Fail Alarm Set 0 : Reset if all initiale condition reset Set1 : Alarm for user – application customized must be linked to dedicated Set 0 :With reset of conditions linked to that cell DDB cells Set1 : Alarm for user – application customized must be linked to dedicated Set 0 :With reset of conditions linked to that cell DDB cells Set1 : Alarm for user – application customized must be linked to dedicated Set 0 :With reset of conditions linked to that cell DDB cells Set1 : Alarm for user – application customized must be linked to dedicated Set 0 :With reset of conditions linked to that cell DDB cells Set1 : Alarm for user – application customized must be linked to dedicated Set 0 :With reset of conditions linked to that cell DDB cells Set1 : Field Voltage Failure (Internal 48Vcc delivered by the relay can be used for Optos polarisation) Set 1:Alarm from the capacitive voltage transformers supervision Set1 : Alarm from the Start of Broken Conductor function Set1 :Alarm from the current transformers supervision Set1 :Alarm when frequency tracking does not operate correctly and provides a Frequency out of range ALARMS Set with : MiCOM P441/P442 & P444 Application Notes .Cond.Cond.

Set1 : Single phase fault detected with Distance Funct.F.Out Out Out Out Out Any Start 1ph Fault 2ph Fault 3ph Fault Out In General Alarm DDB label Led4 Relay 06 Relay 08 Default PSL MiCOM P441/P442 & P444 Application Notes START LOGIC Set1 : Three phase fault detected with Distance Funct. Pre Lockout F. Set1 :Any Protection start loig with any phase Assigned to Led 4 by default (Fault record Trigger in default PSL with 20ms Dwell Timer) I^Maint Alarm I^Lockout Alarm CB Ops Maint CB Ops Lockout CB Op Time Maint CB Op Time Lock F.F Lock Lockout Alarm CB Status Alarm Man CB Trip Fail Man CB Cls Fail Man CB Unhealthy Control No C/C AR Lockout Shot> SG-opto Invalid A/R Fail V<1 Alarm V<2 Alarm V>1 Alarm V>2 Alarm COS Alarm User Alarlm1 User Alarm2 Set with : Set 0 : with Distance Reset Set 0 : with Distance Reset Set 0 : with Distance Reset Set 0 :Reset with reset from all started function (21/67N/50/51…) Set 0 : Reset if all initiale condition reset Reset with : Page 217/220 P44x/EN AP/E33 . Set1 : Two phase fault detected with Distance Funct.

In In In Out Out Out Out Out Out Out Out User Trip B User Trip C Any Trip Any Int Trip A Any Int Trip B Any Int Trip C Any Trip A Any Trip B Any Trip C 1P Trip Out In User Trip A DDB label Page 218/220 P44x/EN AP/E33 Led3 Relay 04 Led2 Relay 03 Led1 Relay 02 Relay 07 Default PSL Set 0 :Reset conditions Set 0 :Reset conditions Set 0 :Reset conditions Reset at 0 : opto power off if assigned to an opto OR DDB at 0 if assigned to a DDB cell Reset at 0 : opto power off if assigned to an opto OR DDB at 0 if assigned to a DDB cell Reset at 0 : opto power off if assigned to an opto OR DDB at 0 if assigned to a DDB cell Reset with : Set1 :Single pole Trip decision (int or Ext) Set1 :Any Internal or External Trip phase C – with any protection decision (internal or external) Assigned to Led 3 by default Set1 :Any Internal or External Trip phase B – with any protection decision (internal or external) Assigned to Led 2 by default Set1 :Any Internal or External Trip phase A – with any protection decision (internal or external) Assigned to Led 1 by default Set 0 :Reset conditions Set 0 :Reset conditions Set 0 :Reset conditions Set 0 :Reset conditions Set1 : Any Internal Trip with Phase C.with any internal protection decision Set 0 :Reset conditions Set1 : Any Internal Trip with Phase B with any internal protection decision Set1 : Any Internal Trip with Phase A with any internal protection decision Set1 :Any Trip 1P or 3P initiated by internal Trip or external Trip decision (Fault record Trigger in default PSL) opto energised if linked by PSL OR any internal DDB by dedicated PSL Set1 :Trip C Internal input managed with the general trip logic(With AR/Evolving fault…) Can be assigned by external condition opto energised if linked by PSL OR any internal DDB by dedicated PSL Set1 :Trip B Internal input managed with the general trip logic(With AR/Evolving fault…) Can be assigned by external condition opto energised if linked by PSL OR any internal DDB by dedicated PSL Set1 :Trip A Internal input managed with the general trip logic(With AR/Evolving fault…) Can be assigned by external condition TRIP LOGIC Set with : MiCOM P441/P442 & P444 Application Notes .

Trip Loss.Load Trip BLK Protection Prot’n Disabled Reset Latches Out In 3P Trip DDB label Default PSL MiCOM P441/P442 & P444 Application Notes opto energised if linked by PSL OR any internal DDB by dedicated PSL Set1 :Permanent Alarms & Leds & relayslatched are reset Set1 :When TEST MODE is enable All the protections functions are out of order.Out Out Out In Out In Brk Conduct. opto energised if linked by PSL OR any internal DDB by dedicated PSL Set1 :All protections functions are blocked (21/67N/50/51…) MISCELLANEOUS LOGIC Set1 :3P Trip decision by Loss of Load protection (in application without communication scheme & a 3P Trip logic) Set1 :3P Trip decision by Broken Conductor protection Set1 :Three pole Trip decision (int or Ext) Set with : Reset at 0 : opto power off if assigned to an opto OR DDB at 0 if assigned to a DDB cell Set 0 :Reset conditions – No blocking conditions available : (Test mode disable) + (Opto BLK Protec =0) Set 0 :Reset conditions Set 0 :Reset conditions Set 0 :Reset conditions Set 0 :Reset conditions Reset with : Page 219/220 P44x/EN AP/E33 .

Page 220/220 P44x/EN AP/E33 BLANK PAGE MiCOM P441/P442 & P444 Application Notes .