Beyond‐CMOS White Paper 

 

 

Beyond-CMOS White Paper
1. Emerging Research Devices (ERD) in ITRS 2.0
Emerging Research Devices (ERD) will be the core of the “beyond CMOS” focus team (FT) in
ITRS 2.0. The “beyond CMOS” FT will cover emerging memory, logic, and architectures that ERD
has traditionally focused on. In addition, new areas of emerging technologies relevant to new
application drivers will be explored. ERD is an established and respected “brand name” from ITRS;
therefore, it is important for ERD to continue its activities as a technology working group. “Beyond
CMOS” will be a focused task that ERD is undertaking in ITRS 2.0. ERD provides a unique function
as an interface between industry and academic research. It also serves as a guideline for funding
agencies. The focus on “beyond CMOS” in the future direction will enhance this function and keep
ERD aligned with new application drivers.

System
integration

Outside
system
connectivity

Application drivers;
Performance
requirements

ERD: “Beyond CMOS”
Integration and
manufacturability
requirements

Heterogeneous
integration

Heterogeneous
components
Assessment &
transition criteria

More Moore

Manufacturing

Figure 1 The role of ERD and interaction with other focus teams in ITRS 2.0

ERD and the “beyond CMOS” FT will closely interact with the other six FTs in ITRS 2.0, as
illustrated in Fig. 1. The “beyond CMOS” FT receives inputs regarding application drivers and
performance requirements from the “system integration” and “outside system connectivity” FTs. It
also interacts with the “heterogeneous components” and “more Moore” FTs to both receive
assessment/transition criteria and provide inputs of emerging components that may be adopted by
these FTs in the future. This is similar to the relationship that ERD has had with FEP and PIDS.
Interaction with the “manufacturing” and “heterogeneous integration” FTs will help the “beyond
CMOS” FT to consider manufacturing and integration feasibility of emerging technologies.
This white paper will outline the proposed scope of “beyond CMOS” by the ERD group.
2. Difficult Challenges
ERD has traditionally focused on novel memory and information processing devices based on
alternative materials and mechanisms to extend ultimately scaled CMOS. With application drivers

 

1

energy-delay tradeoff continues to exist  Unique characteristics (e. gate length. IoT.1 Technology entry selection. nonvolatility) may enable new designs that are not possible in CMOS to improve performance on circuit and system levels. cloud computing. etc. Extend CMOS scaling with alternative channel materials and device structures Beyond-CMOS devices with substantially improved performance and/or functionality Emerging architectures to improve information processing and utilize novel characteristics of emerging device Invent and reduce to practice long term alternative solutions to technologies that address functionality requirements in new application drivers including mobile.Beyond‐CMOS White Paper      broaden from computing/communication to IoT (Internet of Things).. overall performance has rarely exceed that of CMOS. low-power. and tabulate emerging technology entries. categorization.  A variety of architecture solutions are actively explored to overcome the limitation of von Neumann architecture and conventional CMOS  New architecture solutions may circumvent limitations of emerging devices (e. Summary of difficult challenges in “beyond CMOS” technology options Difficult challenges High-performance and high-density memory solutions for embedded and standalone applications. environmental control. security and entertainment. there are new functionalities and performance requirements for emerging devices. cloud computing. Consistent and rigorous criteria will be used to select a new technology entry and remove an existing entry. Ge. Table 1. automotive.g. healthcare. e.. a new   2 . scalability.. e.)  Novel mechanisms and alternative state variables have been utilized to develop charge and non-charge based beyond-CMOS devices  While beyond-CMOS devices may achieve lower power. Currently. III-V. devices and architectures for storage-class memories.g.. speed) and utilize their advantages (e.g. sensing.g. which will continue to be the main methodology used in “beyond CMOS”.g. carbon nanotube.g... etc. and tabulation ERD has well-defined approaches to select. etc. channel thickness. categorize.  Some key attributes pursued by ERD devices continue to be critical for new application drivers. Methodology 3..g. Opportunities and issues  A range of new memory concepts (mostly based on resistance change in two-terminal structures) with promising characteristics to meet requirement from working memory to storage applications  Most emerging memories are BEOL devices: integration and processing issues  High-density memory arrays require functional selector devices in addition to memory elements  Reliability issues of these emerging memories have to be identified and addressed early in the technology development  Novel channel materials with better transport properties are actively explored. security. e. S/D doping concentrations. 2D materials  Electrostatics can be better controlled in gate-all-around nanowire devices  Integration of heterogeneous materials is challenging  Control variability of critical dimensions and statistical distributions (e. and big data. etc. 3.  Heterogeneous integration of digital and non-digital functionalities into compact systems that will be the key driver for a wide variety of application fields. such as communication.  New application drivers require new characteristics and capabilities. low power) to improve overall performance  New architectures may enable application-specific optimization  Lack of clear correlation between emerging architectures and devices  Architecture-level assessment and benchmark require different approaches from device-level assessment  The industry faces an increasing importance of a new trend where added value to devices is provided by incorporating functionalities that do not necessarily scale according to "Moore's Law“.

however. due to limited progress. ERD tabulate technology entries with best available demonstrated and projected parameters for assessment. some recent development (e. For example. Among emerging memory devices. and gain (for logic) or on/off ratio (for memory). Recently. ERD has traditionally tracked device-level parameters. However.0 with new application drivers. Instead. If it is removed from the logic tables. 3. giant spin-Hall-effect. voltagecontrolled magnetic anisotropy) may enable novel STTRAM devices and structures. these criteria need to be re-designed to ensure their relevance. Technology entries will be categorized for clarity and tracking. ERD has carried out critical reviews based on the survey in the ERD group to evaluate memory and logic devices using eight criteria. A “novel MRAM/STTRAM” memory entry may be introduced in the chapter. and presentations. Another challenge is to increase the statistical base of the survey to enhance the validity of the critical review. endurance. with further categories based on maturity. A possible arrangement is to categorize macromolecular memory as a type of resistive memory featuring polymer materials. The macromolecular memory has raised many questions on the real function of polymer materials in the switching mechanism. and the ERM chapter continues tracking perpendicular MTJ (Magnetic Tunnel Junction) materials.1 Emerging memory/logic devices and architectures Table 2 is a summary of the entries of emerging memory/logic devices and architectures in the 2013 ERD chapter. Atomic switch is essentially a logic application of CBRAM(Conductive Bridging RAM)-type of memories. emerging memory devices are divided into volatile and nonvolatile. tracking circuit-level parameters involves more complexity and variety of circuit implementations that are difficult to manage. In the context of ITRS 2. molecular memory has shown limited progress and may be considered to transition out of the chapter. Nevertheless. Proposed scope of “Beyond CMOS” 4.g. A collection of the “best” parameters of a technology from different publications and implementations may not provide a realistic assessment of a technology. It provides useful opinion-based assessment and the survey results (plotted as spider charts) have been widely cited in research papers. scalability. 4.. The “beyond CMOS” chapter will continue to cover similar topics with updates based on technology progress. circuit-level parameters have become increasingly important.2 Technology assessment and critical review Key assessment parameters for emerging memory and logic devices include energy/power. MRAM (Magnetic RAM) / STTRAM (Spin Torque Transfer RAM) has transitioned from the ERD chapter to the PIDS chapter. speed. atomic switch and excitonic FET are two possible entries to be removed from the chapter. Emerging memory/logic devices and architectures will still be the most important sections with the new focus on “beyond CMOS”. emerging technologies are difficult to be roadmapped as yearly projections. ERD has gradually started including some circuit-level performance metrics. reports. it   3 . With the long-term research nature. Emerging logic devices are divided into three groups based on novelty and state of variables. Among emerging logic devices. One of the challenges is to balance the best value of individual parameters and the tradeoff among parameters.Beyond‐CMOS White Paper      technology will be introduced into ERD only if at least two research groups are actively working on it or one group has published extensively on it.

e. Table 3 summarizes the devices categorized in the chapter. The emerging architecture section currently covers a broad range of interesting concepts. 2D channel FET.. A major weakness of the current section is the lack of quantitative assessment of these devices.g. Technology entries of emerging devices for RF application in ERD MtM section ERD MtM devices for RF applications   4 . it is more important for ERD to evaluate the potential of emerging devices for RF applications. Several new logic devices have been proposed recently and will be evaluated as possible new logic entries.Beyond‐CMOS White Paper      may be discussed in the CBRAM category as its logic application and in the reconfigurable architecture section. Table 3. it lacks consistent organization and clear link with device entries. which will be addressed in 2015. Table 2. BisFET (Bilayer pseudo-spin Field Effect Transistor) is going through major changes from its original concept and the ERD entry will be revised accordingly. An emerging architecture-device mapping workshop is planned in early 2015 to explore this correlation and help revising this section. pizeotronic transistors. Emerging memory/logic devices and architectures in 2013 ERD chapter Emerging memory devices Emerging logic devices Emerging architectures  Emerging ferroelectric memory o FeFET o FE tunnel junction      Carbon memory Mott memory Macromolecular memory Molecular memory ReRAM o Electrochemical metallization bridge o Metal oxide: bipolar filament o Metal oxide: unipolar filament o Metal oxide: bipolar non-filamentary                Carbon-based nanoelectronics Nanowire FETs Tunnel FET n-Ge and p-IIIV Spin-FET and spin-MOSFET NEMS Atomic switch Mott FET Neg-Cg ferroelectric FET Spin wave devices Nano-Magnet Logic Excitonic FET BisFET Spin torque majority gate All spin logic  Memory architectures for program centric architectures  Storage Class Memories  Evolved architectures exploiting emerging research memory devices  Architectures that can learn  Morphic architectures o Neuromorphic architecture o Cellular automata architecture o Cortical architecture 4. however. With mobile applications identified as a key system driver. The n-Ge and p-IIIV FETs have been considered for transition because of its relative more mature nature than the other beyond-CMOS devices. This section will be reorganized to both reflect the most advanced progress in emerging architectures and also correlate these architecture concepts with device options.2 Emerging devices for RF ERD has started a “more-than-Moore (MtM)” section in 2011 and the first topic was emerging devices for analog and RF applications.

g. this section will be further expanded into more detailed device categories with assessment. etc. Therefore. 4. However. ERD plans to explore security applications of emerging devices in “beyond CMOS”. 4.6 Flexible electronics Flexible electronics may provide low-cost solutions (e. printing) and useful candidates for wearable electronics.Beyond‐CMOS White Paper       Graphene RF transistors  Spin torque oscillators  NEMS resonators o Based on Si nanowires. The “beyond CMOS” FT will explore emerging devices suitable for sensor applications. sensors have become key components in ITRS 2. These devices will also be discussed in the context of architectures with learning capabilities.4 Emerging devices with learning capabilities The 2013 ERD chapter added “devices with learning capabilities” as a sub-category of MtM section. as an example. This new category for ERD requires new expertise to be added in the group. Summary   5 . The randomness in some emerging device characteristics can be utilized to realize random number generators. It roughly divided “learning devices” into two types: “learning through re-configuration” and “learning by examples”.g.0. IoT. It is also important for ERD to follow the methodology and assessment criteria developed by the “heterogeneous components” FT to track emerging candidates for sensor applications. Some emerging devices may be more robust against side-channel attack and temper-resistant. increasing research effort has focused on security solutions that can be implemented in hardware. e.5 Emerging devices for security Security is a critical requirement for all the major application drivers identified for ITRS 2. and cloud computing. Exploring this new category of emerging devices will require assessment criteria different from conventional memory/logic devices.0 and are a major focus of the “heterogeneous components” FT. utilize intrinsic variability in IC and devices to generate security primitives. macromolecular devices. thin-film transistors. 5. CNT and graphene o Based on resonant gate or vibrating body transistors  RF mixers o Resonant tunneling diodes o Single electron transistors o Graphene and CNT transistors 4. some resistive memories. Some emerging devices have attractive features that are potentially useful for flexible electronics. These security features on the device level could be utilized for efficient hardware security solutions. Bio-inspired intelligent and efficient computing is considered an important future direction.. Physically unclonable functions (PUFs)..3 Emerging devices for sensor applications With the potential application drivers of mobile. 4. Current security solutions are often realized by software and algorithms.

0.   6 . flexible electronics. including emerging device for sensor applications. emerging devices for security applications.Beyond‐CMOS White Paper      The ERD group will focus on “beyond CMOS” technology options for ITRS 2. Significant expansion of the ERD chapter is planned under the scope of “beyond CMOS”. The traditional ERD focus on memory and logic devices will continue to be the major part in the chapter.0. Clear mapping between devices and architecture concepts will provide more useful research guidelines. Emerging architectures have become increasingly important in beyond-CMOS research. The expansion will require new expertise in the ERD group. ERD group will closely collaborate and coordinate with other FTs and TWGs to deliver the future technology options in ITRS 2.