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Upward compatible
Programs for SIC can run on SIC/XE
Number
Special use
PC
SW
SIC does not have any stack. It uses the linkage register to store the
return address.
It is difficult to write the recursive program. A programmer has to
maintain memory for return addresses when he write more than one
layer of function call.
Integers
24-bit binary numbers
2s complement for negative values
-N 2n N
e.g., if n = 4,
-1 24 1 = (1111)2.
address (15)
Addressing modes
Mode
Indication
Direct
x=0
TA = address
Indexed
x=1
TA = address + (X)
(A) (ALPHA)
(ALPHA) (A)
Arithmetic instruction
involve register A and a word in memory
ADD, SUB, MUL, DIV
Ex: ADD
ALPHA (A) (A) + (ALPHA)
Comparison instruction
involves register A and a word in memory
save result in the condition code (CC) of SW
COMP
Ex: COMP
ALPHA CC (<,+,>) of (A)?(ALPHA)
RSUB
returns to the address in L
TD
JEQ
RD
STCH
.
.
INDEV
INLOOP
INDEV
DATA
OUTLP
TD
JEQ
LDCH
WD
.
.
OUTDEV
OUTLP
DATA
OUTDEV
INDEV
BYTE
XF1
OUTDEV
BYTE
X05
DATA
RESB
ONE-BYTE VARIABLE
Programming examples
- Data movement
Page 13, Figure 1.2 (a)
LDA
STA
LDCH
STCH
.
.
FIVE
ALPHA
CHARZ
C1
ALPHA
RESW
ONE-WORD VARIABLE
FIVE
WORD
ONE-WORD CONSTANT
CHARZ
BYTE
CZ
ONE-BYTE CONSTANT
C1
RESB
ONE-BYTE VARIABLE
Programming examples
- Arithmetic
Page 15, Figure 1.3 (a)
ONE
.
ALPHA
BETA
GAMMA
DELTA
INCR
LDA
ADD
SUB
STA
LDA
ADD
SUB
STA
.
.
ALPHA
INCR
ONE
BETA
GAMMA
INCR
ONE
DELTA
WORD
ONE-WORD CONSTANT
ONE-WORD VARIABLES
RESW
RESW
RESW
RESW
RESW
1
1
1
1
1
Programming examples
-Looping and indexing
Page 16, Figure 1.4 (a)
MOVECH
STR1
STR2
.
ZERO
ELEVEN
LDX
LDCH
STCH
TIX
JLT
.
.
ZERO
STR1,X
STR2,X
ELEVEN
MOVECH
BYTE
RESB
CTEST STRING
11
WORD 0
WORD 11
Programming examples
- Indexing and looping
Page 17, Figure 1.5 (a)
ADDLP
INDEX
.
ALPHA
BETA
GAMMA
.
ZERO
K300
THREE
LDA
STA
LDX
LDA
ADD
STA
LDA
ADD
STA
COMP
JLT
.
ZERO
INDEX
INDEX
ALPHA,X
BETA,X
GAMMA,X
INDEX
THREE
INDEX
K300
ADDLP
RESW
RESW
RESW
RESW
100
100
100
ONE-WORD CONSTANTS
WORD
WORD
WORD
0
300
3
Programming examples
- Subroutine call and record input
Page 20, Figure 1.7 (a)
JSUB
.
READ
READ
RLOOP
LDX
TD
JEQ
RD
STCH
TIX
JLT
RSUB
.
ZERO
INDEV
RLOOP
INDEV
RECORD,X
K100
RLOOP
INDEV
RECORD
.
ZERO
K100
BYTE
RESB
XF1
100
WORD
WORD
0
100
Define storage
WORD/BYTE
Reserve one word/byte of storage
RESW/RESB
Reserve one or more words/bytes of storage
Example
ALPHA
FIVE
CHARZ
C1
RESW
WORD
BYTE
RESB
1
5
C`Z
1
: immediate addressing
: indirect addressing
: format 4
: the current value of PC
: character string
m, x : x denotes the index addressing
Number
Special use
Registers S and T are only for storing data. They can not use
for accumulator
Ex:
ADDR
S, A
COMPR X, T
A A+S
36
fraction
exponent
Solutions
1 15
x address
"
# !"
"
# !"
" # !"
" # !"
!"
&
!"
#! "
! "
%
Base relative
b=1,p=0
Program-counter relative
b=0,p=1
Indication
Operand value
Immediate addressing
i=1, n=0
Indirect addressing
i=0, n=1
Simple addressing
i=0, n=0
Standard SIC
i=1, n=1
.
.
.
3030
003600
.
.
.
.
.
.
3600
103000
.
.
.
.
.
.
6390
00C303
.
.
.
.
.
.
C303
003030
.
.
.
.
.
.
(B)=006000
(PC)=003000
(X)=000090
Binary
op
n i
x b p e
disp/address
Value
Target loaded into
address register A
032600
000000
3600
103000
03C300
000000
6390
00C303
022030
000000
3030
103000
010030
000000
30
000030
003600
000000
3600
103000
0310C303
000000
C303
003030
Flag bits
nixbpe
Assembler lenguage
notation
Calculation of
target address TA
Operand
Notes
Simple
110000
110001
110010
110100
111000
111001
111010
111100
000--001---
+op c
+op m
+op m
+op m
+op c,X
+op m,X
+op m,X
+op m,X
+op m
+op m,X
disp
addr
(PC)+disp
(B)+disp
disp+(X)
addr+(X)
(PC)+disp+(X)
(B)+disp+(X)
b/p/e/disp
b/p/e/disp+(X)
(TA)
(TA)
(TA)
(TA)
(TA)
(TA)
(TA)
(TA)
(TA)
(TA)
4D
4D
4DA
4DA
4D
4D
4DA
4DA
4DAS
4DAS
Indirect
100000
100001
100010
100100
+op @c
+op @m
+op @m
+op @m
disp
addr
(PC)+disp
(B)+disp
((TA))
((TA))
((TA))
((TA))
4D
4D
4DA
4DA
Immediate
010000
010001
010010
010100
+op #c
+op #m
+op #m
+op #m
disp
addr
(PC)+disp
(B)+disp
TA
TA
TA
TA
4D
4D
4DA
4DA
Input/Output
SIO, TIO, HIO: start, test, halt the operation of I/O device
#5
ALPHA
#90
C1
1
1
ONE-WORD VARIABLE
ONE-BYTE VARIABLE
INCR
ALPHA
S,A
#1
BETA
GAMMA
S,A
#1
DELTA
1
1
1
1
1
LDT
LDX
LDCH
STCH
TIXR
JLT
.
.
#11
#0
STR1,X
STR2,X
T
MOVECH
INITIALIZE REGISTER T TO 11
INITIALIZE INDEX REGISTER TO 0
LOAD CHARACTER FROM STR1 INTO REG A
SOTRE CHARACTER INTO STR2
ADD 1 TO INDEX, COMPARE RESULT TO 11
LOOP IF INDEX IS LESS THAN 11
STR1
STR2
BYTE
RESB
CTEST STRING
11
ADDLP
.
ALPHA
BETA
GAMMA
LDS
LDT
LDX
LDA
ADD
STA
ADDR
COMPR
JLT
.
.
#3
#300
#0
ALPHA,X
BETA,X
GAMMA,X
S,X
X,T
ADDLP
INITIALIZE REGISTER S TO 3
INITIALIZE REGISTER T TO 300
INITIALIZE INDEX REGISTER TO 0
LOAD WORD FROM ALPHA INTO REGISTER A
ADD WORD FROM BETA
STORE THE RESULT IN A WORD IN GAMMA
ADD 3 TO INDEX VALUE
COMPARE NEW INDEX VALUE TO 300
LOOP IF INDEX VALUE IS LESS THAN 300
100
100
100
LDX
LDT
TD
JEQ
RD
STCH
TIXR
JLT
RSUB
.
.
INDEV
BYTE
RECORD RESB
READ
XF1
100